CN110321574B - Method and device for printing waveform - Google Patents
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- CN110321574B CN110321574B CN201810269523.4A CN201810269523A CN110321574B CN 110321574 B CN110321574 B CN 110321574B CN 201810269523 A CN201810269523 A CN 201810269523A CN 110321574 B CN110321574 B CN 110321574B
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Abstract
The application provides a method and a device for printing waveforms, wherein the method comprises the following steps: running a plurality of same test cases to simulate the same tested design in parallel; invoking a plurality of processors to print waveforms of emulated signals in parallel, wherein each of the processors prints a set of signals in the emulated signals. In an embodiment of the present application, waveforms of emulated signals are printed in parallel by a plurality of processors, wherein each of the processors prints a set of the emulated signals. The method avoids the situation that one processor prints all the waveforms of the simulation signals in the traditional simulation technology, and is beneficial to reducing the time required for printing the waveforms of the simulation signals by reducing the number of the signals needing to be printed.
Description
Technical Field
The present application relates to the field of electronic design automation, and more particularly, to a method and apparatus for printing waveforms.
Background
Electronic Design Automation (EDA) technology is based on a computer as a tool, a designer can describe a Design Under Test (DUT) by using Hardware Description Language (HDL) on an EDA software platform, and then the computer automatically completes the operations of logic compilation, simplification, segmentation, synthesis, optimization, layout, wiring, simulation and the like, and records the waveform of a simulation signal generated in the simulation process.
Nowadays, as the scale of the design to be tested is larger and larger, the process of simulating the design to be tested by using the test case and printing the waveform of the simulation signal is longer and longer, and usually takes 1 to 2 days.
Therefore, it is desirable to provide a waveform printing technique that is advantageous for increasing the speed of printing the waveform of the emulation signal.
Disclosure of Invention
The application provides a method and a device for printing waveforms, which are beneficial to improving the speed of printing the waveforms of simulation signals.
In a first aspect, there is provided a method of printing a waveform, comprising: running a plurality of same test cases to simulate the same tested design in parallel; invoking a plurality of processors to print waveforms of emulated signals in parallel, wherein each of the processors prints a set of signals in the emulated signals.
In an embodiment of the present application, waveforms of emulated signals are printed in parallel by a plurality of processors, wherein each of the processors prints a set of the emulated signals. The method avoids the situation that one processor prints all the waveforms of the simulation signals in the traditional simulation technology, and is beneficial to reducing the time required for printing the waveforms of the simulation signals by reducing the number of the signals needing to be printed.
In one possible design, the printing process of the waveform of the simulation signal includes n periods, where n is a positive integer greater than 1; the method further comprises the following steps: in response to the end of the ith time period in the n time periods, combining the waveform files printed by a plurality of processors in the ith time period into one waveform file to form a waveform file corresponding to the ith time period; and combining the n waveform files corresponding to the n time periods into one waveform file to form the waveform file of the simulation signal.
In the embodiment of the present application, the process of merging the printed waveforms may be performed simultaneously with the process of simulating the design under test, which is beneficial to shortening the time of acquiring the waveform file of the simulation signal.
In one possible design, the printing process of the waveform of the simulation signal includes n periods, where n is a positive integer greater than 1; the method further comprises the following steps: in response to the end of the ith period of the n periods, combining the waveform files printed by the processors in the first i periods into one waveform file.
In the embodiment of the present application, the process of merging the printed waveforms may be performed simultaneously with the process of simulating the design under test, which is beneficial to shortening the time of acquiring the waveform file of the simulation signal.
In one possible design, prior to said invoking the plurality of processors to print the waveforms of the emulated signals in parallel, the method further comprises: randomly dividing different ones of the simulated signals into a plurality of groups, the one group of signals belonging to one of the plurality of groups.
In the embodiment of the application, the simulation signals are randomly distributed to the multiple groups, so that the possibility of distributing the simulation signals with high turnover rate to the same group is reduced, the size of each group of waveforms is balanced, and the simulation speed is improved.
In one possible design, waveforms of different groups of signals in the simulation signal are recorded to different waveform files, and the method further includes: and writing the different waveform files into a storage space in parallel.
In the embodiment of the application, different waveform files are stored in the storage space in parallel, so that the speed of writing different waveform files into the storage space is improved.
In a second aspect, there is provided an apparatus for printing a waveform, comprising: the processing module is used for running a plurality of same test cases to simulate the same design to be tested in parallel; a printing module to invoke a plurality of processors to print waveforms of emulated signals in parallel, wherein each of the processors prints a set of signals in the emulated signals.
In an embodiment of the present application, waveforms of emulated signals are printed in parallel by a plurality of processors, wherein each of the processors prints a set of the emulated signals. The method avoids the situation that one processor prints all the waveforms of the simulation signals in the traditional simulation technology, and is beneficial to reducing the time required for printing the waveforms of the simulation signals by reducing the number of the signals needing to be printed.
In one possible design, the printing process of the waveform of the simulation signal includes n periods, where n is a positive integer greater than 1; the processing module is further configured to: in response to the end of the ith period in the n periods, combining the waveform files printed by the processors in the ith period into one waveform file to form a waveform file corresponding to the ith period; and combining the n waveform files corresponding to the n time periods into one waveform file to form the waveform file of the simulation signal.
In the embodiment of the present application, the process of merging the printed waveforms may be performed simultaneously with the process of simulating the design under test, which is beneficial to shortening the time of acquiring the waveform file of the simulation signal.
In one possible design, the printing process of the waveform of the simulation signal includes n periods, where n is a positive integer greater than 1; the processing module is further configured to: in response to the end of the ith period of the n periods, combining the waveform files printed by the processors in the first i periods into one waveform file.
In the embodiment of the present application, the process of merging the printed waveforms may be performed simultaneously with the process of simulating the design under test, which is beneficial to shortening the time of acquiring the waveform file of the simulation signal.
In one possible design, the processing module is further to: randomly dividing different ones of the simulated signals into a plurality of groups, the one group of signals belonging to one of the plurality of groups.
In the embodiment of the application, the simulation signals are randomly distributed to the multiple groups, so that the possibility of distributing the simulation signals with high turnover rate to the same group is reduced, the size of each group of waveforms is balanced, and the simulation speed is improved.
In one possible design, waveforms of different groups of signals in the simulation signal are recorded in different waveform files, and the processing module is further configured to: and writing the different waveform files into a storage space in parallel.
In the embodiment of the application, the storage space is simultaneously stored with the waveforms of the simulation signals of the multiple groups of tested parts, so that the speed of storing the waveforms of the simulation signals of the multiple groups of tested parts is improved.
In a third aspect, a computer-readable medium is provided, having program code stored thereon, which, when run on a computer, causes the computer to perform the method of the first aspect described above.
In a fourth aspect, there is provided a computer comprising a processor and a memory, the memory being arranged to store a computer program, the processor being arranged to retrieve and run the computer program from the memory such that the computer performs the method of the above aspect.
In a fifth aspect, there is provided a computer program product comprising: computer program code which, when run on a computer, causes the computer to perform the method of the above-mentioned aspects.
In a sixth aspect, a system on a chip is provided, the system on a chip comprising a processor for a computing device to perform the functions recited in the above aspects, e.g. to generate, receive, transmit, or process data and/or information recited in the above methods. In one possible design, the system-on-chip further includes a memory for storing necessary program instructions and data in the computing device. The chip system may be formed by at least one chip, and may also include a chip and other discrete devices.
Drawings
Fig. 1 is a schematic architecture diagram of a computing device 100.
FIG. 2 is a schematic block diagram of a verification platform in an embodiment of the present application.
Fig. 3 is a schematic flow chart of a method of printing waveforms of an embodiment of the present application.
Fig. 4 is a schematic diagram of a time axis of an embodiment of the present application.
Fig. 5 is a schematic block diagram of an apparatus for printing waveforms according to an embodiment of the present application.
Detailed Description
For ease of understanding, a brief description of a scenario in which the embodiments of the present application are applicable will be given with reference to fig. 1 and 2.
Fig. 1 is a schematic architecture diagram of a computing device 100. The computing device 100 shown in FIG. 1 may run a simulation program to simulate a design under test. The computing device 100 shown in fig. 1 includes at least one memory 110, at least one processor 120, and an input-output interface 130. The at least one memory 110, the at least one processor 120 and the input/output interface 130 are connected via an internal connection path, the memory 110 is used for storing program instructions, and the processor 120 is used for executing the program instructions stored in the memory 120, so as to control the input/output interface 130 to receive input data and information, output data such as operation results, and control the transceiver 140 to transmit signals.
It should be understood that the computing device 100 described above may be a device having an executing emulation program, such as a computer, server, or the like.
The processor 120 may be implemented as a general-purpose Central Processing Unit (CPU), a microprocessor, an Application Specific Integrated Circuit (ASIC), or one or more Integrated circuits.
Memory 110 may include both read-only memory and random access memory and provides instructions and data to processor 120. A portion of processor 120 may also include non-volatile random access memory. For example, the processor 120 may also store device type information.
During the simulation of the design under test by the computing device 100, the computing device may run the verification platform to implement the simulation process for the design under test. The specific structure of the verification platform can be seen in fig. 2.
Fig. 2 shows a schematic block diagram of a verification platform in an embodiment of the present application. The verification platform (Test bench)200 shown in fig. 2 may include the following functional modules: a design under test 210, an input module 220, and a print module 230.
The design under test 210 is the object that is verified during the simulation. For example, it may be a circuit or a chip having a certain function.
The input module 220 is used for inputting an excitation signal to the design to be tested so as to simulate an external excitation signal of the design to be tested in the actual application process.
The printing module 230 is configured to print the waveform of the simulation signal, so that a tester can verify whether the design under test has a specific function according to the waveform of the simulation signal.
Specifically, the simulation signal is a signal generated in a process of simulating a design to be tested.
In the conventional technology, the process of simulating the design to be tested and printing the waveform of the simulation signal is usually performed by one processor in the computing device, and the time required for performing the process is long, for example, 1 to 2 days, due to the limitation of the computing resources of one processor.
In order to shorten the time required to print the waveform of the emulated signal, the present application provides a method of printing the waveform.
A schematic flow chart of a method of printing waveforms of an embodiment of the present application is described below with reference to fig. 3. It should be understood that the method illustrated in FIG. 3 may be performed by the computing device illustrated in FIG. 1. The method shown in fig. 3 includes steps 310 through 320.
The same design under test is simulated in parallel by running the same test cases 310.
Specifically, a Test Case (Test Case) is understood as a set of Test inputs (i.e., input signals), execution conditions, and expected results programmed to verify a particular function of a design under Test, to verify whether the design under Test can perform the particular function.
The simulation is performed by using a plurality of same test cases for the design under test, which is understood to be the multiple simulation performed by using the same test cases for the design under test.
It should be understood that the same test cases can be understood as the test parameters, seeds, and case numbers in each of the test cases are the same.
Alternatively, the step 310 may be executed by a plurality of processors, that is, each processor executes a test case to simulate the design under test.
Invoking a plurality of processors to print waveforms of emulated signals in parallel, wherein each of said processors prints a set of signals in said emulated signals 320.
Specifically, the simulation signal may be a simulation signal generated during the simulation of the design under test. The simulation signal may be a simulation signal of a waveform to be printed in the process of performing the simulation on the design under test, that is, the simulation signal of the waveform to be printed may be a part or all of the simulation signal generated by the design under test.
In an embodiment of the present application, waveforms of emulated signals are printed in parallel by a plurality of processors, wherein each of the processors prints a set of the emulated signals. The method avoids the situation that one processor prints all the waveforms of the simulation signals in the traditional simulation technology, and is beneficial to reducing the time required for printing the waveforms of the simulation signals by reducing the number of the signals needing to be printed.
Alternatively, the plurality of processors for printing the waveform of the simulation signal may be the same processors as the processors for performing the parallel simulation of the design under test. The plurality of processors for printing the waveform of the simulation signal may be different from the processor for performing the parallel simulation of the design under test. For example, in printing the set of signals, the processor that simulates the design under test is a different processor than the processor that prints the waveforms of the set of signals.
It should be noted that the plurality of processors may be understood as a plurality of independent processors, and may also be understood as a plurality of compute engines (cores) in one processor.
Optionally, the plurality of processors print the simulation signal in parallel, and each of the plurality of processors prints a waveform of a signal of a different one of the plurality of sets.
When a plurality of groups of simulation signals output by the tested part are printed, the mode of printing the waveform can be determined according to the type of the waveform checking tool. For example, each time the view waveform tool supports viewing only one waveform, the waveforms output by the sets of simulated signals output by the measured portion may be combined into one waveform for viewing by the view waveform tool. For another example, each time the waveform viewing tool supports viewing of a plurality of waveforms, the waveforms of the simulation signals corresponding to the plurality of groups of measured portions may be directly output.
It should be noted that the two ways of printing the waveforms may also be selected according to a habit of a user viewing the waveforms, which is not limited in the embodiment of the present application.
Two ways of printing waveforms of the embodiments of the present application are described in detail below.
In the first mode, the waveforms of each group of signals in the simulation signals are combined into one waveform file.
Optionally, as an embodiment, the printing process of the waveform of the dummy signal includes n periods, where n is a positive integer greater than or equal to 1; the method further comprises the following steps: in response to the end of the ith period of the n periods, combining the waveform files printed by the processors in the first i periods into one waveform file.
Specifically, the above-mentioned merging of the waveform files printed in the first i periods by a plurality of the processors into one waveform file in response to the end of the i-th period in the n periods may be understood as generating the waveform file by starting to merge the i-th period at the time when the i-th period ends and the waveform of the signal obtained earlier than each of the i-th periods.
It should be noted that, in the embodiment of the present application, a specific manner of combining the waveforms printed in each time interval is not limited, for example, a plurality of waveforms printed in a first time interval of n time intervals may be combined into a first waveform file, then a plurality of waveforms printed in a second time interval of n time intervals may be combined with the first waveform file, respectively, to generate a second waveform file, and so on until the waveforms printed in the n time intervals are all combined into a waveform file, that is, a waveform file of the simulation signal.
For example, the time duration for performing the parallel simulation on the design under test by using the same plurality of test cases includes a first time period, a second time period and a third time period. Specifically, the arrangement of the three time segments on the time axis can be seen in fig. 4, and the first time segment is the earliest time segment of the three time segments. In order to facilitate the distinction, in a first time period, the waveforms of a plurality of groups of simulation signals output by the tested part become a first group of waveforms; in a second time period, the waveforms of the simulation signals output by the multiple groups of tested parts become a second group of waveforms; and in the third time period, the waveforms of the simulation signals output by the multiple groups of tested parts become a third group of waveforms.
The process of printing the waveform is described below based on the above description.
During a first time period, multiple groups of portions under test are simulated in parallel using multiple test cases so that printing of a first group of waveforms can begin at the end of the first time period.
And in a second time period, using a plurality of test cases to continue parallel simulation on the plurality of groups of test parts, and simultaneously combining a plurality of waveforms in the first group of waveforms to generate a first waveform.
And in a third time period, using a plurality of test cases to continue parallel simulation on the plurality of groups of test parts, and combining the second group of waveforms with the first waveforms to generate second waveforms.
And combining the third group of waveforms and the second waveforms into one waveform at any time after the third time period is ended, and generating the waveforms of the simulation signals output by the plurality of groups of test parts.
For another example, the plurality of waveforms printed in each of the n periods may be combined into a total waveform file, and then the total waveform files corresponding to each period are combined to generate a waveform file, that is, a waveform file of the simulation signal.
In other words, the printing process of the waveform of the dummy signal includes n periods, where n is a positive integer greater than 1; the method further comprises the following steps: in response to the end of the ith period in the n periods, combining the waveform files printed by the processors in the ith period into one waveform file to form a waveform file corresponding to the ith period; and combining the n waveform files corresponding to the n time periods into one waveform file to form the waveform file of the simulation signal.
Specifically, the waveforms of the simulation signals output by the multiple groups of measured portions are obtained by combining waveforms of the simulation signals output by the multiple groups of measured portions acquired in each time period.
In the embodiment of the present application, the process of merging the printed waveforms may be performed simultaneously with the process of simulating the design under test, which is beneficial to shortening the time of acquiring the waveform file of the simulation signal.
In the second mode, the waveforms of the simulation signals are printed in parallel by directly outputting a plurality of processors.
That is, after the above-described step 320 is performed, the plurality of processors are directly output to print the waveforms of the emulated signals in parallel. The waveform of the simulated signal may include a plurality of waveforms, each waveform describing a simulation result for each set of signals in the simulated signal.
In order to facilitate the designer to view the waveforms of the simulation signals at a later stage, the waveforms of the simulation signals may be stored in a file to a memory, wherein the memory may be a memory of the computing device shown in fig. 1, and the memory may be a memory located outside the computing device.
Namely, the method further comprises: and storing the waveform file of the simulation signal into a storage space.
Specifically, the storage space may be a storage space provided by the memory.
In order to increase the speed of storing the waveform file, the embodiment of the application may further select a mode of storing the waveform of the emulation signal according to the writing speed supported by the memory.
Optionally, the method further comprises: the waveforms of different groups of signals in the simulation signals are recorded into different waveform files, and the method further comprises the following steps: and writing the different waveform files into a storage space in parallel.
Specifically, if the memory where the storage space is located supports a fast write speed, for example, higher than a preset write speed threshold, the different waveform files may be written into the storage space in parallel.
If the memory in which the storage space is located is only written at a relatively low speed, for example, lower than a preset writing speed threshold, the different waveform files may be written into different storage spaces, respectively.
In the embodiment of the application, the storage space is simultaneously stored with the waveforms of the simulation signals of the multiple groups of tested parts, so that the speed of storing the waveforms of the simulation signals of the multiple groups of tested parts is improved.
Optionally, as an embodiment, before the invoking of the plurality of processors to print the waveform of the emulated signal in parallel, the method further includes: randomly dividing different ones of the simulated signals into a plurality of groups, the one group of signals belonging to one of the plurality of groups.
It should be noted that before the waveforms of the emulated signals are printed in parallel, the emulated signals of the waveforms to be printed may be randomly divided into multiple groups, so that different ones of the multiple processors print the waveforms of any one of the multiple groups.
In the embodiment of the application, the simulation signals are randomly distributed to the multiple groups, so that the possibility of distributing the simulation signals with high turnover rate to the same group is reduced, the size of each group of waveforms is balanced, and the simulation speed is improved.
The method for printing waveforms according to the embodiment of the present application is described above in detail with reference to fig. 1 to 4, and the apparatus for printing waveforms according to the embodiment of the present application is described below with reference to fig. 5. It should be noted that the apparatus shown in fig. 5 can implement each step in the above method, and for brevity, no further description is provided here.
Fig. 5 is a schematic block diagram of an apparatus for printing waveforms according to an embodiment of the present application. The apparatus 500 shown in fig. 5 comprises: a processing module 510 and a printing module 520.
A processing module 510, configured to run multiple identical test cases and simulate the same design under test in parallel;
a printing module 520 for invoking a plurality of processors to print waveforms of emulated signals in parallel, wherein each of the processors prints a set of the emulated signals.
Optionally, as an embodiment, the printing process of the waveform of the simulation signal includes n periods, where n is a positive integer greater than 1; the processing module is further configured to: in response to the end of the ith period in the n periods, combining the waveform files printed by the processors in the ith period into one waveform file to form a waveform file corresponding to the ith period; and combining the n waveform files corresponding to the n time periods into one waveform file to form the waveform file of the simulation signal.
Optionally, as an embodiment, the printing process of the waveform of the simulation signal includes n periods, where n is a positive integer greater than 1; the processing module is further configured to: in response to the end of the ith period of the n periods, combining the waveform files printed by the processors in the first i periods into one waveform file.
Optionally, as an embodiment, the processing module is further configured to: randomly dividing different ones of the simulated signals into a plurality of groups, the one group of signals belonging to one of the plurality of groups.
Optionally, as an embodiment, waveforms of different groups of signals in the simulation signals are recorded in different waveform files, and the processing module is further configured to: and writing the different waveform files into a storage space in parallel.
In alternative embodiments, the processing module 510 and the printing module 520 described above may be the processor 120 of the computing device 100.
It should be understood that, in the various embodiments of the present application, the sequence numbers of the above-mentioned processes do not mean the execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, cause the processes or functions described in accordance with the embodiments of the application to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored on a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, from one website, computer, server, or data center to another website, computer, server, or data center via wire (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer readable storage medium may be any available medium that can be read by a computer or a data storage device including one or more available media integrated servers, data centers, and the like. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., Digital Versatile Disk (DVD)), or a semiconductor medium (e.g., Solid State Disk (SSD)), among others.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (9)
1. A method of printing a waveform, comprising:
running a plurality of same test cases to simulate the same tested design in parallel;
invoking a plurality of processors to print waveforms of emulated signals in parallel, wherein each of the processors prints a set of signals in the emulated signals;
prior to said invoking the plurality of processors to print the waveforms of the emulated signals in parallel, the method further comprises:
randomly dividing different ones of the simulated signals into a plurality of groups, the one group of signals belonging to one of the plurality of groups.
2. The method of claim 1, wherein the printing of the waveform of the emulated signal comprises n time periods, where n is a positive integer greater than 1;
the method further comprises the following steps:
in response to the end of the ith period in the n periods, combining the waveform files printed by the processors in the ith period into one waveform file to form a waveform file corresponding to the ith period;
and combining the n waveform files corresponding to the n time periods into one waveform file to form the waveform file of the simulation signal.
3. The method of claim 1, wherein the printing of the waveform of the emulated signal comprises n time periods, where n is a positive integer greater than 1;
the method further comprises the following steps:
in response to the end of the ith period of the n periods, combining the waveform files printed by the processors in the first i periods into one waveform file.
4. The method of claim 1, wherein waveforms of different sets of signals in the simulated signal are recorded to different waveform files, the method further comprising:
and writing the different waveform files into a storage space in parallel.
5. An apparatus for printing waveforms, comprising:
the processing module is used for running a plurality of same test cases and simulating the same design to be tested in parallel;
a printing module for invoking a plurality of processors to print waveforms of emulated signals in parallel, wherein each of the processors prints a set of signals in the emulated signals;
the processing module is further configured to:
randomly dividing different ones of the simulated signals into a plurality of groups, the one group of signals belonging to one of the plurality of groups.
6. The apparatus of claim 5, wherein the printing of the waveform of the emulated signal comprises n time periods, where n is a positive integer greater than 1;
the processing module is further configured to:
in response to the end of the ith period in the n periods, combining the waveform files printed by the processors in the ith period into one waveform file to form a waveform file corresponding to the ith period;
and combining the n waveform files corresponding to the n time periods into one waveform file to form the waveform file of the simulation signal.
7. The apparatus of claim 6, wherein the printing of the waveform of the emulated signal comprises n time periods, where n is a positive integer greater than 1;
the processing module is further configured to:
in response to the end of the ith period of the n periods, combining the waveform files printed by the processors in the first i periods into one waveform file.
8. The apparatus of claim 5, wherein waveforms of different groups of signals in the simulated signal are recorded to different waveform files, the processing module further configured to:
and writing the different waveform files into a storage space in parallel.
9. A computer-readable medium having program code stored thereon, which, when run on a computer, causes the computer to perform the method of any one of claims 1-4.
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| CN102087678A (en) * | 2011-01-07 | 2011-06-08 | 清华大学 | Circuit simulation method for realizing parallel computation through time domain division |
| US8594988B1 (en) * | 2006-07-18 | 2013-11-26 | Cadence Design Systems, Inc. | Method and apparatus for circuit simulation using parallel computing |
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