WO2010052498A1

WO2010052498A1 - Circuits for generating a current sink and a current reference and a method for generating a current sink

Info

Publication number: WO2010052498A1
Application number: PCT/GB2009/051486
Authority: WO
Inventors: Michael Stuart Evans
Original assignee: Iti Scotland Limited
Priority date: 2008-11-07
Filing date: 2009-11-05
Publication date: 2010-05-14
Also published as: GB2465187A; TW201024949A; GB0820466D0

Abstract

A current sink circuit (200) comprises a plurality of current sinks (213_1, 213_2, 213_3, 213_4) connected in parallel. Each of the plurality of current sinks (213_1, 213_2, 213_3, 213_4) are connected to a switch (211_1, 211_2, 211_3, 211_4) each of the plurality of current sinks (213_1, 213_2, 213_3, 213_4) are switched to output a first current. The circuit (200) further comprises a summing node (215) for outputting a second current, second current being a sum of the plurality of the first currents.

Description

CIRCUITS FOR GENERATING A CURRENT SINK AND A CURRENT REFERENCE AND A METHOD FOR GENERATING A CURRENT SINK

FIELD OF THE INVENTION

The present invention relates to circuits for generating a current sink and a current reference and a method for generating a current sink. In particular, but not exclusively, it relates to generating a current sink for a driver for driving a plurality of LEDs in a LCD backlight.

BACKGROUND OF THE INVENTION

In driving a plurality of chains of serially connected LEDs for a LCD backlight, a reliable, accurate, consistent, constant current is required. Current sinks or sources are used to provide such a current. An example of a known constant current sink circuit for sinking the drive current of a single chain of LEDs is shown in Figure 1.

The current sink circuit 100 comprises a reference voltage 101. The output of the reference voltage 101 is connected to one of the inputs of an operational amplifier 103. The output of the operational amplifier 103 is connected to the gate of a transistor 105. The source of the transistor 105 is connected to a first terminal of a sense resistor 107. The second terminal of the sense resistor 107 is connected to ground. The first terminal of the sense resistor 107 is also connected to the second input of the operational amplifier 103. The drain of the transistor 105 is connected to an output terminal 109. The output terminal 109 is connected to a chain of LEDs.

In operation, the current in the LED chain connected to the output terminal 109 is passed through the sense resistor 107. The comparator 103 compares the voltage drop across the sense resistor 107 and the reference voltage output from the reference voltage 101 in a closed feedback loop arrangement. The output of the operational amplifier causes the transistor 105 to alter the current drawn and hence the current sink to the chain of LEDs.

To drive a plurality of such chains of LEDs, independently, a plurality of such circuits are required. Further, in integrating the circuit of Figure 1 , the resistor being an external element makes the design of the LED driver circuit cumbersome. Furthermore, the tolerances in the sense resistor introduce inaccuracies within the current sink. Further the current of the current sink cannot be selected digitally.

SUMMARY OF THE INVENTION

The present invention seeks to provide a simplified fully integrated current sink which mitigates the disadvantages mentioned above.

This is achieved according to a first aspect by a current sink circuit comprising: a plurality of current sinks connected in parallel, each of the plurality of current sinks being connected to a cascoded switch device, each of the plurality of current sinks and the cascoded switch devices being switched to sink a first current; and a summing node for sinking a second current, the second current being a sum of the plurality of first currents.

For example, as in the embodiment, each current sink is connected to its own cascoded switch device. In this way the output current is selectable by switching on multiple parallel current sinks. Furthermore, there is accurate current matching between multiple output stages because all of the current sink transistors are of identical construction and orientation with the current reference transistor. Further, all driver blocks can be switched on and off independently. The multiple driver stages can be paralleled if higher currents than the stage limit are required without uneven current sharing. Further a single device is used to act as a cascode and switch. As a result a separate switching device is not required, reducing latency, headroom requirements simplified fabrication as a more efficient layout is produced for CMOS integrated circuits.

In an embodiment, the current sink consists of multiple identical switchable current sinks connected in parallel and having a common reference current such that each one sinks the same unit current. The unit current is set by means of a reference current circuit. The control gate for the switch in series with each current sink is grouped in a binary fashion such that 1 , 2, 4, 8, 16 or 32 current sinks can be switched on or any combination from 1 to 2^n~1. This gives the ability to switch on from 1 to T^A current sinks in steps of one unit of current. Furthermore, there is accurate current matching between multiple output stages. The common node of all of the current sinks is connected to the cathode of a LED or the cathode of the last LED in a series string of LEDs. The anode of a LED or the anode of the first LED in the series string is connected to a positive voltage which is adjustable such that when the LEDs are on (i.e. one or more current sinks are switched on) the voltage at the cathode of the last LED (the common connection of the current sinks) is 1volt. 1volt across the current sink transistor is chosen to minimise the dissipation of the driver stage without compromising the functioning of the current sinks.

Multiple driver units can be implemented to drive further LEDs or LED strings. If the current required by a LED or LED string is more than can be provided by a single driver unit then two or more driver units or output nodes can be connected in parallel to add to the current sink. The multiple driver stages can be paralleled if higher currents than the stage limit are required without uneven current sharing.

The switches of each current sink may be controlled digitally by means of a 6-bit register in this case. The register is loaded with a value specifying how many current sinks are switched on. An enable on the output of the register allows all the current sink devices to be switched off or the selected number to be switched on thus allowing pulsing of the output current to the LEDs.

A current reference circuit may be connected to each of the plurality of current sinks for outputting a common reference current for the plurality of current sinks. As a result the current sink is defined by a single reference and propagated to the current sinks.

The reference current is thus generated by a single functional block and distributed to the multi-transistor output block. There is no sampling or measurement of the output current in each block as in other solutions as the current is defined by design.

In an embodiment the reference and the plurality of mirror transistors are substantially identical. Since identically sized transistors with the same terminal voltages will pass the same current through the transistors. So by setting up a defined current through the first transistor and connecting the gate of the first transistor to the gate of other identically sized transistors then the second transistor will pass an identical current between their drain/source. This is also achieved according to another aspect of the present invention by a driver for a plurality of LEDs, the driver comprising the current sink circuit of the first aspect above for sinking a current in driving a plurality of LEDs.

The circuit of the aspects above are suitable for implementing in the form of an integrated circuit in a standard CMOS process.

BRIEF DESCRIPTION OF DRAWiNGS

For a more complete understanding of the present invention, reference is made to the following description in conjunction with the accompanying drawings, in which:

Figure 1 is a schematic circuit diagram of a known current sink;

Figure 2 is a schematic circuit diagram of a current sink circuit according to an embodiment of the present invention; and

Figure 3 is a schematic circuit diagram of a current reference circuit according to an embodiment of the present invention.

DETAILED DESCRIPTION OF AN EMBODIMENT OF THE INVENTION

An embodiment of a current sink circuit will be described with reference to Figure 2.

The current sink circuit 200 comprises a reference input terminal 201. The reference input terminal 201 is connected to the drain and gate of a first reference transistor 203.

The first reference transistor 203 is a diode-connected n-type transistor. The source of the first reference transistor 203 is connected to ground.

The current sink circuit 200 further comprises a plurality of switching input terminals 207_1 to 207_4. Although 4 switching input terminals are shown here, it can be appreciated that any number of switching input terminals may be provided depending on the number of groups of sinks to be switched. The first switching input terminal 207_1 is connected to the gate of a first n-type transistor (cascoded switch device) 211_1 of a first group 209_1. The drain of the first n-type transistor 211_1 of the first group 209_1 is connected to a summing node 215. The source of the first n-type transistor 211_1 of the first group 209_1 is connected to the drain of a second n-type transistor 213_1 (current sink) of the first group 209_1. The source of the second n-type transistor 213_1 of the first group 209_1 is connected to ground. The gate of the second n-type transistor 213_1 of the first group 209_1 is connected to the gate of the reference n-type transistor 203.

The second switching input terminal 207_2 is connected to the gates of a pair of parallel-connected first n-type transistors (cascoded switch device) 211_2 of a second group 209_2. The drains of the pair of first n-type transistors 211_2 of the second group 209_2 are connected to the summing node 215. The source of each of the pair of second n-type transistors 211_2 of the second group 209_2 is connected to respective drain of a pair of parallel-connected second n-type transistors (current sinks) 213_2 of the second group 209_2. The sources of the pair of second n-type transistors 213_2 of the second group 209_2 are connected to ground. The gates of the pair of second n-type transistors 213_2 of the second group 209_2 are connected to the gate of the reference n-type transistor 203.

The third switching input terminal 207_3 is connected to the gates of four parallel connected first n-type transistors (cascoded switch device) 211_3 of a third group 209_3. The drains of the four first n-type transistors 211_3 of the third group 209_3 are connected to the summing node 215. The source of each of the four first n-type transistors 21 1_2 of the third group 209_3 is connected to respective drain of four parallel-connected second n-type transistors (current sinks) 213_3 of the third group 209_2. The sources of the four second n-type transistors 213_3 of the third group 209_3 are connected to ground. The gates of the four second n-type transistors 213_3 of the third group 209_3 are connected to the gate of the reference n-type transistor 203.

The fourth switching input terminal 207_4 is connected to the gates of 8 parallel connected first n-type transistors (cascoded switch device) 211_4 of a fourth group 209_4. The fourth group 109_4 of 8 parallel connected first n-type transistors (switches) 211_4 and second n-type transistors (current sinks) 213_4 are connected similar to the previous groups. Any additional groups would contain 16, 32 ... 2^n"1 of parallel connected switches and current sinks as required, that is, the switch and current sink pairs are connected in parallel within groups in a binary manner.

The summing node 215 is connected to an input terminal 217 connected to the cathode of a LED or the cathode of the last LED in a series string of plurality of LEDS.

The current reference circuit of an embodiment of the present invention is shown in Figure 3. The current reference circuit 300 comprises means 301 for generating a bandgap reference voltage. The output of the generating means 301 is connected to a first input terminal 303 of a comparator 305 such as an operational amplifier. The output terminal 307 of the comparator 305 is connected to the gate of a setting n-type transistor 309. The source of the setting n-type transistor 309 is connected to a first terminal of a setting resistor 311 having a resistance RSET. A second terminal of the setting resistor 31 1 is connected to ground. The first terminal of the setting resistor 311 is connected to the second input terminal 313 of the comparator 305 in a closed feedback loop arrangement. The drain of the setting n-type transistor 309 is connected to a second reference transistor 315. The second reference transistor 315 is a diode- connected p-type transistor. The source of the second reference transistor 315 is connected to a common voltage rail 317. The gate of the second reference transistor 315 is connected to the gate of a plurality of identical mirror, p-type transistors 319_1 to 319_8. Although 8 mirror, p-type transistors is illustrated here, it can be appreciated any number of mirror, p-type transistors may be used depending on the requirements of the circuit. The source of each of the plurality of mirror, p-type transistors 319_1 to 319_8 is connected to the common voltage rail 317. The drain of each of the plurality of mirror, p-type transistors 319_1 to 319_8 is connected to respective output terminals 321_1 to 321_8.

In operation the current reference circuit 300 generates 8 substantially identical reference currents on each of the output terminals 321_1 to 321_8 for each current sink circuit 200 on the reference current input terminal 201 of the corresponding current sink circuit 200. The reference currents are generated by each current mirror of the second reference transistor 315 and each of the plurality of mirror, p-type transistors 319_1 to 319_8. Such that the reference current output on each output terminal 321_1 to 321_8 corresponds to the current that passes through the second reference transistor 315, the setting transistor 309 and the setting resistor 311 , i.e. Vbandgap/RSET.

The operation of the circuit relies upon the condition that identically sized transistors in the same orientation on the same piece of silicon and with the same terminal voltages will pass the same current. So by setting up a defined current through the second reference transistor 315 and connecting the gate of the second reference transistor 315 to the gate of other identically sized mirror transistors 319_1 to 319_8 then the mirror transistors 319_1 to 319_8 pass an identical current between their drain to their respective output terminals 321_1 to 321_8.

The current is defined by a single functional block and shared to the multi-transistor output block. There is no sampling or measurement of the output current as in other solutions as it is defined by design. When implemented and fully integrated, these current mirror devices are connected to a circuit pad then suitable ESD protection must be incorporated.

The reference circuit 300 consists of a bandgap voltage supplied to an external 1% tolerance resistor 311. The current supplied to the resistor 311 is Vbandgap/RSET. The same current goes through second reference transistor 315. This defines the gate to source voltage for the 8 mirror transistors 319_1 to 319_8 which reproduce the same current as the second reference transistor 315 when each connects to a different current sink and hence driver.

The schematic of Figure 2 shows part of a driver block. The reference current from one of the mirror transistors 319_1 to 319_8 in the current reference circuit 300 goes onto the input terminal 201 of the current sink circuit 200 and hence the first reference transistor 203. This constitutes the 'unit current' reference for all the current sinks. Since the current sinks are connected in groups arranged in a binary manner, then the output sink current is the sum of the currents of all the 'on' current sinks. This enables the output current to be a product of the 'unit current' reference determined by the number of current sinks in the driver.

Although an embodiment of the present invention has been illustrated in the accompanying drawings and described in the foregoing detailed description, it will be understood that the invention is not limited to the embodiment disclosed, but is capable of numerous modifications without departing from the scope of the invention as set out in the following claims.

Claims

1. A current sink circuit comprising: a plurality of current sinks connected in parallel, each of said plurality of current sinks being connected to a cascoded switch device, each of said plurality of current sinks and said cascoded switch devices being switched to sink a first current; and a summing node for sinking a second current, said second current being a sum of said plurality of first currents.

2. A current sink circuit according to claim 1 , wherein said plurality of current sinks are connected in groups in a binary manner.

3. A current sink circuit according to claim 1 or 2, further comprising: a current reference circuit connected to each of said plurality of current sinks, said current reference circuit outputting a common reference current for said plurality of current sinks.

4. A current sink circuit according to claim 3, wherein the common current reference circuit comprises: a current mirror circuit; and a controller for controlling the current through said current mirror circuit.

5. A current sink circuit according to claim 4, wherein the controller comprises: a setting resistor through which the current mirror current is passed; means for generating a bandgap reference voltage; and a comparator for comparing the voltage drop across said setting resistor and said bandgap reference voltage in a closed feedback loop arrangement to control the current through said current mirror circuit.

6. A current sink circuit according to claim 4 or 5, wherein said current mirror circuit comprises at least one first transistor; and a plurality of second transistors, the gate of said at least one first transistor being connected to the gates of each of a plurality of said second transistors.

7. A driver for a plurality of LEDs, said driver comprising a current sink circuit according to any one of the preceding claims for maintaining a current sink current sink and a drive current of a plurality of LEDs.

8. A backlight for a LCD, said backlight comprising at least one string of a plurality of serially connected LEDs; and a driver according to claim 7 for driving said at least one string of said plurality of serially connected LEDs.

9. A method for generating a current sink, said method comprising the steps of: switching a plurality of parallel connected current sinks and cascoded switch devices to sink a plurality of first currents; and summing said plurality of first currents to sink a second current said output second current being the generated current sink.

10. A method according to claim 9, wherein the step of switching a plurality of parallel-connected current sinks comprises the step of: switching a plurality of parallel-connected current sinks in a binary manner.

11. A method according to claim 9 or 10, further comprising the step of: generating a common reference current for each of said plurality of current sinks.