WO2010029138A2 - Method of etching using a multilayer masking structure - Google Patents

Method of etching using a multilayer masking structure Download PDF

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Publication number
WO2010029138A2
WO2010029138A2 PCT/EP2009/061776 EP2009061776W WO2010029138A2 WO 2010029138 A2 WO2010029138 A2 WO 2010029138A2 EP 2009061776 W EP2009061776 W EP 2009061776W WO 2010029138 A2 WO2010029138 A2 WO 2010029138A2
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WIPO (PCT)
Prior art keywords
layer
etching
plasma
hard mask
network
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PCT/EP2009/061776
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French (fr)
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WO2010029138A3 (en
WO2010029138A9 (en
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Olivier Joubert
Thibaut David
Thierry Chevolleau
Gilles Cunge
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Commissariat A L'energie Atomique
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Publication of WO2010029138A2 publication Critical patent/WO2010029138A2/en
Publication of WO2010029138A3 publication Critical patent/WO2010029138A3/en
Publication of WO2010029138A9 publication Critical patent/WO2010029138A9/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0338—Process specially adapted to improve the resolution of the mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3088—Process specially adapted to improve the resolution of the mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks

Definitions

  • the invention relates to a method of etching an array of nanometric patterns on a target layer providing a vertical transfer of structures.
  • the method includes forming on the target layer a multilayer structure having an inorganic hard mask layer disposed on the target layer. This layer is covered by a mask comprising the network of nanometric patterns.
  • the method also comprises the transfer, in the target layer, of the network of nanometric patterns of the mask by successive etchings.
  • optical lithography technologies such as 193 nm photolithography or photolithography using extreme ultraviolet radiation (EUV) or electronic lithography ( "E-beam”), have developed considerably to allow to transfer a network of patterns on a substrate, in particular silicon.
  • EUV extreme ultraviolet radiation
  • E-beam electronic lithography
  • MP Stoykovich et al describe in the article "Block copolymers and lithography" (materials today, Sept 2006, Vol 9, No 9, P.20-29), a grapho-epitaxy technique, based on the integration of diblock copolymers in conventional lithography, in order to improve the resolution of this technology and to achieve pattern dimensions of about 20 nm.
  • the use of diblock copolymers requires working under a limiting thickness of about 30 nm in order to obtain a great uniformity in the size of the patterns. With such thicknesses, the etch selectivity is then no longer good enough to directly transfer the mask to the substrate.
  • Wai-kin Li et al in the article "Creation of sub-20nm contact using diblock copolymer, has 300 mm wafer for complementary metal oxide semiconductor applications" (J. Vac, Sci Technol, B25 (6), Nov. Dec. 2007, p. 1982 - 1984) discloses a method of forming a network of patterns smaller than 20 nm in size from a poly (styrene-block-methylmethacrylate) diblock copolymer designated PS-b-PMMA.
  • This article also mentions a three-layer structure corresponding to the stack of the polymer layer on a double layer of hard mask, one of silicon nitride and the other of silicon oxide.
  • This structure allows the transfer of the patterns network, made in the polymer layer, to the substrate with a relatively high aspect ratio. Nevertheless, the selectivity is not good enough to allow satisfactory dimensional control.
  • US-A-2007212889 discloses a three-layer structure consisting of an amorphous carbon layer forming a first hard mask, an inorganic layer forming a second hard mask and a light-sensitive resin which allows to define the patterns by optical lithography.
  • the etching process using this masking structure includes a pickling step to reduce the size of the transferred patterns but only up to about 63 nm.
  • US-A-2003064585 proposes a method and a multilayer structure for transferring nanometric patterns of a network.
  • This structure comprises an inorganic mask with a thickness of between 5 nm and 1000 nm and a mask formed of a photoresist comprising the nanoscale network. This process of reducing the size of the patterns before etching is nevertheless complex and difficult to implement.
  • the object of the invention is to propose an etching method using a multilayer masking structure and specific etching plasmas, allowing the transfer of a network of nanometric patterns with high resolution and good dimensional control, while overcoming the disadvantages. from earlier Itârt.
  • this object is achieved by an etching method according to the indexed claims.
  • the inorganic hard mask layer comprises a thin layer of metal oxide, with a thickness of less than or equal to 10 nm, and in that the network of nanometric patterns is transferred from the mask to the thin layer of metal oxide. by a first plasma etching under conditions of low ion bombardment.
  • the multilayer structure comprises an organic hard mask layer disposed between the target layer and the inorganic hard mask layer.
  • FIGS. 1 to 7 show, schematically and in section, various successive steps of a particular embodiment of a method of etching a multilayer structure.
  • Figures 8 to 12 show, schematically and in section, different successive steps of moden other particular embodiment of -n method of etching a multilayer structure.
  • the method of etching a target layer 1, illustrated by way of example, in FIGS. 1 to 7, comprises the formation of a multilayer structure 2 on the target layer 1 (FIG. 1).
  • the multilayer structure 2 consists of a stack of layers. As represented in FIG. 1, the multilayer structure 2 comprises successively
  • an organic hard mask layer 3 disposed on the target layer 1
  • an inorganic hard mask layer 4 disposed on the organic hard mask layer 3 and a mask 5 having an array of nanometric patterns.
  • the target layer 1 is the layer in which the network of nanometric patterns of the mask 5 is to be transferred.
  • This target layer 1 is mainly intended for producing printed circuit devices, nanoelectronic devices or nanoporous structures.
  • This target layer 1 may correspond, for example, to a silicon layer, a metal layer or an insulator.
  • the organic hard mask layer 3 and the inorganic hard mask layer 4 are deposited successively, full plate, on the target layer 1, according to any known method.
  • This deposit may, for example, be produced by physical vapor deposition (PVD), sputtering, evaporation, plasma-enhanced chemical vapor deposition (PECVD) or by atomic layer deposition ("atornic iayer deposition" denoted ALD).
  • the organic hard mask layer 3 is advantageously a thin layer, typically having a thickness of between 10 nm and 500 nm and advantageously between 25 nm and 75 nm, for example 50 nm.
  • This organic hard mask layer 3 is preferably a carbon layer, advantageously consisting of amorphous carbon.
  • the inorganic hard mask layer 4 consists of a thin layer of metal oxide having a thickness of less than or equal to 10 nm.
  • the thickness of the thin layer of metal oxide is less than 5 nm.
  • the preferred metal oxides are oxides of hafnium, aluminum, yttrium or zirconium.
  • the use of a very thin inorganic hard mask layer 4, in particular less than 5 nm, avoids too aggressive etching, which can deteriorate the integrity of the network of nanometric patterns of the mask 5.
  • the ALD technique is particularly suitable for the formation of a thin layer of metal oxide having a thickness of less than 5 nm.
  • a thin layer of hafnium dioxide (HfO 2 ) having a thickness of 3.5 nm is produced under the following conditions:
  • the substrate is brought to a temperature of between 150 ° C. and 350 ° C. and the HfO 2 deposition is carried out by alternating cycles in an atmosphere of hafnium tetrachloride (HfCl 4 ) and in an atmosphere of H 2 O.
  • HfO 2 hafnium dioxide
  • the mask 5 is produced by any known method, for example, by deposition and optical lithography or photolithography.
  • the presence of a thin layer of metal oxide 4 allows better dimensional control of the network of nanometric patterns.
  • the electronic lithography of insolating a resin by means of a dBlectron beam without using a prior mask is subject to a charging effect.
  • the thin layer of metal oxide 4 then promotes the dissipation of the electrical charges and thus reduces this charging effect.
  • the mask 5 is advantageously made of a polymer material.
  • the mask 5 made of polymeric material can be obtained by known lithography techniques using self-organized materials, for example diblock copolymers, in particular of the PS-b-PMMA type.
  • the critical dimension being the dimension of the smallest geometric patterns (line width, contact, trench, etc.), the mask 5 has an array of patterns having a critical dimension less than or equal to 50 nm, preferably less than or equal to 20nm. This critical dimension corresponds in Figure 1 to the length L of the patterns.
  • the increase in the resolution of the network of nanometric patterns generally induces a decrease in the thickness d of the mask 5. In these critical dimension ranges, the thickness d of the mask 5 is less than or equal to 50 nm, more particularly, less than or equal to 30nm.
  • the network of nanometric patterns existing within the mask 5 is first transferred to the inorganic hard mask layer 4 by a first plasma etching.
  • a reactive ion etching ("reactive ion etching” denoted RIE) or inductively coupled (“inductively coupled plasma” noted ICP).
  • the plasma is based on chlorine, preferably a mixture of chlorine and boron chloride and / or chlorosilane.
  • the plasma is, advantageously, a mixture of chlorine (Cl 2 ), boron trichloride (BCI 3 ) and / or tetrachlorosilane (SiCl 4 ), optionally combined with a rare gas such as argon.
  • This etching then exposes certain parts of the organic hard mask layer 3, not covered by the network of nanometric patterns.
  • the first plasma etching is performed under conditions of low ion bombardment in capacitively coupled or inductive reactors.
  • low ion bombardment conditions means etching conditions in which ion energy is low.
  • the plasma of the first etching has, advantageously, an ion energy of less than 5OeV, preferably less than or equal to 40EV.
  • the first etching can be carried out with a low self-bias voltage of the substrate holder to obtain a low ion bombardment, the substrate being constituted by the target layer 1 / multilayer structure 2 assembly.
  • An autopolarization voltage less than or equal to 20V is advantageously applied during the first plasma etching.
  • the ion bombardment of the first plasma etching is performed without self-polarization.
  • the first plasma etching may advantageously be carried out at a temperature of less than or equal to 350 ° C., preferably between 20 ° C. and 350 ° C.
  • the plasma potential is always greater than the potential of the substrate and ionic bombardment of the substrate is always obtained.
  • the plasma potential is between about 10V to 15V. This is due to the fact that to obtain a plasma, a discharge is generated with a radiofrequency electrostatic field and only the electrons follow the radiofrequency excitation of this field. For a given radio frequency, the plasma acquires a potential to maintain the neutrality of the charges arriving on the electrically insulated walls.
  • the plasma potential will be between ⁇ elOV and 20V.
  • the first plasma etching may advantageously be carried out at room temperature.
  • the layers of the multilayer structure are thus preserved at low temperature and, more particularly, at room temperature.
  • the inorganic hard mask layer 4 is etched by a BCI 3 plasma in an inductively coupled reactor (ICP) under the following conditions: of 5 mTorr; power source of 800W, power of self-polarization of 10 W, temperature of 50 0 C, flow of BCI 3 of 0.1 SIm.
  • ICP inductively coupled reactor
  • the inorganic hard mask layer 4 is etched by an SiCI 4 / CI 2 plasma in an inductively coupled reactor (ICP ) under the following conditions: pressure of 10 mTorr; power source of 500 W, no power of self-polarization, temperature of 50 0 C, flow of SiCI 4 of 0.02 SIm and Cl 2 of 0.08 SIm.
  • ICP inductively coupled reactor
  • a flow rate of 1 SIm (1 standard liter / minute) corresponds to a flow equivalent to 1 liter per minute under standard conditions of pressure and temperature.
  • the energy of the ions of the plasma is equal to 1OeV.
  • the etching conditions are not very aggressive, it is surprisingly found that the inorganic hard mask layer 4 is easily etched with very good precision and high resolution. In these conditions, which are not very aggressive for the mask 5, the transfer of the network of nanometric patterns takes place without deterioration of these patterns. Thus, even with mask thicknesses 5 very low, that is to say less than 30 nm, the integrity of the network of nanometric patterns is retained.
  • a mask 5 made of carbon-rich material of the polystyrene or amorphous carbon type may, for example, be removed with an oxygen plasma (O 2 ) or with high temperature reducing plasmas, for example gaseous mixtures of hydrogen and helium (H 2 / He) or hydrogen and argon (H 2 / Ar) at 350 0 C or ammonia (NH 3).
  • the organic hard mask layer 3 is then etched by a second plasma etching.
  • the second etching is a reactive ion etching (RIE).
  • RIE reactive ion etching
  • the inorganic hard mask layer 4 which comprises the entire network of nanometric patterns is then used as a mask for etching the organic hard mask layer 3.
  • the network of nanometric patterns is transferred from the inorganic hard mask 4 to the organic hard mask layer 3.
  • the plasma used is preferably a gaseous mixture of hydrogen and d- ⁇ n or more nitrogen compounds and / or carbon compounds.
  • the plasma is a mixture of hydrogen (H 2 ), nitrogen (N 2 ) or ammonia (NH 3 ). Since the inorganic hard mask layer 4 is not very sensitive to the plasma conditions used, it guarantees the durability of the network of nanometric patterns during this transfer.
  • the plasma is advantageously a gaseous mixture of oxygen, d- ⁇ n or more halogenated compounds and an inert gas serving as a plasma support.
  • plasma is a mixture of oxygen (O 2 ) and hydrobromic acid (HBr) and / or chlorine (Cl 2 ) and argon (Ar).
  • the inorganic hard mask layer 4 is removed by any known method.
  • the inorganic hard mask layer 4 remaining after the second etching is removed in the subsequent steps either during the etching of the target layer 1 or with the organic hard mask layer 3.
  • the organic hard mask layer 3 which comprises the entire network of nanometric patterns, is then used as a mask for etching the target layer 1.
  • the network of nanometric patterns is then transferred from the organic hard mask layer 3 to the layer target 1, by a third engraving ( Figure 6).
  • the etching of the target layer 1 is carried out according to any known method depending on the nature of the target layer 1.
  • a silicon target layer 1 may be etched with a plasma formed of a gaseous mixture (HBr + Cl 2 + O 2 ).
  • a plasma formed of a fluorocarbon gas mixture can be used for etching.
  • the organic hard mask 3 is then removed by any known method (FIG. 7).
  • an additional layer is inserted in the multilayer structure 2 (FIG. 8).
  • the inorganic hard mask layer 4 then consists of the thin layer of metal oxide 4a, with a thickness of less than or equal to 10 nm, preferably less than 5 nm and a dielectric layer 4b between the organic hard mask layer 3 and the thin layer. metal oxide 4a.
  • the dielectric layer 4b is advantageously a silicon oxide (SiO 2 ) layer.
  • the thickness of the dielectric layer 4b is preferably less than or equal to about 20 nm.
  • the method according to this second embodiment comprises an additional etching step, illustrated by way of example in FIGS. 9 to 12. The transfer of the network of nanometric patterns from the mask 5 to the thin metal oxide layer 4a is carried out according to FIG. same procedure as before.
  • the thin metal oxide layer 4a which comprises the entire network of nanometric patterns is then used as a mask for etching the dielectric layer 4b (FIG. 9).
  • the network of nanometric patterns is then transferred from the metal oxide thin layer 4a to the dielectric layer 4b by an intermediate plasma etching, preferably an RIE etching.
  • the plasma used is a plasma comprising a fluorocarbon compound.
  • the plasma contains tetrafluoromethane (CF 4 ), advantageously in the presence of an inert gas, for example argon.
  • the thin metal oxide layer 4a is particularly resistant to fluorocarbon plasma. The existence of this dielectric layer 4b thus improves the selectivity of the etching.
  • the dielectric layer 4b which comprises the entire network of nanometric patterns (FIG. 11), is then used as a mask for etching the organic hard mask layer 3. As illustrated in FIG. the network of nanometric patterns is then transferred from the dielectric layer 4b to the organic hard mask layer 3, under the same conditions as the second plasma etching. After removal of the dielectric layer 4b, the network of nanometric patterns is transferred from the organic hard mask layer 3 to the target layer 1 according to a procedure identical to that of the first embodiment.
  • the dielectric layer 4b and the organic hard mask layer 3 are etched successively without removing the remaining layers respectively of metal oxide 4a and dielectric 4b.
  • the layers 4a and 4b are then eliminated at the same time either by etching the target layer 1 when the etching conditions are sufficiently aggressive or after etching the target layer 1, with the organic hard mask layer 3.
  • the choice of the embodiment of the etching process is dictated by the nature of the layers and the compatibility of the layers between them.
  • the etching method according to the second embodiment is particularly suitable when the direct deposition of the metal oxide layer 4a on the organic layer 3 is difficult or impossible.
  • the multilayer structure 2 consists of the inorganic hard mask layer 4 disposed directly on the target layer 1, itself covered by the mask 5 comprising the network of nanometric patterns.
  • the organic hard mask layer 3 is then non-existent.
  • the inorganic hard mask layer 4 may also comprise a dielectric layer 4b when the deposition of the metal oxide layer 4a on the target layer 1 is difficult to achieve.
  • the transfer of the network of nanometric patterns from the mask 5 to the inorganic hard mask layer 4 is then carried out according to the same operating mode as the first mode, described above.
  • the target layer 1 can then be etched according to any known method.
  • the target layer 1 is an inorganic layer, for example a dielectric layer.
  • the plasma used for the etching of the target layer 1 can then be identical to that of the etching of the inorganic hard mask layer 4.
  • the etching method according to this third embodiment is particularly suitable for etching an inorganic layer, for example a dielectric layer or for etching a target layer 1 over a small thickness, advantageously a thickness of less than 100 nm.
  • etching processes described above are industrializable processes, suitable for masks with very high resolutions, developed at present to meet the requirements of miniaturization of integrated circuits and nanotechnologies. They make it possible to transfer a network of nanometric patterns from a very thin mask to a substrate with high selectivity and good dimensional control.
  • etching processes are particularly suitable for producing nanostructures for applications in nanoscience.

Abstract

The method of etching a target layer comprises the formation, on the target layer (1), of a multilayer structure (2) having an inorganic hard mask layer (4) which is placed on said target layer (1) and is itself covered by a mask (5) having an array of nanoscale features. The inorganic hard mask layer (4) comprises a thin metal oxide film with a thickness of 10 nm or less. The array of nanoscale features is transferred from the mask (5) to the thin metal oxide film (4) by first plasma etching under weak ion bombardment conditions.

Description

Procédé de gravure utilisant une structure de masquage multicouche Etching process using a multilayer masking structure
Domaine technique de l'inventionTechnical field of the invention
LHhvention est relative à un procédé de gravure d'un réseau de motifs nanométriques sur une couche cible assurant un transfert vertical des structures. Le procédé comporte la formation sur la couche cible d-ϋne structure multicouche ayant une couche de masque dur inorganique, disposée sur la couche cible. Cette couche est recouverte par un masque comportant le réseau de motifs nanométriques. Le procédé comporte également le transfert, dans la couche cible, du réseau de motifs nanométriques du masque par gravures successives.The invention relates to a method of etching an array of nanometric patterns on a target layer providing a vertical transfer of structures. The method includes forming on the target layer a multilayer structure having an inorganic hard mask layer disposed on the target layer. This layer is covered by a mask comprising the network of nanometric patterns. The method also comprises the transfer, in the target layer, of the network of nanometric patterns of the mask by successive etchings.
État de la techniqueState of the art
Confrontées à la miniaturisation des dispositifs électroniques et notamment, afin de répondre aux spécifications dimensionnelles des futures générations de circuits intégrés, les technologies de lithographie optique, comme la photolithographie 193 nm ou la photolithographie utilisant le rayonnement Ultraviolet extrême (EUV) ou la lithographie électronique (« e-beam »), se sont considérablement développées pour permettre de transférer un réseau de motifs sur un substrat, en particulier de silicium. Le développement des nanotechnologies a permis de repousser les limites de résolutions des techniques conventionnelles. Notamment, M. P. Stoykovich et al, décrivent dans l'article "Block copolymers and conventional lithography" (materials today, sept 2006, vol 9, n° 9, P.20-29), une technique de grapho-épitaxy, basée sur l'intégration de copolymères diblocs dans la lithographie conventionnelle, afin d'améliorer la résolution de cette technologie et d'atteindre des dimensions de motifs d'environ 20nm. Dans ces conditions, IDtilisation de copolymères diblocs impose de travailler sous une épaisseur limite, d'environ 30 nm, afin dtôbtenir une grande uniformité dans la taille des motifs. Avec de telles épaisseurs, la sélectivité de gravure n'est alors plus assez bonne pour transférer directement le masque vers le substrat.Faced with the miniaturization of electronic devices and in particular, to meet the dimensional specifications of future generations of integrated circuits, optical lithography technologies, such as 193 nm photolithography or photolithography using extreme ultraviolet radiation (EUV) or electronic lithography ( "E-beam"), have developed considerably to allow to transfer a network of patterns on a substrate, in particular silicon. The development of nanotechnology has made it possible to push back the resolution limits of conventional techniques. In particular, MP Stoykovich et al, describe in the article "Block copolymers and lithography" (materials today, Sept 2006, Vol 9, No 9, P.20-29), a grapho-epitaxy technique, based on the integration of diblock copolymers in conventional lithography, in order to improve the resolution of this technology and to achieve pattern dimensions of about 20 nm. In these conditions, The use of diblock copolymers requires working under a limiting thickness of about 30 nm in order to obtain a great uniformity in the size of the patterns. With such thicknesses, the etch selectivity is then no longer good enough to directly transfer the mask to the substrate.
Pour conserver l'intégrité des motifs réalisés, lors du transfert vers le substrat, de nouvelles techniques de nano-structuration ont été mises au point. Ces techniques permettent d'obtenir des structures de masque multicouche améliorant la qualité du transfert du réseau des motifs à IBchelle nanométrique vers le substrat. Ainsi, Wai-kin Li et al, dans l'article « Création of sub-20nm contact using diblock copolymer on a 300mm wafer for complementary métal oxide semiconductor applications » (J. Vac. Sci. Technol. B25 (6), Nov/Dec 2007, P. 1982 - 1984) décrit un procédé de formation d'un réseau de motifs de dimension inférieure à 20nm, à partir d'un copolymère dibloc poly(styrène-block-méthylméthacrylate) noté PS-b-PMMA. Cet article mentionne, également, une structure tricouche correspondant à l'empilement de la couche polymère sur une double couche de masque dur, une de nitrure de silicium, l'autre d'oxyde de silicium. Cette structure permet le transfert du réseau de motifs, réalisé dans la couche de polymère, vers le substrat avec un rapport d'aspect relativement élevé. Néanmoins, la sélectivité n'est pas suffisamment bonne pour permettre un contrôle dimensionnel satisfaisant.To preserve the integrity of the patterns made, during the transfer to the substrate, new nano-structuring techniques have been developed. These techniques make it possible to obtain multilayer mask structures that improve the quality of the pattern transfer at the nanoscale to the substrate. Thus, Wai-kin Li et al, in the article "Creation of sub-20nm contact using diblock copolymer, has 300 mm wafer for complementary metal oxide semiconductor applications" (J. Vac, Sci Technol, B25 (6), Nov. Dec. 2007, p. 1982 - 1984) discloses a method of forming a network of patterns smaller than 20 nm in size from a poly (styrene-block-methylmethacrylate) diblock copolymer designated PS-b-PMMA. This article also mentions a three-layer structure corresponding to the stack of the polymer layer on a double layer of hard mask, one of silicon nitride and the other of silicon oxide. This structure allows the transfer of the patterns network, made in the polymer layer, to the substrate with a relatively high aspect ratio. Nevertheless, the selectivity is not good enough to allow satisfactory dimensional control.
Le document US-A-2007212889 décrit une structure tricouche constituée d'une couche de carbone amorphe formant un premier masque dur, une couche inorganique formant un second masque dur et une résine sensible à la lumière qui permet de définir les motifs par lithographie optique. Le procédé de gravure utilisant cette structure de masquage inclut une étape de décapage permettant de réduire la dimension des motifs transférés mais uniquement jusqu'à environ 63nm. Par ailleurs, le document US-A-2003064585 propose un procédé et une structure multicouche pour transférer des motifs nanométriques d'un réseau. Cette structure comporte un masque inorganique d'épaisseur comprise entre 5 nm à 1000 nm et un masque formé d'une résine photosensible comportant le réseau nanométrique. Ce procédé qui consiste à réduire la taille des motifs avant gravure est néanmoins complexe et difficile à mettre en œuvre.US-A-2007212889 discloses a three-layer structure consisting of an amorphous carbon layer forming a first hard mask, an inorganic layer forming a second hard mask and a light-sensitive resin which allows to define the patterns by optical lithography. The etching process using this masking structure includes a pickling step to reduce the size of the transferred patterns but only up to about 63 nm. Furthermore, US-A-2003064585 proposes a method and a multilayer structure for transferring nanometric patterns of a network. This structure comprises an inorganic mask with a thickness of between 5 nm and 1000 nm and a mask formed of a photoresist comprising the nanoscale network. This process of reducing the size of the patterns before etching is nevertheless complex and difficult to implement.
D'autres travaux ont été réalisés pour transférer des motifs nanométriques avec une déformation minimale. On citera, à titre d'exemple, les documents US-A-2008132070, US-A-2004198065, US-A-2002113310.Other work has been done to transfer nanometric patterns with minimal deformation. By way of example, mention may be made of US-A-2008132070, US-A-2004198065, US-A-2002113310.
Objet de l'inventionObject of the invention
LΘbjet de IHhvention a pour but de proposer un procédé de gravure utilisant une structure de masquage multicouche et des plasmas de gravure spécifiques, permettant le transfert d'un réseau de motifs nanométriques avec une résolution élevée et un bon contrôle dimensionnel, tout en remédiant aux inconvénients de Itârt antérieur.The object of the invention is to propose an etching method using a multilayer masking structure and specific etching plasmas, allowing the transfer of a network of nanometric patterns with high resolution and good dimensional control, while overcoming the disadvantages. from earlier Itârt.
Selon l'invention, ce but est atteint par un procédé de gravure selon les revendications indexées.According to the invention, this object is achieved by an etching method according to the indexed claims.
Plus particulièrement, ce but est atteint par le fait que la couche de masque dur inorganique comporte une couche mince dtôxyde métallique, dBpaisseur inférieure ou égale à 10nm et par le fait que le réseau de motifs nanométriques est transféré du masque à la couche mince dtôxyde métallique par une première gravure au plasma dans des conditions de faible bombardement ionique. Selon un mode de réalisation préférentiel, la structure multicouche comporte une couche de masque dur organique disposée entre la couche cible et la couche de masque dur inorganique.More particularly, this object is achieved by the fact that the inorganic hard mask layer comprises a thin layer of metal oxide, with a thickness of less than or equal to 10 nm, and in that the network of nanometric patterns is transferred from the mask to the thin layer of metal oxide. by a first plasma etching under conditions of low ion bombardment. According to a preferred embodiment, the multilayer structure comprises an organic hard mask layer disposed between the target layer and the inorganic hard mask layer.
Description sommaire des dessinsBrief description of the drawings
D'autres avantages et caractéristiques ressortiront plus clairement de la description qui va suivre des modes particuliers de réalisation de l'invention donnés à titre d'exemples non limitatifs et représentés aux dessins annexés, dans lesquels :Other advantages and features will emerge more clearly from the following description of the particular embodiments of the invention given as non-restrictive examples and represented in the accompanying drawings, in which:
Les figures 1 à 7 représentent, schématiquement et en coupe, différentes étapes successives ddn mode de réalisation particulier ddn procédé de gravure d'une structure multicouche.FIGS. 1 to 7 show, schematically and in section, various successive steps of a particular embodiment of a method of etching a multilayer structure.
Les figures 8 à 12 représentent, schématiquement et en coupe, différentes étapes successives d-ϋn autre mode de réalisation particulier d-ϋn procédé de gravure d'une structure multicouche.Figures 8 to 12 show, schematically and in section, different successive steps of moden other particular embodiment of -n method of etching a multilayer structure.
Description de modes particuliers de réalisationDescription of particular embodiments
Selon un mode de réalisation particulier, le procédé de gravure d-ϋne couche cible 1 , illustré à titre d'exemple, aux figures 1 à 7, comporte la formation ddne structure multicouche 2 sur la couche cible 1 (figure 1 ). La structure multicouche 2 est constituée d'un empilement de couches. Comme représenté à la figure 1 , la structure multicouche 2 comporte successivementAccording to a particular embodiment, the method of etching a target layer 1, illustrated by way of example, in FIGS. 1 to 7, comprises the formation of a multilayer structure 2 on the target layer 1 (FIG. 1). The multilayer structure 2 consists of a stack of layers. As represented in FIG. 1, the multilayer structure 2 comprises successively
(de bas en haut sur la figure 1 ), une couche de masque dur organique 3, disposée sur la couche cible 1 , une couche de masque dur inorganique 4, disposée sur la couche de masque dur organique 3 et un masque 5 comportant un réseau de motifs nanométriques.(from bottom to top in FIG. 1), an organic hard mask layer 3, disposed on the target layer 1, an inorganic hard mask layer 4, disposed on the organic hard mask layer 3 and a mask 5 having an array of nanometric patterns.
La couche cible 1 est la couche dans laquelle le réseau de motifs nanométriques du masque 5 doit être transféré. Cette couche cible 1 est principalement destinée à réaliser des dispositifs de circuits imprimés, des dispositifs nanoélectroniques ou des structures nanoporeuses. Cette couche cible 1 peut correspondre, par exemple, à une couche de silicium, une couche métallique ou un isolant. La couche de masque dur organique 3 et la couche de masque dur inorganique 4 sont déposées successivement, pleine plaque, sur la couche cible 1 , selon tout procédé connu. Ce dépôt peut, par exemple, être réalisé par dépôt physique en phase vapeur (PVD), pulvérisation, évaporation, dépôt chimique en phase vapeur activé par plasma (PECVD) ou par dépôt par couche atomique ("atornic iayer déposition" noté ALD). La couche de masque dur organique 3 est, avantageusement, une couche mince, ayant typiquement une épaisseur comprise entre 10nm et 500nm et avantageusement entre 25nm et 75nm, par exemple 50nm. Cette couche de masque dur organique 3 est, de préférence, une couche carbonée, avantageusement, constituée de carbone amorphe.The target layer 1 is the layer in which the network of nanometric patterns of the mask 5 is to be transferred. This target layer 1 is mainly intended for producing printed circuit devices, nanoelectronic devices or nanoporous structures. This target layer 1 may correspond, for example, to a silicon layer, a metal layer or an insulator. The organic hard mask layer 3 and the inorganic hard mask layer 4 are deposited successively, full plate, on the target layer 1, according to any known method. This deposit may, for example, be produced by physical vapor deposition (PVD), sputtering, evaporation, plasma-enhanced chemical vapor deposition (PECVD) or by atomic layer deposition ("atornic iayer deposition" denoted ALD). The organic hard mask layer 3 is advantageously a thin layer, typically having a thickness of between 10 nm and 500 nm and advantageously between 25 nm and 75 nm, for example 50 nm. This organic hard mask layer 3 is preferably a carbon layer, advantageously consisting of amorphous carbon.
La couche de masque dur inorganique 4 est constituée d'une couche mince dtôxyde métallique, dBpaisseur inférieure ou égale à 10nm. Avantageusement, l'épaisseur de la couche mince dtôxyde métallique est inférieure à 5nm. Les oxydes métalliques préférentiels sont les oxydes de hafnium, d'aluminium, de yttrium ou de zirconium. L'utilisation d'une couche de masque dur inorganique 4 très mince, en particulier inférieure à 5nm, évite de pratiquer une gravure trop agressive, susceptible de détériorer l'intégrité du réseau de motifs nanométriques du masque 5. La technique ALD est particulièrement adaptée à la formation d'une couche mince d'oxyde métallique ayant une épaisseur inférieure à 5nm. À titre d'exemple, une couche mince de dioxyde de hafnium (HfO2) ayant une épaisseur de 3,5 nm est réalisée dans les conditions suivantes : Le substrat est porté à une température comprise entre 1500C et 3500C et le dépôt de HfO2 est réalisé par une alternance de cycles en atmosphère de tétrachlorure de hafnium (HfCI4) et en atmosphère de H2O.The inorganic hard mask layer 4 consists of a thin layer of metal oxide having a thickness of less than or equal to 10 nm. Advantageously, the thickness of the thin layer of metal oxide is less than 5 nm. The preferred metal oxides are oxides of hafnium, aluminum, yttrium or zirconium. The use of a very thin inorganic hard mask layer 4, in particular less than 5 nm, avoids too aggressive etching, which can deteriorate the integrity of the network of nanometric patterns of the mask 5. The ALD technique is particularly suitable for the formation of a thin layer of metal oxide having a thickness of less than 5 nm. By way of example, a thin layer of hafnium dioxide (HfO 2 ) having a thickness of 3.5 nm is produced under the following conditions: The substrate is brought to a temperature of between 150 ° C. and 350 ° C. and the HfO 2 deposition is carried out by alternating cycles in an atmosphere of hafnium tetrachloride (HfCl 4 ) and in an atmosphere of H 2 O.
Le masque 5 est réalisé, selon tout procédé connu, par exemple, par dépôt et lithographie optique ou photolithographie. Dans le cas d'une lithographie électronique, la présence d'une couche mince dtôxyde métallique 4 permet un meilleur contrôle dimensionnel du réseau de motifs nanométriques. En effet, la lithographie électronique consistant à insoler une résine au moyen ddn faisceau dBlectrons sans utiliser de masque préalable est sujette à un effet de charge. La couche mince d'oxyde métallique 4 favorise alors la dissipation des charges électriques et diminue donc cet effet de charge. Le masque 5 est, avantageusement, constitué d'un matériau polymère. Le masque 5 en matériau polymère, peut être obtenu par des techniques de lithographie connues utilisant des matériaux auto-organisés, par exemple, des copolymères diblocs notamment de type PS-b-PMMA. La dimension critique étant la dimension des motifs géométriques les plus petits (largeur de ligne, contact, tranchée, etc .), le masque 5 présente un réseau de motifs ayant une dimension critique inférieure ou égale à 50nm, de préférence, inférieure ou égale à 20nm. Cette dimension critique correspond sur la figure 1 à la longueur L des motifs. L'augmentation de la résolution du réseau de motifs nanométriques induit généralement une diminution de l'épaisseur d du masque 5. Dans ces gammes de dimension critique, l'épaisseur d du masque 5 est inférieure ou égale à 50nm, plus particulièrement, inférieure ou égale à 30nm. Après réalisation de la structure multicouche, selon la figure 1 , le réseau de motifs nanométriques est transféré du masque 5 à la couche cible 1 , par gravures successives.The mask 5 is produced by any known method, for example, by deposition and optical lithography or photolithography. In the case of an electronic lithography, the presence of a thin layer of metal oxide 4 allows better dimensional control of the network of nanometric patterns. Indeed, the electronic lithography of insolating a resin by means of a dBlectron beam without using a prior mask is subject to a charging effect. The thin layer of metal oxide 4 then promotes the dissipation of the electrical charges and thus reduces this charging effect. The mask 5 is advantageously made of a polymer material. The mask 5 made of polymeric material can be obtained by known lithography techniques using self-organized materials, for example diblock copolymers, in particular of the PS-b-PMMA type. The critical dimension being the dimension of the smallest geometric patterns (line width, contact, trench, etc.), the mask 5 has an array of patterns having a critical dimension less than or equal to 50 nm, preferably less than or equal to 20nm. This critical dimension corresponds in Figure 1 to the length L of the patterns. The increase in the resolution of the network of nanometric patterns generally induces a decrease in the thickness d of the mask 5. In these critical dimension ranges, the thickness d of the mask 5 is less than or equal to 50 nm, more particularly, less than or equal to 30nm. After completion of the multilayer structure, according to FIG. 1, the network of nanometric patterns is transferred from the mask 5 to the target layer 1, by successive etchings.
Comme représenté à la figure 2, le réseau de motifs nanométriques existant au sein du masque 5, est d'abord transféré à la couche de masque dur inorganique 4, par une première gravure plasma. Celle-ci est, avantageusement, une gravure ionique réactive ("reactive ion etching" noté RIE) ou à couplage inductif ("inductively coupled plasma" noté ICP). En particulier, le plasma est à base de chlore, de préférence, un mélange de chlore et de chlorure de bore et/ou de chlorosilane. Le plasma est, avantageusement, un mélange de chlore (Cl2), de trichlorure de bore (BCI3) et/ou de tétrachlorosilane (SiCI4), éventuellement associé à un gaz rare comme l'argon. Cette gravure expose alors certaines parties de la couche de masque dur organique 3, non couvertes par le réseau de motifs nanométriques.As shown in FIG. 2, the network of nanometric patterns existing within the mask 5 is first transferred to the inorganic hard mask layer 4 by a first plasma etching. This is, advantageously, a reactive ion etching ("reactive ion etching" denoted RIE) or inductively coupled ("inductively coupled plasma" noted ICP). In particular, the plasma is based on chlorine, preferably a mixture of chlorine and boron chloride and / or chlorosilane. The plasma is, advantageously, a mixture of chlorine (Cl 2 ), boron trichloride (BCI 3 ) and / or tetrachlorosilane (SiCl 4 ), optionally combined with a rare gas such as argon. This etching then exposes certain parts of the organic hard mask layer 3, not covered by the network of nanometric patterns.
La première gravure au plasma est réalisée dans des conditions de faible bombardement ionique dans des réacteurs à couplage capacitif ou inductif. On entend par conditions de faible bombardement ionique, des conditions de gravure dans lesquelles IBnergie des ions est faible. Le plasma de la première gravure a, avantageusement, une énergie des ions inférieure à 5OeV, de préférence, inférieure ou égale à 4OeV.The first plasma etching is performed under conditions of low ion bombardment in capacitively coupled or inductive reactors. The term low ion bombardment conditions means etching conditions in which ion energy is low. The plasma of the first etching has, advantageously, an ion energy of less than 5OeV, preferably less than or equal to 40EV.
Dans le cas ddn réacteur à couplage inductif, la première gravure peut être réalisée, avec une faible tension dtâuto-polarisation du porte-substrat pour obtenir un faible bombardement ionique, le substrat étant constitué par l'ensemble couche cible 1/ structure multicouche 2. Une tension d'auto- polarisation inférieure ou égale à 20V est, avantageusement, appliquée lors de la première gravure au plasma. Selon un mode de réalisation particulier, le bombardement ionique de la première gravure au plasma est réalisé sans auto-polarisation.In the case of an inductively coupled reactor, the first etching can be carried out with a low self-bias voltage of the substrate holder to obtain a low ion bombardment, the substrate being constituted by the target layer 1 / multilayer structure 2 assembly. An autopolarization voltage less than or equal to 20V is advantageously applied during the first plasma etching. According to a particular embodiment, the ion bombardment of the first plasma etching is performed without self-polarization.
La première gravure au plasma peut, avantageusement, être réalisée à une température inférieure ou égale à 3500C, de préférence, comprise entre 200C et 3500C.The first plasma etching may advantageously be carried out at a temperature of less than or equal to 350 ° C., preferably between 20 ° C. and 350 ° C.
Même si aucune tension n'est appliquée au porte-substrat, le potentiel plasma est toujours supérieur au potentiel du substrat et l'on obtient toujours un bombardement ionique du substrat. Par exemple, pour une source de type ICP, le potentiel plasma est compris entre environ 10V à 15V. Ceci est dû au fait que pour obtenir un plasma, on crée une décharge avec un champ électrostatique radiofréquence et seuls les électrons suivent l'excitation radiofréquence de ce champ. Pour une radiofréquence donnée, le plasma acquiert un potentiel permettant de conserver la neutralité des charges arrivant sur les parois électriquement isolées.Even if no voltage is applied to the substrate holder, the plasma potential is always greater than the potential of the substrate and ionic bombardment of the substrate is always obtained. For example, for a source of ICP type, the plasma potential is between about 10V to 15V. This is due to the fact that to obtain a plasma, a discharge is generated with a radiofrequency electrostatic field and only the electrons follow the radiofrequency excitation of this field. For a given radio frequency, the plasma acquires a potential to maintain the neutrality of the charges arriving on the electrically insulated walls.
Ainsi, pour une température du porte-substrat comprise entre 20° et 350°, sans création de bombardement électronique supplémentaire par polarisation du porte-substrat, le potentiel plasma sera compris entrelOV et 20V.Thus, for a temperature of the substrate holder between 20 ° and 350 °, without creating additional electron bombardment by polarization of the substrate holder, the plasma potential will be between λelOV and 20V.
La première gravure au plasma peut, avantageusement, être réalisée à température ambiante. Les couches de la structure multicouche sont ainsi préservées à basse température et, plus particulièrement, à température ambiante.The first plasma etching may advantageously be carried out at room temperature. The layers of the multilayer structure are thus preserved at low temperature and, more particularly, at room temperature.
Exemple 1Example 1
Dans le cas d'une couche de dioxyde de hafnium (HfO2) de 3nm d'épaisseur, la couche de masque dur inorganique 4 est gravée par un plasma BCI3 dans un réacteur à couplage inductif (ICP) sous les conditions suivantes: pression de 5 mTorr; puissance source de 800W, puissance dtâuto-polarisation de 10 W, température de 500C, débit de BCI3 de 0.1 SIm. L'énergie des ions du plasma est égale à 2OeV.In the case of a layer of hafnium dioxide (HfO 2 ) of 3 nm in thickness, the inorganic hard mask layer 4 is etched by a BCI 3 plasma in an inductively coupled reactor (ICP) under the following conditions: of 5 mTorr; power source of 800W, power of self-polarization of 10 W, temperature of 50 0 C, flow of BCI 3 of 0.1 SIm. The energy of the ions of the plasma is equal to 2OeV.
Exemple 2Example 2
Dans le cas d'une couche d'oxyde d'aluminium (AI2O3) de 3nm d'épaisseur, la couche de masque dur inorganique 4 est gravée par un plasma SiCI4/CI2 dans un réacteur à couplage inductif (ICP) sous les conditions suivantes : pression de 10 mTorr; puissance source de 500 W , pas de puissance dtâuto-polarisation, température de 500C, débit de SiCI4 de 0,02 SIm et de Cl2 de 0,08 SIm. Un débit de 1 SIm (1 standard liter/minute) correspond à un débit équivalent à 1 litre par minute dans les conditions standards de pression et de température. L'énergie des ions du plasma est égale à 1OeV.In the case of an aluminum oxide layer (Al 2 O 3 ) 3 nm thick, the inorganic hard mask layer 4 is etched by an SiCI 4 / CI 2 plasma in an inductively coupled reactor (ICP ) under the following conditions: pressure of 10 mTorr; power source of 500 W, no power of self-polarization, temperature of 50 0 C, flow of SiCI 4 of 0.02 SIm and Cl 2 of 0.08 SIm. A flow rate of 1 SIm (1 standard liter / minute) corresponds to a flow equivalent to 1 liter per minute under standard conditions of pressure and temperature. The energy of the ions of the plasma is equal to 1OeV.
Bien que les conditions de gravure soient peu agressives, on constate de façon surprenante que la couche de masque dur inorganique 4 est facilement gravée avec une très bonne précision et une résolution élevée. Dans ces conditions peu agressives pour le masque 5, le transfert du réseau de motifs nanométriques s'effectue sans détérioration de ces motifs. Ainsi, même avec des épaisseurs de masque 5 très faibles c'est-à-dire inférieures à 30nm, l'intégrité du réseau de motifs nanométriques est conservé.Although the etching conditions are not very aggressive, it is surprisingly found that the inorganic hard mask layer 4 is easily etched with very good precision and high resolution. In these conditions, which are not very aggressive for the mask 5, the transfer of the network of nanometric patterns takes place without deterioration of these patterns. Thus, even with mask thicknesses 5 very low, that is to say less than 30 nm, the integrity of the network of nanometric patterns is retained.
Le masque 5 est, ensuite, éliminé selon des techniques connues propres à la nature du masque 5 (figure 3). Un masque 5 en matériau riche en carbone de type polystyrène ou carbone amorphe peut, par exemple, être éliminé avec un plasma d'oxygène (O2) ou avec des plasmas réducteurs à haute température, par exemple, des mélanges gazeux d'hydrogène et d'hélium (H2/He) ou d'hydrogène et d'argon (H2/Ar) à 3500C ou encore de l'ammoniac (NH3). La couche de masque dur organique 3 est, ensuite, gravée par une seconde gravure au plasma. De préférence, la seconde gravure est une gravure ionique réactive (RIE). La couche de masque dur inorganique 4 qui comporte l'intégralité du réseau de motifs nanométriques est alors utilisée comme masque pour graver la couche de masque dur organique 3. Comme illustré à la figure 4, le réseau de motifs nanométriques est transféré de la couche de masque dur inorganique 4 à la couche de masque dur organique 3. Le plasma utilisé est, de préférence, un mélange gazeux dEydrogène et d-ϋn ou plusieurs composés azotés et/ou carbonés. Par exemple, le plasma est un mélange d'hydrogène (H2), d'azote (N2) ou d'ammoniac (NH3). La couche de masque dur inorganique 4 étant peu sensible aux conditions de plasma utilisées, elle garantit la pérennité du réseau de motifs nanométriques lors de ce transfert.The mask 5 is then removed according to techniques known to the nature of the mask 5 (Figure 3). A mask 5 made of carbon-rich material of the polystyrene or amorphous carbon type may, for example, be removed with an oxygen plasma (O 2 ) or with high temperature reducing plasmas, for example gaseous mixtures of hydrogen and helium (H 2 / He) or hydrogen and argon (H 2 / Ar) at 350 0 C or ammonia (NH 3). The organic hard mask layer 3 is then etched by a second plasma etching. Preferably, the second etching is a reactive ion etching (RIE). The inorganic hard mask layer 4 which comprises the entire network of nanometric patterns is then used as a mask for etching the organic hard mask layer 3. As illustrated in FIG. 4, the network of nanometric patterns is transferred from the inorganic hard mask 4 to the organic hard mask layer 3. The plasma used is preferably a gaseous mixture of hydrogen and d-ϋn or more nitrogen compounds and / or carbon compounds. For example, the plasma is a mixture of hydrogen (H 2 ), nitrogen (N 2 ) or ammonia (NH 3 ). Since the inorganic hard mask layer 4 is not very sensitive to the plasma conditions used, it guarantees the durability of the network of nanometric patterns during this transfer.
Selon une variante, le plasma est avantageusement un mélange gazeux dΘxygène, d-ϋn ou plusieurs composés halogènes et d'un gaz inerte servant de support au plasma. Par exemple, le plasma est un mélange dΘxygène (O2) et d'acide bromhydrique (HBr) et/ou de chlore (Cl2) et d'argon (Ar).According to a variant, the plasma is advantageously a gaseous mixture of oxygen, d-ϋn or more halogenated compounds and an inert gas serving as a plasma support. For example, plasma is a mixture of oxygen (O 2 ) and hydrobromic acid (HBr) and / or chlorine (Cl 2 ) and argon (Ar).
Comme illustré à la figure 5, la couche de masque dur inorganique 4 est éliminée selon tout procédé connu.As illustrated in FIG. 5, the inorganic hard mask layer 4 is removed by any known method.
Selon une variante non représentée, la couche de masque dur inorganique 4 restante après la seconde gravure est éliminée lors des étapes ultérieures soit lors de la gravure de la couche cible 1 soit avec la couche de masque dur organique 3.According to a variant not shown, the inorganic hard mask layer 4 remaining after the second etching is removed in the subsequent steps either during the etching of the target layer 1 or with the organic hard mask layer 3.
La couche de masque dur organique 3, qui comporte l'intégralité du réseau de motifs nanométriques, est ensuite utilisée comme masque pour graver la couche cible 1. Le réseau de motifs nanométriques est alors transféré de la couche de masque dur organique 3 à la couche cible 1 , par une troisième gravure (figure 6). La gravure de la couche cible 1 est réalisée selon tout procédé connu en fonction de la nature de la couche cible 1. Par exemple, une couche cible 1 en silicium peut être gravée avec un plasma formé d'un mélange gazeux (HBr + Cl2 +O2). Pour une couche cible 1 dBxyde de silicium, un plasma formé d'un mélange gazeux fluorocarboné peut être utilisé pour la gravure. Le masque dur organique 3 est, ensuite, éliminé selon tout procédé connu (figure 7).The organic hard mask layer 3, which comprises the entire network of nanometric patterns, is then used as a mask for etching the target layer 1. The network of nanometric patterns is then transferred from the organic hard mask layer 3 to the layer target 1, by a third engraving (Figure 6). The etching of the target layer 1 is carried out according to any known method depending on the nature of the target layer 1. For example, a silicon target layer 1 may be etched with a plasma formed of a gaseous mixture (HBr + Cl 2 + O 2 ). For a silicon oxide target layer 1, a plasma formed of a fluorocarbon gas mixture can be used for etching. The organic hard mask 3 is then removed by any known method (FIG. 7).
Selon un mode de réalisation particulier, une couche supplémentaire est insérée dans la structure multicouche 2 (figure 8). La couche de masque dur inorganique 4 est alors constituée de la couche mince dtôxyde métallique 4a, dBpaisseur inférieure ou égale à 10 nm, de préférence inférieure à 5nm et d'une couche diélectrique 4b entre la couche de masque dur organique 3 et la couche mince dtôxyde métallique 4a. La couche diélectrique 4b est avantageusement une couche d'oxyde de silicium (SiO2). L'épaisseur de la couche diélectrique 4b est, de préférence, inférieure ou égale à environ 20 nm. Le procédé selon ce second mode de réalisation comprend une étape de gravure supplémentaire, illustrée à titre d'exemple aux figures 9 à 12. Le transfert du réseau de motifs nanométriques du masque 5 à la couche mince d'oxyde métallique 4a est réalisé selon le même mode opératoire que précédemment.According to a particular embodiment, an additional layer is inserted in the multilayer structure 2 (FIG. 8). The inorganic hard mask layer 4 then consists of the thin layer of metal oxide 4a, with a thickness of less than or equal to 10 nm, preferably less than 5 nm and a dielectric layer 4b between the organic hard mask layer 3 and the thin layer. metal oxide 4a. The dielectric layer 4b is advantageously a silicon oxide (SiO 2 ) layer. The thickness of the dielectric layer 4b is preferably less than or equal to about 20 nm. The method according to this second embodiment comprises an additional etching step, illustrated by way of example in FIGS. 9 to 12. The transfer of the network of nanometric patterns from the mask 5 to the thin metal oxide layer 4a is carried out according to FIG. same procedure as before.
La couche mince d'oxyde métallique 4a qui comporte l'intégralité du réseau de motifs nanométriques est, ensuite, utilisée comme masque pour graver la couche diélectrique 4b (figure 9). Comme illustré à la figure 10, le réseau de motifs nanométriques est alors transféré de la couche mince d'oxyde métallique 4a à la couche diélectrique 4b par une gravure au plasma intermédiaire, de préférence une gravure RIE. Le plasma utilisé est un plasma comportant un composé fluorocarboné. Par exemple, le plasma contient du tétrafluorométhane (CF4), avantageusement, en présence d'un gaz inerte, par exemple de l'argon. La couche mince d'oxyde métallique 4a est particulièrement résistante au plasma fluorocarboné. L'existence de cette couche diélectrique 4b améliore donc la sélectivité de la gravure.The thin metal oxide layer 4a which comprises the entire network of nanometric patterns is then used as a mask for etching the dielectric layer 4b (FIG. 9). As illustrated in FIG. 10, the network of nanometric patterns is then transferred from the metal oxide thin layer 4a to the dielectric layer 4b by an intermediate plasma etching, preferably an RIE etching. The plasma used is a plasma comprising a fluorocarbon compound. For example, the plasma contains tetrafluoromethane (CF 4 ), advantageously in the presence of an inert gas, for example argon. The thin metal oxide layer 4a is particularly resistant to fluorocarbon plasma. The existence of this dielectric layer 4b thus improves the selectivity of the etching.
Après élimination de la couche 4a restante, la couche diélectrique 4b, qui comporte l'intégralité du réseau de motifs nanométriques (figure 11 ), est ensuite utilisée comme masque pour graver la couche de masque dur organique 3. Comme illustré à la figure 12, le réseau de motifs nanométriques est alors transféré de la couche diélectrique 4b à la couche de masque dur organique 3, dans les mêmes conditions que la seconde gravure au plasma. Après élimination de la couche diélectrique 4b, le réseau de motifs nanométriques est transféré de la couche de masque dur organique 3 à la couche cible 1 selon un mode opératoire identique à celui du premier mode de réalisation.After removal of the remaining layer 4a, the dielectric layer 4b, which comprises the entire network of nanometric patterns (FIG. 11), is then used as a mask for etching the organic hard mask layer 3. As illustrated in FIG. the network of nanometric patterns is then transferred from the dielectric layer 4b to the organic hard mask layer 3, under the same conditions as the second plasma etching. After removal of the dielectric layer 4b, the network of nanometric patterns is transferred from the organic hard mask layer 3 to the target layer 1 according to a procedure identical to that of the first embodiment.
Selon une variante, non représentée, la couche diélectrique 4b et la couche de masque dur organique 3 sont gravées successivement sans éliminer les couches restantes respectivement d'oxyde métallique 4a et diélectrique 4b. Les couches 4a et 4b sont ensuite éliminées en même temps soit par gravure de la couche cible 1 lorsque les conditions de gravure sont suffisamment agressives soit après gravure de la couche cible 1 , avec la couche de masque dur organique 3.According to a variant, not shown, the dielectric layer 4b and the organic hard mask layer 3 are etched successively without removing the remaining layers respectively of metal oxide 4a and dielectric 4b. The layers 4a and 4b are then eliminated at the same time either by etching the target layer 1 when the etching conditions are sufficiently aggressive or after etching the target layer 1, with the organic hard mask layer 3.
Le choix du mode de réalisation du procédé de gravure est dicté par la nature des couches et la compatibilité des couches entre elles. Ainsi, le procédé de gravure selon le second mode de réalisation est particulièrement adapté lorsque le dépôt direct de la couche dtôxyde métallique 4a sur la couche organique 3 est difficile ou impossible.The choice of the embodiment of the etching process is dictated by the nature of the layers and the compatibility of the layers between them. Thus, the etching method according to the second embodiment is particularly suitable when the direct deposition of the metal oxide layer 4a on the organic layer 3 is difficult or impossible.
Selon un mode de réalisation particulier, non représenté, la structure multicouche 2 est constituée de la couche de masque dur inorganique 4 disposée directement sur la couche cible 1 , elle-même recouverte par le masque 5 comportant le réseau de motifs nanométriques. La couche de masque dur organique 3 est alors inexistante. Comme précédemment, la couche de masque dur inorganique 4 peut également comporter une couche diélectrique 4b lorsque le dépôt de la couche d'oxyde métallique 4a sur la couche cible 1 est difficilement réalisable. Le transfert du réseau de motifs nanométriques du masque 5 à la couche de masque dur inorganique 4 est alors réalisé selon le même mode opératoire que le premier mode, décrit ci- dessus. La couche cible 1 peut ensuite être gravée selon tout procédé connu.According to a particular embodiment, not shown, the multilayer structure 2 consists of the inorganic hard mask layer 4 disposed directly on the target layer 1, itself covered by the mask 5 comprising the network of nanometric patterns. The organic hard mask layer 3 is then non-existent. As previously, the inorganic hard mask layer 4 may also comprise a dielectric layer 4b when the deposition of the metal oxide layer 4a on the target layer 1 is difficult to achieve. The transfer of the network of nanometric patterns from the mask 5 to the inorganic hard mask layer 4 is then carried out according to the same operating mode as the first mode, described above. The target layer 1 can then be etched according to any known method.
Selon une variante, la couche cible 1 est une couche inorganique, par exemple, une couche diélectrique. Le plasma utilisé pour la gravure de la couche cible 1 peut alors être identique à celui de la gravure de la couche de masque dur inorganique 4.According to one variant, the target layer 1 is an inorganic layer, for example a dielectric layer. The plasma used for the etching of the target layer 1 can then be identical to that of the etching of the inorganic hard mask layer 4.
Le procédé de gravure selon ce troisième mode de réalisation est particulièrement adapté pour graver une couche inorganique, par exemple, une couche diélectrique ou pour graver une couche cible 1 sur une faible épaisseur, avantageusement, une épaisseur inférieure à 100 nm.The etching method according to this third embodiment is particularly suitable for etching an inorganic layer, for example a dielectric layer or for etching a target layer 1 over a small thickness, advantageously a thickness of less than 100 nm.
Les procédés de gravure décrits ci-dessus sont des procédés industrialisables, adaptés aux masques ayant des résolutions très élevées, développés à l'heure actuelle pour répondre aux exigences de miniaturisation des circuits intégrés et des nanotechnologies. Ils permettent de transférer un réseau de motifs nanométriques d'un masque très mince à un substrat avec une sélectivité élevée et un bon contrôle dimensionnel.The etching processes described above are industrializable processes, suitable for masks with very high resolutions, developed at present to meet the requirements of miniaturization of integrated circuits and nanotechnologies. They make it possible to transfer a network of nanometric patterns from a very thin mask to a substrate with high selectivity and good dimensional control.
Ces procédés de gravure sont particulièrement adaptés à la réalisation de nanostructures pour des applications en nanoscience. These etching processes are particularly suitable for producing nanostructures for applications in nanoscience.

Claims

Revendications claims
1. Procédé de gravure dElne couche cible (1) comportant la formation sur ladite couche cible (1 ) ddne structure multicouche (2) ayant une couche de masque dur inorganique (4), disposée sur ladite couche cible (1 ), elle-même recouverte par un masque (5) comportant un réseau de motifs nanométriques, et le transfert dans la couche cible (1 ), du réseau de motifs nanométriques du masque (5) par gravures successives, procédé caractérisé en ce que ladite couche de masque dur inorganique (4) comporte une couche mince dtôxyde métallique (4a), dBpaisseur inférieure ou égale à 10 nm et en ce que le réseau de motifs nanométriques est transféré du masque (5) à la couche mince dΘxyde métallique (4a) par une première gravure au plasma dans des conditions de faible bombardement ionique.A method of etching a target layer (1) comprising forming on said target layer (1) a multilayer structure (2) having an inorganic hard mask layer (4) disposed on said target layer (1), itself covered by a mask (5) comprising a network of nanometric patterns, and the transfer in the target layer (1), of the network of nanometric patterns of the mask (5) by successive etchings, characterized in that said inorganic hard mask layer (4) has a thin layer of metal oxide (4a), with a thickness of less than or equal to 10 nm and in that the network of nanometric patterns is transferred from the mask (5) to the metal oxide thin layer (4a) by first etching plasma under conditions of low ion bombardment.
2. Procédé selon la revendication 1 , caractérisé en ce que le plasma de la première gravure a une énergie des ions inférieure à 5OeV.2. Method according to claim 1, characterized in that the plasma of the first etching has an ion energy of less than 5OeV.
3. Procédé selon la revendication 2, caractérisé en ce que le plasma de la première gravure a une énergie des ions inférieure ou égale à 4OeV.3. Method according to claim 2, characterized in that the plasma of the first etching has an ion energy of less than or equal to 40eV.
4. Procédé selon IDne quelconque des revendications 1 à 3, caractérisé en ce que le bombardement ionique de la première gravure au plasma est réalisé sans auto-polarisation.4. Process according to any one of claims 1 to 3, characterized in that the ion bombardment of the first plasma etching is performed without self-biasing.
5. Procédé selon IDne quelconque des revendications 1 à 4, caractérisé en ce que la première gravure au plasma est réalisée à une température inférieure ou égale à 3500C.5. Process according to any one of claims 1 to 4, characterized in that the first plasma etching is performed at a temperature less than or equal to 350 0 C.
6. Procédé selon IDne quelconque des revendications 1 à 5, caractérisé en ce que la première gravure au plasma est réalisée à température ambiante. 6. Process according to any one of claims 1 to 5, characterized in that the first plasma etching is performed at room temperature.
7. Procédé selon IDne quelconque des revendications 1 à 6, caractérisé en ce que l'épaisseur de la couche mince dΘxyde métallique (4a) est inférieure à 5 nm.7. Process according to any one of claims 1 to 6, characterized in that the thickness of the metal oxide thin layer (4a) is less than 5 nm.
8. Procédé selon IDne quelconque des revendications 1 à 7, caractérisé en ce que IΘxyde métallique (4a) est choisi parmi les oxydes de hafnium, dtâluminium, de yttrium et de zirconium.8. Process according to any one of claims 1 to 7, characterized in that the metal oxide (4a) is selected from oxides of hafnium, aluminum, yttrium and zirconium.
9. Procédé selon IDne quelconque des revendications 1 à 8, caractérisé en ce que les motifs nanométriques du réseau du masque (5) ont une dimension critique (L) inférieure ou égale à 20 nm.9. A method according to any one of claims 1 to 8, characterized in that the nanometric patterns of the mask network (5) have a critical dimension (L) less than or equal to 20 nm.
10. Procédé selon IDne quelconque des revendications 1 à 9, caractérisé en ce que le masque (5) a une épaisseur inférieure ou égale à 30 nm.10. Process according to any one of claims 1 to 9, characterized in that the mask (5) has a thickness less than or equal to 30 nm.
11. Procédé selon IDne quelconque des revendications 1 à 10, caractérisé en ce que le plasma de la première gravure au plasma comporte un mélange de chlore et de chlorure de bore et/ou de chlorosilane.11. A method according to any one of claims 1 to 10, characterized in that the plasma of the first plasma etching comprises a mixture of chlorine and boron chloride and / or chlorosilane.
12. Procédé selon IDne quelconque des revendications 1 à 11 , caractérisé en ce que la structure multicouche (2) comporte une couche de masque dur organique (3) disposée entre la couche cible (1 ) et la couche de masque dur inorganique (4).Process according to any one of Claims 1 to 11, characterized in that the multilayer structure (2) comprises an organic hard mask layer (3) disposed between the target layer (1) and the inorganic hard mask layer (4). .
13. Procédé selon la revendication 12, caractérisé en ce que la couche de masque dur inorganique (4) comporte, entre la couche mince dtôxyde métallique (4a) et la couche de masque dur organique (3), une couche diélectrique (4b) ayant une épaisseur inférieure ou égale à 20 nm. Method according to claim 12, characterized in that the inorganic hard mask layer (4) comprises, between the metal oxide thin layer (4a) and the organic hard mask layer (3), a dielectric layer (4b) having a thickness less than or equal to 20 nm.
14. Procédé selon IDne des revendications 12 et 13, caractérisé en ce que le réseau de motifs nanométriques est transféré de la couche de masque dur inorganique (4) à la couche de masque dur organique (3) par une seconde gravure au plasma.14. Process according to IDne of claims 12 and 13, characterized in that the network of nanometric patterns is transferred from the inorganic hard mask layer (4) to the organic hard mask layer (3) by a second plasma etching.
15. Procédé selon la revendication 14, caractérisé en ce que la seconde gravure au plasma est réalisée avec un plasma comportant un mélange gazeux dEydrogène et ddn ou plusieurs composés azotés et/ou carbonés.15. The method of claim 14, characterized in that the second plasma etching is performed with a plasma comprising a gaseous mixture of hydrogen and ddn or more nitrogen compounds and / or carbon.
16. Procédé selon la revendication 14, caractérisé en ce que la seconde gravure au plasma est réalisée avec un plasma comportant un mélange gazeux dΘxygène et d-ϋn ou plusieurs composés halogènes. 16. The method of claim 14, characterized in that the second plasma etching is performed with a plasma comprising a gaseous mixture of oxygen and d-ϋn or more halogenated compounds.
PCT/EP2009/061776 2008-09-12 2009-09-10 Method of etching using a multilayer masking structure WO2010029138A2 (en)

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