WO2009150795A1 - Dispositif de reproduction d’image - Google Patents

Dispositif de reproduction d’image Download PDF

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Publication number
WO2009150795A1
WO2009150795A1 PCT/JP2009/002469 JP2009002469W WO2009150795A1 WO 2009150795 A1 WO2009150795 A1 WO 2009150795A1 JP 2009002469 W JP2009002469 W JP 2009002469W WO 2009150795 A1 WO2009150795 A1 WO 2009150795A1
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Prior art keywords
image
resolution
processing means
image processing
data
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PCT/JP2009/002469
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English (en)
Japanese (ja)
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石井秀樹
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パナソニック株式会社
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/765—Interface circuits between an apparatus for recording and another apparatus
    • H04N5/77—Interface circuits between an apparatus for recording and another apparatus between a recording apparatus and a television camera
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/387—Composing, repositioning or otherwise geometrically modifying originals
    • H04N1/3872—Repositioning or masking
    • H04N1/3873—Repositioning or masking defined only by a limited number of coordinate points or parameters, e.g. corners, centre; for trimming
    • H04N1/3875—Repositioning or masking defined only by a limited number of coordinate points or parameters, e.g. corners, centre; for trimming combined with enlarging or reducing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/387—Composing, repositioning or otherwise geometrically modifying originals
    • H04N1/3877—Image rotation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/46—Colour picture communication systems
    • H04N1/64—Systems for the transmission or the storage of the colour picture signal; Details therefor, e.g. coding or decoding means therefor
    • H04N1/646—Transmitting or storing colour television type signals, e.g. PAL, Lab; Their conversion into additive or subtractive colour signals or vice versa therefor
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/162—User input
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
    • H04N19/59—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving spatial sub-sampling or interpolation, e.g. alteration of picture size or resolution
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/80—Details of filtering operations specially adapted for video compression, e.g. for pixel interpolation

Definitions

  • the present invention relates to an image reproducing apparatus for decoding image data, particularly still image data, such as a digital camera, a mobile phone with a camera, and a digital video camera.
  • a JPEG compression technique is used in order to efficiently handle a large amount of data.
  • an image input by a camera is stored in a recording medium in the digital camera after being subjected to data compression processing by encoding processing.
  • Still image data stored in a recording medium such as a memory card or a hard disk is displayed on a display such as a liquid crystal monitor after being decompressed by a decoding process by an image reproducing apparatus.
  • Patent Document 1 discloses DC of JPEG images. Means for generating a thumbnail image using only components have been proposed.
  • the image data is converted into image data based on the rotation information included in the image data during the JPEG decoding process of the image stored on the recording medium. Rotation processing is applied to the output and displayed.
  • the rotation process is performed on the image output and displayed by the user after the JPEG decoding process and the output display, the JPEG decoding, the rotation information included in the image data, and the rotation information specified by the user are performed again. Based on the above, the image data is rotated and output and displayed.
  • a general image reproduction apparatus performs a decoding and processing process on the JPEG image stored in the recording medium again and displays it.
  • the conventional image reproducing apparatus has the following problems.
  • the stored JPEG image size is very large, such as a mega size, it may be displayed after being reduced to a size suitable for the display
  • the original mega size image size must be reduced to a small image size such as a thumbnail image. Rate) becomes too small. That is, since the resizing rate is small, there is a problem that the filter processing for performing the resizing processing becomes very complicated.
  • the memory capacity will be increased. For example, when a JPEG image is reduced by 1/8 in the vertical and horizontal directions, it can be realized by repeating 1/2 reduction four times. At this time, in order to reduce the memory capacity, the memory (area) for storing the result of 1/2 reduction for the first time and the memory (area) for storing the result of 1/2 reduction for the second and subsequent times are shared.
  • the processing by the first image processing means and the second image processing are usually performed.
  • the processing by the means is serial processing (processing by the second image processing means after completion of the processing by the first image processing means). That is, in order to simplify the control of a series of processing by the first image processing means and the second image processing means, the processing of the first image processing means for all data of the input image is completed, The result is temporarily stored in the memory. Then, one frame of data is sequentially read again from the memory, and the processing by the second image processing means is performed.
  • the first image processing unit performs vertical / horizontal enlargement / reduction processing on an input image
  • the second image processing unit performs rotation / phase shift processing. That is, vertical / horizontal enlargement / reduction processing is performed on the data for one frame of the input image, and the result is stored in the memory.
  • the memory capacity is required to be at least the image size after the vertical / horizontal enlargement / reduction processing.
  • one frame of data is sequentially read again from the memory, and rotation / phase shift processing is performed.
  • the processing of the first image processing means and the processing of the second image processing means are not serially processed but serially processed, so that the efficiency in terms of processing performance deteriorates.
  • JPEG decoding processing is performed once and output and displayed, and rotation processing is performed on the image output and displayed by the user, JPEG decoding and rotation information included in the image data and rotation specified by the user are performed again. Since rotation processing is performed on the image data based on the information and output and displayed, it takes time until the rotation image is displayed after the user requests the rotation processing, and there is a problem that user responsiveness decreases. Was.
  • JPEG encoded data JPEG stream
  • Image processing such as zoom processing, enlargement / reduction processing, and rotation processing based on stream information included in the processing and JPEG stream
  • image processing processing such as extraction, resizing, and rotation processing corresponding to user requests are performed and displayed.
  • image processing information included in the encoded stream such as zoom processing, enlargement / reduction processing, and rotation, and requests from the user for Zoom processing, enlargement / reduction processing, rotation, and the like
  • image processing processing such as rotation, and the like
  • an input image having any sampling factor corresponds to the image processing information included in each JPEG stream and the image processing information requested by the user, and a predetermined sampling factor. It is necessary to output and display by this, and the internal processing becomes complicated.
  • the representation of a still image is a YCbCr color system
  • the horizontal sampling factor of luminance Y is H 0
  • the vertical sampling factor of luminance Y is V 0
  • the horizontal sampling factor of luminance Cb is H 1
  • the vertical sampling factor of luminance Cb Is represented as V 1
  • the horizontal sampling factor of luminance Cr as H 2
  • the vertical sampling factor of luminance Cr as V 2
  • resizing processing must be performed on the color difference data of the image having the first resolution twice in the horizontal direction and once in the vertical direction. Furthermore, it is necessary to correct the phase shift of the color difference data generated by rotating 90 degrees to the right. It is necessary to consider such processing for input images having any sampling factor, and it is necessary to finally output after considering and responding to both the stream information included in the JPEG stream and user requests. The internal processing becomes quite complicated.
  • sampling factor here refers to a sampling factor defined in ISO / IEC10918-1.
  • the processing contents performed by the first image processing means and the second image processing means are input. It is limited to enlargement / reduction processing for image data, and both the first image processing means and the second image processing means perform only enlargement / reduction processing.
  • the present invention has been made to solve the above-described problems, and the object thereof is to realize a high-speed decoding performance of a mega-sized input image exceeding 1 million pixels, and to perform a decoding process.
  • An object of the present invention is to provide an image reproducing apparatus that simplifies internal processing and enables high-speed response such as zoom processing, enlargement / reduction processing, and rotation for a decoded image in response to a user request.
  • the first image processing means reduces the image to the second resolution determined in advance, and finally The image is converted into a desired third image resolution and output.
  • the image reproduction device of the present invention when generating a thumbnail image by decoding a JPEG image, when the resolution of the JPEG image is the resolution of the first image and the resolution of the thumbnail image is the third resolution, If the resolution of the JPEG image is higher than a specific resolution, the JPEG image is not converted directly from the first resolution to the third resolution, but is once converted to a predetermined second resolution.
  • the first image processing means once converts the first resolution to the second resolution, and then the second image processing means uses the second resolution.
  • the resolution of the JPEG image is lower than the specified resolution
  • the resolution lower than the specified resolution is close to the reduced second resolution.
  • the second image processing means can be used to convert from a resolution less than the specified resolution to the third resolution. Therefore, since the second image processing means can be shared when converting a resolution less than a specific resolution that does not need to be converted to the second resolution directly to the third resolution, it is possible to simplify internal circuits and processing. It is.
  • the second image processing means is a circuit that performs a reduction process using a filter
  • the circuit can be shared when the resolution less than a specific resolution is reduced to the third resolution.
  • a wide range of resizing ratios can be handled without causing significant image quality degradation within the human detectable range and without increasing the reduction processing load. It is possible to perform the reduction processing. The same applies to the enlargement process.
  • the rotation processing is performed based on the rotation information.
  • a phase shift process associated with the rotation process is performed, and the sampling factor of the first image is converted into one specific sampling factor and temporarily stored in the memory at the resolution of the second image.
  • the memory in this case may be either inside or outside the image playback device.
  • the capacity of the memory can be arbitrarily designated from the outside of the image reproducing apparatus so that the capacity can be optimized for the system.
  • the memory capacity is divided into two, and each area is used by the first image processing means and the second image processing means, and the first image processing means and the second image processing means.
  • the second image processing means uses the other area used by the first image processing means separately from the area used by the means. Then, when both the first image processing means and the second image processing means are completed, the memory area used by each image processing means is switched. That is, the first image processing unit and the second image processing unit use the memory area divided in two while interleaving.
  • the memory capacity may be a capacity sufficient to store the processing results of the first image processing means for all input data. However, in order to save memory, the memory capacity is minimized and the second image processing means is used. Only the capacity required for processing is sufficient. By providing this capacity for two surfaces (twice), when the first image processing means and the second image processing means use each area of the memory simultaneously, the first image processing means and the second image processing means are used.
  • the image processing means can perform parallel processing.
  • an image having any one sampling format from the memory and having the second resolution subjected to the rotation processing (rotation information included in the Exif file) in the JPEG stream and the accompanying phase shift processing is read.
  • the second image processing means converts the resolution of the third image into the final output sampling format and outputs it. In this way, when the user wants to rotate the image having the third resolution, or to extract a specific area in the image, the user-specified rotation is generated again after the second resolution image is generated. There is no need to perform a cutting process or the like, and it is sufficient to perform a rotation or a cutting process on an image having the second resolution already stored in the memory, and can respond to a user request at high speed.
  • the first image processing means when the resolution of the first image is higher than a specific value for an input image of all resolutions, the first image processing means temporarily uses a human image.
  • the circuit scale By converting the resolution with a process that cannot be detected by the visual characteristics, and further converting the resolution of the image data to the display resolution specified by the second image processing means, the circuit scale can be applied to any resolution image input. There is an effect that reduction and processing time can be shortened. Further, it is not necessary to change the JPEG decoding process for input images of any resolution, and the decoding process can be simplified.
  • the decoding process can be simplified by dividing the entire decoding process into two parts through the memory between the first image processing means and the second image processing means, By making it possible to arbitrarily specify the memory capacity from the outside of the image reproduction apparatus of the present invention, it is possible to achieve an optimum memory capacity for the entire system, and memory saving can be realized.
  • the processing by the first image processing means and the processing by the second image processing means can be processed in parallel, and high speed can be realized.
  • the first image processing means performs enlargement / reduction information, cut-out information, and rotation processing information included in the stream.
  • the second image processing means allows the user to Performs specified enlargement / reduction information, cutout information, and rotation processing information. As a result, the speed of the decoding process of still image data can be increased.
  • the user when the user wants to perform image processing processing such as extraction of a specific area, enlargement / reduction processing, rotation, etc., on image data having the third resolution, it can be realized at high speed. Is possible. Also, it can be used for both image processing such as extraction, enlargement / reduction processing, rotation, etc. for a specific area for a JPEG file included in an Exif file, and image processing such as extraction, enlargement / reduction processing, rotation, etc. specified by a user. On the other hand, it can be realized with a simple internal processing flow.
  • an input image having any sampling factor is converted into a specific sampling factor by the first image processing means, and converted into a desired sampling factor by the second image processing means.
  • the image processing means other than the sampling factor conversion performed by the second image processing means can be simplified and the processing time can be shortened for image input of any sampling factor.
  • FIG. 1 is a block diagram showing an image processing apparatus according to the first embodiment of the present invention.
  • FIG. 2 is a diagram showing sampling factors of the first image, the second image, and the third image of the embodiment.
  • FIG. 3 is a block diagram showing an image processing apparatus according to the second embodiment of the present invention.
  • FIG. 4 is a diagram showing a first resolution (XI, YI) of image data, a second resolution (Xm, Ym) of image data, and a third resolution (XO, YO) of image data in the embodiment. It is.
  • FIG. 5 is a block diagram showing an image processing apparatus according to the third embodiment of the present invention.
  • FIG. 1 is a block diagram showing an image processing apparatus according to the first embodiment of the present invention.
  • FIG. 2 is a diagram showing sampling factors of the first image, the second image, and the third image of the embodiment.
  • FIG. 3 is a block diagram showing an image processing apparatus according to the second embodiment of the present invention.
  • FIG. 4 is a
  • FIG. 6 shows a first resolution 600 (XI, YI) of image data, a second resolution 601 (XI / 8, YI / 8) of image data, and a third resolution 602 of image data ( It is a figure which shows (XO, YO).
  • FIG. 7 is a diagram showing a block configuration of the horizontal and vertical filters in the first and second embodiments of the present invention.
  • FIG. 8 is a block diagram showing an image processing apparatus according to the fourth embodiment of the present invention.
  • FIG. 9 is a block diagram showing an image processing apparatus according to the fifth embodiment of the present invention.
  • FIG. 12 is a diagram showing image data obtained by simply rotating the original image data of FIG. 10 90 ° to the right.
  • FIG. 13 is a diagram showing image data obtained by enlarging only the color difference data of the original image data of FIG. 10 twice in the horizontal direction.
  • FIG. 14 is a diagram showing image data obtained by rotating the original image data of FIG. 13 by 90 ° to the right.
  • FIG. 15 is a diagram showing image data obtained by moving only the color difference data of the image data of FIG. 10 by +0.5 pixels in the vertical direction.
  • FIG. 16 is a diagram showing image data obtained by enlarging the image data of FIG. 15 twice in the horizontal direction.
  • FIG. 17 is a diagram showing image data obtained by rotating the image data of FIG. 16 by 90 ° to the right.
  • FIG. 1 is a block diagram showing a first embodiment of the present invention.
  • 100 is a first image processing circuit (first image processing means), and 200 is a second image processing circuit (second image processing means).
  • the first image processing circuit 100 includes a first horizontal / vertical filter 101, a first memory 102, and a first image processing circuit 103.
  • the second image processing circuit 200 includes a second horizontal / vertical filter 201, a second memory 202, and a second image processing circuit 203.
  • FIG. 2 is a diagram illustrating a first image sampling factor 300, a second image sampling factor 301, and a third image sampling factor 302 according to the first embodiment of the present invention.
  • a sampling factor 300 in FIG. 2 indicates an input sampling factor of the first image processing circuit 100 in FIG.
  • the sampling factor 301 in FIG. 2 indicates the output sampling factor of the first image processing circuit 100 in FIG. 1 and the input sampling factor of the second image processing circuit 200 in FIG.
  • the sampling factor 302 in FIG. 2 indicates the output sampling factor of the second image processing circuit 200 in FIG.
  • the first image processing circuit 103 and the second image processing circuit 203 are assumed to be a rotation process, a cut-out process, and the like.
  • the case where the rotation processing is performed in the first image processing circuit 103 and the second image processing circuit 203 will be described.
  • An input signal having a sampling factor 300 of the first image is input to the first horizontal / vertical filter 101.
  • the host CPU executes a designated rotation process on the signal from the first horizontal / vertical filter 101 and stores it in the memory 102.
  • the memory 102 stores image data having the second resolution. At this time, the memory 102 stores all or some of the data of the image having the second resolution, which is the output result of the first image processing circuit 103.
  • the amount of data to be stored is configured so that it can be specified from the external host CPU of the image reproduction apparatus according to the present embodiment based on the capacity of the memory 102. Subsequently, the data stored in the memory 102 is sequentially input from the memory 102 to the second horizontal / vertical filter 201.
  • the luminance component and the chrominance component are equal in number to the product of the type of the input sampling factor and the type of rotation processing performed in the first image processing circuit 103. There will be a resizing pattern.
  • the second image processing circuit 203 rotates 90 degrees to the left, the data in the memory 102 is processed twice horizontally and 1 ⁇ 4 times vertically.
  • the host CPU performs a designated rotation process on the output signal of the second horizontal / vertical filter 201, and outputs it to the second horizontal / vertical filter 201.
  • Other sampling factors may be used, or a plurality of sampling factors may be provided. The same applies to the sampling factor 302 of the third image.
  • the processing performed by the first image processing circuit 103 and the second image processing circuit 203 has been described by taking the rotation processing as an example, but it may be a cut-out processing or other image processing circuits.
  • FIG. 3 is a block diagram showing a second embodiment of the present invention.
  • reference numeral 400 denotes a first image processing circuit
  • 500 denotes a second image processing circuit.
  • the first image processing circuit 400 includes a thinning / horizontal vertical filter circuit 401 and a first memory 402.
  • the second image processing circuit includes a horizontal / vertical filter 501 and a second memory 502.
  • FIG. 4 shows the first resolution (XI, YI) of the image data, the second resolution (Xm, Ym) of the image data, and the third resolution (XO, YO) of the image data of this embodiment.
  • FIG. 4 shows the third resolution (XO, YO) of the image data to be displayed on the screen and the first resolution (XI, YI) of the input image.
  • the first resolution (XI, YI), the second resolution (Xm, Ym) of the image data, and the third resolution (XO, YO) of the image data have the following relationship. To do.
  • the input signal 403 has a first resolution (XI, YI).
  • the input signal 403 is input to the thinning / horizontal / vertical filter circuit 401, and pixel thinning is performed in the horizontal and vertical directions. Pixel signals are thinned out and the image signal 404 having the second resolution (Xm, Ym) is stored in the first memory 402.
  • the output 405 of the first memory 402 is connected to the input signal 503 to the second image processing circuit 500 and input to the horizontal / vertical filter 501.
  • the horizontal / vertical filter 501 performs a two-dimensional filtering process on the image data of the second resolution (Xm, Ym) to the third resolution (XO, YO).
  • the image data 504 subjected to the two-dimensional filtering process is stored in the second memory 502.
  • the image data stored in the second memory 502 is read and displayed as an output signal 505 at the image display timing.
  • the display device In general, there are various first resolutions to be input. However, it is difficult for the display device (display) to cope with any resolution of the input image, and usually has a fixed resolution. There are many cases. For example, the resolution may be D1 (horizontal 720 pixels, vertical 480 lines) or VGA (horizontal 640 pixels, vertical 480 lines). Therefore, it is necessary to convert input image data having various resolutions to the resolution of a display device having a fixed resolution. Resolution conversion is generally realized by two-dimensional filter processing, but the circuit scale becomes large to cope with any enlargement / reduction ratio.
  • the second resolution (Xm, Ym) is passed.
  • the third resolution (XO, YO) is the same as the resolution of the output device
  • the second resolution (Xm, Ym) is determined as follows, and the second resolution (Xm, Ym) is fixed. Value.
  • the circuit may be simple. For example, it can be configured by a cascade connection of a horizontal one-dimensional linear filter and a vertical one-dimensional linear filter.
  • the magnification / reduction ratio of resolution conversion from the first resolution (XI, YI) to the second resolution (Xm, Ym) is infinite, and the configuration of the horizontal / vertical secondary filter and the horizontal one-dimensional linear filter Even in the configuration of the vertical one-dimensional linear filter, the circuit scale increases, and the processing time also increases in accordance with the first resolution (XI, YI) of the input image.
  • resolution conversion from the first resolution (XI, YI) to the second resolution (Xm, Ym) is performed by a simple horizontal / vertical thinning process.
  • the circuit scale of the first image processing circuit 400 including the thinning / horizontal / vertical filter circuit 401 and the first memory 402 can be reduced, and the processing time is also shortened.
  • the second resolution (Xm, Ym) even if the resolution conversion from the first resolution (XI, YI) to the second resolution (Xm, Ym) is simple, thinning processing is performed. It is confirmed by subjective evaluation of the image that the aliasing error is limited to a range where it cannot be detected due to the visual characteristics of the image.
  • the third resolution (XO, YO) is set to be the same as the resolution D1 (horizontal 720 pixels, vertical 480 lines) to VGA (horizontal 640 pixels, vertical 480 lines) of the output device
  • the second resolution (Xm , Ym) is appropriately set to a resolution of D1 (horizontal 720 pixels, vertical 480 lines) to SVGA (horizontal 1024 pixels, vertical 768 lines).
  • this resolution setting can be selected according to the resolution of the output device, and is not limited to the example given here.
  • the first resolution (XI, YI), the second resolution (Xm, Ym) of the image data, and the third resolution (XO, YO) of the image data are as follows: Although it is the case of the relationship, this relationship is not necessarily required.
  • FIG. 5 is a block diagram showing a third embodiment of the present invention.
  • reference numeral 400 denotes a first image processing circuit
  • 500 denotes a second image processing circuit.
  • the first image processing circuit 400 includes a DCT / horizontal vertical filter circuit 410 and a first memory 402.
  • the second image processing circuit 500 includes a horizontal / vertical filter 501 and a second memory 502.
  • FIG. 6 shows the first resolution 600 (XI, YI) of image data, the second resolution 601 (XI / 8, YI / 8) of image data, and the image data of the third embodiment of the present invention. It is a figure which shows the 3rd resolution 602 (XO, YO). As shown in FIG. 6, a third resolution 602 (XO, YO) of image data to be displayed on the screen and a first resolution 600 (XI, YI) of the input image are given in advance.
  • the input signal 403 has a first resolution 600 (XI, YI).
  • a first resolution 600 (XI, YI) a first resolution 600 (XI, YI), a second resolution 601 (XI / 8, YI / 8) of image data, and a third resolution 602 (XO, YO) of image data are as follows. A case where there is a relationship will be described.
  • the input signal 403 is input to the DCT / horizontal vertical filter circuit 410 and calculates the average value of the luminance and color difference of 64 pixels in a rectangle of 8 horizontal pixels and 8 vertical pixels. The average value is calculated, and the image signal 404 having the second resolution 601 (XI / 8, YI / 8) is stored in the first memory 402.
  • the input signal 403 is output as the image signal 404 with the first resolution 600 (XI, YI), and stored in the first memory 402.
  • the output 405 of the first memory 402 is connected to the input signal 503 to the second image processing circuit 500 and input to the horizontal / vertical filter 501.
  • the horizontal / vertical filter 501 performs a two-dimensional filtering process on the image data of the second resolution (XI / 8, YI / 8) or (XI, YI) to the third resolution 602 (XO, YO).
  • the image data 504 subjected to the two-dimensional filtering process is stored in the second memory 502.
  • the image data stored in the second memory 502 is read and displayed as an output signal 505 at the image display timing.
  • FIG. 7 is a diagram showing a block configuration of the horizontal / vertical filter 501.
  • the horizontal filter 700 includes a horizontal filter input image memory 701, a horizontal interpolation position counter 702, and an image interpolation circuit 703.
  • the vertical filter 800 includes a vertical filter input image memory 801, a vertical interpolation position counter 802, and an image interpolation circuit 803. Is done.
  • the horizontal filter 700 performs the following horizontal phase shift according to the horizontal resolution XI of the input image, the horizontal resolution XO of the output image, and the horizontal phase shift XS of the output image with respect to the input image (value in units of 256 pixels). Perform processing and horizontal resizing.
  • phase shift process is a process for correcting the sampling position of color difference data generated when image data is rotated.
  • the phase shift process will be described in detail with reference to FIGS.
  • FIG. 10 shows, as original image data, the horizontal sampling factor of luminance Y is H 0 , the vertical sampling factor of luminance Y is V 0 , the horizontal sampling factor of color difference Cb is H 1 , and the vertical sampling factor of color difference Cb is V 1 .
  • FIGS. 10 and 11 and FIGS. 12 to 17 described below pixels having only luminance Y are represented by white circles, and pixels having luminance Y, color difference Cb, and color difference Cr are hatched in the circle. Expressed with symbols.
  • FIG. 12 shows image data when the image data of FIG. 10 is rotated 90 degrees to the right.
  • the color difference data of FIG. 11 which is the final output data
  • simply rotating 90 degrees to the right results in FIG. Therefore, some processing is necessary.
  • FIG. 13 shows the image data enlarged twice in the horizontal direction.
  • FIG. 14 shows image data obtained by rotating the image data doubled in the horizontal direction in FIG. 13 by 90 degrees to the right. Since the final output data is shown in FIG. 11, it can be seen that it is not sufficient to enlarge the image twice in the horizontal direction, as can be seen from FIG.
  • FIG. 15 shows image data obtained by moving only the color difference data of the image data of FIG. 10 by +0.5 pixels in the vertical direction.
  • FIG. 16 shows image data obtained by enlarging the image data of FIG. 15 twice in the horizontal direction. This is image data obtained by shifting only the color difference data by +0.5 pixels in the vertical direction and then enlarging the image data in FIG. 10 twice in the horizontal direction.
  • FIG. 17 shows image data obtained by rotating the image data of FIG. 16 90 degrees to the right. This image data is obtained by moving only the color difference data by +0.5 pixels in the vertical direction with respect to the image data in FIG. 10 and then rotating the image data doubled horizontally by 90 degrees to the right. Image data. As can be seen from FIG. 17, this image data matches the image data in the sampling format of the final output image data shown in FIG.
  • phase shift process In order to rotate the original image data and convert it to the sampling format of the final output image data, in addition to the enlargement / reduction processing according to the sampling format of the finally obtained image data, Only the color difference data of the original image data needs to be moved by a certain amount in the vertical and horizontal directions. This process of moving the color difference data in advance is called “phase shift process”.
  • the horizontal interpolation position counter 702 holds the value of the horizontal interpolation position in units of 256 pixels.
  • the horizontal interpolation position counter 702 is initialized with the horizontal phase shift XS.
  • the image interpolation circuit 703 interpolates the input image stored in the horizontal filter input image memory 701 according to the horizontal interpolation position counter 702, and outputs the first pixel of the output image.
  • 256 and XO are multiplied, and the value divided by XI is added to the horizontal interpolation position counter 702.
  • the input image is interpolated according to the horizontal interpolation position counter 702 after the addition, and the next pixel of the output image is output.
  • the horizontal phase shift of XS pixels for 256 minutes is performed, and the first one line of the image resized horizontally to XO for XI is output.
  • the one-line processing operation from the initialization of the horizontal interpolation position counter 702 is repeated YI times in the vertical resolution of the input image, thereby obtaining a horizontal phase shifted and horizontally resized image.
  • the horizontal phase shifted and horizontally resized image is stored in the vertical filter input image memory 801 of the vertical filter 800.
  • the vertical filter 800 then performs the following vertical phase shift according to the vertical resolution YI of the input image, the vertical resolution YO of the output image, and the vertical phase shift YS of the output image with respect to the input image (value in units of 256 pixels). And do vertical resize.
  • the vertical interpolation position counter 802 holds the value of the vertical interpolation position in units of 256 pixels.
  • the vertical interpolation position counter 802 is initialized with the vertical phase shift YS.
  • the image interpolation circuit 803 in the vertical filter 800 interpolates the input image according to the vertical interpolation position counter 802 with respect to the data stored in the vertical filter input image memory 801, and outputs the first pixel of the output image.
  • 256 is multiplied by YO, and the value divided by YI is added to the vertical interpolation position counter 802.
  • the input image is interpolated according to the vertical interpolation position counter 802 after the addition, and the next pixel of the output image is output.
  • the YS pixels for 256 minutes are vertically phase shifted, and the first line of the image vertically resized to YO for YI is output.
  • the one-line processing operation from the initialization of the vertical interpolation position counter 802 is repeated XO times in the horizontal resolution of the output image, thereby obtaining a vertical phase shift and vertically resized image.
  • a two-dimensional phase shift and a resized image can be obtained by performing a vertical phase shift and a vertical resize after the horizontal phase shift and the horizontal resize.
  • FIG. 8 is a block diagram showing a fourth embodiment of the present invention.
  • 1000 is a first image processing circuit
  • 1100 is a second image processing circuit.
  • the first image processing circuit 1000 includes a first horizontal / vertical filter / rotation / phase shift circuit 1001 and a first memory 1002.
  • the second image processing circuit 1100 includes a first horizontal / vertical filter / rotation / phase shift circuit 1101 and a second memory 1102.
  • the input signal 1003 of the first horizontal / vertical filter / rotation / phase shift circuit 1001 has the first resolution and rotation information in the JPEG stream (Exif stream).
  • the first resolution is converted into the second resolution given in advance, and the rotation processing is performed based on the rotation information in the JPEG stream (Exif stream).
  • the phase shift process is performed. Then, it is converted into a sampling factor given in advance and stored in the first memory 1002.
  • data is read from the first memory 1002 and converted from the second resolution to the third resolution to be finally output by the second horizontal / vertical filter / rotation / phase shift circuit 1101 of the second image processing circuit 1100. And stored in the second memory 1102.
  • the image data stored in the second memory 1102 is read from the second memory 1102 and is finally output and displayed.
  • the image data stored in the first memory 1002 is read again, and the second image processing is performed.
  • the second horizontal / vertical filter / rotation / phase shift circuit 1101 of the circuit 1100 performs zoom (enlargement / reduction) processing, rotation processing, and phase shift processing based on the zoom processing and rotation processing information specified by the user. Are stored in the second memory 1102 and displayed as final output.
  • the user's zoom (enlargement / reduction) processing, rotation processing, and phase shift processing are performed on the data in the first memory 1002 to the second horizontal / vertical filter / second of the first image processing circuit 1000 again.
  • the processing of the rotation / phase shift circuit 1001 is not redone. In this way, rotation processing, phase shift processing, enlargement / reduction processing, user-specified Zoom (enlargement / reduction) processing, rotation based on rotation information in the JPEG stream (Exif stream) is performed on the input signal 1003 having the first resolution. Processing and phase shift processing can be efficiently performed at high speed, and a final output display image can be obtained.
  • FIG. 9 is a block diagram showing a fifth embodiment of the present invention.
  • reference numeral 1200 denotes a first image processing circuit
  • 1300 denotes a second image processing circuit.
  • the first image processing circuit 1200 includes a first horizontal / vertical filter 1201, an image processing circuit 1202, and a first memory 1203.
  • the first memory 1203 includes two areas, area [1] and area [2]. The capacity of the area [1] and the area [2] is always the same. Further, the capacity of the first memory 1203 is variable.
  • the minimum value of the capacity of the first memory 1203 is twice the capacity that can store the minimum amount of data that can be processed by the second image processing circuit 1300. That is, it is necessary to secure a capacity capable of storing the minimum amount of data that can be processed by the second image processing circuit 1300 in each of the areas [1] and [2].
  • the capacity of the first memory 1203 only needs to be larger than the minimum value.
  • the horizontal / vertical filter 1201 and the image processing circuit 1202 of the first image processing circuit 1200 perform processing on the input data 1204 to the first image processing circuit 1200, respectively, and process results are stored in the area of the first memory 1203. Store in [1] or area [2]. When the processing result is stored in the area [1] of the memory 1203, the area [2] is used by the second image processing circuit 1300.
  • the image processing circuit 1202 in the first image processing circuit 1200 has finished storing the processing result for the capacity of the area [1] or the area [2], and the second image processing circuit 1300 is used by the image processing circuit 1202.
  • the image processing circuit 1202 displays the area [2 of the first memory 1203 different from the previous one. ] Or [1], and at the same time, the second image processing circuit 1300 reads data from the opposite region [1] or region [2].
  • the first image processing circuit 1200 and the second image processing circuit 1300 process in parallel via the first memory 1203. . Therefore, this parallel processing improves processing performance.
  • the image reproduction device of the present invention when generating the output image resolution from the resolution of the input image, the image reproduction device of the present invention, when the resolution of the input image is higher than a certain resolution, Since the resolution of the output image is generated after conversion to an intermediate resolution with the output image, it can be applied to applications such as a digital camera, a digital video camera, and a camera-equipped mobile phone.

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  • Editing Of Facsimile Originals (AREA)
  • Image Processing (AREA)

Abstract

Dans un dispositif de reproduction d’image, en particulier dans un dispositif de reproduction d’image fixe qui décode/reproduit une image JPEG d’une méga-taille dépassant un million de pixels, un premier circuit de traitement d’image (1000) servant à réaliser un processus de rotation sur la base des informations de rotation dans un flux JPEG et un processus d’agrandissement/réduction ainsi qu’un second circuit de traitement d’image (1100) servant à réaliser un processus de rotation et un processus d’agrandissement/réduction conformément à une demande utilisateur sont divisés en deux parties via une mémoire (1002) qui stocke les résultats du processus obtenus par le premier circuit de traitement d’image (1000). Lorsqu’un utilisateur effectue un processus de découpe ou d’agrandissement/réduction sur une image JPEG qui a été décodée/reproduite une fois, les données sont extraites de la mémoire (1002) et traitées par le second circuit de traitement d’image (1100) pour être sorties/affichées. Ceci permet d’avoir un processus à grande vitesse efficace.
PCT/JP2009/002469 2008-06-09 2009-06-02 Dispositif de reproduction d’image WO2009150795A1 (fr)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011154587A (ja) * 2010-01-28 2011-08-11 Toshiba Corp 映像信号処理装置及び映像信号処理方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006085233A (ja) * 2004-09-14 2006-03-30 Noritsu Koki Co Ltd 画像処理装置及び画像処理方法
JP2007067917A (ja) * 2005-08-31 2007-03-15 Matsushita Electric Ind Co Ltd 画像データ処理装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006085233A (ja) * 2004-09-14 2006-03-30 Noritsu Koki Co Ltd 画像処理装置及び画像処理方法
JP2007067917A (ja) * 2005-08-31 2007-03-15 Matsushita Electric Ind Co Ltd 画像データ処理装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011154587A (ja) * 2010-01-28 2011-08-11 Toshiba Corp 映像信号処理装置及び映像信号処理方法

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