WO2009098740A1 - 映像表示装置 - Google Patents
映像表示装置 Download PDFInfo
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- WO2009098740A1 WO2009098740A1 PCT/JP2008/002891 JP2008002891W WO2009098740A1 WO 2009098740 A1 WO2009098740 A1 WO 2009098740A1 JP 2008002891 W JP2008002891 W JP 2008002891W WO 2009098740 A1 WO2009098740 A1 WO 2009098740A1
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- temperature
- temperature sensor
- panel
- circuit
- video display
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
- G09G3/2965—Driving circuits for producing the waveforms applied to the driving electrodes using inductors for energy recovery
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/292—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for reset discharge, priming discharge or erase discharge occurring in a phase other than addressing
- G09G3/2927—Details of initialising
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/294—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for lighting or sustain discharge
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
- H01J11/10—AC-PDPs with at least one main electrode being out of contact with the plasma
- H01J11/12—AC-PDPs with at least one main electrode being out of contact with the plasma with main electrodes provided on both sides of the discharge space
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/04—Maintaining the quality of display appearance
- G09G2320/041—Temperature compensation
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/06—Adjustment of display parameters
- G09G2320/0626—Adjustment of display parameters for control of overall brightness
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/04—Display protection
- G09G2330/045—Protection against panel overheating
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2340/00—Aspects of display data processing
- G09G2340/04—Changes in size, position or resolution of an image
- G09G2340/0464—Positioning
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
- G09G3/2022—Display of intermediate tones by time modulation using two or more time intervals using sub-frames
Definitions
- the present invention relates to a video display device having a video display unit such as a plasma display panel used in a wall-mounted television or a large monitor or a surface conduction electron-emitting device display panel (Surface-conduction Elctron-emitter Display Panel).
- a video display unit such as a plasma display panel used in a wall-mounted television or a large monitor or a surface conduction electron-emitting device display panel (Surface-conduction Elctron-emitter Display Panel).
- a typical AC surface discharge type panel as a plasma display panel (hereinafter abbreviated as “panel”) has a large number of discharge cells formed between a front plate and a back plate arranged to face each other.
- a plurality of display electrode pairs each consisting of a pair of scan electrodes and sustain electrodes are formed in parallel with each other on the front glass substrate, and a dielectric layer and a protective layer are formed so as to cover the display electrode pairs.
- the back plate has a plurality of parallel data electrodes on the back glass substrate, a dielectric layer so as to cover them, and a plurality of barrier ribs in parallel with the data electrodes formed on the back glass substrate.
- a phosphor layer is formed on the side walls of the barrier ribs. Then, the front plate and the back plate are arranged opposite to each other so that the display electrode pair and the data electrode are three-dimensionally crossed and sealed, and a discharge gas containing, for example, 5% xenon is enclosed in the internal discharge space.
- a discharge cell is formed at a portion where the display electrode pair and the data electrode face each other. In the panel having such a configuration, ultraviolet rays are generated by gas discharge in each discharge cell, and the phosphors of red (R), green (G) and blue (B) colors are excited and emitted by the ultraviolet rays, thereby performing color display. It is carried out.
- a subfield method that is, a method of performing gradation display by combining subfields to emit light after dividing one field period into a plurality of subfields is generally used.
- Each subfield has an initialization period, an address period, and a sustain period.
- address period an address pulse voltage is selectively applied to the discharge cells to be displayed to generate an address discharge to form wall charges (hereinafter, this operation is also referred to as “address”).
- a sustain pulse voltage is alternately applied to the display electrode pair composed of the scan electrode and the sustain electrode, and a sustain discharge is generated in the discharge cell that has caused the address discharge, and the phosphor layer of the corresponding discharge cell emits light. To display an image.
- the configuration of the prior art plasma display apparatus has two temperature sensors for detecting the back surface temperature and the ambient temperature of the panel, and the temperature of these temperature sensors is out of a predetermined operating range and into another operating range.
- a drive condition switching circuit that sometimes changes the display drive condition of the panel, and a drive circuit that drives the panel data drive, scan drive, and common drive according to the drive condition switch circuit to enable optimal lighting display in real time (for example, Patent Document 1).
- these temperature sensors monitor the back surface temperature of the panel and the ambient temperature, thereby setting the optimum display driving conditions for the panel surface temperature following the ambient temperature after power-on.
- a scanning pulse is applied by the driving condition switching circuit and the data pulse is input.
- the driving condition of the panel can be changed so as to lengthen the scanning time.
- the conventional technology optimizes the display drive conditions according to the temperature characteristics of the panel module whose panel characteristics change due to the temperature characteristics such as when the panel is turned on or after the panel temperature is stabilized. It prevents the occurrence of problems such as writing and incorrect lighting.
- the video display device of the present invention is a video display unit for displaying video, a chassis disposed on the back of the video display unit, a boss material installed in the chassis, a printed circuit board to which a tip of the boss material is connected, A first temperature sensor disposed at a fixing portion of the boss material to the printed circuit board; a temperature sensor installation device that thermally shields the printed circuit board; and a video display unit and a temperature sensor installation device having a front frame and a rear frame. And a housing for housing.
- This configuration makes it possible to measure the temperature of the video display unit with high accuracy without being affected by heat radiation from the drive circuit mounting board or the like.
- the video display device of the present invention further calculates the temperature of the video display unit from the second temperature sensor, the first temperature sensor, and the second temperature sensor on the printed circuit board and at a position facing the rear frame.
- a conditional temperature determination circuit may be provided.
- FIG. 1 is an exploded perspective view showing an example of the structure of a panel as a video display unit of a video display device according to Embodiment 1 of the present invention.
- FIG. 2 is an electrode array diagram of the panel.
- FIG. 3 is a diagram showing a subfield configuration of the plasma display device in accordance with the first exemplary embodiment of the present invention.
- FIG. 4 is a waveform diagram of driving voltage applied to each electrode of the panel of the plasma display device in accordance with the first exemplary embodiment of the present invention.
- FIG. 5 is a circuit block diagram of the plasma display device in accordance with the first exemplary embodiment of the present invention.
- FIG. 6 is a circuit diagram of the scan electrode driving circuit according to the first embodiment of the present invention.
- FIG. 1 is an exploded perspective view showing an example of the structure of a panel as a video display unit of a video display device according to Embodiment 1 of the present invention.
- FIG. 2 is an electrode array diagram of the panel.
- FIG. 3 is a
- FIG. 7 is a circuit diagram of the data electrode driving circuit according to the first embodiment of the present invention.
- FIG. 8 is an exploded perspective view showing an example of the structure of the plasma display device in accordance with the first exemplary embodiment of the present invention.
- 9 is a cross-sectional view taken along line 9-9 of FIG.
- FIG. 10 is an exploded perspective view showing an example of the structure of a plasma display device as a video display device according to Embodiment 2 of the present invention.
- 11 is a cross-sectional view taken along line 11-11 in FIG.
- FIG. 12 is a circuit block diagram of the plasma display device in accordance with the second exemplary embodiment of the present invention.
- FIG. 13 shows the relationship between the output values of the two temperature sensors, the panel temperature, and the condition temperature with respect to the time after the power is turned on when displaying a full-screen white image on the plasma display device according to the second embodiment of the present invention.
- FIG. 14 shows the relationship between the output values of the two temperature sensors, the panel temperature, and the condition temperature with respect to the time after the power is turned on when displaying a full-screen black image on the plasma display device according to the second embodiment of the present invention.
- FIG. 1 is an exploded perspective view showing an example of the structure of panel 10 as a video display unit of the video display device according to Embodiment 1 of the present invention.
- the video display device in the present embodiment is a plasma display device having panel 10 as an example.
- the video display device is not limited to the plasma display device, and includes a video display unit that generates a large amount of heat, such as a surface conduction electron-emitting device display panel.
- the panel 10 has a plurality of display electrode pairs 24 formed of scanning electrodes 22 and sustaining electrodes 23 formed on a glass front plate 21.
- a dielectric layer 25 is formed so as to cover the scan electrode 22 and the sustain electrode 23, and a protective layer 26 is formed on the dielectric layer 25.
- the protective layer 26 has been used as a panel material in order to lower the discharge start voltage in the discharge cell, and has a large secondary electron emission coefficient and durability when neon (Ne) and xenon (Xe) gas is sealed. It is formed from a material mainly composed of MgO having excellent properties.
- a plurality of data electrodes 32 are formed on the back plate 31, a dielectric layer 33 is formed so as to cover the data electrodes 32, and a grid-like partition wall 34 is formed thereon.
- a phosphor layer 35 that emits light of each color of red (R), green (G), and blue (B) is provided on the side surface of the partition wall 34 and on the dielectric layer 33.
- the front plate 21 and the back plate 31 are arranged to face each other so that the display electrode pair 24 and the data electrode 32 intersect with each other with a minute discharge space interposed therebetween, and the outer periphery thereof is sealed with a sealing material such as glass frit.
- a sealing material such as glass frit.
- a mixed gas of neon and xenon is enclosed as a discharge gas.
- the discharge space is partitioned into a plurality of sections by partition walls 34, and discharge cells are formed at the intersections between the display electrode pairs 24 and the data electrodes 32. These discharge cells discharge and emit light to display an image.
- the structure of the panel 10 is not limited to the above-described structure, and may be, for example, provided with a stripe-shaped partition wall.
- FIG. 2 is an electrode array diagram of panel 10 in accordance with the first exemplary embodiment of the present invention.
- the panel 10 includes n scan electrodes SC1 to SCn (scan electrodes 22 in FIG. 1) and n sustain electrodes SU1 to SUn (sustain electrodes 23 in FIG. 1) which are long in the row direction, and are long in the column direction.
- M data electrodes D1 to Dm data electrode 32 in FIG. 1) are arranged.
- M ⁇ n are formed. As shown in FIG. 1 and FIG.
- scan electrode SCi and sustain electrode SUi are formed in parallel with each other, and therefore, between scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn.
- an interelectrode capacitance also exists at a portion where scan electrode SCi and sustain electrode SUi intersect data electrode Dj.
- the plasma display device performs gradation display by subfield method, that is, by dividing one field period into a plurality of subfields and controlling light emission / non-light emission of each discharge cell for each subfield.
- Each subfield has an initialization period, an address period, and a sustain period.
- initializing discharge is generated in the initializing period, and wall charges necessary for subsequent address discharge are formed on each electrode.
- the initializing operation at this time includes an initializing operation for generating an initializing discharge in all discharge cells (hereinafter abbreviated as “all-cell initializing operation”), and a discharge in which a sustain discharge is performed in the immediately preceding subfield.
- an address discharge is selectively generated in the discharge cells that should emit light in the subsequent sustain period to form wall charges.
- a number of sustain pulses proportional to the luminance weight are alternately applied to the display electrode pair 24 to generate a sustain discharge in the discharge cells that have generated the address discharge, thereby causing light emission.
- the proportionality constant at this time is called “luminance magnification”.
- FIG. 3 is a diagram showing a subfield (SF) configuration of the plasma display device in accordance with the first exemplary embodiment of the present invention.
- FIG. 3 shows an outline of a drive waveform in one field period in the subfield method, and details of the drive voltage waveform will be described later.
- one field is composed of ten subfields (first SF, second SF,..., Tenth SF), and each subfield is, for example, (1, 2, 3, 6). , 11, 18, 30, 44, 60, 80).
- the all-cell initialization operation is performed in the initialization period of the first SF
- the selective initialization operation is performed in the initialization period of the second SF to the tenth SF.
- the light emission not related to the image display is only the light emission due to the discharge of the all-cell initialization operation in the first SF, and the luminance of the black display area when the sustain discharge is not generated in the discharge cell is the same as that in the all-cell initialization operation. Only weak light emission enables image display with high contrast.
- the sustain period of each subfield the number of sustain pulses obtained by multiplying the luminance weight of each subfield by a predetermined luminance magnification is applied to each display electrode pair 24.
- the number of subfields and the luminance weight of each subfield are not limited to the above values, and the subfield configuration may be switched based on an image signal or the like.
- the luminance magnification is not fixed, but is changed based on a temperature detected by a temperature sensor described later. Thereby, the power consumption in the panel 10 is controlled to keep the temperature of the panel 10 appropriate. Details of this will be described later.
- FIG. 4 is a waveform diagram of driving voltage applied to each electrode of panel 10 of the plasma display device in accordance with the first exemplary embodiment of the present invention.
- FIG. 4 shows driving voltage waveforms of two subfields, that is, a subfield that performs an all-cell initializing operation (hereinafter referred to as “all-cell initializing subfield”) and a subfield that performs a selective initializing operation ( Hereinafter, it is referred to as “selective initialization subfield”), but the driving voltage waveforms in the other subfields are substantially the same.
- the first SF which is an all-cell initialization subfield, will be described.
- 0 (V) is applied to the data electrodes D1 to Dm and the sustain electrodes SU1 to SUn, respectively, and the discharge start voltage for the sustain electrodes SU1 to SUn is applied to the scan electrodes SC1 to SCn.
- a ramp waveform voltage (hereinafter referred to as “up-ramp waveform voltage”) that gradually rises from the voltage Vi1 below toward the voltage Vi2 that exceeds the discharge start voltage is applied.
- the wall voltage above the electrode represents a voltage generated by wall charges accumulated on the dielectric layer covering the electrode, the protective layer, the phosphor layer, and the like.
- the negative wall voltage above scan electrodes SC1 to SCn and the positive wall voltage above sustain electrodes SU1 to SUn are weakened, and the positive wall voltage above data electrodes D1 to Dm is adjusted to a value suitable for the write operation.
- the all-cell initializing operation for performing the initializing discharge on all the discharge cells is completed.
- a drive voltage waveform in which the first half of the initialization period is omitted may be applied to each electrode. That is, the voltage Ve1 is applied to the sustain electrodes SU1 to SUn, 0 (V) is applied to the data electrodes D1 to Dm, and the down-ramp waveform voltage that gently decreases from the voltage Vi33 to the voltage Vi4 is applied to the scan electrodes SC1 to SCn. Apply. As a result, a weak initializing discharge is generated in the discharge cell in which the sustain discharge has occurred in the sustain period of the previous subfield, and the wall voltage above scan electrode SCi and sustain electrode SUi is weakened.
- the initializing operation in which the first half is omitted is a selective initializing operation in which initializing discharge is performed on the discharge cells that have undergone the sustain operation in the sustain period of the immediately preceding subfield.
- voltage Ve2 is applied to sustain electrodes SU1 to SUn, and voltage Vc is applied to scan electrodes SC1 to SCn.
- the write pulse voltage Vd is applied.
- the voltage difference at the intersection between the data electrode Dk and the scan electrode SC1 is the difference between the wall voltage on the data electrode Dk and the wall voltage on the scan electrode SC1 due to the difference between the externally applied voltages (Vd ⁇ Va). It becomes the sum and exceeds the discharge start voltage. As a result, a discharge is generated between data electrode Dk and scan electrode SC1.
- the voltage difference between sustain electrode SU1 and scan electrode SC1 is the difference between the externally applied voltages (Ve2-Va) on sustain electrode SU1.
- the difference between the wall voltage and the wall voltage on the scan electrode SC1 is added.
- the sustain electrode SU1 and the scan electrode SC1 are not easily discharged but are likely to be discharged. Can do.
- the discharge generated between data electrode Dk and scan electrode SC1 can be triggered to generate a discharge between sustain electrode SU1 and scan electrode SC1 in the region intersecting with data electrode Dk.
- an address discharge occurs in the discharge cell to emit light, a positive wall voltage is accumulated on scan electrode SC1, a negative wall voltage is accumulated on sustain electrode SU1, and a negative wall voltage is also accumulated on data electrode Dk. Accumulated.
- the address operation is performed in which the address discharge is caused in the discharge cells to be lit in the first row and the wall voltage is accumulated on each electrode.
- the voltage at the intersection of the data electrodes D1 to Dm to which the address pulse voltage Vd is not applied and the scan electrode SC1 does not exceed the discharge start voltage, so that address discharge does not occur.
- the above address operation is performed until the discharge cell in the nth row, and the address period ends.
- a positive sustain pulse voltage Vs is applied to scan electrodes SC1 to SCn, and a ground potential serving as a base potential, that is, 0 (V) is applied to sustain electrodes SU1 to SUn.
- the voltage difference between scan electrode SCi and sustain electrode SUi is the difference between the wall voltage on scan electrode SCi and the wall voltage on sustain electrode SUi. Exceeding the discharge start voltage.
- a sustain discharge occurs between scan electrode SCi and sustain electrode SUi, and phosphor layer 35 emits light due to the ultraviolet rays generated at this time. Then, a negative wall voltage is accumulated on scan electrode SCi, and a positive wall voltage is accumulated on sustain electrode SUi. Further, a positive wall voltage is accumulated on the data electrode Dk. In the discharge cells in which no address discharge has occurred during the address period, no sustain discharge occurs, and the wall voltage at the end of the initialization period is maintained.
- the sustain electrodes of the number obtained by multiplying the luminance weight by the luminance magnification are alternately applied to the scan electrodes SC1 to SCn and the sustain electrodes SU1 to SUn, and a potential difference is applied between the electrodes of the display electrode pair 24, thereby writing.
- the sustain discharge is continuously performed in the discharge cell that has caused the address discharge in the period.
- a so-called narrow pulse voltage difference is applied between scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn, leaving a positive wall voltage on data electrode Dk, and scanning.
- the wall voltage on the electrode SCi and the sustain electrode SUi is adjusted.
- Subsequent sub-field operations are substantially the same as those described above except for the number of sustain pulses in the sustain period, and a description thereof will be omitted.
- the above is the outline of the drive voltage waveform applied to each electrode of panel 10 in the first exemplary embodiment.
- the sustain pulse in each subfield is used.
- the number is (1, 2, 3, 6, 11, 18, 30, 44, 60, 80).
- the luminance magnification is double, the luminance weight is doubled (2, 4, 6, 12). , 22, 36, 60, 88, 120, 160), and when the luminance magnification is 3 times, it is similarly 3 times (3, 6, 9, 18, 33, 54, 90, 132, 180, 240) It becomes.
- the luminance magnification is changed based on a temperature detected by a temperature sensor described later to control the total number of sustain pulses in one field period.
- the power consumption in the panel 10 is controlled to keep the temperature of the panel 10 appropriate.
- FIG. 5 is a circuit block diagram of plasma display device 100 in accordance with the first exemplary embodiment of the present invention.
- the plasma display device 100 is necessary for the panel 10, the image signal processing circuit 41, the data electrode drive circuit 42, the scan electrode drive circuit 43, the sustain electrode drive circuit 44, the timing generation circuit 45, the condition temperature determination circuit 48, and each circuit block.
- a power supply circuit (not shown) for supplying power is provided.
- the image signal processing circuit 41 converts the input image signal sig into image data indicating light emission / non-light emission for each subfield.
- the data electrode drive circuit 42 converts the image data for each subfield into signals corresponding to the data electrodes D1 to Dm, and drives the data electrodes D1 to Dm.
- the condition temperature determination circuit 48 has a temperature sensor 49 as a first temperature sensor made of a generally known element such as a thermocouple used for detecting the temperature.
- the condition temperature determination circuit 48 calculates the temperature of the panel 10 based on the output value of the temperature sensor 49.
- the calculated temperature of the panel 10 is referred to as a conditional temperature.
- the condition temperature determination circuit 48 compares the temperature of the panel 10 calculated by the temperature sensor 49 with a predetermined temperature threshold value, and outputs a signal representing the result. Specifically, a signal indicating whether the detected temperature is lower than the temperature threshold, or if the detected temperature is equal to or higher than the temperature threshold is output to the timing generation circuit 45.
- the timing generation circuit 45 generates various timing signals for controlling the operation of each circuit block on the basis of the horizontal synchronization signal H, the vertical synchronization signal V and the output from the condition temperature determination circuit 48, and supplies them to each circuit block. To do. As described above, in the present embodiment, the luminance magnification is controlled based on the temperature detected by the temperature sensor 49, and timing signals corresponding thereto are sent to the scan electrode drive circuit 43 and the sustain electrode drive circuit 44. Output. As a result, the total number of sustain pulses in one field period is controlled to control power consumption, and control to keep the panel temperature appropriate.
- Scan electrode drive circuit 43 generates an initialization waveform voltage (not shown) for generating an initialization waveform voltage to be applied to scan electrodes SC1 to SCn in the initialization period, and applies to scan electrodes SC1 to SCn in the sustain period.
- Sustain pulse generating circuit 50 for generating sustain pulse voltage, and a scan pulse generating circuit (not shown) for generating scan pulse voltages to be applied to scan electrodes SC1 to SCn in the address period are based on the timing signal.
- the scan electrodes SC1 to SCn are respectively driven.
- Sustain electrode drive circuit 44 includes sustain pulse generation circuit 60 and a circuit for generating voltages Ve1 and Ve2, and drives sustain electrodes SU1 to SUn based on a timing signal.
- each electrode driving circuit that drives each electrode to generate discharge in the discharge cell
- a high voltage such as several tens V (volts) to hundreds tens V is applied to each electrode, and the number required for the discharge.
- a very large current of 10 A (amperes) must be passed. Therefore, very large Joule heat is generated in each electrode drive circuit.
- the panel 10 displays an image by combining light emission and non-light emission of each discharge cell, the occurrence of discharge in each discharge cell also differs depending on the design of the display image. Therefore, the generated heat varies greatly depending on the design of the display image.
- the signals handled by the image signal processing circuit 41 and the timing generation circuit 45 are several V to a few tens V at most, which is sufficiently lower than the above drive circuit (hereinafter, these circuits are collectively referred to as “small”).
- Signal processing circuit the amount of current that must be passed is sufficiently small, and since the operation is almost constant regardless of the design of the display image, the variation in the amount of current is relatively small. Therefore, the generated Joule heat is sufficiently small, and the fluctuation amount is small.
- FIG. 6 is a circuit diagram of scan electrode driving circuit 43 according to the first embodiment of the present invention.
- Scan electrode driving circuit 43 includes sustain pulse generating circuit 50 for generating a sustain pulse, initialization waveform generating circuit 53 for generating an initialization waveform, and scan pulse generating circuit 54 for generating a scan pulse.
- the sustain pulse generation circuit 50 includes a power recovery circuit 51 and a clamp circuit 52.
- the power recovery circuit 51 includes a power recovery capacitor C1, switching elements Q1 and Q2, backflow prevention diodes D11 and D12, and a resonance inductor L1.
- the power recovery capacitor C1 has a sufficiently large capacity compared to the interelectrode capacity Cp, and is charged to about Vs / 2, which is half the voltage value Vs, so as to serve as a power source for the power recovery circuit 51.
- the clamp circuit 52 includes a switching element Q3 for clamping scan electrodes SC1 to SCn to voltage Vs, and a switching element Q4 for clamping scan electrodes SC1 to SCn to 0 (V). Then, sustain pulse voltage Vs is generated based on the timing signal output from timing generation circuit 45.
- the switching element Q1 when the sustain pulse waveform is raised, the switching element Q1 is turned on to cause the interelectrode capacitance Cp and the inductor L1 to resonate, and from the power recovery capacitor C1 to the scanning electrode through the switching element Q1, the diode D11, and the inductor L1. Power is supplied to SC1 to SCn.
- switching element Q3 When the voltages of scan electrodes SC1 to SCn approach Vs, switching element Q3 is turned on to clamp scan electrodes SC1 to SCn to voltage Vs.
- the switching element Q2 is turned on to resonate the interelectrode capacitance Cp and the inductor L1, and the interelectrode capacitance Cp is used to recover power through the inductor L1, the diode D12, and the switching element Q2. The power is recovered in the capacitor C1. Then, when the voltage of scan electrodes SC1 to SCn approaches 0 (V), switching element Q4 is turned on to clamp scan electrodes SC1 to SCn to 0 (V).
- the initialization waveform generating circuit 53 includes a switching element Q11, a capacitor C10, and a resistor R10.
- the Miller integrating circuit generates a rising ramp waveform voltage that gradually increases in a ramp shape up to the voltage Vi2, and includes a switching element Q14, a capacitor C11, and a resistor.
- R11 and a Miller integrating circuit for generating a down-ramp waveform voltage that gradually decreases in a ramp shape to a predetermined initialization voltage Vi4, a separation circuit using the switching element Q12, and a separation circuit using the switching element Q13. Yes.
- the initialization waveform described above is generated based on the timing signal output from the timing generation circuit 45.
- the input terminals of the Miller integrating circuit are shown as an input terminal INa and an input terminal INb.
- a predetermined voltage for example, 15 (V)
- a constant current flows from the resistor R10 toward the capacitor C10, the source voltage of the switching element Q11 increases in a ramp shape, and the output voltage of the scan electrode drive circuit 43 starts to increase in a ramp shape.
- a predetermined voltage for example, 15 (V)
- the input terminal INb is applied to the input terminal INb, and the input terminal Set INb to “Hi”.
- a constant current flows from the resistor R11 toward the capacitor C11, the drain voltage of the switching element Q14 decreases in a ramp shape, and the output voltage of the scan electrode drive circuit 43 also starts to decrease in a ramp shape.
- Scan pulse generation circuit 54 includes switch circuits OUT1 to OUTn that output scan pulse voltages to scan electrodes SC1 to SCn, switching element Q21 for clamping the low voltage side of switch circuits OUT1 to OUTn to voltage Va, A diode D21 and a capacitor C21 are provided for applying a voltage Vc in which the voltage Vscn is superimposed on the voltage Va to the high voltage side of the switch circuits OUT1 to OUTn.
- Each of the switch circuits OUT1 to OUTn includes switching elements QH1 to QHn for outputting the voltage Vc and switching elements QL1 to QLn for outputting the voltage Va.
- Scan pulse generation circuit 54 outputs the voltage waveform of initialization waveform generation circuit 53 during the initialization period and the voltage waveform of sustain pulse generation circuit 50 during the sustain period.
- the scan electrode driving circuit 43 drives the scan electrodes SC1 to SCn to generate the initialization discharge, the address discharge, and the sustain discharge. Large Joule heat is generated. Further, since the occurrence of the sustain discharge varies depending on the design of the display image, the generated heat varies greatly depending on the design of the display image.
- the initialization waveform generating circuit 53 employs a Miller integrating circuit using a practical and relatively simple FET.
- the present invention is not limited to this configuration. Any circuit can be used as long as it can generate an up-ramp waveform voltage and a down-ramp waveform voltage.
- the sustain pulse generation circuit of sustain electrode drive circuit 44 has the same configuration as sustain pulse generation circuit 50, and collects power for driving sustain electrodes SU1 to SUn and recovers it again.
- a power recovery circuit for use, a switching element for clamping sustain electrodes SU1 to SUn to voltage Vs, and a switching element for clamping sustain electrodes SU1 to SUn to 0 (V), and a sustain pulse A voltage Vs is generated.
- sustain electrode drive circuit 44 a very large current for driving sustain electrodes SC1 to SCn to generate a sustain discharge must flow, so that a large Joule heat is generated. It varies greatly depending on the design of the display image.
- FIG. 7 is a circuit diagram of the data electrode driving circuit 42 according to the first embodiment of the present invention.
- the data electrode drive circuit 42 includes an address pulse generation circuit 55 and an address pulse output circuit 58.
- the write pulse generation circuit 55 includes a power recovery circuit 56 and a clamp circuit 57.
- the power recovery circuit 56 includes a power recovery capacitor C31, switching elements Q31 and Q32, and backflow prevention diodes D31 and D32.
- the clamp circuit 57 includes switching elements Q33 and Q34. Then, the electrode capacitance of the data electrode Dk and the resonance inductor L31 are resonated to recover the power supplied to the data electrode Dk to the power recovery capacitor C31 to generate a write pulse, and the generated write pulse Is output to the write pulse output circuit 58.
- the address pulse output circuit 58 includes switch units OUT1 to OUTm that output address pulses to the data electrodes D1 to Dm, respectively.
- Each of the switch sections OUT1 to OUTm includes switching elements QH1 to QHm for outputting address pulses output from the address pulse generating circuit 55 to the data electrodes D1 to Dm, and switching elements for grounding the data electrodes D1 to Dm. QL1 to QLm. Then, the switching elements are switched based on the timing signal output from the timing generation circuit 45 and the image data output from the image signal processing circuit 41, and the data electrode to which the write pulse output from the write pulse generation circuit 55 is to be applied. Output to.
- the data electrode driving circuit 42 since the data electrodes D1 to Dm are driven to generate the address discharge, a very large discharge current must be passed, and thus a large Joule heat is generated.
- the occurrence of the address discharge varies depending on the design of the display image, the generated heat also varies greatly depending on the design of the display image.
- the temperature of the panel 10 is measured with high accuracy in order to reduce the influence on the temperature sensor 49 due to heat generated by the drive circuit and the signal processing circuit as much as possible and to drive the video display device stably.
- the structure to perform is demonstrated.
- FIG. 8 is an exploded perspective view showing an example of the structure of the plasma display device 100 according to Embodiment 1 of the present invention
- FIG. 9 is a cross-sectional view taken along line 9-9 of FIG.
- the plasma display device 100 includes a panel 10 as an image display unit for displaying an image, a heat conductive sheet 81, a chassis 12, and a data electrode driving circuit mounting substrate 13a which is a printed circuit board on which a data electrode driving circuit 42 is mounted.
- a scanning electrode driving circuit mounting board 13b which is a printed board on which the electrode driving circuit 43 is mounted, a sustaining electrode driving circuit mounting board 13c which is a printing board on which the sustaining electrode driving circuit 44 is mounted, and a power supply circuit which is a printed board on which a power supply circuit is mounted.
- Small signal processing circuit mounting board 15 mounted with small signal processing circuits such as mounting board 14, timing generation circuit 45 and image signal processing circuit 41, small signal processing such as timing generation circuit 45, image signal processing circuit 41 and temperature sensor 49.
- Tuner mounting board 18 which is a printed circuit board on which the circuit is mounted, and tuner mounting Comprising a temperature sensor fixture 16 having a shielding wall 17 for blocking the plate 18 thermally, and a housing having a back cover 3 is a front frame 2 and the rear frame to accommodate the members of the panel 10 and described above.
- the front frame 2 side is the front surface
- the back cover 3 side is the back surface.
- the heat conductive sheet 81 is made of a generally known silicon resin having adhesiveness, and is inserted and disposed so as to be interposed between the back plate 31 of the panel 10 and the chassis 12. 12 is bonded. Then, the heat generated in the panel 10 is conducted from the back plate 31 to the chassis 12.
- the chassis 12 is disposed on the back of the panel 10 as a video display unit for displaying video.
- the chassis 12 is made of a material mainly composed of aluminum, which is known as a metal that is light, highly rigid, and has good thermal conductivity, and holds the panel 10 bonded via the thermal conductive sheet 81.
- the chassis 12 radiates heat generated in the panel 10 conducted through the heat conductive sheet 81.
- a boss portion (not shown in FIG. 8) for attaching the printed circuit board group and fixing the back cover 3 is formed on the rear surface of the chassis 12 by die casting or the like.
- the chassis 12 and the boss may be configured by fixing a fixing pin to an aluminum flat plate, for example. That is.
- the boss portion is composed of a plurality of boss members 121, 122, 123, 161 installed on the chassis 12.
- the data electrode drive circuit mounting substrate 13a, the scan electrode drive circuit mounting substrate 13b, the sustain electrode drive circuit mounting substrate 13c, and the power supply circuit mounting substrate 14 are fixed to the boss portion on the chassis 12 via the boss material 121.
- a part of the printed circuit board group is electrically connected to a drawer part (not shown) drawn out to the non-display area of the panel 10 by a plurality of FPCs 19 (flexible cables) extending beyond the edges of the four sides of the chassis 12. It is connected to the.
- the data electrodes D1 to Dm of the panel 10 and the data electrode driving circuit mounting substrate 13a are connected via the FPC 19 connected to the lead-out portions of the data electrodes D1 to Dm.
- the scan electrodes SC1 to SCn of the panel 10 and the scan electrode drive circuit mounting substrate 13b are connected via the FPC 19 connected to the lead portions of the scan electrodes SC1 to SCn.
- the drive voltage can be applied from scan electrode drive circuit 43 to scan electrodes SC1 to SCn.
- the sustain electrodes SU1 to SUn of the panel 10 and the sustain electrode drive circuit mounting substrate 13c are connected via the FPC connected to the lead portions of the sustain electrodes SU1 to SUn.
- the drive voltage can be applied from sustain electrode drive circuit 44 to sustain electrodes SU1 to SUn.
- the drive voltage generated in each drive circuit mounting substrate is applied to each electrode of panel 10.
- a large current is generated along with the discharge current, and a large heat is generated accordingly.
- the temperature sensor installation device 16 is fixed on the chassis 12 via a boss material 122.
- the boss material 122 is formed longer than the boss material 121, and is configured such that the temperature sensor installation device 16 is disposed at a position closer to the back cover 3 than a printed circuit board group including each drive circuit mounting board and the like. With this configuration, the space between the panel 10 and the temperature sensor installation device 16 is widened, and the generated heat of the panel 10 is efficiently radiated by the chassis 12.
- the temperature sensor installation device 16 has a shielding wall 17 that shields heat generated from each drive circuit mounting substrate by the shielding wall 17.
- the shielding wall 17 is desirably formed so as to surround the periphery of the printed circuit board on which the temperature sensor 49 is arranged.
- the shielding wall 17 may be made of a material mainly composed of aluminum or iron, which is known as a metal having a high thermal conductivity for use in the chassis 12 or the boss material 122.
- the shielding wall 17 may be a thermal conductivity such as a resin. It is more desirable to use a material having a low value. In this way, the temperature sensor installation device 16 can thermally shield the above-described printed circuit board from the heat generated from each drive circuit mounting board. Therefore, the temperature sensor 49 arranged on the printed board can also be thermally shielded from the heat generated from each drive circuit mounting board.
- the tuner mounting board 18 has a tuner circuit (not shown) for separating and taking out a television signal from a broadcast signal received by an antenna (not shown), and is installed on the temperature sensor installation tool 16.
- the boss material 161 is fixed.
- the chassis 12 has a boss material 123 formed longer than the boss material 122 and installed near the center of the panel 10.
- the temperature sensor installation device 16 is provided with a hole having a position and a size through which the boss material 123 can penetrate, and the chassis 12 and the tuner mounting substrate 18 are formed through the hole of the temperature sensor installation device 16. 123 is fixed.
- the back cover 3 forms a casing of the plasma display device 100 together with the front frame 2, and accommodates the panel 10 and each member described above.
- the back cover 3 has a ventilation portion 5 including a plurality of ventilation holes 4 for ventilating the inside and outside of the plasma display device 100.
- the tuner mounting substrate 18 which is a printed circuit board is connected to the tip of the boss material 123.
- the temperature sensor 49 is installed on the tuner mounting substrate 18. Specifically, it is installed in the vicinity of the surface on the front frame 2 side of the tuner mounting substrate 18 and the position where the tip of the boss material 123 is fixed. That is, the temperature sensor 49 that is the first temperature sensor is disposed on the fixing portion of the boss material 123 to the tuner mounting substrate 18 that is the printed circuit board.
- the fixing portion of the boss material 123 is, for example, within a radius of about 30 mm from the position where the tip of the boss material 123 is fixed to the printed circuit board in consideration of the heat conduction characteristics from the panel 10 to the temperature sensor 49. It is desirable to be.
- this radius depends on the thermal conductivity of the printed board material and the thickness and area of the copper foil existing on the printed board surface within the radius. Therefore, the present invention is not necessarily limited to this range. As a result, the temperature sensor 49 can accurately detect the temperature of the panel conducted through the chassis 12 and the boss material 123.
- the boss material 123 is preferably made of aluminum, iron, or the like having a high thermal conductivity like the chassis 12. Further, in order to transmit the heat transmitted from the boss material 123 only to the temperature sensor 49, the tuner mounting substrate 18 is positioned at the position of the temperature sensor 49 and the position where the timing generation circuit 45, the image signal processing circuit 41, and the like are disposed. It is preferable to have an isolated configuration. Further, since the warmed air moves upward inside the housing of the plasma display device 100, it is desirable to install it at the lower end of the tuner mounting substrate 18 as much as possible. Furthermore, it is desirable to install it at a position that is less than half the height of the panel 10.
- the heat generated by the panel 10 is conducted to the temperature sensor 49 via the chassis 12 and the boss material 123. Since the temperature sensor 49 is thermally shielded from the heat released from each drive circuit mounting substrate and is not affected, it is possible to accurately detect a value correlated with the temperature of the panel 10. . Further, since the back cover 3 has the ventilation portion 5 including the plurality of ventilation holes 4, a change in the external temperature of the plasma display device 100 is also transmitted to the temperature sensor 49. Therefore, the temperature sensor 49 can detect a value correlated with the external temperature.
- the heat of the panel 10 as the video display unit for displaying the video is high in thermal conductivity to the temperature sensor 49 shielded by the temperature sensor installation tool 16. Since heat conduction is performed through the boss material 123, the detection error of the temperature sensor 49 can be reduced without being affected by heat radiation from each drive circuit mounting board. Therefore, it is possible to drive the panel 10 optimally according to the temperature of the panel 10.
- the first temperature sensor is disposed on the front frame 2 side of the tuner mounting substrate 18 at the fixing portion of the boss material 123, but is not limited thereto. That is, the first temperature sensor 49 may be disposed on the back cover 3 side, which is the rear frame of the printed circuit board, as long as it is a fixed portion of the boss material 123. In this case, by providing a notch or a groove around the first temperature sensor 49 of the tuner mounting substrate 18, heat transfer from the tuner circuit or the like is reduced, and a value correlated with the temperature of the panel 10 is accurately detected.
- FIG. 10 is an exploded perspective view showing an example of the structure of the plasma display device 101 as the video display device according to the second embodiment of the present invention
- FIG. 11 is a cross-sectional view taken along the line 11-11 in FIG.
- FIG. 12 is a circuit block diagram of plasma display apparatus 101 according to the second embodiment of the present invention.
- the structure of the panel 10 of the video display device and the outline of the drive voltage waveform in the second embodiment of the present invention are the same as those in the first embodiment.
- the present embodiment is different from the first embodiment in that an ambient temperature estimation circuit 59 having a temperature sensor 61 as a second temperature sensor and a condition temperature determination circuit 148 are further provided as shown in FIG. It is.
- condition temperature determination circuit 148 detects the temperature and the ambient temperature of the panel 10 that is the image display unit with the two temperature sensors of the first temperature sensor and the second temperature sensor, and the detected temperature and the ambient temperature of the panel 10 are detected.
- the condition temperature is calculated using the temperature. A specific method for calculating the conditional temperature will be described later.
- FIG. 10 the same reference numerals are given to the same portions as those of the plasma display device 100 shown in FIG. 8 in the first embodiment, and detailed description thereof is omitted. Also, in FIG. 11, the same parts as those of the plasma display device 100 shown in FIG.
- the temperature sensor 49 which is the first temperature sensor, is disposed on the front frame 2 side of the tuner mounting substrate 18 that is a printed circuit board.
- the temperature sensor 61 as the second temperature sensor is arranged on the back cover 3 side of the tuner mounting substrate 18 that is shielded by the shielding wall 17 of the temperature sensor installation tool 16. And the temperature sensor 61 is arrange
- the temperature sensor 61 is disposed at a position facing the back cover 3 on the tuner mounting substrate 18 and at the lower end of the tuner mounting substrate 18 as much as possible. Furthermore, it is desirable to install at a position that is less than half the height of the panel 10. With such a configuration, since a shielding object is not sandwiched between the ventilation part 5 of the back cover 3 and the temperature sensor 61, the outside air is smooth from the ventilation part 5 of the plasma display device 101 to the surroundings of the temperature sensor 61. Into the convection. As a result, the influence of heat radiation from each drive circuit mounting substrate can be reduced, and the ambient temperature of the plasma display device 101 can be detected with high accuracy.
- the condition temperature determination circuit 148 has a temperature sensor 49 made of a generally known element such as a thermocouple used for detecting the temperature, and an ambient temperature estimation circuit 59 having a similar temperature sensor 61.
- the temperature sensor 61 is disposed in the housing of the plasma display device 101, measures a temperature close to the ambient temperature of the plasma display device 101, and outputs the detected value to the ambient temperature estimation circuit 59.
- the ambient temperature estimation circuit 59 corrects the output value of the temperature sensor 61 in consideration of the influence of heat generated by the tuner circuit. The reason why this correction is necessary is that the output value of the temperature sensor 61 is increased by a constant temperature because the tuner circuit always performs a constant operation regardless of the display image. Therefore, the ambient temperature estimation circuit 59 calculates a value obtained by subtracting the constant temperature increase from the output value of the temperature sensor 61 as the ambient temperature estimation value, and outputs the ambient temperature estimation value to the condition temperature determination circuit 148.
- the temperature rise due to the tuner circuit is referred to as an offset value ⁇ .
- the condition temperature determination circuit 148 calculates the temperature of the panel 10 from two input values of the temperature sensor 49 and the ambient temperature estimation circuit 59.
- the calculated temperature of the panel 10 is referred to as a conditional temperature.
- the driving mode of the panel 10 is classified into three stages according to the temperature of the panel 10: low temperature, normal temperature, and high temperature. That is, the condition temperature determination circuit 148 is a temperature at which the calculated temperature of the panel 10 is a predetermined low temperature (for example, less than 17 ° C.), normal temperature (for example, 17 ° C. or more and less than 48 ° C.), and high temperature (for example, 48 ° C. or more) Compare with each threshold. Then, the conditional temperature determination circuit 148 outputs the comparison result to the timing generation circuit 45. Based on the result, a driving mode suitable for the calculated temperature of the panel 10 is selected. As described above, the condition temperature determination circuit 148 according to the second embodiment of the present invention calculates the condition temperature for selecting the drive mode of the panel 10.
- the temperature sensor 49 is disposed between the chassis 12 to which the panel 10 is attached and the temperature sensor 49 via the boss material 123 having high thermal conductivity such as aluminum. Therefore, the temperature sensor 49 can obtain an output value in which the detection error is reduced with respect to the temperature of the panel 10. Then, the output value is output to the conditional temperature determination circuit 148.
- the output value of the temperature sensor 49 is referred to as Tp.
- the temperature sensor 61 is disposed so as to measure the temperature as close as possible to the ambient temperature of the plasma display device 101 with a gap from the panel 10 as described above. Therefore, the temperature sensor 61 can obtain an output value with a small temperature error in which the influence of the heat generated by the panel 10 is reduced. Then, the output value is output to the ambient temperature estimation circuit 59.
- the output value of the temperature sensor 61 is referred to as Tss.
- Tss the output value of the temperature sensor 61 is affected by the heat generated by the circuit of the tuner mounting substrate 18 on which the temperature sensor 61 is mounted, the output value in the ambient temperature estimation circuit 59 described below. Tss correction is performed.
- the ambient temperature estimation circuit 59 corrects the temperature rise by the tuner circuit with respect to the output value Tss of the temperature sensor 61, and outputs it to the condition temperature determination circuit 148. Specifically, assuming that the output value of the ambient temperature estimation circuit 59 is Ts and the temperature rise by the tuner circuit is the offset value ⁇ , the output value Ts of the ambient temperature estimation circuit 59 can be expressed as in the following Equation 1.
- Ts Tss ⁇ (Formula 1)
- Ts output value of ambient temperature estimation circuit 59 (° C.)
- Tss Output value of the temperature sensor 61 (° C.)
- ⁇ Offset value of temperature rise by the tuner circuit (° C) It is.
- the offset value ⁇ is, for example, 10 (° C.). This value is an example and varies depending on design conditions such as a panel. Therefore, a high-precision temperature based on the output values of the two temperature sensors is input to the conditional temperature determination circuit 148, which leads to an improvement in accuracy in the calculation of the conditional temperature described below.
- the condition temperature determination circuit 148 corrects the output value Tp of the temperature sensor 49 in order to reduce the influence of heat sources other than the panel.
- the main roles of the two temperature sensors 49 and 61 in Embodiment 2 of the present invention will be described.
- the two temperature sensors 49 and 61 are both arranged so as not to be thermally shielded from the heat generated from each drive circuit mounting board.
- the temperature sensor 49 is configured to be susceptible to temperature fluctuations of the panel 10.
- the temperature sensor 61 is configured to reduce the influence of the temperature variation of the panel 10.
- the difference between the output values of the two temperature sensors is Tdiff
- the difference Tdiff there is a strong correlation between the difference Tdiff between the output values and the temperature fluctuation amount of the panel 10. That is, it can be estimated that the temperature rise of the panel 10 is small when the output value difference Tdiff is small, and the temperature rise of the panel 10 is large when the output value difference Tdiff is large. Therefore, with respect to the output value difference Tdiff, the threshold value Tth is preset in the plasma display device 101, and the output value difference Tdiff is compared with the threshold value Tth, so that the output value of the temperature sensor 49 can be corrected with high accuracy. it can.
- the condition temperature determination circuit 148 calculates the temperature of the panel 10 by correcting the output value Tp of the temperature sensor 49 as the first temperature sensor using a different calculation formula.
- FIG. 13 shows the output value Tp of the temperature sensor 49, the output value Tss of the temperature sensor 61, and the panel with respect to the time from when the power is turned on when the plasma display device 101 displays a full-screen white image in the second embodiment of the present invention. It is the schematic which shows the relationship between 10 temperature P and condition temperature T. Note that the temperature P of the panel 10 is experimentally measured in order to confirm the correction accuracy. In FIG. 13, it is assumed that a full screen white image is displayed on the panel 10.
- the period after the temperature rise of the tuner board 18 is saturated will be described.
- the rise of the output value Tss of the temperature sensor 61 due to the temperature becomes saturated at about t1.
- the output value Tp of the temperature sensor 49 increases as the temperature P of the panel 10 increases. Therefore, when the output value difference Tdiff exceeds the threshold value Tth set in advance in the plasma display device 101, it can be estimated that the temperature P of the panel 10 is higher than the output value Tp of the temperature sensor 49. Correction like the following formula 2 is performed.
- the preset threshold value Tth is, for example, 5 (° C.). This value is an example and varies depending on design conditions such as a panel.
- the conditional temperature determination circuit 148 is a temperature sensor that is a first temperature sensor.
- a correction coefficient ⁇ set in advance may be calculated for the difference Tdiff between the output value Tp of 49 and the output value Tss of the temperature sensor 61 as the second temperature sensor to calculate the temperature increase of the video display unit.
- the condition temperature determination circuit 148 may make an erroneous correction during the period until the temperature rise is saturated. Therefore, the time t1 for determining the end of the transition period and the threshold value Shot for the estimated ambient temperature Ts are preset in the plasma display device 101, the time t from when the plasma display device 101 is turned on is smaller than t1, When the estimated temperature value Ts is larger than the threshold value Shot, the condition temperature T is corrected as shown in Equation 3 below.
- the threshold value Hot is, for example, 20 (° C.). This value is an example and varies depending on design conditions such as a panel.
- T Tp + Hc (Formula 3)
- T Conditional temperature (° C)
- Tp Output value of temperature sensor 49 (° C)
- Hc A correction amount (° C.) set in advance in the plasma display apparatus 101, for example, 4 (° C.). This value is an example and varies depending on design conditions such as a panel.
- the case where the temperature P of the panel 10 is higher than the output value of the temperature sensor 49 can be detected, and the condition temperature T following the temperature of the panel 10 can be calculated.
- FIG. 14 shows the output value Tp of the temperature sensor 49, the output value Tss of the temperature sensor 61 and the panel with respect to the time after the power is turned on when the plasma display apparatus 101 according to the second embodiment of the present invention displays a full screen black image. It is the schematic which shows the relationship between 10 temperature P and condition temperature T. Note that the temperature P of the panel 10 is experimentally measured in order to confirm the correction accuracy. In FIG. 14, it is assumed that a black screen image is displayed on the panel 10.
- the temperature P of the panel 10 becomes substantially constant after the time t1.
- the temperature rise of the output value Tp of the temperature sensor 49 is very small, and the output value difference Tdiff is also small. Therefore, when the output value difference Tdiff falls below the threshold value Tth, it can be estimated that the temperature P of the panel 10 is lower than the output value Tp of the temperature sensor 49 and the fluctuation is small. Perform such correction.
- T Tp- ⁇ (Formula 4)
- T Conditional temperature (° C)
- Tp Output value of temperature sensor 49 (° C)
- ⁇ A correction amount (° C.) preset in the plasma display apparatus 101, for example, 5 (° C.). This value is an example and varies depending on design conditions such as a panel.
- condition temperature determination circuit 148 can detect the case where the temperature P of the panel 10 is lower than the output value Tp of the temperature sensor 49 and calculate the condition temperature T following the temperature P of the panel 10.
- the conditional temperature determination circuit 148 can calculate the temperature of the panel 10 with high accuracy.
- the correction coefficient ⁇ , the correction amounts ⁇ and Hc set in advance in the plasma display apparatus 101, the transition period t1, the threshold value Tth for the difference Tdiff of the output values of the two temperature sensors, and the threshold value for the estimated ambient temperature value Ts.
- the Shot should be adjusted according to the size and characteristics of the panel 10. Further, the accuracy can be further improved by adjusting the correction coefficient ⁇ , the correction amount ⁇ , and Hc in accordance with the estimated ambient temperature value Ts.
- the influence due to the temperature P of the panel 10 is extracted from the two temperature sensors that are different in the influence due to the temperature P of the panel 10, and the output value of the temperature P of the panel 10 is obtained.
- the correction it is possible to calculate a highly accurate condition temperature with reduced detection error caused by the position where the temperature sensor is arranged, and therefore it is possible to drive the panel 10 optimal for the temperature condition of the panel 10. It becomes.
- the configuration for increasing the detection accuracy of the temperature P of the panel 10 is described, but it goes without saying that the detection accuracy of the ambient temperature can be increased in the same configuration.
- the ambient temperature Tt after correction of the condition temperature T in Equation 2 above the output value Tp of the temperature sensor 49 is the ambient temperature sensor output value Tss, ⁇ is the ambient temperature correction coefficient k, and the output value difference Tdiff is increased by the panel temperature sensor.
- the panel temperature sensor increase ⁇ Tp is the increase in the output value from the output value of the temperature sensor 49 at the reference temperature with the reference temperature being the ambient temperature 25 (° C.).
- Tt Tss ⁇ k ⁇ ⁇ Tp (Formula 5)
- Tt Ambient temperature after correction (° C)
- Tss Output value of the temperature sensor 61 (° C.)
- ⁇ Tp Temperature sensor 49 temperature rise (° C)
- k Ambient temperature correction coefficient preset in the plasma display apparatus 101, for example, 1.2. This value is an example and varies depending on design conditions such as a panel.
- the conditional temperature determination circuit 148 corrects the preset value from the output value Tss of the temperature sensor 61 that is the second temperature sensor to the temperature increase ⁇ Tp of the output value of the temperature sensor 49 that is the first temperature sensor.
- the corrected ambient temperature Tt may be calculated by dividing the value multiplied by the coefficient ⁇ .
- the condition temperature T can be calculated by using the corrected ambient temperature Tt as the output value Tss of the temperature sensor 61 of Formula 2, so that the temperature of the panel 10 can be calculated with higher accuracy. Therefore, it is possible to drive the panel 10 that is optimal for the temperature conditions of the panel 10.
- the video display device may be a video display device having a video display unit having a large calorific value, such as a plasma display panel or a surface conduction electron-emitting device display panel.
- a video display unit having a large calorific value such as a plasma display panel or a surface conduction electron-emitting device display panel.
- the panel is a plasma display panel according to the video display device in the present embodiment, it may be a display panel such as a liquid crystal panel or an SED panel.
- the panel temperature can be appropriately maintained with a relatively simple configuration, and a high-quality image display can be realized. Useful.
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Abstract
Description
3 バックカバー(後面枠)
4 通気孔
5 通気部
10 パネル
81 熱伝導シート
12 シャーシ
13a データ電極駆動回路搭載基板
13b 走査電極駆動回路搭載基板
13c 維持電極駆動回路搭載基板
14 電源回路搭載基板
15 小信号処理回路搭載基板
16 温度センサー設置器具
17 遮蔽壁
18 チューナー搭載基板
19 FPC
21 前面板
22 走査電極
23 維持電極
24 表示電極対
25,33 誘電体層
26 保護層
31 背面板
32 データ電極
34 隔壁
35 蛍光体層
41 画像信号処理回路
42 データ電極駆動回路
43 走査電極駆動回路
44 維持電極駆動回路
45 タイミング発生回路
48,148 条件温度決定回路
49 温度センサー(第1温度センサー)
50,60 維持パルス発生回路
51,56 電力回収回路
52,57 クランプ回路
53 初期化波形発生回路
54 走査パルス発生回路
55 書込みパルス発生回路
58 書込みパルス出力回路
59 周囲温度推測回路
61 温度センサー(第2温度センサー)
100,101 プラズマディスプレイ装置(映像表示装置)
121,122,123,161 ボス材
Q1,Q2,Q3,Q4,Q11,Q12,Q13,Q14,Q21,Q31,Q32,Q33,Q34,QH1~QHn,QL1~QLn スイッチング素子
C1,C10,C11,C21,C31 コンデンサ
L1,L31 インダクタ
D11,D12,D21,D31,D32 ダイオード
図1は、本発明の実施の形態1における映像表示装置の映像表示部としてのパネル10の構造の一例を示す分解斜視図である。以下では、本実施の形態における映像表示装置は、一例としてパネル10を有するプラズマディスプレイ装置であるとして説明を行う。なお、映像表示装置は、プラズマディスプレイ装置に限るものではなく、表面伝導型電子放出素子ディスプレイパネルなどの発熱量が大きい映像表示部を含むものである。
図10は本発明の実施の形態2における映像表示装置としてのプラズマディスプレイ装置101の構造の一例を示す分解斜視図であり、図11は図10の11-11線における断面図である。図12は、本発明の実施の形態2におけるプラズマディスプレイ装置101の回路ブロック図である。本発明の実施の形態2における映像表示装置のパネル10の構造、駆動電圧波形の概要などは実施の形態1と同様である。本実施の形態が実施の形態1と異なる点は、図12に示すように、第2温度センサーである温度センサー61を有する周囲温度推測回路59と条件温度決定回路148とをさらに備えていることである。そして、条件温度決定回路148が、映像表示部であるパネル10の温度と周囲温度とを第1温度センサーと第2温度センサーとの2つの温度センサーで検出し、検出したパネル10の温度と周囲温度とを用いて条件温度を算出する点である。条件温度を算出する具体的な方法については後述する。
ただし、Ts: 周囲温度推測回路59の出力値(℃)
Tss: 温度センサー61の出力値(℃)
γ: チューナー回路による温度上昇のオフセット値(℃)
である。ここで、オフセット値γは、例えば、10(℃)である。この値は、一例であってパネルなどの設計条件によって異なるものである。したがって、条件温度決定回路148には、2つの温度センサーの出力値に基づく高精度な温度が入力され、以下で説明する条件温度の算出において精度向上に繋がる。
=Tp+α(Tp-Tss)
=Tp+α{Tp-(Ts+γ)}
ただし、T: 条件温度(℃)
Tp: 温度センサー49の出力値(℃)
Tdiff: 2つの温度センサーの出力値の差分(℃)
Tss: 温度センサー61の出力値(℃)
Ts: 周囲温度推測回路59の出力値(℃)
α: プラズマディスプレイ装置101に予め設定した補正係数であって、例えば、1.2である。この値は、一例であってパネルなどの設計条件によって異なるものである。
ただし、T: 条件温度(℃)
Tp: 温度センサー49の出力値(℃)
Hc: プラズマディスプレイ装置101に予め設定した設定された補正量(℃)であって、例えば、4(℃)である。この値は、一例であってパネルなどの設計条件によって異なるものである。
ただし、T : 条件温度(℃)
Tp: 温度センサー49の出力値(℃)
β : プラズマディスプレイ装置101に予め設定した補正量(℃)であって、例えば、5(℃)である。この値は、一例であってパネルなどの設計条件によって異なるものである。
ただし、Tt: 補正後周囲温度(℃)
Tss: 温度センサー61の出力値(℃)
ΔTp: 温度センサー49の温度上昇分(℃)
k: プラズマディスプレイ装置101に予め設定された周囲温度補正係数であって、例えば、1.2である。この値は、一例であってパネルなどの設計条件によって異なるものである。
Claims (8)
- 映像を表示する映像表示部と、
前記映像表示部の背面に配置されたシャーシと、
前記シャーシに設置されたボス材と、
前記ボス材の先端が接続されたプリント基板と、
前記プリント基板への前記ボス材の固定部に配置された第1温度センサーと、
前記プリント基板を熱的に遮蔽する遮蔽壁を備えた温度センサー設置器具と、
前面枠および後面枠を有し前記映像表示部および前記温度センサー設置器具を収容する筐体とを備えた映像表示装置。 - 前記プリント基板上で、かつ、前記後面枠と対向する位置に第2温度センサーと、
前記第1温度センサーと前記第2温度センサーとから前記映像表示部の温度を算出する条件温度決定回路を備えた請求項1に記載の映像表示装置。 - 第1温度センサーは、前記プリント基板の前記前面枠側に配置し、
第2温度センサーは、前記プリント基板の前記後面枠側に配置する請求項2に記載の映像表示装置。 - 前記条件温度検出回路は、前記第1温度センサーの出力値と前記第2温度センサーの出力値との差分に、予め設定した補正係数を演算して、前記映像表示部の温度上昇分として算出する請求項2に記載の映像表示装置。
- 前記条件温度検出回路は、前記第1温度センサーの出力値により異なる算出式を用いる請求項2に記載の映像表示装置。
- 前記映像表示部は、プラズマディスプレイパネルである請求項1に記載の映像表示装置。
- 前記条件温度決定回路は、前記第2温度センサーの出力値から、
前記第1温度センサーの出力値の温度上昇分に、予め設定した周囲温度補正係数を掛け算した値を、
減算して、補正後周囲温度を算出する請求項2に記載の映像表示装置。 - 前記第1温度センサーと前記第2温度センサーは、
前記プリント基板の前記後面枠側に配置し、
前記プリント基板の前記第1温度センサーの周辺に切欠き或いは溝の何れかを設ける請求項2に記載の映像表示装置。
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JP2009521259A JP4978694B2 (ja) | 2008-02-06 | 2008-10-14 | 映像表示装置 |
US12/597,203 US20100118216A1 (en) | 2008-02-06 | 2008-10-14 | Image display device |
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JP2008-026163 | 2008-02-06 | ||
JP2008026163 | 2008-02-06 |
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JP5080681B1 (ja) * | 2011-11-18 | 2012-11-21 | 株式会社ナナオ | 表示装置、コンピュータプログラム、記録媒体及び温度推定方法 |
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JP2007225987A (ja) * | 2006-02-24 | 2007-09-06 | Matsushita Electric Ind Co Ltd | プラズマディスプレイパネルの駆動方法およびプラズマディスプレイ装置 |
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US5936603A (en) * | 1996-01-29 | 1999-08-10 | Delco Electronics Corporation | Liquid crystal display with temperature compensated voltage |
JPH10307641A (ja) * | 1997-05-07 | 1998-11-17 | Toshiba Corp | 電子機器 |
KR100319117B1 (ko) * | 1999-06-30 | 2002-01-04 | 김순택 | 플라즈마 디스플레이 패널 장치 |
US7102596B2 (en) * | 2002-09-12 | 2006-09-05 | Lg Electronics Inc. | Method and apparatus for driving plasma display panel |
KR20040095854A (ko) * | 2003-04-28 | 2004-11-16 | 삼성에스디아이 주식회사 | 플라즈마 디스플레이 패널을 채용한 화상 표시장치 |
KR100549666B1 (ko) * | 2003-05-23 | 2006-02-08 | 엘지전자 주식회사 | 플라즈마 디스플레이 패널의 구동장치 |
JP2005031136A (ja) * | 2003-07-07 | 2005-02-03 | Pioneer Electronic Corp | パネル表示装置 |
KR100589370B1 (ko) * | 2003-11-26 | 2006-06-14 | 삼성에스디아이 주식회사 | 플라즈마 디스플레이 장치 |
KR101133758B1 (ko) * | 2005-01-19 | 2012-04-09 | 삼성전자주식회사 | 센서 및 이를 구비한 박막 트랜지스터 표시판 |
KR100647688B1 (ko) * | 2005-04-19 | 2006-11-23 | 삼성에스디아이 주식회사 | 플라즈마 디스플레이 패널 구동방법 |
TWI310169B (en) * | 2005-09-22 | 2009-05-21 | Chi Mei Optoelectronics Corp | Liquid crystal display and over-driving method thereof |
US7821488B2 (en) * | 2007-03-16 | 2010-10-26 | Mstar Semiconductor, Inc. | Temperature-dependent overdrive circuit for LCD panel and method of implementing the same |
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- 2008-10-14 JP JP2009521259A patent/JP4978694B2/ja not_active Expired - Fee Related
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