WO2009077024A1

WO2009077024A1 - Digital weighing device

Info

Publication number: WO2009077024A1
Application number: PCT/EP2008/008611
Authority: WO
Inventors: Christian Oldendorf; Thomas Schink
Original assignee: Sartorius Ag
Priority date: 2007-12-19
Filing date: 2008-10-11
Publication date: 2009-06-25
Also published as: DE102007061786A1; DE102007061786B4

Abstract

Disclosed is a digital weighing device comprising: - a force sensor that generates an analog sensor signal corresponding to an introduced force; - an integrator which integrates the sensor signal as a measured signal that is permanently applied to the integrator during operation and an operating level of a reference signal that is temporarily applied thereto; - a comparator (20) which is mounted downstream of the integrator, compares an output signal of the integrator with a threshold value, and generates one respective pulse edge of a pulse signal on a comparator pulse line (22) when the threshold value is reached; - switching control means which temporarily trigger a switch (18) in accordance with the pulse signal in order to temporarily apply the operating level of the reference signal to the integrator; and - value-determining means that determine weighed values representing the sensor signal on the basis of a duration of the intervals during which the operating level of the reference signal is applied to the integrator, said duration being detected by time-determining means. The force sensor, the integrator, the comparator (20), and the switch (18) are combined in a first module while the switching control means, the time-determining means, and the value-determining means are combined in a second, separate module.

Description

description

Field of the invention

The invention relates to a digital weighing device, comprising a force transducer which generates an analog sensor signal corresponding to an introduced force, an integrator which transmits the sensor signal as a measurement signal permanently applied to it during operation and a working level of a sensor temporarily applied to it

Integrated reference signal, a integrator downstream comparator, the one

Integrator output signal with a threshold value and, when the threshold value is reached, each compares a pulse edge of a pulse signal on one

Generates comparator pulse line,

Shift control means which, depending on the

Pulse signal a switch for temporary application of the

Control operating level of the reference signal to the integrator, as well

Value determination means based on a

Time of the recorded duration of those

Intervals during which the working level of the Reference signal is applied to the integrator, determine the sensor signal representing weight values.

State of the art

Such weighing devices are well known. These are weighing devices with a so-called integrating A / D converter for analog / digital conversion of the analog sensor signal. The principle of the integrating A / D converter has long been known in many variants. Examples which may be mentioned here are DE 21 14 141, DE 28 20 601 C2 and DE 100 40 373 A1. In the integrating A / D converter, the measurement signal is applied to an input of an operational amplifier connected as an integrator. For wiring as an integrator, the output of the operational amplifier is connected via a capacitor with its measuring signal input. Also connected to the measuring signal input of the operational amplifier is the supply line for a DC reference signal. This reference signal is only temporarily switched to a working level. During the remainder of the time, it is at a lower quiescent level or completely disconnected from the input of the operational amplifier. During a first clock component of a measurement clock, in which the operating level of the reference signal is not present, the capacitor is charged by the amplified in the operational amplifier measurement signal. If, after a predetermined period of time, the operating level of the reference signal is switched on, the capacitor discharges during a second clock component, as a result of which the integrator output signal drops. The time of a zero crossing, or more generally a threshold crossing of the Integrator output signal is detected by means of a downstream comparator. This then generates a pulse edge, which causes downstream switching control means to disconnect the operating level of the reference signal again from the integrator input, so that a new measurement clock can start with the charging of the capacitor. The duration of the second clock component, ie the period during which the operating level of the reference signal is present at the integrator, is measured by suitable time-measuring means, for example a clocked counter. The measured duration, referred to here as the measurement interval, represents a measure of the charging of the capacitor in the first clock component and thus of the level of the measurement signal. In the case of time measurement by means of a clocked counter, the counter value can be used directly as a digital measure of the measurement signal. With regard to the specific control of the switch for the reference signal, different variants are known which lead to cycles of constant or variable length. Furthermore, both monopolar and bipolar variants are possible.

The article Barn Swallow, U.: "Digital Weighing Cells: Innovation or Marketing Gag?" Mixing Weighing, Issue 1, March 2007 Discusses in detail the advantages and disadvantages of digital load cells when used in industrial weighing equipment compared to analogue load cells. Industrial weighing devices typically include a plurality of load cells that support a weighing platform at different positions. A weight force acting on the weighing platform becomes its sensor via the force introduction device of each weighing cell which generates a partial measured value. An appropriate combination of partial measurements yields the combination value representing the weight force acting on the weighing platform as a whole.

In many known devices, the sensors are analog sensors that produce an analog electrical voltage at their output. Parallel connection of all analogue load cells supporting the weighing platform corresponds to a summation of the voltages to one

Combined voltage. The analog combination voltage is typically digitized in such devices and forwarded as a sequence of digital values for further processing or evaluation.

Replacement of such analog load cells by digital load cells, which would be desirable in view of the modularity of the system and the avoidance of interference-prone analog lines, presents various difficulties as discussed in detail in the above-referenced article. Digital load cells generate digital measured values at specific measuring times. Typically, the digital load cell sensor also includes one or more analog force transducers, such as strain gauges, that generate an analog voltage that is converted by an analog-to-digital converter of the sensor into a series of individual digital measurements, each digital measurement at the time of measurement represents the load acting on the force transducer. To combine the digital readings of several load cells, the individual values must be sent to a central control unit via a data communication line be sent and processed there. For this purpose, it is first necessary to prepare the measured values for shipping units that can be sent via the data communication line. A widespread interface standard of digital load cells is the serial RS 485 interface via which the information concerning the measured values is sent according to a standardized protocol. Other interface or bus systems are also possible, with the processing of the measured values for shipping units always having to be carried out in adaptation to the communication network used. Unlike in the analogous case in which the combination of measured values is made by the parallel connection of the cells without any time delay, in the case of digital load cells, the timing of the values to be combined is of particular importance. The digital weighing cells therefore typically operate synchronized, the synchronization taking place, for example, by a synchronization pulse from the central control unit, which simultaneously requests all weighing cells to generate a digital measured value and then sequentially interrogates the measured values buffered in the individual measuring cells. The sequentially interrogated measured values are then processed in the central control unit to a combination value, which is assigned to the synchronization time. In this way, in the central control unit, a sequence of individual time-associated combination values, which represent a sampled course of the weight force acting on the weighing platform, is produced. A disadvantage of this system is the considerable length of the interval between individual combination values, which increases with the number of increasing load cells increases. This is disadvantageous for dynamic weighing processes as well as for metering processes, in which an accurate and rapid predictability of the course of the weight force acting on the weighing devices is essential.

Although a waiver of the synchronization of the measurement time points can lead to an acceleration of the combination value update which depends only on the speed of the data communication line and the central control device; However, each combination value is then based on individual measured values which were recorded at different measuring times, which leads to a considerable inaccuracy of the measurement result, in particular in the case of dynamic processes.

The above article suggests at least a partial return to analog weighing cells. In particular, it is proposed to route the analog signals over a short analog line path to a multi-channel A / D converter to avoid interference, which digitizes the analog input signals synchronously on all channels and combines the generated digital values. Disadvantages of this concept are the loss of modularity gained through the introduction of digital load cells and the reintroduction of analog line sections with their known interference and calibration problems. task

It is the object of the present invention to make the known weighing device with a plurality of synchronously working load cells more resistant to interference and more flexible in construction.

Presentation of the invention

This object is achieved in conjunction with the features of the preamble of claim 1, characterized in that the force transducer, the integrator, the comparator and the switch are combined in a first module and in that the switching control means, the time determining means and the value determining means in a second, separate module are summarized.

The core of the present invention lies in a special assignment of functional elements to different modules. As discussed in detail above, in the case of classical digital load cells, it is known to carry out the entire force absorption and digitization in the load cell and to transmit the digital weight value to a central processing unit. On the other hand, it is also known to perform only the analog power in the load cell and to transmit the analog signal to a central A / D converter. However, the present invention makes another division of the functional elements. According to the invention, the elements to be assigned to the functional unit of the A / D converter are split and assigned to different modules. In particular, all those elements to which analog signals are fed and / or which do not output digital signals are assigned to the first module, whereas all other functional elements are assigned to the second module. In this way it is achieved that the entire analog data processing until the generation of a first digital signal in the load cell, ie the first module is performed and the further processing of the digital signal to the determination of the total digital value, which may include the information of multiple load cells in a purely digital working, second module is performed. The same applies to the flow of information in the reverse direction, ie from the digital second module to the analog first module.

The practical consequence of this special division of the functional elements is that, as realized in a preferred embodiment, it is possible for the first module and the second module to be connected by control technology only via a pair of wires, which the

Comparator pulse line and a switching line connecting the switching control means and the switch comprises. Both lines are purely digital in nature. A digital line is understood here to be a line via which an information signal comprising only two levels is transmitted. Such lines are known to be particularly resistant to interference, which explains their significant advantage over analog lines, in which the information content of the transmitted signal is in the continuous level profile. Correspondingly long, the line pair between the load cell and be your digital module. This has a particularly advantageous effect in systems which represent a preferred development of the invention and comprise a plurality of first modules which are mechanically connected to a weighing platform and are each connected via a line pair to a second module common to the first modules. Because of the interference resistance of the digital line pairs, in the construction of such systems, the spatial distribution of the load cells with one another and their common second module must at least be taken into account, at least under electronic and tax-technical aspects.

By means of the present invention, the problem discussed above of synchronizing a plurality of load cells can also be solved in a simple manner. In a preferred embodiment of the invention, it is provided that an output of a switching signal, which causes the application of the operating level of the reference signal to the integrator, takes place simultaneously from the common second module to the first modules on all switching lines. Regardless of the specific structure of the functional elements of the common second module, it is possible to easily synchronize the switching lines or the switching signals output via the switching lines. Therefore, no separate synchronization signal is required for all load cells; Rather, the respective Abintegrationsphase immediately triggering switching signal is output from the common second module on all first modules. In the context of the previous explanations, different functional elements of the second module have been given different names. It should be noted at this point that this does not necessarily imply that such functionally separate units correspond to structurally separate units. Rather, it is provided in an advantageous development of the invention to realize all the functional elements of the second module in a microprocessor. Implementation within the microprocessor is accomplished by a suitable combination of hardware and software that the skilled artisan can readily access in the light of the disclosure herein based on his expertise. The implementation of the second module as a single microprocessor is especially true for those embodiments in which a plurality of first modules share a common second module. It is obvious that a microprocessor acting as a common second module must have a suitable number of inputs connected via line pairs to the respectively associated first modules.

In such an embodiment, it is particularly advantageous if a counter is provided in the microprocessor and, for each connected first module, a register coupled to the count output, whose count corresponds to the count at the time of the pulse edge of the associated clock

Comparative pulse signal corresponding content at a caused by the pulse edge change of the associated switching signal is retained and read out as a measure of the sensor signal of the associated sensor. In other words, this means that it is not required for determination the duration of the measurement interval for each load cell to provide a separate counter, which is started or stopped by the comparator pulse signal and the switching signal. Rather, it is sufficient and advantageous under the aspect of the processor layout to provide only one counter, which feeds its respective counter reading synchronously into registers, one of which is assigned to a first module. When zeroing the counter, the switching signal is set and transmitted via the switching line to the switch, which applies the working level of the reference signal to the integrator. Thereafter, the counter runs high, with its count is written to each of the registers. At the end of the Abintegrationsphase, which usually ends for each of the load cells according to the respectively introduced force at another time, the comparator pulse signal generates a change of the switching signal, which freezes the value of the respective associated register in the short term, so that this value as a measure of the Sensor value of each associated load cell can be read. If the corresponding values of all load cells are available, the microprocessor can make a suitable combination of the individual values for calculating the total weight value.

Further features and advantages of the invention will become apparent from the following specific description and the drawings. Brief description of the drawings

In the drawings show:

Figure 1 is a schematic block diagram of a first embodiment of the invention;

Figure 2 is a schematic block diagram of a second embodiment of the invention;

Figure 3: a schematic timing diagram for

Illustration of the function of the present invention.

Description of preferred embodiments

Figure 1 shows a schematic block diagram of an embodiment of the present invention. In the illustrated embodiment, three load cells 1, 2, 3 are connected to a shared digital module 4. The number of load cells is not essential to the present invention. In particular, more, less or even a single load cell can be realized. Typically, the load cells 1, 2, 3 are mechanically connected to a weighing platform which receives an object to be weighed. Below, only the details of the load cells 1 will be discussed, which is substantially identical to the other load cells 2, 3, so that a transmission for the expert is easy, especially as corresponding reference numerals designate corresponding components. Via a resistor 10, which is connected to the output of a force transducer, not shown in Figure 1, one of the introduced into the force transducer weight force of an object to be weighed corresponding current is introduced into the inverting input of an operational amplifier. The operational amplifier 12 is connected as an integrator, ie its output is fed back via a capacitor 14 to the inverting input. This is additionally connected via a resistor 16 and a switch 18 to a reference voltage source, not shown. In the illustrated embodiment, the connection is switchable by means of the switch 18 between a floating state and a state connected to a reference potential. In alternative embodiments, the switch 18 may also toggle between two different levels of a reference signal. Connected downstream of the output of the operational amplifier 12 is a comparator 20, which compares the signal INTl supplied by the integrator with a threshold value (here the ground potential) and outputs a pulse edge of a comparator pulse signal KIP1 on a comparator pulse line 22 when the threshold value is reached, which is introduced into a digital module 4 becomes. The digital module 4 is preferably designed as a microprocessor. In the illustration of Figure 1, two of the implemented in the microprocessor functionalities, namely the switching control means 28, which drive the switch 18, and a counter 32 are shown separately. The representation of the switching control means 28 takes place in accordance with the functionality of a clocked flip-flop, but a comparable functionality with other components and in particular with integration of Switching control means can be achieved in the microprocessor. In response to the comparator pulse signal KIPl and a zero setting of the counter 32 indicative output of the counter 32, the switching control means 28, the output of which are connected to a switching line 30, generate a switching signal AOPl, which controls the switch 18. Such a digital weighing device is basically known, so that the details of the switch control and the digital value determination need not be carried out in depth here. In particular, the preferably used multiple ramp method for digitizing an analog measured value, which is preferably used within the scope of the invention, is known in principle to the person skilled in the art.

FIG. 3 shows a timing diagram, which schematically shows the integrator signals INT1, INT2, INT3, the

Comparator pulse signals KIP1, KIP2, KIP3 and the switching signals AOP1, AOP2, AOP3 of a weighing device comprising three load cells as bold lines. In the following, the signals INT1, KIP1 and AOP1 belonging to a first load cell will be explained. The other signals shown in Figure 3 are to be understood accordingly. During an integration phase Iup, during which the switching signal AOP1 has an LO level and the switch 18 is open, only the measuring signal is present at the operational amplifier 12. The integrator signal INT increases accordingly. After a predetermined time has elapsed, the integration phase Iup ends and the counter 32 is set to zero and started. In this case, a set signal is sent to the set input of the flip-flop 28, which is thereby set, ie its output, the switching signal AOPL goes at HI level so that the switch 18 is closed and the charge accumulated in the capacitor 14 is dissipated. The integrator signal INTl falls accordingly. The period of time required to lower the integrator signal INT1 below a predetermined threshold and during which the counter 32 counts up is representative of the previously integrated charge and thus of the measurement signal. The reaching of the threshold value is signaled by the comparator 20 by outputting a pulse edge of the comparator pulse signal KIP1. This pulse edge resets the flip-flop 28, so that its output signal, the switching signal AOPl goes back to LO level. This transition stops the counter 32. The duration of this Abintegrations- or measuring interval Im can thus be read on not separately illustrated count output of the counter 32. It should be noted that the timing diagram shown in FIG. 3 represents only a variant of possible actuations of the A / D conversion. Other variants may benefit from the present invention. It is essential that a time interval representative of the measurement signal can be determined by means of the pulse edge generated by the comparator 20 and the switching signal AOP1 or a control signal preceding it. Accordingly, the other signals shown in Figure 3 are to be understood, where INT2, KIP2 and AOP2 illustrate the case of a smaller and INT3, KIP3 and A0P3 the case of a larger weighing value of the associated load cell.

From Figure 1 it can be clearly seen that the connection between the load cells 1, 2, 3 and the common digital module 4 to each one digital line pair, each consisting of the comparator pulse line 22 and the Switching line 30, is reduced. The spatial distance between the load cells, 1, 2, 3 and the digital module 4 can thus be made almost arbitrarily large, which significantly increases the flexibility of complex structures.

Figure 2 shows substantially the same structure as Figure 1, but with the digital module being organized in a particularly advantageous manner. In the following, only the differences from the embodiment of FIG. 1 will be discussed. Instead of the realization of a separate counter for each load cell 1, 2, 3, only one counter for all load cells 1, 2, 3 is realized, the count value output of the counter 32 is connected to the measuring cells respectively assigned registers. The set signal when zeroing the counter 32 in Figure 2 takes place simultaneously for all switching control means or flip-flops 28. The Abintegrationsphase therefore begins in each measuring point 1, 2, 3 simultaneously. In general, the Abintegrationsphase in the individual load cells 1, 2, 3 according to the different measurement signals of the load cells 1, 2, 3 end at different times. At these different points in time, the respective associated comparator generates the pulse edge which resets the associated switching control means 28, as a result of which the associated switching signal again goes to the LO level. This transition latches the associated register 34, which is connected to the count output of the associated counter 32. This means that the content of the register 34 during the Abintegrationsphase corresponds to the current counter value of the counter 32 and is frozen at the completion of the Abintegrationsphase. The register 34 can then be read out and the read value suitable be further processed. In this way, it is achieved that without special synchronization measures all load cells 1, 2, 3 synchronously measure and the respective measurement results in the digital module further processed and can be combined in particular to a total value of weight.

Of course, the embodiments shown in the figures and discussed in the specific description represent only illustrative embodiments of the present invention. Those skilled in the art of the present disclosure will be presented a wide variety of spectra. In particular, the timing of the control of the individual components may vary depending on the individual case. Also, individual elements or element groups can be replaced by essentially correspondingly working element groups. The digital module 4 is preferably designed as a microprocessor with multiple inputs, wherein the concrete realized logic is achieved by a combination of its hardware and software.

Reference sign list

1 load cell

2 load cell

3 load cell

4 digital module 10 resistor

12 operational amplifiers

14 capacitor

16 resistance

18 switches

20 comparator

22 comparator pulse line

28 switching control device / flip-flop

30 switching line

32 timer / counter

34 registers

INTl integrator signal

INT2 integrator signal

INT3 integrator signal

KIPl comparator pulse signal

KIP2 comparator pulse signal

KIP3 comparator pulse signal

AOPl switching signal

AOP2 switching signal

AOP3 switching signal

Iup integration phase

In the measuring interval

Claims

claims

1. A digital weighing device comprising a force transducer that generates an analog sensor signal corresponding to an applied force, an integrator (12, 14) integrating the sensor signal as a measurement signal permanently applied to it during operation and a working level of a reference signal applied thereto at times; a comparator (20) connected downstream of the integrator, which compares an integrator output signal with a threshold value and generates a pulse edge of a pulse signal on a comparator pulse line (22) when the threshold value is reached,

Switch control means (28) responsive to the pulse signal driving a switch (18) for temporarily applying the working level of the reference signal to the integrator (12, 14), and value determining means based on a duration of those intervals detected by time determining means (32); during which the working level of the reference signal is applied to the integrator (12, 14), determine the weighing values representing the sensor signal, characterized in that the force transducer, the integrator (12, 14), the comparator (20) and the switch (18) in a first module (1, 2, 3) are summarized and that the Shift control means (28), the time determining means (32) and the value determining means are combined in a second, separate module (4).

2. Weighing device according to claim 1, characterized in that the second module (4) is designed as a microprocessor.

3. weighing device according to one of the preceding claims, characterized in that the first module (1, 2, 3) and the second module (4) tax technically only via a line pair (22, 30) are connected, which the comparator pulse line (22) and a switching line (30) connecting the switching control means (28) and the switch (18).

4. Weighing device according to claim 3, characterized in that a plurality of first modules (1, 2, 3) mechanically connected to a weighing platform and via in each case a line pair (22, 30) with one of the first modules (1, 2, 3) common , second module (4) are connected.

5. Weighing device according to claim 4, characterized in that an output of a switching signal, which causes the application of the working level of the reference signal to the integrator (12, 14), from the common second module (4) to the first modules (1, 2, 3) takes place simultaneously on all switching lines (30). Weighing device according to one of claims 4 to 5 as far as dependent on claim 2, characterized in that in the microprocessor, a counter (32) and for each connected first module (1, 2, 3) is provided with the Zählwertausgang a register (34) is provided whose content corresponding to the count at the time of the pulse edge of the associated comparator pulse signal is recorded at a change of the associated switching signal initiated by the pulse edge and read out as a measure of the sensor signal of the associated sensor.