WO2009045005A2 - Dispositif électroluminescent à semi-conducteurs de nitrure iii - Google Patents

Dispositif électroluminescent à semi-conducteurs de nitrure iii Download PDF

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WO2009045005A2
WO2009045005A2 PCT/KR2008/005395 KR2008005395W WO2009045005A2 WO 2009045005 A2 WO2009045005 A2 WO 2009045005A2 KR 2008005395 W KR2008005395 W KR 2008005395W WO 2009045005 A2 WO2009045005 A2 WO 2009045005A2
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Prior art keywords
nitride semiconductor
layer
light emitting
emitting device
semiconductor layer
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PCT/KR2008/005395
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English (en)
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WO2009045005A3 (fr
Inventor
Soo Kun Jeon
Eun Hyun Park
Jae Gu Lim
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Epivalley Co., Ltd.
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Priority claimed from KR1020070099407A external-priority patent/KR20090034169A/ko
Priority claimed from KR1020070099397A external-priority patent/KR20090034163A/ko
Application filed by Epivalley Co., Ltd. filed Critical Epivalley Co., Ltd.
Publication of WO2009045005A2 publication Critical patent/WO2009045005A2/fr
Publication of WO2009045005A3 publication Critical patent/WO2009045005A3/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure

Definitions

  • the present invention relates to a Ill-nitride semiconductor light emitting device, and more particularly, to a Ill-nitride semiconductor light emitting device which can facilitate current spreading and improve electrostatic discharge characteristic by providing an undoped GaN layer with a thickness over 300 A in an n-side contact layer.
  • the Ill-nitride semiconductor light emitting device means a light emitting device such as a light emitting diode including a compound semiconductor layer composed of AI (X) Ga (y) ln (1-x-y) N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x+y ⁇ 1), and may further include a material composed of other group elements, such as SiC, SiN, SiCN and CN, and a semiconductor layer made of such materials.
  • FIG. 1 is a view illustrating one example of a conventional Ill-nitride semiconductor light emitting device.
  • the Ill-nitride semiconductor light emitting device includes a substrate 100, a buffer layer 200 epitaxially grown on the substrate 100, an n-type nitride semiconductor layer 300 epitaxially grown on the buffer layer 200, an active layer 400 epitaxially grown on the n- type nitride semiconductor layer 300, a p-type nitride semiconductor layer 500 epitaxially grown on the active layer 400, a p-side electrode 600 formed on the p-type nitride semiconductor layer 500, a p-side bonding pad 700 formed on the p-side electrode 600, an n-side electrode 800 formed on the n-type nitride i semiconductor layer exposed by mesa-etching the p-type nitride semiconductor layer 500 and the active layer 400, and a protective film 900.
  • a GaN substrate can be used as a homo-substrate, and a sapphire substrate, a SiC substrate or a Si substrate can be used as a hetero-substrate.
  • a SiC substrate or a Si substrate can be used as a hetero-substrate.
  • any type of substrate that can grow a nitride semiconductor layer thereon can be employed.
  • the SiC substrate is used, the n-side electrode 800 can be formed on the side of the SiC substrate.
  • the nitride semiconductor layers epitaxially grown on the substrate 100 are grown usually by metal organic chemical vapor deposition (MOCVD).
  • MOCVD metal organic chemical vapor deposition
  • the buffer layer 200 serves to overcome differences in lattice constant and thermal expansion coefficient between the hetero-substrate 100 and the nitride semiconductor layers.
  • U.S. Pat. No. 5,122,845 discloses a technique of growing an AIN buffer layer with a thickness of 100 to 500 A on a sapphire substrate at 380 to 800 0 C.
  • U.S. Pat. No. 5,290,393 discloses a technique of growing an AI (X) Ga (1-x) N (0 ⁇ x ⁇ 1 ) buffer layer with a thickness of 10 to 5000 A on a sapphire substrate at 200 to 900 0 C.
  • WO/20173042 discloses a technique of growing a SiC buffer layer (seed layer) at 600 to 990 0 C, and growing an ln( X )Ga(i -X )N (0 ⁇ x ⁇ 1 ) thereon.
  • it is provided with an undoped GaN layer with a thickness of 1 to several ⁇ m on the AIN buffer layer, AI (x) Ga ( i -X) N (0 ⁇ x ⁇ 1) buffer layer or SiC/ln (X )Ga(i- ⁇ )N (0 ⁇ x ⁇ 1) layer.
  • the n-side electrode 800 formed region is doped with a dopant.
  • the n-type contact layer is made of GaN and doped with Si.
  • U.S. Pat. No. 5,733,796 discloses a technique of doping an n-type contact layer at a target doping concentration by adjusting the mixture ratio of Si and other source materials.
  • the active layer 400 generates light quanta (light) by recombination of electrons and holes. Normally, the active layer 400 contains In ⁇ Ga ⁇ j N
  • PCT Publication No. WO/02/021121 discloses a technique of doping some portions of a plurality of quantum well layers and barrier layers.
  • the p-type nitride semiconductor layer 500 is doped with an appropriate dopant such as Mg, and has p-type conductivity by an activation process.
  • an appropriate dopant such as Mg
  • Pat. No. 5,247,533 discloses a technique of activating a p-type nitride semiconductor layer by electron beam irradiation. Moreover, U.S. Pat. No.
  • 5,306,662 discloses a technique of activating a p-type nitride semiconductor layer by annealing over 400 0 C.
  • PCT Publication No. WO/2017022655 discloses a technique of endowing a p-type nitride semiconductor layer with p- type conductivity without an activation process, by using ammonia and a hydrazine-based source material together as a nitrogen precursor for growing the p-type nitride semiconductor layer.
  • the p-side electrode 600 is provided to facilitate current supply to the p- type nitride semiconductor layer 500.
  • U.S. Pat. No. 5,563,422 discloses a technique associated with a light transmitting electrode composed of Ni and Au and formed almost on the entire surface of the p-type nitride semiconductor layer 500 and in ohmic-contact with the p-type nitride semiconductor layer 500.
  • U.S. Pat. No. 6,515,306 discloses a technique of forming an n-type superlattice layer on a p-type nitride semiconductor layer, and forming a light transmitting electrode made of ITO thereon.
  • the light transmitting electrode 600 can be formed thick not to transmit but to reflect light toward the substrate 100.
  • This technique is called a flip chip technique.
  • U.S. Pat. No. 6,194,743 discloses a technique associated with an electrode structure including an Ag layer with a thickness over 20 nm, a diffusion barrier layer covering the Ag layer, and a bonding layer containing Au and Al, and covering the diffusion barrier layer.
  • the p-side bonding pad 700 and the n-side electrode 800 are provided for current supply and external wire bonding.
  • U.S. Pat. No. 5,563,422 discloses a technique of forming an n-side electrode with Ti and Al.
  • the protection film 900 can be made of SiO 2 , and may be omitted.
  • FIG. 2 is an explanatory view illustrating a doping method of an n-type nitride semiconductor layer disclosed in US Patent 5,733,796, particularly, a technology of controlling an n-type nitride semiconductor layer at a target doping concentration by adjusting a mixture ratio of Si source and other source materials within a range ( ⁇ 3 x 10 18 /cm 3 ) where an input amount of Si source and a carrier concentration (or resistivity) are linearly proportional. It is pointed out that crystallinity of the nitride semiconductor layer is made seriously degraded, when the doping is performed at a concentration of about 1 x 10 19 /cm 3 .
  • FIG. 3 is an explanatory view illustrating a doping method of an n-type nitride semiconductor layer disclosed in PCT Publication No. WO/99/005728, particularly, a technology of forming an n-type nitride semiconductor layer 310 having a superlattice structure as an n-side contact layer to design around the technology of FIG. 2.
  • the n-side contact layer 310 is formed by repeatedly stacking an n-type GaN layer with a thickness of 20 A doped at a concentration of 1 x 10 19 /cm 3 and an undoped GaN layer with a thickness of 20 A at periods of 250.
  • the superlattice structure indicates a structure where layers with a thickness not greater than 100 A are repeatedly stacked.
  • a composition, doping concentration and/or thickness thereof may be different.
  • FIG. 4 is an explanatory view illustrating a doping method of an n-type nitride semiconductor layer disclosed in PCT Publication No. WO/99/046822, particularly, a technology of forming an n-side contact layer 410 with a thickness of 3 ⁇ m at a doping concentration of 3 x 10 19 /cm 3 , and forming thereon an n-type nitride semiconductor layer 420 having a superlattice structure or multilayered structure with a different composition, doping concentration and/or thickness so as to recover low crystallinity of the n-side contact layer 410.
  • the n-type nitride semiconductor layer 420 having the superlattice structure or multilayered structure is doped at a concentration not greater than 1 x 10 19 /cm 3 .
  • an undoped GaN layer (hereinafter, referred to as 'un-GaN layer') is used to improve electrostatic discharge (ESD) characteristic.
  • the light emitting device of FIG. 3 uses an un-GaN layer 320 with a thickness of 100 A, and the light emitting device of FIG.
  • n-side contact layer 310 and 410 cannot be used in the n-side contact layer 310 and 410 to dope the n-type nitride semiconductor layer or improve ESD characteristic.
  • the n-side contact layer 310 and 410 is mesa-etched to form an n-side electrode 340 and 440 thereon, so there is a disadvantage of raising a forward voltage when the n- side electrode 340 and 440 is formed on the un-GaN layer.
  • n- side contact layer 310 and 410 must be formed over a predetermined thickness, e.g., 1 ⁇ m to form the n-side electrode 340 and 440 and spread current well, so there is also a disadvantage of raising a forward voltage when a plurality of un- GaN layers are positioned in the n-side contact layer 310 and 410.
  • a current bottleneck phenomenon of electrons introduced from the n-side electrode 800 may occur unlike a vertical light emitting device. This phenomenon can be a serious problem in a large- sized light emitting device. If static electricity is generated, electrostatic current may be concentrated to destroy the light emitting device. Accordingly, it is necessary for the n-side contact layer to have a high doping concentration and a large thickness. If the n-side contact layer has a high doping concentration and a large thickness, a strong strain is applied to the nitride semiconductor layer during the growth.
  • the nitride semiconductor layer is grown in a direction of relieving the strain, which degrades crystallinity.
  • US Patent 5,733,796 points out that crystallinity is degraded at a doping concentration over 1 x 10 19 /cm 3 .
  • a technology is suggested to bypass the technology in US Patent 5,733,796 by using the n-side contact layer 310 having the superlattice structure where a thin n-type GaN layer with a thickness of 20 A doped at a concentration of 1 x 10 19 /cm 3 and a thin un-GaN layer with a thickness of 20 A are repeatedly stacked, to reduce crystal defects by restricting the thickness of the GaN layer doped at a high concentration to below 100 A, and to prevent reduction of the entire doping concentration of the n-side contact layer 310 and maintain crystallinity by using the un-GaN layer with a thickness not greater than 100 A.
  • WO/99/046822 suggests a technology of recovering low crystallinity of the n-side contact layer 410, by forming the n-side contact layer 410 with a thickness of 3 ⁇ m at a doping concentration of 3 x 10 19 /cm 3 , and forming thereon the n-type nitride semiconductor layer 420 having the superlattice structure or multilayered structure.
  • the conventional light emitting device nothing but suggests an n-side contact layer having a single film or superlattice structure with an entire doping concentration not greater than 5 x 10 18 /cm 3 so as to increase the doping concentration of the n-side contact layer and maintain crystallinity.
  • PCT Publication No. WO/06/009372 conceptually suggests a doping method of an n-type nitride semiconductor layer which repeatedly stacks a GaN layer doped at a concentration of 1 x 10 21 /cm 3 , and an un-lnGaN layer with a thickness of 10 A to 200 A grown at a temperature of 800 0 C to 950 0 C. It does not mention anything about an n-side contact layer.
  • the present invention has been made to solve the above- described shortcomings occurring in the prior art, and an object of the present invention is to provide a Ill-nitride semiconductor light emitting device which can solve the foregoing problems.
  • Another object of the present invention is to provide a Ill-nitride semiconductor light emitting device which includes an n-type nitride semiconductor layer with a high concentration and high crystallinity.
  • Yet another object of the present invention is to provide a Ill-nitride semiconductor light emitting device which has a high doping concentration and high crystallinity by adjusting a thickness of an undoped n-type nitride semiconductor layer outside a range of a superlattice structure (over 100 A).
  • Yet another object of the present invention is to provide a Ill-nitride semiconductor light emitting device which improves ESD characteristic.
  • Yet another object of the present invention is to provide a Ill-nitride semiconductor light emitting device which introduces a nitride semiconductor layer over 100 A into an n-side contact layer to improve ESD characteristic.
  • Yet another object of the present invention is to provide a Ill-nitride semiconductor light emitting device which solves a current bottleneck phenomenon.
  • a Ill-nitride semiconductor light emitting device comprising: an active layer for generating light by recombination of electrons and holes; a p-type nitride semiconductor layer positioned on one side of the active layer; a first current spreading layer positioned on the other side of the active layer; and a second current spreading layer positioned between the first current spreading layer and the active layer, and comprising a plurality of first nitride semiconductor layers, each of the plurality of first nitride semiconductor layers having a thickness over 300 A.
  • the first current spreading layer functions to firstly spread current flowing from n-side electrode inside the light emitting device.
  • the first current spreading layer can have a doping concentration over 1 x 10 19 /cm 3 as a whole, by doing a part of the first current spreading layer is doped at a high concentration, for example, of 5 x 10 19 /cm 3 .
  • the plurality of first nitride semiconductor layers are not doped, but can be unintendedly or intendedly doped.
  • the plurality of first nitride semiconductor layers and undoped part of the first current spreading layer are doped over 1 x 10 18 /cm 3 , it is not easy to expect the effect of the present invention. [Advantageous Effects]
  • Ill-nitride semiconductor light emitting device of the present invention current spreading can be facilitated and ESD characteristic can be improved.
  • an n-type nitride semiconductor layer particularly, an n-side contact layer can be doped at a high concentration, while maintaining crystallinity.
  • a new doping method of approximating an n-side surface resistance to a p-side surface resistance (about 10 to 20 ⁇ per unit area, particularly, about 15 ⁇ ) can be employed, while maintaining crystallinity.
  • a doping method, a crystallinity recovering method and/or an ESD characteristic improving method in accordance with the present invention can be applied to a vertical structure Ill-nitride semiconductor light emitting device without departing from the technical ideas of the present invention.
  • FIG. 1 is a view illustrating one example of a conventional Ill-nitride semiconductor light emitting device.
  • FIG. 2 is an explanatory view illustrating a doping method of an n-type nitride semiconductor layer disclosed in US Patent 5,733,796.
  • FIG. 3 is an explanatory view illustrating a doping method of an n-type nitride semiconductor layer disclosed in PCT Publication No. WO/99/005728.
  • FIGS. 4 and 5 are explanatory views illustrating a doping method of an n-type nitride semiconductor layer disclosed in PCT Publication No. WO/99/046822.
  • FIG. 6 is a view illustrating an experiment example according to the present invention.
  • FIG. 7 is a view illustrating another experiment example according to the present invention.
  • FIG. 8 is a view illustrating a Ill-nitride semiconductor light emitting device according to the present invention.
  • FIG. 9 is a view illustrating another Ill-nitride semiconductor light emitting device according to the present invention.
  • FIG. 10 is a view illustrating another Ill-nitride semiconductor light emitting device according to the present invention.
  • FIGS. 11 and 12 are explanatory views illustrating a principle of improving ESD characteristic.
  • FIG. 13 is a view illustrating one example of an ESD characteristic measurement result according to the present invention.
  • FIG. 6 is a view illustrating an experiment example according to the present invention, particularly, a surface microscope photograph (left side) showing a state where an n-type nitride semiconductor layer with a thickness of about 2 ⁇ m was grown by repeatedly stacking an n-type GaN layer with a doping concentration of 5 x 10 19 /cm 3 (supplying 9.5 seem of DTBSi as Si source) and a thickness of 60 A and an un-GaN layer with a thickness of 100 A (by adjusting a supply time of Si source, e.g., supplying Si source for 15 seconds and stopping supply for 25 seconds), and a surface microscope photograph (right side) showing a state where an n-type nitride semiconductor layer was grown in a different condition by supplying 9.0 seem of DTBSi as Si source.
  • a surface microscope photograph showing a state where an n-type nitride semiconductor layer with a thickness of about 2 ⁇ m was grown by repeatedly stacking an n-type GaN layer with
  • an SiCVInGaN buffer layer was used as the buffer layer. That is, according to this experiment, in a case where crystallinity of an n-type GaN layer is extremely degraded due to a high doping concentration over 1 x 10 19 /cm 3 , even if an un-GaN layer not greater than 100 A existing within a superlattice structure range of the prior art is used as a recovery layer, entire crystallinity of an n-type nitride semiconductor layer cannot be ensured. Accordingly, although the prior art shown in FIG.
  • an n-type GaN layer below 100 A and an un-GaN layer below 100 A can be used, as a matter of fact, an n-type GaN layer with a doping concentration of 1 x 10 19 /cm 3 and a small thickness of 20 A is used, and a thin un-GaN layer of about 20 A is used to maintain an entire doping concentration of an n-side contact layer.
  • FIG. 7 is a view illustrating another experiment example according to the present invention, particularly, a surface microscope photograph showing a state where an n-type nitride semiconductor layer with a thickness of about 2 ⁇ m was grown by repeatedly stacking an n-type GaN layer with a doping concentration of 5 x 10 19 /cm 3 (supplying 9.5 seem of DTBSi as Si source) and a thickness of 60 A and an un-GaN layer with a thickness of 180 A.
  • an n-type GaN layer has a high doping concentration over 1 x 10 19 /cm 3
  • an un-GaN layer has a thickness over a certain value, it is possible to form a high concentration n-type nitride semiconductor layer without degrading crystallinity.
  • an un-GaN layer which is three times as thick as a doped n-type GaN layer (doping concentration of 5 x 10 19 /cm 3 ) is stacked, an n-type nitride semiconductor layer not only has an entire doping concentration of about 1.25 x 10 19 /cm 3 which is much higher than that of the prior art, but also maintains crystallinity.
  • n-type GaN layer existing within a superlattice range is doped over 1 x 10 19 /cm 3 (e.g., 5 x 10 19 /cm 3 )
  • Si is not just doped on the GaN layer, but the GaN layer and the SiN layer coexist.
  • an un-GaN layer below a predetermined thickness is formed on the n-type GaN layer, it is thought that the un-GaN layer is not formed on the SiN layer, thereby generating a lot of pits.
  • crystallinity thereof is seriously degraded.
  • the n-type GaN layer cannot be doped over a certain value.
  • the present inventors found out that, even if an n-type GaN layer was extremely doped, when a recovery layer over a certain thickness was formed to solve the defect, crystallinity of the entire stacked structure could be ensured and a doping concentration of the whole layer could be maintained higher.
  • the present invention suggests a new doping method of an n-type nitride semiconductor layer, and introduces a nitride semiconductor layer over 100 A into an n-side contact layer to recover crystallinity and improve ESD characteristic.
  • FIG. 8 is a view illustrating a Ill-nitride semiconductor light emitting device according to the present invention.
  • the Ill-nitride semiconductor light emitting device includes a substrate 100, a buffer layer 200 epitaxially grown on the substrate 100, an n-type nitride semiconductor layer 30 epitaxially grown on the buffer layer 200, an active layer 400 epitaxially grown on the n-type nitride semiconductor layer 30, a p-type nitride semiconductor layer 500 epitaxially grown on the active layer 400, a p-side electrode 600 formed on the p-type nitride semiconductor layer 500, a p-side bonding pad 700 formed on the p-side electrode 600, and an n-side electrode 800 formed on the n-type nitride semiconductor layer exposed by mesa-etching the p-type nitride semiconductor layer 500 and the active layer 400.
  • the light emitting device of FIG. 8 is identical in configuration to the conventional light emitting device of FIG. 1 except a structure of an n-type nitride semiconductor layer 30.
  • the n- type nitride semiconductor layer 30 is formed by alternately repeatedly stacking an n-type GaN layer 30a with a doping concentration over 1 x 10 19 /cm 3 and an un-GaN layer 30b with a thickness over 100 A.
  • the un-GaN layer 30b is introduced into an n-side contact layer through the n-type nitride semiconductor layer 30, ESD characteristic in the light emitting device can be improved, and an n-side surface resistance can be lowered to approximate to a p-side surface resistance (about 10 to 20 ⁇ per unit area), ensuring crystallinity.
  • the n-type nitride semiconductor layer 30 As the n-side contact layer, it preferably has a thickness over 1 ⁇ m in consideration of an etching process and a deposition process and for sufficient spreading of supplied current to the whole light emitting device.
  • the un-GaN layer 30b has a thickness over 100 A to be distinguished from the general superlattice structure.
  • the un-GaN layer 30b can be formed with a thickness of 180 A.
  • the un-GaN layer 30b must be sufficiently thick to overcome crystal defects generated on the n-type GaN layer 30a. If the un-GaN layer 30b is too thick, when the n-side electrode 800 is formed on the un-GaN layer 30b, an operation voltage may be excessively raised.
  • the thickness of the un-GaN layer 30b exists preferably between 100 A and 300 A, more preferably, between 150 A and 200 A.
  • the thickness of the un-GaN layer 30b can be changed according to the thickness and doping concentration of the n-type GaN layer 30a and the entire doping concentration of the n-type nitride semiconductor layer 30.
  • the doping concentration of the n-type GaN layer 30a needs to exceed 1 x 10 19 /cm 3 , so that the light emitting device can normally operate even though the n-side electrode 800 is formed on the un-GaN layer 30b, and the n-type nitride semiconductor layer 30 has a high concentration as a whole.
  • the upper limit may be different according to manufacturers. If the n-type GaN layer 30a has excessive crystal defects, it cannot be easily recovered by the un-GaN layer 30b. Therefore, preferably, the doping concentration is not great than 1 x 10 21 /cm 3 .
  • the doping concentration ranges from 3 x 10 19 /cm 3 to 6 x 10 19 /cm 3 to decrease the thickness of the un-GaN layer 30b and to increase the entire doping concentration of the n-type nitride semiconductor layer 30. This value can be changed according to the thickness of the n-type GaN layer 30a and the entire doping concentration of the n-type nitride semiconductor layer 30.
  • the thickness of the n-type GaN layer 30a is preferably over 20 A so that the n-type GaN layer 30a can sufficiently contain Si. If the n-type GaN layer 30a is excessively thick, it is difficult to recover crystal unity. Accordingly, the thickness of the n-type GaN layer 30a is preferably not greater than 150 A, more preferably, not greater than 100 A. In consideration of both aspects, more preferably, the n-type GaN layer 30a has a thickness of 50 A to 80 A.
  • the stacking period number of the n-type GaN layer 30a and the un- GaN layer 30b is determined according to the entire layer thickness (generally, about 2 to 4 ⁇ m) of the n-type nitride semiconductor layer 30.
  • the entire layer thickness generally, about 2 to 4 ⁇ m
  • 100 periods are required.
  • ten or more un-GaN layers 30b are necessary to form a light emitting device according to the present invention.
  • an InGaN layer may be used instead of the un-GaN layer 30b.
  • INGaN there are several problems in growing INGaN. For example, it is necessary to lower growth temperature. However, it can be considered to dope In on the un-GaN layer 30b.
  • the un-GaN layer 30b can be doped unintendedly or intendedly.
  • 'Unintended doping' means that Si can be introduced from the n- type GaN layer 30a
  • 'Intended doping' means that Si can be doped to improve the entire doping concentration of the n-type nitride semiconductor layer 30 as far as the un-GaN layer 30b functions as a crystal recovering layer of the n-type GaN layer 30a and an ESD characteristic improving layer.
  • a dopant needs not to be limited to Si.
  • the n-type GaN layer 30a and the un-GaN layer 30b do not essentially have the same doping concentration and thickness in the stacked structure.
  • the stacked structure of the n-type nitride semiconductor layer 30 may start from the n-type GaN layer 30a or the un-GaN layer 30b, but preferably ends in the un-GaN layer 30b.
  • FIG. 9 is a view illustrating another Ill-nitride semiconductor light emitting device according to the present invention.
  • the Ill-nitride semiconductor light emitting device includes a substrate 100, a buffer layer 200 epitaxially grown on the substrate 100, an n-type nitride semiconductor layer 30 epitaxially grown on the buffer layer 200, an active layer 400 epitaxially grown on the n-type nitride semiconductor layer 30, a p-type nitride semiconductor layer 500 epitaxially grown on the active layer 400, a p-side electrode 600 formed on the p-type nitride semiconductor layer 500, a p-side bonding pad 700 formed on the p-side electrode 600, and an n-side electrode 800 formed on the n-type nitride semiconductor layer exposed by mesa-etching the p-type nitride semiconductor layer 500 and the active layer 400.
  • the light emitting device of FIG. 9 includes a second n-type nitride semiconductor layer 31 between the n-type nitride semiconductor layer 30 and the active layer 400.
  • the second n-type nitride semiconductor layer 31 serves to spread current to the entire light emitting device and improve ESD characteristic.
  • the second n-type nitride semiconductor layer 31 serves to protect the active layer 400 from the nitride semiconductor layer 30 doped at a high concentration (e.g., 1.25 x 10 19 /cm 3 ).
  • the second n-type nitride semiconductor layer 31 has a repeated stacked structure of an n-type GaN layer 31a and an un-GaN layer 31b.
  • the n-type GaN layer 31a can be formed to be identical to or similar to an n-type GaN layer 30a.
  • the un-GaN layer 31b is formed as thick as possible to spread current, recover crystals and improve ESD characteristic. Since the un-GaN layer 31b does not have any limitation due to formation of the n-side electrode 800, it can be formed thick. However, if the un-GaN layer 31b is excessively thick, a resistance increases to raise an operation voltage.
  • the un-GaN layer 31b preferably has a thickness of 300 A to 2000 A, more preferably, 800 A to 1500 A.
  • the second n-type nitride semiconductor layer 31 can be formed at a thickness of 0.4 ⁇ m by repeatedly stacking an n- type GaN layer 31a with a doping concentration of 4 x 10 19 /cm 3 and a thickness of 60 A and an un-GaN layer 31b with a thickness of 1200 A.
  • FIG. 10 is a view illustrating another Ill-nitride semiconductor light emitting device according to the present invention.
  • the Ill-nitride semiconductor light emitting device includes a substrate 100, a buffer layer 200 epitaxially grown on the substrate 100, an n-type nitride semiconductor layer 300 epitaxially grown on the buffer layer 200, an active layer 400 epitaxially grown on the n-type nitride semiconductor layer 300, a p-type nitride semiconductor layer 500 epitaxially grown on the active layer 400, a p-side electrode 600 formed on the p-type nitride semiconductor layer 500, a p-side bonding pad 700 formed on the p-side electrode 600, and an n-side electrode 800 formed on the n-type nitride semiconductor layer exposed by mesa-etching the p-type nitride semiconductor layer 500 and the active layer 400.
  • the light emitting device of FIG. 10 includes a second n-type nitride semiconductor layer 31 between the n-type nitride semiconductor layer 300 and the active layer 400, and includes a general n-type nitride semiconductor layer 300 which is a single film, instead of the n-type nitride semiconductor layer 30.
  • a conventional light emitting device can include a thick un-GaN layer or an n-GaN layer doped at a low concentration between an n-type nitride semiconductor layer 300 and an active layer 400.
  • supply efficiency of electrons supplied to the active layer is reduced due to a potential barrier (indicated by a dotted circle) caused by hetero-junction of the active layer and the un-GaN layer or the n-GaN layer with a low doping concentration.
  • the entire second n-type nitride semiconductor layer 31 has high crystallinity and a high concentration. As shown in a dotted circle of FIG. 12, a potential barrier is lowered to prevent rise of an operation voltage. In addition, the un-GaN layer 31b serves to spread current, thereby improving ESD characteristic.
  • FIG. 13 is a view illustrating one example of an ESD characteristic measurement result according to the present invention.
  • 34 devices were sampled in a wafer, 1 kV (Human body model, Noiseken series) was applied thereto in a backward direction, and leakage parameters Vr and Ir were measured before and after the application, to judge an electrostatic characteristic.
  • 1 kV Human body model, Noiseken series
  • an InGaN/SiC buffer layer was formed on a sapphire substrate, 2 ⁇ m of un-GaN layer was formed thereon, an n-type GaN layer with a doping concentration of 5 x 10 18 /cm 3 and a thickness of 2 ⁇ m as an n-side contact layer, an n-GaN layer with a doping concentration of 1 x 1O 17 7cm 3 and a thickness of 0.4 ⁇ m, and an n-GaN layer with a doping concentration of 2 x 10 18 /cm 3 and a thickness of 0.02 ⁇ m were formed, and an active layer of MQW structure and a p-type GaN layer were formed thereon.
  • 2 ⁇ m of n-side contact layer was formed by alternately stacking an n-type GaN layer with a doping concentration of 5 x 10 18 /cm 3 and a thickness of 60 A and an un-GaN layer with a thickness of 180 A
  • 0.4 ⁇ m of second n-type nitride semiconductor layer was formed by alternately stacking an n-type GaN layer with a doping concentration of 4 x 10 19 /cm 3 and a thickness of 60 A and an un-GaN layer with a thickness of 1200 A.
  • a growth speed of the GaN layer was about 6 A/s, and DTBSi was supplied for 10 seconds at 9.5 seem and stopped for 30 seconds to form the n- side contact layer, and supplied for 10 seconds and stopped for 200 seconds to form the second n-type nitride semiconductor layer.
  • a growth temperature was 1050 0 C, H 2 was used as a carrier gas, TMGa was used as Ga source, and NH 3 was used as N source.
  • the comparative example includes the n-GaN layer on the n--GaN layer, it shows a yield below 40 %.
  • the present invention shows an excellent effect, i.e., a yield over 80 %.

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Abstract

La présente invention concerne un dispositif électroluminescent à semi-conducteurs de nitrure III et, plus particulièrement, un dispositif électroluminescent à semi-conducteurs de nitrure III pouvant faciliter l'étalement du courant et améliorer la décharge électrostatique par formation d'une couche GaN non dopée d'une épaisseur supérieure à 300 A dans une couche de contact du côté n.
PCT/KR2008/005395 2007-10-02 2008-09-11 Dispositif électroluminescent à semi-conducteurs de nitrure iii WO2009045005A2 (fr)

Applications Claiming Priority (4)

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KR10-2007-0099397 2007-10-02
KR1020070099407A KR20090034169A (ko) 2007-10-02 2007-10-02 3족 질화물 반도체 발광소자
KR10-2007-0099407 2007-10-02
KR1020070099397A KR20090034163A (ko) 2007-10-02 2007-10-02 3족 질화물 반도체 발광소자

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WO2011080249A1 (fr) * 2009-12-30 2011-07-07 Osram Opto Semiconductors Gmbh Puce à semi-conducteurs luminescente
DE102013104272A1 (de) * 2013-04-26 2014-10-30 Osram Opto Semiconductors Gmbh Optoelektronisches Bauelement und Verfahren zu seiner Herstellung

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US6153894A (en) * 1998-11-12 2000-11-28 Showa Denko Kabushiki Kaisha Group-III nitride semiconductor light-emitting device
US20050127394A1 (en) * 1997-01-09 2005-06-16 Nichia Chemical Industries, Ltd. Nitride semiconductor device
JP2005197293A (ja) * 2003-12-26 2005-07-21 Toyoda Gosei Co Ltd Ｉｉｉ族窒化物系化合物半導体発光素子及びその製造方法
US20070131953A1 (en) * 2005-12-13 2007-06-14 Lg Innotek Co., Ltd Nitride semiconductor light emitting device and method for fabricating the same

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US20050127394A1 (en) * 1997-01-09 2005-06-16 Nichia Chemical Industries, Ltd. Nitride semiconductor device
US6153894A (en) * 1998-11-12 2000-11-28 Showa Denko Kabushiki Kaisha Group-III nitride semiconductor light-emitting device
JP2005197293A (ja) * 2003-12-26 2005-07-21 Toyoda Gosei Co Ltd Ｉｉｉ族窒化物系化合物半導体発光素子及びその製造方法
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WO2011080249A1 (fr) * 2009-12-30 2011-07-07 Osram Opto Semiconductors Gmbh Puce à semi-conducteurs luminescente
CN102687290A (zh) * 2009-12-30 2012-09-19 欧司朗光电半导体有限公司 发光半导体芯片
US9012885B2 (en) 2009-12-30 2015-04-21 Osram Opto Semiconductors Gmbh Light-emitting semiconductor chip
CN102687290B (zh) * 2009-12-30 2016-08-17 欧司朗光电半导体有限公司 发光半导体芯片
US9530931B2 (en) 2009-12-30 2016-12-27 Osram Opto Semiconductors Gmbh Light-emitting semiconductor chip
US9799797B2 (en) 2009-12-30 2017-10-24 Osram Opto Semiconductors Gmbh Light-emitting semiconductor chip
US10388828B2 (en) 2009-12-30 2019-08-20 Osram Opto Semiconductors Gmbh Light-emitting semiconductor chip
DE102013104272A1 (de) * 2013-04-26 2014-10-30 Osram Opto Semiconductors Gmbh Optoelektronisches Bauelement und Verfahren zu seiner Herstellung
US9680052B2 (en) 2013-04-26 2017-06-13 Osram Opto Semiconductors Gmbh Optoelectronic gan-based component having increased ESD resistance via a superlattice and method for the production thereof

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