WO2009027888A2 - Structure apte au brasage - Google Patents

Structure apte au brasage Download PDF

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Publication number
WO2009027888A2
WO2009027888A2 PCT/IB2008/053189 IB2008053189W WO2009027888A2 WO 2009027888 A2 WO2009027888 A2 WO 2009027888A2 IB 2008053189 W IB2008053189 W IB 2008053189W WO 2009027888 A2 WO2009027888 A2 WO 2009027888A2
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WO
WIPO (PCT)
Prior art keywords
layer
electrically conductive
solder ball
conductive layers
wafer
Prior art date
Application number
PCT/IB2008/053189
Other languages
English (en)
Other versions
WO2009027888A3 (fr
Inventor
Michael Rother
Thomas Popp
Original Assignee
Nxp B.V.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp B.V. filed Critical Nxp B.V.
Publication of WO2009027888A2 publication Critical patent/WO2009027888A2/fr
Publication of WO2009027888A3 publication Critical patent/WO2009027888A3/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24—Selection of soldering or welding materials proper
    • B23K35/26—Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B23K35/262—Sn as the principal constituent
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
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    • H05K3/3457—Solder materials or compositions; Methods of application thereof
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Definitions

  • the present invention relates to the field of solderable structures, especially to the field of under bump metallization (UBM).
  • UBM under bump metallization
  • solderable structures of the state of the art like UBM metal stacks need a final copper layer, which causes higher costs and is time-consuming in production. Further, an additional Cu layer introduces mechanical tensions to the metal stack. Thus, there may be a need for a solderable structure and a method for producing a solderable structure, which solve the above-mentioned problems of the state of the art.
  • solderable structure comprising at least one wafer, a stack of a plurality of electrically conductive layers, wherein one lowermost electrically conductive layer out of the plurality of electrically conductive layers is arranged on the wafer and at least one solder ball which is arranged on an uppermost layer of the plurality of electrically conductive layers, wherein the solder ball comprises Sn, Ag and Cu and wherein the Cu content of the solder ball lies between 0,5 and 3 weight percent.
  • solderable structure may relate to a structure, especially an electronic structure or component, which can e.g. be soldered on a printed circuit board or any other electronic component. A solder process can therein be executed by bump soldering.
  • Wafer may relate to a structure on which a stack of a plurality of electrically conductive layers can be deposited, e.g. Al, Ni or Ti.
  • a wafer can for example be a silicon wafer (Si- wafer).
  • a stack of a plurality of electrically conductive layers may relate to that several electrically conductive layers, e.g. metallic layers, can be deposited one layer after the other layer on the wafer in form of a stack.
  • the electrically conductive layers can also be polymeric electrically conductive layer.
  • an Al layer can directly be arranged or deposited on the wafer.
  • a next electrically conductive layer Ti can be arranged or deposited on the Al layer.
  • a Ni layer can be arranged or deposited on the Ti layer.
  • “Arranged on the wafer” may relate to that for example an Al layer is directly arranged on the surface of the wafer, i.e. no further layer is arranged between the Al layer and the wafer. Further, out of the plurality of electrically conductive layers a Ti layer is arranged on the Al layer and a Ni layer is e.g. arranged on the Ti layer. However, it is also possible that an additional electrically conductive layer is arranged between the Al layer and wafer.
  • solder ball may relate to a solder structure, e.g. in the form of a sphere or a semi-sphere.
  • the solderable structure with the solder ball can e.g. be soldered as an SMD package (surface mounted device) on a printed circuit board.
  • SMD package can be used e.g. in cellular phones.
  • Arrowd on an uppermost layer of the plurality of electrically conductive layers may relate to that the solder ball is arranged on the outer surface of the plurality of electrically conductive layers. Therein the surface of the uppermost layer is directed into an environment where at a later moment a printed circuit board can be soldered by means of the solder ball to the solderable structure.
  • the uppermost layer has due to an UBM architecture a form which allows an easy attachment, arrangement or deposition of the solder ball on the uppermost layer, as will be explained later on.
  • solder ball consists of tin (Sn), silver
  • solder ball (Ag ) and copper (Cu), wherein the content of copper of the total weight of the solder ball lies between 0,5 and 3 weight percent.
  • any other interval of content of Cu in the solder ball e.g. 0,8 to 2 weight percent or preferably 1,0 to 1,5 weight percent is possible.
  • the preferred content of copper in the solder ball is dependent on the balanced properties of the Ni-Cu-Ag intermetallic compound (IMC). Depending on the amount of copper which is added to the solder ball, the amount of Ni in the IMC is changing. As a consequence, because of the changing amount of Ni in the IMC also the mechanical properties can change within so-called ,,lifetime"-tests.
  • IMC Ni-Cu-Ag intermetallic compound
  • solder ball can also comprise a mixture of Ni, Cu and Indium (In).
  • the element Ag in the solder ball can have influence to the soldering properties and mechanical properties of the solder ball.
  • the advantage can be achieved that no additional Cu layer has to be sputtered, patterned or formed at the uppermost layer of the plurality of electrically conductive layers, i.e. for example on the Ni layer.
  • the solder ball has a Cu content of 1 ,2 weight percent.
  • a Cu content of 1,2 weight percent may relate to that 1,2 percent of the total weight of the solder ball contain copper.
  • the rest, 98,8 weight percent contain Sn or a mixture of other materials which are suitable for a sold.
  • the advantage may be achieved that if the solder ball is arranged on a Ni layer of the uppermost layer of the plurality of electrically conductive layers no diffusion / alloying of the Ni into the solder ball takes place or appears since a so-called
  • the plurality of electrically conductive layers is arranged in an UBM (Under Bump Metallisation) structure.
  • Under Bump Metallisation may relate to a structure with a certain architecture, as described in the description to Fig. 1, wherein e.g. an Al layer is arranged on a wafer, on the Al layer is formed a Ti layer and on the Ti layer a Ni layer is formed.
  • the uppermost surface of the Ni layer therein has an architecture which allows to arrange or attach the solder ball in an easy way on the Ni layer.
  • the lowermost layer of the plurality of electrical conductive layers comprises Al.
  • a conductive layer is provided.
  • a WTi layer can be arranged between the Al layer and the wafer in order to prevent so-called "Al-spiking" at pn-junctions.
  • the uppermost layer of the plurality of electrically conductive layers comprises Ni.
  • the uppermost layer of the plurality of electrically conductive layers comprises additionally to Ni also other electrically conductive layers.
  • the uppermost layer of the plurality of electrically conductive layers consists of Ni.
  • the uppermost layer has only Ni as electrically conductive layer and essentially no further electrically conductive material.
  • the usage of an uppermost layer which consists only of Ni is possible as the solder ball already comprises Cu. Thus no additional layer of Cu on the Ni layer or mixture of Ni and Cu in the uppermost layer is necessary.
  • a Ti layer is arranged between the Al and Ni layer.
  • Ti may serve as an adhesion promoter between the Al and Ni layer.
  • a method for producing a solderable structure comprising the steps of arranging a stack of a plurality of electrically conductive layers on a wafer, arranging a solder ball on top of the plurality of electrically conductive layers, wherein the solder ball comprises Sn and Cu, and wherein the Cu content lies between 0,5 and 3 weight percent.
  • “Arranging a stack of a plurality of electrically conductive layers on a wafer” may relate to that in a first step a first electrically conductive layer, e.g. Al is arranged or deposited on the wafer of the solderable structure.
  • a first electrically conductive layer e.g. Al is arranged or deposited on the wafer of the solderable structure.
  • a further electrically conductive layer e.g. Ti is arranged or deposited on the Al layer.
  • a further electrically conductive layer e.g. Ni is arranged or deposited on the Ti layer.
  • the different electrically conductive layers can be arranged on the wafer in a UBM structure or architecture such that in a further step a solder ball can be easily arranged or attached on the uppermost layer of the Ni layer.
  • "Arranging a solder ball on top of the plurality of electrically conductive layers” may relate to that a solder ball is arranged e.g. on the uppermost layer of the Ni layer.
  • an eutectical intermetallic compound can be formed between the solder ball and the Ni layer, such that no excessive consumption between the solder ball and the Ni layer appears.
  • the advantage can be achieved that the Ni layer can be produced with a small thickness and mechanical stability thereby avoiding mechanical stresses.
  • the plurality of electrically conductive layers is deposited on the wafer using a sputtering technique.
  • Sputtering technique is related e.g. to a physical vapor deposition (PVD) process, wherein atoms or particles in a solid target material are ejected into the gas phase due to bombardment of the material by energetic ions. It is commonly used for thin- film deposition as well as analytical techniques. Thus, with a sputtering technique a precise film-thickness of the electrically conductive layers can be achieved.
  • PVD physical vapor deposition
  • the advantage can be achieved that no additional Cu layer has to be formed at the uppermost layer of the plurality of electrically conductive layers, e.g. on the Ni layer.
  • an uppermost layer of Ni can be reduced in its thickness.
  • lower mechanical stresses or tensions a longer lifetime and a more cost-effective solderable structure can be achieved.
  • a mechanical Cu-Sn-Ag-Ni phase during the solder process in form of an intermetalic compound can be achieved.
  • Fig. 1 shows a schematic diagram of the solderable structure according to the invention. The illustration in the drawings is schematically.
  • FIG. 1 shows a schematic diagram of the solderable structure 100 according to the invention.
  • the solderable structure 100 comprises a wafer 10, a plurality of electrically conductive layers 20, 21 and 22 and a solder ball 30.
  • the plurality of electrically conductive layers 20, 21, 22 is deposited by means of a sputtering technique on the wafer 10, wherein in this embodiment as a first layer an Al layer 20 is directly deposited on the wafer 10.
  • a Ti layer 21 is deposited on the Al layer 20.
  • a Ni layer 22 is deposited on the Ti layer 21.
  • the different electrically conductive layers 20, 21, 22 are arranged in a so-called UBM (Under Bump Metallisation) structure or architecture.
  • UBM Under Bump Metallisation
  • the uppermost Ni layer 22 has a specific form of a rectangular recess, such that the solder ball 30 can easily be arranged on the Ni layer.
  • solder ball 30 comprises Cu, Ag and Sn, wherein the Cu content of the solder ball 30 has 1,2 weight-%.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

L'invention concerne une structure apte au brasage, qui comprend au moins une plaquette, un empilement de plusieurs couches électroconductrices dont celle occupant la base de l'empilement est disposée sur la plaquette; et au moins un globule de soudure disposé sur une couche électroconductrice supérieure. Le globule de soudure comprend Sn, Ag et Cu, sa teneur en Cu étant comprise entre 0,5 et 3 % en poids. L'invention concerne également un procédé de production d'une structure apte au brasage, qui consiste à disposer un empilement de plusieurs couches électroconductrices sur une plaquette, et à placer sur une couche électroconductrice supérieure un globule de soudure dont la teneur en Cu est comprise entre 0,5 et 3 % en poids.
PCT/IB2008/053189 2007-08-24 2008-08-08 Structure apte au brasage WO2009027888A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP07114902.5 2007-08-24
EP07114902 2007-08-24

Publications (2)

Publication Number Publication Date
WO2009027888A2 true WO2009027888A2 (fr) 2009-03-05
WO2009027888A3 WO2009027888A3 (fr) 2009-04-30

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WO (1) WO2009027888A2 (fr)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3663184A (en) * 1970-01-23 1972-05-16 Fairchild Camera Instr Co Solder bump metallization system using a titanium-nickel barrier layer
JPH10294318A (ja) * 1997-04-18 1998-11-04 Toshiba Corp 電子部品
FR2775387A1 (fr) * 1998-02-26 1999-08-27 Mitsubishi Electric Corp Dispositif a semiconducteur ayant une structure soi et procede de fabrication
EP1223613A2 (fr) * 2001-01-15 2002-07-17 Nec Corporation Structure d'électrodes d'un dispositif semiconducteur, ainsi que procédé et appareillage de fabrication
US20030132271A1 (en) * 2001-12-28 2003-07-17 Cheng-Heng Kao Method for controlling the formation of intermetallic compounds in solder joints
EP1760783A2 (fr) * 2005-08-31 2007-03-07 Hitachi, Ltd. Dispositif semiconducteur et générateur AC pour véhicules automobiles
US20070075430A1 (en) * 2005-09-30 2007-04-05 Daewoong Suh Solder joint intermetallic compounds with improved ductility and toughness
US20070158391A1 (en) * 2006-01-12 2007-07-12 Yoon-Chul Son Method for joining electronic parts finished with nickel and electronic parts finished with electroless nickel

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3663184A (en) * 1970-01-23 1972-05-16 Fairchild Camera Instr Co Solder bump metallization system using a titanium-nickel barrier layer
JPH10294318A (ja) * 1997-04-18 1998-11-04 Toshiba Corp 電子部品
FR2775387A1 (fr) * 1998-02-26 1999-08-27 Mitsubishi Electric Corp Dispositif a semiconducteur ayant une structure soi et procede de fabrication
EP1223613A2 (fr) * 2001-01-15 2002-07-17 Nec Corporation Structure d'électrodes d'un dispositif semiconducteur, ainsi que procédé et appareillage de fabrication
US20030132271A1 (en) * 2001-12-28 2003-07-17 Cheng-Heng Kao Method for controlling the formation of intermetallic compounds in solder joints
EP1760783A2 (fr) * 2005-08-31 2007-03-07 Hitachi, Ltd. Dispositif semiconducteur et générateur AC pour véhicules automobiles
US20070075430A1 (en) * 2005-09-30 2007-04-05 Daewoong Suh Solder joint intermetallic compounds with improved ductility and toughness
US20070158391A1 (en) * 2006-01-12 2007-07-12 Yoon-Chul Son Method for joining electronic parts finished with nickel and electronic parts finished with electroless nickel

Also Published As

Publication number Publication date
WO2009027888A3 (fr) 2009-04-30

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