WO2009010457A3 - Fentes d'extension destinées à réduire les contraintes thermomécaniques d'une connexion électrique - Google Patents

Fentes d'extension destinées à réduire les contraintes thermomécaniques d'une connexion électrique Download PDF

Info

Publication number
WO2009010457A3
WO2009010457A3 PCT/EP2008/059058 EP2008059058W WO2009010457A3 WO 2009010457 A3 WO2009010457 A3 WO 2009010457A3 EP 2008059058 W EP2008059058 W EP 2008059058W WO 2009010457 A3 WO2009010457 A3 WO 2009010457A3
Authority
WO
WIPO (PCT)
Prior art keywords
thermomechanical
relief
expansion slots
electrical contact
insulation foil
Prior art date
Application number
PCT/EP2008/059058
Other languages
German (de)
English (en)
Other versions
WO2009010457A2 (fr
Inventor
Herbert Schwarzbauer
Original Assignee
Siemens Ag
Herbert Schwarzbauer
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag, Herbert Schwarzbauer filed Critical Siemens Ag
Publication of WO2009010457A2 publication Critical patent/WO2009010457A2/fr
Publication of WO2009010457A3 publication Critical patent/WO2009010457A3/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H01L23/49844—Geometry or layout for devices being provided for in H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/2405—Shape
    • H01L2224/24051—Conformal with the semiconductor or solid-state device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241—Disposition
    • H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/24226—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0102—Calcium [Ca]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01074—Tungsten [W]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Structure Of Printed Boards (AREA)
  • Multi-Conductor Connections (AREA)

Abstract

Selon l'invention, pour réduire les contraintes thermomécaniques exercées sur un empilement de couches comprenant un film d'isolement et une piste conductrice superficielle, des fentes d'extension allongées sont ménagées dans la piste conductrice à proximité des connexions transversales à travers le film d'isolement.
PCT/EP2008/059058 2007-07-18 2008-07-11 Fentes d'extension destinées à réduire les contraintes thermomécaniques d'une connexion électrique WO2009010457A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102007033465A DE102007033465A1 (de) 2007-07-18 2007-07-18 Dehnschlitze zur thermomechanischen Entlastung einer elektrischen Kontaktierung
DE102007033465.8 2007-07-18

Publications (2)

Publication Number Publication Date
WO2009010457A2 WO2009010457A2 (fr) 2009-01-22
WO2009010457A3 true WO2009010457A3 (fr) 2009-04-30

Family

ID=40101316

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2008/059058 WO2009010457A2 (fr) 2007-07-18 2008-07-11 Fentes d'extension destinées à réduire les contraintes thermomécaniques d'une connexion électrique

Country Status (2)

Country Link
DE (1) DE102007033465A1 (fr)
WO (1) WO2009010457A2 (fr)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5216280A (en) * 1989-12-02 1993-06-01 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device having pads at periphery of semiconductor chip
DE4228274A1 (de) * 1992-08-26 1994-03-03 Siemens Ag Verfahren zur Kontaktierung von auf einem Träger angeordneten elektronischen oder optoelektronischen Bauelementen
EP0880179A2 (fr) * 1997-05-20 1998-11-25 Fujitsu Limited Configuration d'ouvertures d'échappement pour structures conducteur-dielectrique multicouches
US6483714B1 (en) * 1999-02-24 2002-11-19 Kyocera Corporation Multilayered wiring board
WO2003030247A2 (fr) * 2001-09-28 2003-04-10 Siemens Aktiengesellschaft Procede d'etablissement de contact pour des surfaces de contact electriques situees sur un substrat et dispositif constitue d'un substrat pourvu de surfaces de contact electriques

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6127727A (en) * 1998-04-06 2000-10-03 Delco Electronics Corp. Semiconductor substrate subassembly with alignment and stress relief features
US6593527B1 (en) * 2002-04-17 2003-07-15 Delphi Technologies, Inc. Integrated circuit assembly with bar bond attachment
US7038308B2 (en) * 2004-08-17 2006-05-02 Delphi Technologies, Inc. Multi-path bar bond connector for an integrated circuit assembly

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5216280A (en) * 1989-12-02 1993-06-01 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device having pads at periphery of semiconductor chip
DE4228274A1 (de) * 1992-08-26 1994-03-03 Siemens Ag Verfahren zur Kontaktierung von auf einem Träger angeordneten elektronischen oder optoelektronischen Bauelementen
EP0880179A2 (fr) * 1997-05-20 1998-11-25 Fujitsu Limited Configuration d'ouvertures d'échappement pour structures conducteur-dielectrique multicouches
US6483714B1 (en) * 1999-02-24 2002-11-19 Kyocera Corporation Multilayered wiring board
WO2003030247A2 (fr) * 2001-09-28 2003-04-10 Siemens Aktiengesellschaft Procede d'etablissement de contact pour des surfaces de contact electriques situees sur un substrat et dispositif constitue d'un substrat pourvu de surfaces de contact electriques

Also Published As

Publication number Publication date
DE102007033465A1 (de) 2009-01-22
WO2009010457A2 (fr) 2009-01-22

Similar Documents

Publication Publication Date Title
WO2011043869A3 (fr) Dispositif à semi-conducteur doté d'une fiche de cuivre
WO2009134689A3 (fr) Encapsulation sous film métallique robuste
WO2011056668A3 (fr) Procédé additif à isolation électrique de puce sélectif
WO2010062512A3 (fr) Structure de plafond spécifique et grille de plafond fonctionnelle
GB2452002B (en) Electrical connecter having staggered contacts
WO2011097089A3 (fr) Substrats semi-conducteurs en creux
SG155152A1 (en) Integrated circuit system employing resistance altering techniques
CL2009001270A1 (es) Electrodo que comprende miembro conductor, 1a capa conductora de compuesto en fase cristalina sobre y en comunicacion electrica con miembro conductor y 2a capa conductora del compuesto en fase amorfa sobre 1a capa en comunicacion electrica con esta y el miembro conductor; metodo para hacer electrodo; y circuito de electrolito.
ZA201004425B (en) Systems and method for conducting multiplexed electrical impedance tomograpy
IT1392658B1 (it) Modulo di connessione con corpo in materiale isolante per conduttori elettrici.
WO2012005851A3 (fr) Structures stratifiées électriquement conductrices, interconnexions électriques, et procédé de formation d'interconnexions électriques
WO2009143249A3 (fr) Électrode de mise à la masse
WO2011083271A3 (fr) Capteur tactile multicontacts a resistance de contact electrique elevee
WO2011034642A3 (fr) Structure de ruban avec face extérieure conductrice et côté intérieur électriquement isolant
WO2009131335A3 (fr) Dispositif électroluminescent à semiconducteur
ATE515809T1 (de) Leiterplatte und brennstoffzelle
WO2008135040A3 (fr) Dispositif de détection
WO2010112188A3 (fr) Élément d'isolation pour la réalisation d'un système d'isolation thermique, système d'isolation thermique et enveloppe de bâtiment comportant un système d'isolation thermique
WO2010078340A3 (fr) Dispositifs à semi-conducteurs comprenant des structures à deux grilles et procédés de formation de tels dispositifs à semi-conducteurs
HK1142166A1 (en) Electric lead sheathed by foamed polyurethane
WO2011151098A3 (fr) Composant comportant un contact traversant et son procédé de fabrication
WO2007102998A3 (fr) Structures de garde empilées
TW200739812A (en) Contact formation
WO2008030459A3 (fr) Douille électrique isolée et procédé de fabrication de ladite douille
WO2011054544A8 (fr) Cellule électroénergétique et unité électroénergétique

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08786058

Country of ref document: EP

Kind code of ref document: A2

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 08786058

Country of ref document: EP

Kind code of ref document: A2