WO2008136311A1 - 不揮発性記憶装置、並びにその動作方法及び製造方法 - Google Patents

不揮発性記憶装置、並びにその動作方法及び製造方法 Download PDF

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Publication number
WO2008136311A1
WO2008136311A1 PCT/JP2008/057760 JP2008057760W WO2008136311A1 WO 2008136311 A1 WO2008136311 A1 WO 2008136311A1 JP 2008057760 W JP2008057760 W JP 2008057760W WO 2008136311 A1 WO2008136311 A1 WO 2008136311A1
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WO
WIPO (PCT)
Prior art keywords
storage device
nonvolatile storage
region
manufacturing
operating
Prior art date
Application number
PCT/JP2008/057760
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English (en)
French (fr)
Inventor
Yukihide Tsuji
Original Assignee
Nec Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corporation filed Critical Nec Corporation
Priority to JP2009512937A priority Critical patent/JPWO2008136311A1/ja
Publication of WO2008136311A1 publication Critical patent/WO2008136311A1/ja

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40117—Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/4234—Gate electrodes for transistors with charge trapping gate insulator
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
    • H01L29/7923—Programmable transistors with more than two possible different levels of programmation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

　トラップ型メモリにおいて、チャネル界面を劣化させることなく、低電圧で、かつ電子及びホールの注入位置を高度に制御しながら書き込み・消去ができる不揮発性記憶装置とその製造方法を提供する。 　本発明の不揮発性記憶装置は、半導体基板（３）上に形成されたソース領域（１）とドレイン領域（２）と、ソース領域（１）上の領域からドレイン領域（２）上の領域まで形成されたトラップを有する積層膜（１２）と、積層膜（１２）の上に形成されたゲート電極（１３）を少なくとも含み、ゲート電極（１３）は、３つの拡散領域からなるｐｎｐ構造又はｎｐｎ構造から構成される。
PCT/JP2008/057760 2007-04-27 2008-04-22 不揮発性記憶装置、並びにその動作方法及び製造方法 WO2008136311A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009512937A JPWO2008136311A1 (ja) 2007-04-27 2008-04-22 不揮発性記憶装置、並びにその動作方法及び製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-118309 2007-04-27
JP2007118309 2007-04-27

Publications (1)

Publication Number Publication Date
WO2008136311A1 true WO2008136311A1 (ja) 2008-11-13

Family

ID=39943423

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/057760 WO2008136311A1 (ja) 2007-04-27 2008-04-22 不揮発性記憶装置、並びにその動作方法及び製造方法

Country Status (2)

Country Link
JP (1) JPWO2008136311A1 (ja)
WO (1) WO2008136311A1 (ja)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5081689A (ja) * 1973-11-20 1975-07-02
JPH06151833A (ja) * 1992-11-16 1994-05-31 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP2000208649A (ja) * 1999-01-07 2000-07-28 Internatl Business Mach Corp <Ibm> シリコン・オン・インシュレ―タ不揮発性ランダム・アクセス・メモリ・デバイス
JP2005294797A (ja) * 2004-04-01 2005-10-20 Macronix Internatl Co Ltd 集積回路用メモリアーキテクチャ、集積回路の製造方法、及び集積回路の作動方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5081689A (ja) * 1973-11-20 1975-07-02
JPH06151833A (ja) * 1992-11-16 1994-05-31 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP2000208649A (ja) * 1999-01-07 2000-07-28 Internatl Business Mach Corp <Ibm> シリコン・オン・インシュレ―タ不揮発性ランダム・アクセス・メモリ・デバイス
JP2005294797A (ja) * 2004-04-01 2005-10-20 Macronix Internatl Co Ltd 集積回路用メモリアーキテクチャ、集積回路の製造方法、及び集積回路の作動方法

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JPWO2008136311A1 (ja) 2010-07-29

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