WO2008074666A1 - Convertisseur de tension et procédé de multiplication de tension - Google Patents

Convertisseur de tension et procédé de multiplication de tension Download PDF

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Publication number
WO2008074666A1
WO2008074666A1 PCT/EP2007/063530 EP2007063530W WO2008074666A1 WO 2008074666 A1 WO2008074666 A1 WO 2008074666A1 EP 2007063530 W EP2007063530 W EP 2007063530W WO 2008074666 A1 WO2008074666 A1 WO 2008074666A1
Authority
WO
WIPO (PCT)
Prior art keywords
voltage
output
voltage converter
terminal
switch
Prior art date
Application number
PCT/EP2007/063530
Other languages
German (de)
English (en)
Inventor
Peter Trattler
Thomas Jessenig
Original Assignee
Austriamicrosystems Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Austriamicrosystems Ag filed Critical Austriamicrosystems Ag
Priority to DE112007003034T priority Critical patent/DE112007003034A5/de
Publication of WO2008074666A1 publication Critical patent/WO2008074666A1/fr

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps

Definitions

  • the present invention relates to a voltage converter for voltage multiplication and a method for voltage multiplication.
  • Voltage converters referred to as direct current / direct current converters, in short DC / DC converters, are frequently used to convert a low voltage into a higher voltage.
  • a capacitor can be used, which is first charged in a charging circuit and then discharged in a discharge circuit.
  • the object of the present invention is to provide a voltage converter for voltage multiplication and a method for voltage multiplication, in which current peaks caused by switching operations are avoided.
  • a voltage converter for voltage multiplication comprises a charging circuit and a discharge circuit.
  • a capacitor can be connected to the voltage converter.
  • the charging circuit has a first current limiter and the discharge circuit has a second current limiter.
  • the capacitor is charged by means of the charging circuit in a charging phase, so that electrical energy is stored in the capacitor.
  • electrical energy is provided by the capacitor for discharging by means of the discharge circuit.
  • the charging circuit has the first current limiter, so that a height of a current flowing in the voltage converter during the charging phase is limited in terms of magnitude upwards.
  • the discharge circuit advantageously has the second current limiter, so that even in the discharge phase, an amount of a current is limited in terms of amount.
  • a fluctuation range of an output voltage which can be tapped on the output side of the voltage converter, reduced and set a level of the output voltage.
  • the first current limiter has a first resistance value R1 and the second current limiter has a second resistance value R2.
  • the first and second current limiters are driven to set the first and second resistance values R1, R2.
  • a circuit arrangement may comprise the voltage converter as well as further circuit parts to which an input voltage which is provided to the voltage converter is also supplied. Disturbances of the input voltage can be kept low by means of the first and the second current limiter, so that the further circuit parts of the circuit arrangement are, to a first approximation, unaffected by the switching operations from the charging phase to the discharging phase and from the discharging phase to the charging phase in the voltage converter.
  • the first and second current Advantageously, a reaction of the voltage converter to the input voltage and an optionally connected battery can be reduced.
  • the higher frequency component in the input voltage, the output voltage and the currents flowing in the voltage converter is reduced, so that the electromagnetic compatibility of the voltage converter to other circuit parts and other devices is improved.
  • a semiconductor body comprises the voltage converter.
  • the capacitor can be coupled to the semiconductor body.
  • the voltage converter provides two current limiters so that the power resulting from the current limitation is converted into heat at two different points of the semiconductor body. This can be achieved with advantage a more uniform temperature distribution on the semiconductor body.
  • the voltage converter is implemented as a step-up converter.
  • the first current limiter comprises a first switch and the second current limiter comprises a second switch.
  • this has a first resistance value Rl.
  • this has a second resistance value R2.
  • the first switch can be switched on, that is to say closed, and the second switch can be switched off, that is to say open.
  • the first Switch off and the second switch on In the discharge phase, the first Switch off and the second switch on.
  • the first and second resistance values R1, R2 are fixed values.
  • the first and the second current limiter each have an ohmic resistance.
  • the ohmic resistance can be realized as a thin-film resistor in each case.
  • the first and second resistance values R1, R2 are designed to be adjustable.
  • the first switch has a first field effect transistor and the second switch has a second field effect transistor.
  • the first field effect transistor has the first resistance value Rl as the on-resistance.
  • the second field effect transistor has the second resistance R2 as the on-resistance.
  • the switch-on resistances are adjustable by means of control signals.
  • the on resistances are controlled.
  • the control terminals of the first and second field-effect transistors are coupled to the output of the voltage converter.
  • the output voltage of the voltage converter or a voltage derived from the output voltage is compared with a comparison voltage, which is designed as a predeterminable reference value.
  • the first and second resistance values R 1, R 2 are set.
  • the voltage converter comprises a comparator to which the output voltage or a voltage derived therefrom and the comparison voltage are supplied on the input side. On the output side, the comparator is coupled to the control terminals of the first and the second field-effect transistor, so that the first resistance value R1 has two adjustable values and the second resistance value R2 likewise has two adjustable values.
  • a method of voltage multiplication comprises charging a capacitor by means of an input voltage via a charging circuit and a ready-to-charge circuit. provide an output voltage by means of a discharge circuit.
  • the charging circuit has a first current limiter and the discharge circuit has a second current limiter.
  • the first and the second current limiter are controlled such that a fluctuation of the output voltage is reduced.
  • the first current limiter may have a first resistance value R1 and the second current limiter may have a second resistance value R2.
  • the first current limiter for setting the first resistance value Rl and the second current limiter for setting the second resistance value R2 are driven.
  • the height of the output voltage can be reduced by increasing the first and second resistance values R1, R2.
  • An increase in the first and second resistance values R1, R2 advantageously reduces a fluctuation width of the input voltage and a fluctuation width of the output voltage.
  • a value of a current flowing in the charging circuit during a charging phase and a value of a current flowing in a discharging phase in the discharging circuit are reduced.
  • this is the maximum
  • FIGS. 2A to 2C show exemplary embodiments of a current limiter.
  • FIGS. 4A to 4C show an alternative exemplary embodiment of a circuit converter according to the proposed principle with two capacitors which can be connected,
  • FIG. 1A shows an exemplary embodiment of a voltage converter for voltage multiplication, which has an input terminal 61, an output terminal 60, a first terminal 5 and a second terminal 6.
  • a capacitor 2 is connected between the first terminal 5 and the second switched connection 6.
  • the voltage converter 1 comprises an input switch 11, a first output switch 31, a first current limiter 40 and a second current limiter 20.
  • the input switch 11 couples the input terminal 61 to the first terminal 5.
  • the first terminal 5 is connected to the first output switch 31 Output terminal 60 coupled.
  • the second terminal 6 is coupled to a reference potential terminal 8 via the first current limiter 40.
  • the input terminal 61 is coupled to the second terminal 6 via the second current limiter 20.
  • the voltage converter 1 further comprises an amplifier 51, which is connected at an output 54 to a control input of the first resistor 42 and a control input of the second resistor 22.
  • the amplifier 51 is connected to the circuit node 34 at a first input 52.
  • the circuit node 34 is over a voltage divider, which comprises a first and a second voltage divider resistor 56, 57, connected to the reference potential terminal 8.
  • the first input 52 is connected to a node between the first and the second voltage divider resistor 56, 57.
  • a voltage source 55 is connected to a second input 53 of the amplifier 51.
  • a discharge current IE flows through the output terminal 60.
  • a larger part of the discharge current IE can flow from the first electrode 62 of the capacitor 2 via the first output switch 31 to the output terminal 60 of the voltage converter 1, so that during the discharge phase the capacitor 2 discharges and the output capacitor 7 can be loaded.
  • a small portion of the discharge current IE may also flow from the first electrode 62 of the capacitor 2 to the output terminal 60 via the second output switch 32 and the output resistor 33.
  • FIG. 2A shows an exemplary embodiment of a current limiter, as it can be used as first or second current limiter 20, 40 in the voltage converter according to FIGS. 1A to 1C, 3A to 3C, 4A to 4C and 5.
  • the current limiter comprises a transistor 43.
  • the transistor Tor 43 is realized as a field effect transistor.
  • the output 54 of the amplifier 51 which is realized as a transconductance amplifier, abbreviated to OTA, is coupled to a control terminal 44 of the transistor 43.
  • the transistor 43 is formed as a MOSFET.
  • the transistor 43 in the first current limiter 40 is realized as an n-channel MOSFET and the transistor 43 in the second current limiter 20 as a p-channel MOSFET.
  • FIG. 2B shows an exemplary development of a current limiter, as it can be used as first or second current limiter 20, 40 in the voltage converter according to FIGS. 1A to 1C, 3A to 3C, 4A to 4C and 5.
  • the current limiter according to FIG. 2B comprises the transistor 43 and a changeover switch 47.
  • a first input of the changeover switch is connected to the output 54 of the amplifier 51.
  • An output of the changeover switch 47 is connected to the control terminal 44 of the transistor 43.
  • the transistor 43 of the first current limiter 40 is realized as an n-channel MOSFET. Therefore, a second input of the changeover switch 47 is connected to the reference potential terminal 8.
  • the changeover switch 47 has a control input 49 connected to a control device 206, as shown for example in FIG.
  • FIG. 3C shows an alternative development of the voltage converter 1 shown in FIGS. 1A to 1C.
  • the output resistance 33 is designed as a controllable resistor.
  • the output resistance 33 is realized as a transistor.
  • a control terminal of the output resistor 33 is connected to the output 54 of the amplifier 51.
  • the voltage converter 100 comprises a coupling switch 101 which connects a coupling connection 23 of the voltage converter 1 to a further coupling connection 23 'of the further voltage converter 1'.
  • the coupling terminal 23 is between the first current limiter 40 and the second one
  • FIG. 5 shows an example of a power supply arrangement 200, which comprises the voltage converter 1 according to FIGS. 1A to 1C or 3A to 3C.
  • the power supply arrangement 200 further comprises a first output terminal 201, a second output terminal 202, an input terminal 203, a current sink 204, a comparator 205, a control device 206 and a voltage source 207.
  • the input terminal 61 of the voltage converter 1 is connected to the input terminal 203 of the power supply arrangement 200 connected.
  • the output terminal 60 of the voltage converter 1 is connected to the first output terminal 201 of the power supply arrangement 200, the output capacitor 7 being connected to the first output terminal 201.
  • the output terminal 60 of the voltage converter 1 is connected via the current sink 204 to the second output terminal 202 of the power supply arrangement 200.
  • a light-emitting diode 208 is connected between the second output terminal 202 and the reference potential terminal 8.
  • a voltage source 209 is coupled to the input terminal 203 of the power supply assembly 200.
  • a filter 64 is connected between the voltage source 209 and the input terminal 203.
  • the filter 64 comprises an inductance 210 and a first and a second filter capacitor 211, 212.
  • the inductance 210 is arranged between the voltage source 209 and the input terminal 203.
  • the inductance 210 is realized as a coil.
  • the input terminal 203 is connected via the first filter capacitor 211, and a node between the inductance 210 and the voltage source 209 is coupled to the reference potential terminal 8 via the second filter capacitor 212.
  • the power supply arrangement 200 comprises a timer 213, English timer. An output of the timer 213 is connected to a control input of the current sink 204.
  • the inductance 210 can be realized as a conductor track on a printed circuit board, abbreviated to PCB.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

Dans la présente invention, un condensateur (2) peut être couplé à un convertisseur de tension (1) pour la multiplication de tension. Le convertisseur de tension (1) comprend un circuit de charge (3) et un circuit de décharge (4). Le circuit de charge (3) sert à charger le condensateur (2) et comporte un premier limiteur de courant (40). Le circuit de décharge (4) comporte un deuxième limiteur de courant (20).
PCT/EP2007/063530 2006-12-19 2007-12-07 Convertisseur de tension et procédé de multiplication de tension WO2008074666A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE112007003034T DE112007003034A5 (de) 2006-12-19 2007-12-07 Spannungskonverter und Verfahren zur Spannungsvervielfachung

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102006059993.4 2006-12-19
DE200610059993 DE102006059993A1 (de) 2006-12-19 2006-12-19 Spannungskonverter und Verfahren zur Spannungsvervielfachung

Publications (1)

Publication Number Publication Date
WO2008074666A1 true WO2008074666A1 (fr) 2008-06-26

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2007/063530 WO2008074666A1 (fr) 2006-12-19 2007-12-07 Convertisseur de tension et procédé de multiplication de tension

Country Status (2)

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DE (2) DE102006059993A1 (fr)
WO (1) WO2008074666A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018071819A1 (fr) * 2016-10-14 2018-04-19 Cirrus Logic International Semiconductor, Ltd. Limiteur de courant d'entrée de pompe de charge
US10651800B2 (en) 2017-02-10 2020-05-12 Cirrus Logic, Inc. Boosted amplifier with current limiting
US10826452B2 (en) 2017-02-10 2020-11-03 Cirrus Logic, Inc. Charge pump with current mode output power throttling

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997023944A1 (fr) * 1995-12-22 1997-07-03 Analog Devices, Inc. (Adi) Convertisseur cc/cc a pompe a charge regulee
JP2005312169A (ja) * 2004-04-21 2005-11-04 Rohm Co Ltd 電圧反転型チャージポンプ回路

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6618296B2 (en) * 2001-08-22 2003-09-09 Texas Instruments Incorporated Charge pump with controlled charge current
JP4396519B2 (ja) * 2004-12-28 2010-01-13 カシオ計算機株式会社 電源回路及び電源回路の駆動方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997023944A1 (fr) * 1995-12-22 1997-07-03 Analog Devices, Inc. (Adi) Convertisseur cc/cc a pompe a charge regulee
JP2005312169A (ja) * 2004-04-21 2005-11-04 Rohm Co Ltd 電圧反転型チャージポンプ回路

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
BAYER E ED - INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS: "Optimized control of the flying-capacitor operating voltage in gear-box-charge-pumps -the key factor for a smooth operation", PESC'03. 2003 IEEE 34TH. ANNUAL POWER ELECTRONICS SPECIALISTS CONFERENCE. CONFERENCE PROCEEDINGS. ACAPULCO, MEXICO, JUNE 15 - 19, 2003, ANNUAL POWER ELECTRONICS SPECIALISTS CONFERENCE, NEW YORK, NY : IEEE, US, vol. VOL. 4 OF 4. CONF. 34, 15 June 2003 (2003-06-15), pages 610 - 615, XP010648880, ISBN: 0-7803-7754-0 *
THIELE G ET AL: "Current mode charge pump: topology, modeling and control", POWER ELECTRONICS SPECIALISTS CONFERENCE, 2004. PESC 04. 2004 IEEE 35TH ANNUAL AACHEN, GERMANY 20-25 JUNE 2004, PISCATAWAY, NJ, USA,IEEE, US, 20 June 2004 (2004-06-20), pages 3812 - 3817Vol5, XP010738322, ISBN: 0-7803-8399-0 *

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018071819A1 (fr) * 2016-10-14 2018-04-19 Cirrus Logic International Semiconductor, Ltd. Limiteur de courant d'entrée de pompe de charge
GB2558765A (en) * 2016-10-14 2018-07-18 Cirrus Logic Int Semiconductor Ltd Charge pump input current limiter
US10581322B2 (en) 2016-10-14 2020-03-03 Cirrus Logic, Inc. Charge pump input current limiter
GB2558765B (en) * 2016-10-14 2022-05-11 Cirrus Logic Int Semiconductor Ltd Charge pump input current limiter
US10651800B2 (en) 2017-02-10 2020-05-12 Cirrus Logic, Inc. Boosted amplifier with current limiting
US10826452B2 (en) 2017-02-10 2020-11-03 Cirrus Logic, Inc. Charge pump with current mode output power throttling
US11152906B2 (en) 2017-02-10 2021-10-19 Cirrus Logic, Inc. Charge pump with current mode output power throttling

Also Published As

Publication number Publication date
DE102006059993A1 (de) 2008-06-26
DE112007003034A5 (de) 2009-12-10

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