WO2008065925A1 - SEMICONDUCTOR DEVICE Cu WIRING AND METHOD FOR MANUFACTURING THE SAME - Google Patents

SEMICONDUCTOR DEVICE Cu WIRING AND METHOD FOR MANUFACTURING THE SAME Download PDF

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Publication number
WO2008065925A1
WO2008065925A1 PCT/JP2007/072417 JP2007072417W WO2008065925A1 WO 2008065925 A1 WO2008065925 A1 WO 2008065925A1 JP 2007072417 W JP2007072417 W JP 2007072417W WO 2008065925 A1 WO2008065925 A1 WO 2008065925A1
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WIPO (PCT)
Prior art keywords
layer
wiring
adhesion
interlayer connection
pure
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Application number
PCT/JP2007/072417
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French (fr)
Japanese (ja)
Inventor
Hirotaka Ito
Takashi Onishi
Mikako Takeda
Masao Mizuno
Original Assignee
Kabushiki Kaisha Kobe Seiko Sho
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Filing date
Publication date
Priority claimed from JP2007267180A external-priority patent/JP4896850B2/en
Application filed by Kabushiki Kaisha Kobe Seiko Sho filed Critical Kabushiki Kaisha Kobe Seiko Sho
Priority to US12/515,538 priority Critical patent/US20100052171A1/en
Publication of WO2008065925A1 publication Critical patent/WO2008065925A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53233Copper alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the present invention relates to a semiconductor device, and more specifically, for example, Cu wiring in a semiconductor device such as a Si semiconductor device represented by ULSI (Ultra Large Scale Integrated Circuit). And a method of forming the Cu wiring.
  • a semiconductor device such as a Si semiconductor device represented by ULSI (Ultra Large Scale Integrated Circuit).
  • ULSI Ultra Large Scale Integrated Circuit
  • Cu-based wiring materials can be used as wiring materials that can reduce electrical resistance compared to conventional A1-based wiring materials (hereinafter also referred to as A1-based wiring materials). There is an attempt to form a Cu wiring.
  • a damascene wiring technique is known as a method for forming a multilayered Cu wiring.
  • wiring grooves and interlayer connection paths are formed in an insulating film provided on a semiconductor substrate, and these openings are covered with a Cu-based wiring material such as pure Cu or Cu alloy, and then heated.
  • This is a method of forming Cu wiring by flowing Cu-based wiring material under pressure and embedding Cu-based wiring material in wiring grooves and interlayer connection paths. Excess Cu-based wiring material that is not embedded in wiring trenches or interlayer connection paths is removed by chemical mechanical polishing (CMP).
  • CMP chemical mechanical polishing
  • the interface between the NORA layer and the Cu wiring becomes the main diffusion path for Cu atoms.
  • Cu may diffuse and voids may form cracks at the interface between the NOR layer and the Cu wiring, or the Cu wiring itself may be disconnected or the wiring may be deformed.
  • EM electomigration
  • SM stress migration
  • Elect mouth migration refers to a phenomenon in which atoms that make up a wiring material move due to the effects of electron flow and electric field when current is flowing.
  • Stress migration refers to heat transfer even when no current flows. This refers to a phenomenon in which voids are broken at grain boundaries due to activity or tensile stress.
  • Patent Document 1 The poor adhesion between the noria layer and Cu is described in Patent Document 1, for example.
  • This Patent Document 1 describes that if the adhesion between the noria layer and the Cu wiring is poor, peeling is likely to occur between the noria layer and the Cu wiring. It is noted that the heat stress during the operation of the device causes problems such as disconnection in the wiring, which significantly reduces the reliability of the semiconductor device. Therefore, in Patent Document 1, in order to improve the reliability of a semiconductor device, a conductive layer mainly composed of a refractory metal and Cu is provided between a Cu wiring and an insulating film without providing a noor layer. As the conductive layer, a metal film composed of an intermetallic compound of Ti and Cu is exemplified.
  • Patent Document 1 describes a gap between a conductive layer and an insulating film. It is described that a noria layer may be provided. However, when the present inventors examined the adhesion of the Cu wiring described in Patent Document 1, it was found that the adhesion between the NOR layer and the wiring was not sufficient and there was room for improvement. It was.
  • Patent Document 1 Japanese Patent Laid-Open No. 10-223635
  • the present invention has been made in view of such a situation, and an object of the present invention is to provide a Cu wiring having good adhesion to a barrier layer made of TaN formed on a wiring groove or an interlayer connection path surface. It is to provide a method capable of manufacturing this Cu wiring. Furthermore, another object of the present invention is to provide good adhesion with the noria layer even when the wiring groove formed in the insulating film on the semiconductor substrate or the width of the interlayer connection path is narrow and deep. Another object is to provide a Cu wiring embedded in every corner of the interlayer connection path and a method for manufacturing this Cu wiring.
  • the present inventors have intensively studied in order to improve the adhesion between the barrier layer made of TaN and the Cu wiring.
  • the Cu-based wiring material is formed so as to cover the wiring grooves and interlayer connection paths, heat treatment or further pressurization as necessary may result in the wiring grooves and interlayer connection paths.
  • the present invention was completed by finding that it can be embedded in every corner.
  • the Cu wiring of the semiconductor device according to the present invention that has solved the above problems is a Cu wiring buried in a wiring groove or an interlayer connection formed in an insulating film on a semiconductor substrate.
  • the Cu wiring includes a barrier layer made of TaN formed on the wiring groove side or the interlayer connection path side, Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, It is composed of a wiring main body part made of Cu containing 0.05 to 3.0 atomic% in total of one or more elements selected from the group consisting of Re and Os!
  • the above-described problems are (1) a noble layer made of TaN formed on the wiring groove side or the interlayer connection path side, (2) a wiring main body portion made of pure Cu, and (3) the barrier layer. It is formed between and in contact with the wiring main body, and is selected from the group consisting of Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, Re and Os 1
  • This problem can be solved even with Cu wiring composed of an intermediate layer made of Cu containing a total of O. 05-3.
  • the thickness of the intermediate layer is, for example, 10 to 50 nm.
  • the wiring groove or the interlayer connection path may have a width of 0.15 ⁇ m or less and a depth ratio (depth / width) of 1 or more.
  • Cu wiring of a semiconductor device includes a step of forming a TaN layer on the surface of a wiring groove or an interlayer connection formed in an insulating film on a semiconductor substrate, and a sputtering method on the surface of the TaN layer.
  • the wiring groove or the interlayer connection path has a width of 0.115 111 or less and a depth ratio (depth / width) of 1 or more, and a Cu layer is inserted in these. If it is difficult to push in, heat it up or pressurize it as needed.
  • the Cu wiring of the semiconductor device includes a step of forming a TaN layer on the surface of a wiring groove or an interlayer connection formed in an insulating film on a semiconductor substrate, and sputtering on the surface of the TaN layer.
  • the total amount of one or more elements selected from the group consisting of Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, Re, and Os by the law is 0.05-3. It can also be manufactured through a process of forming a Cu layer containing 0 atomic% and a process of forming a pure Cu layer on the surface of the Cu layer.
  • the wiring groove or the interlayer connection path has a width of not more than 0. ⁇ ⁇ ⁇ and a ratio of depth to the width (depth / width) of 1 or more, and a pure Cu layer is included in these. If it is difficult to push in, heat it up or pressurize it as needed.
  • the Cu-based wiring material is formed so as to cover the wiring groove or the interlayer connection path, and then heated or necessary. By further applying pressure accordingly, Cu-based wiring material can be embedded in wiring grooves and interlayer connection paths that do not impair the adhesion between the NOR layer and the wiring body.
  • Fig. 1 shows the content of adhesion improving elements and the K of the adhesion Cu layer obtained by the MELT method.
  • Fig. 1 (b) is a graph enlarging the range of 0 to 0.2 atomic% of Fig. 1 (a).
  • Fig. 2 is a graph showing the relationship between the Fe content and the K of the adhesive Cu layer obtained by the MELT method.
  • FIG. 3 is a graph showing the relationship between the temperature of atmospheric annealing or high-pressure annealing and the K of the adhesive Cu layer obtained by the MELT method.
  • Fig. 4 shows the content of adhesion improving elements and the K content of the adhesion Cu layer obtained by the MELT method.
  • Figure 5 shows the relationship between the thickness of the adhesive Cu layer and the K of the adhesive Cu layer obtained by the MELT method.
  • Figure 6 shows the relationship between the thickness of the adhesive Cu layer and the K of the adhesive Cu layer obtained by the MELT method.
  • FIG. 7 is a graph showing the relationship between the temperature of atmospheric annealing or high-pressure annealing and the K of the adhesive Cu layer obtained by the MELT method.
  • Fig. 8 shows the content of the adhesion improving element and the K of the adhesion Cu layer obtained by the MELT method.
  • FIG. 8 It is a graph which shows appl relation.
  • (B) in FIG. 8 is a graph obtained by enlarging the range of 0 to 0.2 atomic% in (a) of FIG.
  • Fig. 9 shows the content of the adhesion improving element and the K of the adhesion Cu layer obtained by the MELT method.
  • the wiring body part is one or more elements selected from the group consisting of Pt, In, Ti, Nb, B, and Fe, or these
  • a wiring made of Cu containing 0.05 to 3.0 atomic% in total of one or more elements selected from the group consisting of V, Zr, Hf, Ga, Tl, Ru, Re and Os And it is sufficient.
  • the wiring body is pure Cu, one type selected from the group force consisting of Pt, In, Ti, Nb, B, and Fe so as to be in contact with the barrier between the wiring body and the barrier layer.
  • one or more elements selected from the group consisting of V, Zr, Hf, Ga, Tl, Ru, Re, and Os are combined.
  • An intermediate layer made of Cu may be provided.
  • Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, Re, and Os all consist of TaN as a result of various experiments conducted by the inventors. It is an element that has been found to have an effect of improving the adhesion between the barrier layer and Cu (hereinafter, sometimes referred to as an adhesion improving element). The reasons why these adhesion improving elements enhance the adhesion between the barrier layer and Cu are considered as follows.
  • Pt, B, Ru, Re, and Os are precipitated at the interface between the barrier layer and Cu (the wiring body containing the adhesion improving element or the intermediate layer containing the adhesion improving element) and remain at the interface. It is considered that it has the action of relaxing the residual stress. Residual stress is most highly applied to the interface between the noria layer and Cu, so it is considered that the adhesion to the Cu barrier layer is improved by relaxing this residual stress.
  • In has a melting point of about 156 ° C
  • Ga has a melting point of 29.76 ° C
  • T1 has a melting point of 294 ° C, which is low, less than about 50 ° C. It is done.
  • Ti, Nb, Fe, V, Zr, and Hf are all elements selected in consideration of the chemical equilibrium calculation power and reactivity with the barrier layer. Compounds and chemical bonds are formed between them, and the adhesion of Cu to the barrier layer is thought to improve.
  • Ti is considered to form TiN when in contact with a barrier layer made of TaN, and this TiN is considered to improve the adhesion of Cu to the barrier layer.
  • Fe consists of TaN By contacting with the noria layer, it is considered that Fe 2 Ta or FeTa 2 is formed on the low temperature side and the adhesion of these compound forces SCu to the barrier layer is improved.
  • Nb comes into contact with a TaN barrier layer to form NbN, and this NbN is thought to improve the adhesion of Cu to the barrier layer.
  • V comes into contact with a barrier layer made of TaN to form VN, and this VN is considered to improve the adhesion of Cu to the barrier layer.
  • Zr comes into contact with a barrier layer made of TaN to form ZrN, which is thought to improve the adhesion of Cu to the barrier layer. It is considered that Hf forms HfN by coming into contact with a TaN barrier layer, and this HfN improves the adhesion of Cu to the barrier layer.
  • the adhesion improving element is used in order to increase the adhesion to the barrier layer and not to increase the electrical resistivity of the wiring itself.
  • the Cu layer containing the above-mentioned adhesion improving element may be referred to as an adhesive Cu layer regardless of the case where it is provided as a wiring body portion or an intermediate layer.
  • the amount of the adhesion improving element contained in the wiring main body or the intermediate layer may be 0.05 to 3.0 atomic% in total. If the adhesion improving element is less than 0.05 atomic%, the adhesion between the NOR layer and the wiring main body cannot be sufficiently improved.
  • the content of the adhesion improving element is 0.05 atomic% or more, preferably 0.5 atomic% or more, more preferably 1 atomic% or more, and even more preferably 1.5 atomic% or more. However, even if an adhesion improving element is contained excessively, the effect is saturated, and the excessive element increases the electrical resistivity of the Cu wiring. Therefore, the content of the adhesion improving element is 3.0 atomic% or less, preferably 2.5 atomic% or less, more preferably 2.0 atomic% or less.
  • the thickness of the intermediate layer is not particularly limited, but is preferably 10 nm or more in order to improve the adhesion between the barrier layer and the wiring body. More preferably 15 nm or more, still more preferably 20 nm or more Above. However, even if the intermediate layer is made too thick, the effect of improving the adhesion between the barrier layer and the wiring body is saturated, so the upper limit of the intermediate layer thickness should be about 50 nm. More preferably, it is 45 nm or less, More preferably, it is 40 nm or less.
  • the thickness of the intermediate layer refers to the cross section of the Cu wiring cut so that the shape of the wiring groove or interlayer connection path formed in the insulating film is exposed, and the inner wall (side wall or side wall of the wiring groove or interlayer connection path). It means the smallest thickness when the thickness of the intermediate layer formed along the bottom surface is measured. For example, an intermediate layer is easily formed on the bottom surface of a wiring groove or an interlayer connection path, but an intermediate layer is not easily formed on the side wall of the wiring groove or the interlayer connection path. Therefore, the thickness of the intermediate layer formed on the side wall of the wiring groove or the interlayer connection path tends to be small.
  • the type of insulating film in which the wiring trench or interlayer connection path is formed is not particularly limited.
  • silicon oxide is silicon nitride, BSG (Boro-Silicate Glass), PSG (Phospho-Silicat e01 & 33) 8-30 , £ 03 10?) Etc. can be used.
  • a method for manufacturing the Cu wiring of the present invention will be described. If the layer that is in direct contact with the NOR layer is the wiring body, a TaN layer is formed on the surface of the wiring groove or interlayer connection formed in the insulating film on the semiconductor substrate, and then the surface of this TaN layer is sputtered. 1 or more elements selected from the group consisting of Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, Re, and Os (adhesion improving element) in total 05 ⁇ 3.0 Adhesive Cu layer (ie, the wiring body) should be formed! /.
  • the method for forming the TaN layer is not particularly limited, and may be formed by sputtering (for example, DC magnetron sputtering) or CVD!
  • an adhesive Cu layer on the surface of the TaN layer, a sputtering method may be employed. If the sputtering method is adopted, an adhesive Cu layer containing an adhesion improving element can be easily formed on the surface of a wiring groove with an TaN layer or an interlayer connection path.
  • the sputtering method may be, for example, a (DC) magnetron sputtering method or a long throw sputtering method.
  • the long throw sputtering method can be preferably employed from the viewpoint of embedding properties as described later.
  • the long throw sputtering method is a sputtering method in which the distance between the wafer and the target is long. Sputtering with a thickness of at least mm is called long throw sputtering.
  • a Cu target containing an adhesion improving element is used as a sputtering target, or adhesion to the surface of a pure Cu target.
  • Sputtering may be performed in an inert gas atmosphere using a chip-on target to which a Cu piece containing an improving element or a metal piece made of an adhesion improving element is attached.
  • the inert gas for example, helium, neon, argon, krypton, xenon, or radon can be used.
  • Argon or xenon is preferably used, and especially argon is relatively inexpensive and can be suitably used.
  • Other sputtering conditions for example, ultimate vacuum, sputtering gas pressure, discharge power density, substrate temperature, interelectrode distance, etc. are not particularly limited, and may be adjusted within a normal range.
  • the thickness of the adhesive Cu layer formed by sputtering may be changed according to the depth of the wiring groove or interlayer connection path.
  • the upper limit of the thickness of the adhesive Cu layer is, for example, 2. If the thickness is too large, the strength of the adhesive Cu layer will increase, so that it will be difficult to embed the adhesive Cu layer in the wiring trench or interlayer connection path even after heating and pressurizing as described later.
  • a TaN layer is formed on the surface of the wiring trench or interlayer connection path formed in the insulating film on the semiconductor substrate, and then sputtered on the surface of this TaN layer.
  • An adhesive Cu layer containing 0 atomic% that is, an intermediate layer
  • a pure Cu layer that is, a wiring body portion
  • the method for forming the adhesive Cu layer as an intermediate layer on the surface of the TaN layer may be the same as the method for forming the adhesive Cu layer as the wiring body.
  • the thickness of the adhesive Cu layer may be about 10 to 50 nm.
  • the method of forming a pure Cu layer is not particularly limited! /, But, for example, an electrolytic plating method, a chemical vapor deposition method (CVD method), an (arc) ion plating method, a sputtering method, etc. can be adopted. wear. In particular, if the electrolytic plating method is used, it is possible to fill a pure Cu layer while gradually burying it from the bottom of the wiring groove or interlayer connection path.
  • the sputtering method for example, a (DC) magnetron sputtering method or a long throw sputtering method may be used. In particular, the long throw sputtering method can be preferably employed from the viewpoint of embedding.
  • the purity of pure Cu may be 99 atomic% or more (particularly 99.9-99.99 atomic%).
  • the thickness of the pure Cu layer is changed according to the depth of the wiring groove or interlayer connection path, the thickness of the pure Cu layer is at least equal to the depth of the wiring groove or interlayer connection path. Do it! / The upper limit of the thickness of the pure Cu layer is, for example, 2. If the thickness becomes too large, the strength of the pure Cu layer will increase, so when forming a pure Cu layer by sputtering, the pure Cu layer will be connected to wiring trenches and interlayer connections even when heated and pressurized as described later. It becomes difficult to embed in the road.
  • the width of a wiring groove or interlayer connection path is 0.15 ⁇ m or less and the ratio of depth to this width (depth / width) is 1 or more, Cu containing an adhesion improving element
  • the wiring body or wiring layer is not completely embedded in the wiring groove or interlayer connection path because the wiring groove or interlayer connection path is narrow and deep.
  • the main body part may be bridged so as to cover the wiring groove and the opening of the interlayer connection path, and a gap may be formed inside the wiring groove and the interlayer connection path.
  • the wiring main body when the wiring main body is formed by the sputtering method, it is preferable to press the wiring main body into the wiring groove or the interlayer connection path by applying pressure while heating. Specifically, it is preferable to pressurize to 150 MPa or more (preferably 160 MPa or more) while heating to 500 ° C or more (preferably 550 ° C or more).
  • the upper limit of heating temperature is about 700 ° C. Equipment that heats above 700 ° C is practically difficult, and if the temperature is too high, the electrical resistivity of the Cu wiring tends to increase.
  • the semiconductor substrate itself may be deformed.
  • a preferred upper limit is 650 ° C, and a more preferred upper limit is 600 ° C.
  • the atmosphere at the time of heating is not specifically limited, For example, what is necessary is just the above-mentioned inert gas atmosphere.
  • the pressure is preferably as high as possible, but if it exceeds 200 MPa, the pressure is too high to be practical, so the upper limit is about 200 MPa. Preferably it is 180 MPa or less.
  • the wiring main body is subjected to the long throw sputtering method. Formed with By doing so, the wiring main body can be almost surely embedded in the wiring groove or the interlayer connection path. Accordingly, when the wiring main body is formed by the long throw sputtering method, it is not necessary to heat and pressurize, but it may be heated, pressed or heated and pressed as necessary.
  • the wiring groove or the interlayer connection path where the pure Cu layer may be formed by the electrolytic plating method has a width of 0.15 m or less, and the depth relative to this width. Even if the ratio (depth / width) is 1 or more, a pure Cu layer can be almost surely embedded in the wiring trench and the interlayer connection path. Therefore, even when a pure Cu layer is formed by an electrolytic plating method, it is not necessary to apply heat and pressure, but it may be heated, pressurized, or heated and pressed as necessary.
  • the temperature at the time of heating should be above room temperature, for example, 50 ° C or higher (particularly 200 ° C or higher).
  • IMPa or more is sufficient if the pressure is higher than normal pressure.
  • the heating temperature at the time of heating and pressurization may be, for example, 50 ° C or more (particularly 200 ° C or more) as long as it exceeds room temperature.
  • the pressure at the time of heating and pressing is, for example, 50 MPa or more (particularly, 100 MPa or more).
  • the film thickness of the adhesive Cu layer, pure Cu layer, and barrier layer made of TaN can be adjusted by controlling the formation conditions of each layer. That is, if a dummy thin film is formed in advance by appropriately controlling the formation conditions of each layer, and the film thickness of this thin film is measured with a stylus type film thickness meter, the film thickness can be controlled by controlling the formation conditions of each layer. Can be adjusted.
  • a TaN layer is formed on the surface of a ⁇ 4 inch silicon wafer by DC magnetron sputtering to a thickness of 50 nm, and then contains a pure Cu layer (No. 1 in Table 1 below) or the elements shown in Table 1 below.
  • Adhesive Cu layer (the remainder is Cu and inevitable impurities) was deposited by DC magnetron sputtering to a thickness of 200 nm to obtain a laminate.
  • a sputtering apparatus an HSM-552 type sputtering apparatus manufactured by Shimadzu Corporation was used, and sputtering was performed using a pure Cu target or a chip-on target.
  • a chip-on target 3 to 6 erosion positions of 5 mm square metal chips (Cu chips containing a desired element or metal chips made of a desired element) on the surface of a pure Cu target ( ⁇ 100 mm) as a base
  • the adhesive Cu layer composition is adjusted by changing the type of the metal tip using the one pasted, and the composition contained in the adhesive Cu layer is controlled by changing the number of metal tips and the location of the metal tip. did.
  • Sputtering conditions when forming a pure Cu layer or an adhesive Cu layer are based on the ultimate vacuum.
  • Adhesiveness deposited by sputtering The amount of adhesion-enhancing element contained in the Cu layer was quantified by ICP emission spectroscopy using an ICP emission spectrometer “ICP-8000” manufactured by Shimadzu Corporation .
  • the MELT method is the application of an epoxy resin to the surface of a pure Cu layer or adhesive Cu layer, and cooling it to apply the pure Cu layer or adhesive Cu layer to the TaN layer using the stress applied to the epoxy resin. This is a method for measuring the force (adhesion) when peeling from the interface.
  • the adhesion force is the force Gc (j / m 2 ) required to separate the pure Cu layer or adhesion Cu layer at the interface with the TaN layer, and is expressed by the following formula (1). ).
  • U is the adhesion force (J) of the pure Cu layer or adhesive Cu layer to the TaN layer
  • A is the adhesion area (m 2 ).
  • is the residual stress of the epoxy resin layer
  • h is the Epoch
  • the thickness of the xy-resin layer, V is the Poisson's ratio of the epoxy resin layer, and E is the yang ratio of the epoxy resin layer.
  • h, V, and E are known values determined by the type of epoxy resin.
  • K (Pa -m 1 ") obtained from (m) by the following equation (3) can also be used as an index of adhesion.
  • the adhesion was measured by the following procedure. An epoxy resin is applied to the surface of a pure Cu layer or adhesive Cu layer deposited on the surface of a silicon wafer to a thickness of 100 m, and this is baked at 170 ° C for 1 hour, and then a peripheral slicer (dicing solution). 1) was cut into 12mm x 12mm square. The edge of the four corners of the cut specimen (coupon) was polished with emery paper and finished with # 1000. For the obtained specimen, the adhesion of the pure Cu layer or adhesion Cu layer to the TaN layer was measured using a thin film adhesion tester (FMS Laminar Series II) manufactured by FMS.
  • FMS Laminar Series II thin film adhesion tester
  • the adhesion force is determined by cooling the obtained specimen in the chamber, measuring the temperature at which the pure Cu layer or adhesive Cu layer peels from the TaN layer, and obtaining ⁇ from this temperature, ⁇ value was calculated from Table 1 below shows the K values of pure Cu or adhesive Cu layers determined by the MELT method.
  • No. 1 is a series of pure Cu layers stacked on a TaN layer, and consists of Pt, In, Ti, Nb, B, and Fe, as in Nos. 2 to 7, rather than No. 1
  • An adhesive Cu layer containing one or more elements selected from the group in a range of 0.05 to 30 atomic percent is superior in adhesion.
  • No. 8 is an example in which an adhesive Cu layer containing N is laminated on the TaN layer
  • No. 9 is an example in which an adhesive Cu layer containing Sb is laminated on the TaN layer.
  • Adhesion No improvement in adhesion of the Cu layer was observed.
  • Example 1 Except that in Example 1 above, an adhesive Cu layer with the Pt, In, Ti, Nb, B or Fe content adjusted on the surface of the TaN layer was formed (the remainder being Cu and inevitable impurities). A laminate was obtained under the same conditions as in 1.
  • Figure 1 shows the relationship between the content of adhesion improving elements and the adhesion Cu layer determined by the MELT method.
  • the mouth is Pt
  • is In
  • is Ti
  • is Nb
  • appl O is B
  • country is Fe.
  • Fig. 1 (b) is a graph enlarging the range of 0 to 0.2 atomic% in Fig. 1 (a).
  • the adhesion to the TaN layer increases as the content of the adhesion improving element increases.
  • the adhesion can be improved by about twice or more compared to the case where other elements are included. You can.
  • the adhesion improving effect tends to saturate even if the adhesion improving element exceeds 3 atomic%.
  • Figure 2 shows the appl staff.
  • indicates atmospheric pressure annealing
  • indicates high pressure annealing.
  • Fig. 2 also shows the results for both cases (untreated; ⁇ ) without normal pressure annealing or high pressure annealing.
  • Adhesiveness It can be seen that if the atmospheric annealing process is performed after the Cu layer is formed, the adhesive force is lower than that in the case of no treatment. On the other hand, it can be seen that if the high-pressure annealing treatment is performed after forming the adhesive Cu layer, the adhesion strength is improved as compared with the case of no treatment. When the normal pressure annealing treatment is performed, the adhesion strength is lower than that when the treatment is not performed. This is considered to be governed by both the lowering and the improvement of the adhesion by pressurization. In other words, in the normal pressure annealing treatment, the adhesion lowering effect due to heating acts strongly, so that the adhesion strength is considered to be lower than that in the case of no treatment.
  • Example 1 after forming an adhesive Cu layer containing 1.88 atomic% Fe on the surface of the TaN layer (the remainder being Cu and inevitable impurities), is heating at normal pressure as in Example 3 above? (Normal pressure annealing treatment) and pressurizing (high pressure annealing treatment) while heating to obtain a laminate.
  • the atmospheric annealing treatment was carried out in an Ar atmosphere at normal pressure (0. IMPa) while being heated for 15 minutes.
  • High pressure Aniru process a vacuum of 133 X 10- 6 Pa or less (1 X 10- 6 Torr or less), pressurized to 150 MPa, was carried out for 15 minutes in a heated state.
  • the heating temperature is 200 ° C, 500 ° C, 700 ° C
  • the heating rate during heating is 5 ° C / min
  • the cooling rate after heating is 5 ° C / min. Minutes.
  • Neal processing and ⁇ indicate the results of high-pressure annealing.
  • Fig. 3 also shows the results of the normal pressure treatment and the high pressure annealing treatment! /, And the case (untreated; ⁇ ).
  • the annealing treatment at a high temperature can enhance the adhesion of the Cu layer to the TaN layer.
  • the adhesion to the TaN layer decreases slightly as the temperature increases.
  • Example 1 after forming an adhesive Cu layer with the Pt, In, Ti, Nb, B, or Fe content adjusted to 50 nm on the surface of the TaN layer (the remainder being Cu and inevitable impurities), pure Cu The layer was formed by DC magnetron sputtering to a thickness of 200 nm to obtain a laminate.
  • FIG. 4 shows the relationship between the content of adhesion improving elements and the adhesion Cu layer determined by the MELT method.
  • the mouth is Pt
  • is In
  • is Ti
  • is Nb
  • the adhesive Cu layer adheres to the TaN layer as the amount of the adhesion improving element contained in the adhesive Cu layer increases.
  • the adhesion improving element is contained in an amount exceeding 3 atomic%, the adhesion improving effect tends to be saturated.
  • Example 1 an adhesive Cu layer containing 1.79 atomic percent of Ti (the remainder is Cu and inevitable impurities) is formed on the surface of the TaN layer by 10 to 50 nm, and then the pure Cu layer is formed by DC magnetron sputtering. The film was formed to a thickness of 200 nm to obtain a laminate A. Also, instead of depositing a pure Cu layer by DC magnetron sputtering, a laminate B was obtained by depositing a film to a thickness of 200 nm by electrolytic plating. The electrolytic plating became fi at a current density of 17 mA / cm 2 .
  • Example 1 an adhesive Cu layer containing 2.35 atomic percent of Nb (the remainder is Cu and inevitable impurities) is formed on the surface of the TaN layer to 10 to 50 nm, and then the pure Cu layer is formed by DC magnetron sputtering. Then, a film was formed to a thickness of 200 nm, and then a layered product was obtained by applying pressure (high pressure annealing treatment) while heating with normal pressure (normal pressure annealing treatment) and heating. The normal pressure annealing and the high pressure annealing were performed under the conditions shown in Experimental Example 3 above. [0085] With respect to the obtained laminate, the adhesion of the Cu layer to the TaN layer was measured under the same conditions as in Experimental Example 1.
  • Figure 6 shows the relationship between the thickness of the adhesive Cu layer and the K of the adhesive Cu layer determined by the MELT method. In Fig. 6, ⁇ is normal pressure annealing, ⁇ is high pressure annealing appl
  • Figure 6 also shows the results of the normal pressure annealing and the high pressure annealing! /, And the case (untreated; ⁇ ).
  • Example 1 after forming an adhesive Cu layer containing 1.88 atomic% Fe (the remainder is Cu and inevitable impurities) to 50 nm on the surface of the TaN layer, the thickness of the pure Cu layer is increased by the DC magnetron sputtering method.
  • a film was formed to 200 nm, and then heated at normal pressure (normal pressure annealing treatment) or pressurized (high pressure annealing treatment) while heating to obtain a laminate. Normal pressure annealing and high pressure annealing were performed under the conditions shown in Experimental Example 3 above.
  • Neal processing and ⁇ indicate the results of high-pressure annealing.
  • Fig. 7 also shows the results of the normal pressure treatment and the high pressure annealing treatment! /, And the case (untreated; ⁇ ) results!
  • An insulating film (TEOS film: SiOF film) formed on the surface of a silicon wafer has a diameter of 0 ⁇ 12 [im
  • An evaluation element (TEG) provided with vias having a thickness of 120 nm), a depth of 0.55 m (550 nm), and a pitch of 450 nm was used.
  • a TaN layer was deposited by DC magnetron sputtering so that the thickness was 50 nm under the same conditions as in Experiment 1 above, and then an adhesive Cu layer containing 1.88 atomic% Fe ( The balance was Cu and inevitable impurities) were deposited by sputtering (CS method) or mouth-throw sputtering method (LTS method) to a thickness of 500 nm.
  • CS method sputtering
  • LTS method mouth-throw sputtering method
  • Adhesive The sputtering conditions for forming the Cu layer are the same as those shown in Experimental Example 1 above. Long throw sputtering conditions for forming the adhesion Cu layer is reached vacuum degree 133 X 10- 6 Pa or less (1 X 10- 6 Torr or less), Ar gas ambient gas during sputtering, the sputtering gas pressure the 266 X 10- 3 Pa (2 X 10- 3 Torr), the discharge power density of 25W / cm 2 (0, a substrate Baiasu -200 ⁇ , the substrate temperature Ts 0 ° C, the distance between electrodes was 300 mm, and .
  • the laminate was obtained by heating at normal pressure (normal pressure annealing treatment) as in Experimental Example 3 above or by applying pressure (high pressure annealing treatment) while heating. .
  • the normal pressure annealing and the high pressure annealing were performed under the conditions shown in Experimental Example 4 above. Note that No. 11 and No. 18 in Table 2 below are examples in which normal pressure annealing and high pressure annealing are performed after forming an adhesive Cu layer.
  • the processed TEG is processed with a focused ion beam device (FIB device) so that the via cross-section is exposed, and the cross-section is observed with a SIM image of the FIB device.
  • the embedded state (embedding characteristics) of the layer was investigated.
  • the embedding characteristics were evaluated using the embedding rate calculated by the following equation (4) by analyzing the SIM image of the via cross section. 15 vias were observed, and the filling rate was calculated for each via and averaged.
  • the embedding rate is shown in Table 2 below.
  • Embedding rate (%) [(embedded in via! /, Cross-sectional area of Cu layer) / (cross-sectional area of via)] X 100 ⁇ ⁇ ⁇ (4)
  • CS method Sputtering method
  • LTS method Long throw sputtering method
  • an adhesive Cu layer containing 1.79 atomic percent of Ti (with the remainder being Cu and inevitable impurities) is formed to a thickness of 10 to 50 nm by sputtering (CS method).
  • CS method sputtering method
  • LTS method long slow sputtering method
  • Adhesiveness The sputtering conditions for forming the Cu layer are the same as those shown in Experimental Example 1 above.
  • the electrolytic plating conditions for forming a pure Cu layer are the same as those shown in Experimental Example 6, the sputtering conditions are the same as those in Experimental Example 1, and the long throw sputtering conditions are the same as those in Experimental Example 9.
  • a laminate was obtained by applying pressure (high-pressure annealing) while heating at normal pressure (normal-pressure annealing) as in Experimental Example 4 above.
  • the normal pressure annealing treatment was carried out in an Ar atmosphere at normal pressure (0. IMPa) while being heated for 15 minutes.
  • High pressure Aniru process a vacuum of 133 X 10- 6 Pa or less (1 X 10- 6 Torr or less), pressure Caro to 150 MPa, was carried out for 15 minutes in a heated state.
  • Normal pressure annealing and high pressure annealing In the treatment, the heating temperature was 200 ° C or 500 ° C, the heating rate during heating was 5 ° C / min, and the cooling rate after heating was 5 ° C / min.
  • No. 31-33, No. 38, and No. 44 in Table 3 below are examples in which neither a normal-pressure annealing process nor a high-pressure annealing process is performed after a pure Cu layer is formed.
  • No. 3;! -37 are all made by thinning the adhesive Cu layer and forming the pure Cu layer by electrolytic plating, so the adhesive Cu layer and the pure Cu layer can be formed in the recess without annealing. Can be completely embedded.
  • Nos. 42 to 43 when a pure Cu layer is formed by sputtering, pressurizing and pressing at 150 MPa while heating to 500 ° C or higher will push the pure Cu layer into the via. be able to.
  • Nos. 44 to 50 when a pure Cu layer is formed by long throw sputtering, the pure Cu layer can be pushed into the via without annealing.
  • Electrolytic plating method 200 150 15 100
  • Example 1 except that an adhesive Cu layer (with the balance being Cu and inevitable impurities) with an adjusted content of V, Zr, Re, Ru, Hf, Ga, Os or Tl was formed on the surface of the TaN layer.
  • a laminate was obtained under the same conditions as in Experimental Example 1 above.
  • Ga has a low melting point, it is not possible to produce a metal chip having a Ga elemental force. Therefore, for Ga, a Cu alloy chip containing 5 atomic% or 10 atomic% of Ga (the remainder is an inevitable impurity) is manufactured, and a 5 mm square is attached to the surface of a pure Cu target ( ⁇ 100 mm). A chip alloy target with 3 to 6 Cu alloy chips pasted near the erosion position was used.
  • composition contained in the adhesive Cu layer was controlled by changing the type and number of Cu alloy chips and the position of application.
  • FIG. 8B is a graph obtained by enlarging the range of 0 to 0.2 atomic% in FIG. 8A.
  • Example 1 after forming an adhesive Cu layer with the V, Zr, Re, Ru, Hf or Ga content adjusted to 50 nm on the surface of the TaN layer (the remainder being Cu and inevitable impurities), pure Cu The layer was formed by DC magnetron sputtering to a thickness of 200 nm to obtain a laminate.
  • the Cu-based wiring material is formed so as to cover the wiring groove or the interlayer connection path, and then heated or necessary. By further applying pressure accordingly, Cu-based wiring material can be embedded in wiring grooves and interlayer connection paths that do not impair the adhesion between the NOR layer and the wiring body.

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Abstract

A semiconductor device Cu wiring is embedded in a wiring groove or an interlayer connecting path formed on an insulating film on a semiconductor substrate. The Cu wiring is composed of a barrier layer, which is formed on the side of the wiring groove or the interlayer connecting path and is made of TaN, and a wiring main body section made of Cu containing one or more kinds of elements selected from among a group of Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, Re and Os by 0.05-3.0 atm% in total. The semiconductor device Cu wiring has excellent adhesion between the wiring main body section and the barrier layer.

Description

明 細 書  Specification
半導体装置の Cu配線およびその製造方法  Cu wiring of semiconductor device and manufacturing method thereof
技術分野  Technical field
[0001] 本発明は、半導体装置に関するものであり、より詳細には、例えば ULSI (Ultra L arge Scale Integrated— Circuit;超大規模集積回路)等に代表される Si半導体 デバイス等の半導体装置における Cu配線と該 Cu配線を形成する方法に関するもの である。  The present invention relates to a semiconductor device, and more specifically, for example, Cu wiring in a semiconductor device such as a Si semiconductor device represented by ULSI (Ultra Large Scale Integrated Circuit). And a method of forming the Cu wiring.
背景技術  Background art
[0002] 近年、 LSI (大規模集積回路)の高集積化や高速信号伝播の要求を満たすため設 計基準(デザインルール)は一層厳しくなつており、配線ピッチや配線幅、配線間距 離、配線同士を接続する層間接続路(ビア)などの縮小化が行なわれて!/、る。  [0002] In recent years, design standards (design rules) have become stricter in order to meet the demands for higher integration of LSIs (Large Scale Integrated Circuits) and high-speed signal propagation. Wiring pitch, wiring width, distance between wiring, wiring Reduction of interlayer connection paths (vias) that connect each other!
[0003] また、半導体装置の高集積化に対応するため、配線を多層構造にすることが検討 されており、配線溝(トレンチ)の幅に対する配線溝の深さの比(配線溝の深さ/幅) や、上層の配線と下層の配線同士を接続する層間接続路の幅に対する深さの比(層 間接続路の深さ/幅)は益々大きくなつてレ、る。  [0003] Further, in order to cope with higher integration of semiconductor devices, it has been studied to use a multilayer structure for wiring, and the ratio of the depth of the wiring groove to the width of the wiring groove (trench) (the depth of the wiring groove). / Width) and the ratio of the depth to the width of the interlayer connection path connecting the upper layer wiring and the lower layer wiring (depth / width of the layer connection path) is increasing.
[0004] 更には、配線回路の微細化や高集積化に伴い配線自体の抵抗が増加しつつあり、 信号伝達の遅延をひきおこしている。そこで従来の A1をベースにした配線材料 (以下 、 A1系配線材料ということがある)よりも電気抵抗を低減できる配線材料として、 Cuを ベースにした配線材料 (以下、 Cu系配線材料ということがある)を使用し、 Cu配線を 形成することが試みられてレ、る。  [0004] Furthermore, with the miniaturization and high integration of wiring circuits, the resistance of the wiring itself is increasing, causing a delay in signal transmission. Therefore, Cu-based wiring materials (hereinafter referred to as Cu-based wiring materials) can be used as wiring materials that can reduce electrical resistance compared to conventional A1-based wiring materials (hereinafter also referred to as A1-based wiring materials). There is an attempt to form a Cu wiring.
[0005] 多層構造の Cu配線を形成する方法として、ダマシン配線技術が知られている。こ の技術は、半導体基板上に設けられた絶縁膜に、配線溝や層間接続路を形成し、こ れらの開口部を純 Cuや Cu合金等の Cu系配線材料で覆った後、加熱加圧すること で Cu系配線材料を流動させて配線溝や層間接続路内に Cu系配線材料を埋め込む ことによって Cu配線を形成する方法である。なお、配線溝や層間接続路内に埋め込 まれていない余分な Cu系配線材料は、化学機械研磨(Chemical Mechanical P olish; CMP)して除去される。 [0006] ところで Cu配線の本体部を絶縁膜に直接接触させると、 Cuが絶縁膜へ拡散し、絶 縁膜の絶縁性を劣化させる。そこで Cuの絶縁膜への拡散を防止するために、配線 本体部と絶縁膜の間にバリア層を設ける必要がある。ところが配線溝や層間接続路 の開口部を覆うように形成された Cu系配線材料を、配線溝や層間接続路内に埋め 込むには、一般に 500〜700°C程度の高温に加熱するため、ノ リア層には、こうした 高温状態でバリア性を発揮することが要求される。そのためバリア層としては、 TaN 膜や TiN膜などの金属窒化膜が用いられている。特に TaN膜は、 TiN膜と比べて一 段と高温でもバリア性を発揮するため、広く用いられている。 A damascene wiring technique is known as a method for forming a multilayered Cu wiring. In this technology, wiring grooves and interlayer connection paths are formed in an insulating film provided on a semiconductor substrate, and these openings are covered with a Cu-based wiring material such as pure Cu or Cu alloy, and then heated. This is a method of forming Cu wiring by flowing Cu-based wiring material under pressure and embedding Cu-based wiring material in wiring grooves and interlayer connection paths. Excess Cu-based wiring material that is not embedded in wiring trenches or interlayer connection paths is removed by chemical mechanical polishing (CMP). [0006] By the way, if the main part of the Cu wiring is brought into direct contact with the insulating film, Cu diffuses into the insulating film and degrades the insulating properties of the insulating film. Therefore, in order to prevent diffusion of Cu into the insulating film, it is necessary to provide a barrier layer between the wiring body and the insulating film. However, in order to embed a Cu-based wiring material formed so as to cover the opening of the wiring groove or interlayer connection path in the wiring groove or interlayer connection path, it is generally heated to a high temperature of about 500 to 700 ° C. The NORIA layer is required to exhibit barrier properties at such high temperatures. For this reason, a metal nitride film such as a TaN film or a TiN film is used as the barrier layer. In particular, TaN films are widely used because they exhibit barrier properties even at higher temperatures than TiN films.
[0007] し力、し金属窒化膜などのセラミックス製バリア層の表面に、 Cu配線の本体部を直に 形成すると、ノ リア層と Cu配線の界面が Cu原子の主要な拡散経路となって Cuが拡 散し、ノ リア層と Cu配線の界面にボイドゃ亀裂が生じたり、或いは Cu配線自体が断 線したり、配線の移動 '変形が生じることがある。こうした問題は、エレクト口マイグレー シヨン (Electro Migration ; EM)やストレスマイグレーション (Stress Migration; SM)と呼ばれている。エレクト口マイグレーションとは、電流が流れている際に、電子 の流れと電界の効果によって配線材料を構成している原子が移動する現象を指し、 ストレスマイグレーションとは、電流が流れていない状態でも熱活性や引張応力によ つて粒界にボイドゃ断線が生じる現象を指す。  [0007] When the body of the Cu wiring is formed directly on the surface of a ceramic barrier layer such as a rust metal nitride film, the interface between the NORA layer and the Cu wiring becomes the main diffusion path for Cu atoms. Cu may diffuse and voids may form cracks at the interface between the NOR layer and the Cu wiring, or the Cu wiring itself may be disconnected or the wiring may be deformed. These problems are called electomigration (EM) and stress migration (SM). Elect mouth migration refers to a phenomenon in which atoms that make up a wiring material move due to the effects of electron flow and electric field when current is flowing.Stress migration refers to heat transfer even when no current flows. This refers to a phenomenon in which voids are broken at grain boundaries due to activity or tensile stress.
[0008] しかもバリア層と Cuの密着性は悪ぐ Cu配線力 Sバリア層から剥離してバリア層と Cu 配線の界面にボイド等が発生すると、 Cu配線の信頼性が低下する。そのためバリア 層と Cu系配線の密着性を高める必要がある。  [0008] Moreover, the adhesion between the barrier layer and Cu is poor. Cu wiring force When peeling from the S barrier layer and voids occur at the interface between the barrier layer and the Cu wiring, the reliability of the Cu wiring decreases. Therefore, it is necessary to improve the adhesion between the barrier layer and the Cu wiring.
[0009] ノ リア層と Cuの密着性が悪いことは、例えば特許文献 1に記載されている。この特 許文献 1には、ノ リア層と Cu配線の密着性が悪いと、ノ リア層と Cu配線との間で剥 離が生じやすいことが記載されており、剥離が生じると、半導体装置の動作時の熱ス トレスにより配線に断線等の不具合が発生し、半導体装置の信頼性が著しく低下す ること力 旨摘されている。そこでこの特許文献 1では、半導体装置の信頼性を高める ために、ノ リア層を設けずに、 Cu配線と絶縁膜の間に、高融点金属と Cuを主成分す る導電層を設けることが記載されており、導電層としては、 Tiと Cuとの金属間化合物 力 なる金属膜が例示されている。また、特許文献 1には、導電層と絶縁膜との間に 、 ノ リア層を設けてもよいことが記載されている。し力、し本発明者らが特許文献 1に記 載されている Cu配線の密着性について検討したところ、ノ リア層と配線との密着性 は充分ではなく、改善の余地があることが分かった。 [0009] The poor adhesion between the noria layer and Cu is described in Patent Document 1, for example. This Patent Document 1 describes that if the adhesion between the noria layer and the Cu wiring is poor, peeling is likely to occur between the noria layer and the Cu wiring. It is noted that the heat stress during the operation of the device causes problems such as disconnection in the wiring, which significantly reduces the reliability of the semiconductor device. Therefore, in Patent Document 1, in order to improve the reliability of a semiconductor device, a conductive layer mainly composed of a refractory metal and Cu is provided between a Cu wiring and an insulating film without providing a noor layer. As the conductive layer, a metal film composed of an intermetallic compound of Ti and Cu is exemplified. In addition, Patent Document 1 describes a gap between a conductive layer and an insulating film. It is described that a noria layer may be provided. However, when the present inventors examined the adhesion of the Cu wiring described in Patent Document 1, it was found that the adhesion between the NOR layer and the wiring was not sufficient and there was room for improvement. It was.
[0010] また、上述したように、近年では、配線溝や層間接続路の幅は益々小さぐまた配 線溝や層間接続路の深さ/幅比は益々大きくなつて!/、るため、 Cu系配線材料を配 線溝や層間接続路内に確実に埋め込むことは一層難しくなつている。 [0010] Further, as described above, in recent years, the width of wiring grooves and interlayer connection paths has become smaller and the depth / width ratio of wiring grooves and interlayer connection paths has become larger and larger! / It is becoming more difficult to reliably embed Cu-based wiring materials in wiring grooves and interlayer connection paths.
特許文献 1 :特開平 10— 223635号公報  Patent Document 1: Japanese Patent Laid-Open No. 10-223635
発明の開示  Disclosure of the invention
[0011] 本発明は、この様な状況に鑑みてなされたものであり、その目的は、配線溝や層間 接続路表面に形成された TaNからなるバリア層との密着性が良好な Cu配線と、この Cu配線を製造できる方法を提供することにある。更に、本発明の他の目的は、半導 体基板上の絶縁膜に形成された配線溝や層間接続路の幅が狭ぐ深い場合でも、 ノ リア層との密着性が良好で、配線溝や層間接続路の隅々に亘つて埋め込まれてい る Cu配線と、この Cu配線を製造できる方法を提供することにある。  The present invention has been made in view of such a situation, and an object of the present invention is to provide a Cu wiring having good adhesion to a barrier layer made of TaN formed on a wiring groove or an interlayer connection path surface. It is to provide a method capable of manufacturing this Cu wiring. Furthermore, another object of the present invention is to provide good adhesion with the noria layer even when the wiring groove formed in the insulating film on the semiconductor substrate or the width of the interlayer connection path is narrow and deep. Another object is to provide a Cu wiring embedded in every corner of the interlayer connection path and a method for manufacturing this Cu wiring.
[0012] 本発明者らは、 TaNからなるバリア層と Cu配線の密着性を高めるために、鋭意検 討を重ねてきた。その結果、(l) Cu配線の配線本体部に特定の元素を特定量含有 させる力、、(2) Cu配線の配線本体部を純 Cuとし、この純 Cuからなる配線本体部とバ リア層の間に、特定の元素を特定量含有した中間層を介在させれば、配線本体部と ノ リア層の密着性を高めることができること、(3)また配線溝や層間接続路の幅が狭 ぐ深い場合であって、配線溝や層間接続路を覆うように Cu系配線材料が形成され たときは、加熱処理するか、必要に応じて更に加圧すれば、配線溝や層間接続路の 隅々に亘つて埋め込むことができることを見出し、本発明を完成した。  [0012] The present inventors have intensively studied in order to improve the adhesion between the barrier layer made of TaN and the Cu wiring. As a result, (l) the force to contain a specific amount of a specific element in the wiring body of the Cu wiring, (2) the wiring body of the Cu wiring is pure Cu, and the wiring body and barrier layer made of this pure Cu. If an intermediate layer containing a specific amount of a specific element is interposed in between, the adhesion between the wiring main body and the NORA layer can be improved, and (3) the width of the wiring groove and interlayer connection path is narrow. If the Cu-based wiring material is formed so as to cover the wiring grooves and interlayer connection paths, heat treatment or further pressurization as necessary may result in the wiring grooves and interlayer connection paths. The present invention was completed by finding that it can be embedded in every corner.
[0013] 即ち、上記課題を解決することができた本発明に係る半導体装置の Cu配線とは、 半導体基板上の絶縁膜に形成された配線溝または層間接続路に埋め込まれた Cu 配線であって、前記 Cu配線は、配線溝側または層間接続路側に形成された TaNか らなるバリア層と、 Pt、 In、 Ti、 Nb、 B、 Fe、 V、 Zr、 Hf、 Ga、 Tl、 Ru、 Reおよび Osよ りなる群から選ばれる 1種以上の元素を合計で 0. 05〜3. 0原子%含有する Cuから なる配線本体部で構成されて!/、る点に要旨を有する。 [0014] また、上記課題は、(1)配線溝側または層間接続路側に形成された TaNからなる ノ リア層と、(2)純 Cuからなる配線本体部と、(3)前記バリア層と前記配線本体部と の間にこれらと接して形成され、かつ Pt、 In、 Ti、 Nb、 B、 Fe、 V、 Zr、 Hf、 Ga、 Tl、 Ru、 Reおよび Osよりなる群から選ばれる 1種以上の元素を合計で O. 05-3. 0原子 %含有する Cuからなる中間層で構成されている Cu配線であっても解決できる。前記 中間層の厚みは、例えば、 10〜50nmである。 That is, the Cu wiring of the semiconductor device according to the present invention that has solved the above problems is a Cu wiring buried in a wiring groove or an interlayer connection formed in an insulating film on a semiconductor substrate. The Cu wiring includes a barrier layer made of TaN formed on the wiring groove side or the interlayer connection path side, Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, It is composed of a wiring main body part made of Cu containing 0.05 to 3.0 atomic% in total of one or more elements selected from the group consisting of Re and Os! [0014] In addition, the above-described problems are (1) a noble layer made of TaN formed on the wiring groove side or the interlayer connection path side, (2) a wiring main body portion made of pure Cu, and (3) the barrier layer. It is formed between and in contact with the wiring main body, and is selected from the group consisting of Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, Re and Os 1 This problem can be solved even with Cu wiring composed of an intermediate layer made of Cu containing a total of O. 05-3. The thickness of the intermediate layer is, for example, 10 to 50 nm.
[0015] 上記配線溝または上記層間接続路は、幅が 0. 15 μ m以下で、この幅に対する深 さの比(深さ/幅)が 1以上であってもよい。  [0015] The wiring groove or the interlayer connection path may have a width of 0.15 μm or less and a depth ratio (depth / width) of 1 or more.
[0016] 本発明に係る半導体装置の Cu配線は、半導体基板上の絶縁膜に形成された配線 溝または層間接続路の表面に TaN層を形成する工程と、この TaN層の表面にスパッ タリング法で Pt、 In、 Ti、 Nb、 B、 Fe、 V、 Zr、 Hf、 Ga、 Tl、 Ru、 Reおよび Osよりなる 群から選ばれる 1種以上の元素を合計で 0. 05-3. 0原子%含有する Cu層を形成 する工程を経ることによって製造できる。前記配線溝または前記層間接続路が、幅が 0. 15 111以下で、この幅に対する深さの比(深さ/幅)が 1以上の場合であって、こ れらの中に Cu層を押し込むのが難しいときは、押し込む際に、加熱するか、必要に 応じて更に加圧をすればよい。  [0016] Cu wiring of a semiconductor device according to the present invention includes a step of forming a TaN layer on the surface of a wiring groove or an interlayer connection formed in an insulating film on a semiconductor substrate, and a sputtering method on the surface of the TaN layer. A total of one or more elements selected from the group consisting of Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, Re, and Os. It can be manufactured through a process of forming a Cu layer containing 1%. The wiring groove or the interlayer connection path has a width of 0.115 111 or less and a depth ratio (depth / width) of 1 or more, and a Cu layer is inserted in these. If it is difficult to push in, heat it up or pressurize it as needed.
[0017] また、本発明に係る半導体装置の Cu配線は、半導体基板上の絶縁膜に形成され た配線溝または層間接続路の表面に TaN層を形成する工程と、この TaN層の表面 にスパッタリング法で Pt、 In、 Ti、 Nb、 B、 Fe、 V、 Zr、 Hf、 Ga、 Tl、 Ru、 Reおよび O sよりなる群から選ばれる 1種以上の元素を合計で 0. 05-3. 0原子%含有する Cu 層を形成する工程と、前記 Cu層の表面に純 Cu層を形成する工程を経ることによつて も製造できる。前記配線溝または前記層間接続路が、幅が 0. Ι δ πι以下で、この幅 に対する深さの比(深さ/幅)が 1以上の場合であって、これらの中に純 Cu層を押し 込むのが難しいときは、押し込む際に、加熱するか、必要に応じて更に加圧をすれ ばよい。  [0017] Further, the Cu wiring of the semiconductor device according to the present invention includes a step of forming a TaN layer on the surface of a wiring groove or an interlayer connection formed in an insulating film on a semiconductor substrate, and sputtering on the surface of the TaN layer. The total amount of one or more elements selected from the group consisting of Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, Re, and Os by the law is 0.05-3. It can also be manufactured through a process of forming a Cu layer containing 0 atomic% and a process of forming a pure Cu layer on the surface of the Cu layer. The wiring groove or the interlayer connection path has a width of not more than 0. Ι δ πι and a ratio of depth to the width (depth / width) of 1 or more, and a pure Cu layer is included in these. If it is difficult to push in, heat it up or pressurize it as needed.
[0018] 本発明によれば、 Cu配線の配線本体部の成分組成を適切に調整する力、、 Cu配線 の配線本体部が純 Cuの場合は、純 Cuと TaNからなるバリア層の間に成分組成を適 切に調整した中間層を介在させて!/、るため、配線本体部とバリア層の密着性を改善 できる。これにより配線本体部とバリア層の間にボイド等が発生せず、 Cu配線の信頼 性を高めることができる。し力、も本発明によれば、配線溝や層間接続路の幅が狭ぐ 深い場合でも、配線溝や層間接続路を覆うように Cu系配線材料を形成した後、加熱 するか、必要に応じて更に加圧することで、ノ リア層と配線本体部の密着性を損なう ことなぐ配線溝や層間接続路内に Cu系配線材料を埋め込むことができる。 [0018] According to the present invention, the force for appropriately adjusting the component composition of the wiring body portion of the Cu wiring, and, when the wiring body portion of the Cu wiring is pure Cu, between the barrier layer made of pure Cu and TaN, Improve the adhesion between the wiring body and the barrier layer by interposing an intermediate layer with an appropriately adjusted composition! it can. As a result, no voids are generated between the wiring body and the barrier layer, and the reliability of the Cu wiring can be improved. However, according to the present invention, even when the width of the wiring groove or the interlayer connection path is narrow, the Cu-based wiring material is formed so as to cover the wiring groove or the interlayer connection path, and then heated or necessary. By further applying pressure accordingly, Cu-based wiring material can be embedded in wiring grooves and interlayer connection paths that do not impair the adhesion between the NOR layer and the wiring body.
図面の簡単な説明  Brief Description of Drawings
[0019] [図 1]図 1は、密着性向上元素の含有量と、 MELT法で求めた密着性 Cu層の K の  [0019] [Fig. 1] Fig. 1 shows the content of adhesion improving elements and the K of the adhesion Cu layer obtained by the MELT method.
appl 関係を示すグラフである。図 1の(b)は、図 1の(a)のうち、 0〜0. 2原子%の範囲を 拡大したグラフである。  It is a graph which shows appl relation. Fig. 1 (b) is a graph enlarging the range of 0 to 0.2 atomic% of Fig. 1 (a).
[図 2]図 2は、 Feの含有量と、 MELT法で求めた密着性 Cu層の K の関係を示すグ  [Fig. 2] Fig. 2 is a graph showing the relationship between the Fe content and the K of the adhesive Cu layer obtained by the MELT method.
appl  appl
ラフである。  It is rough.
[図 3]図 3は、常圧ァニール処理または高圧ァニール処理の温度と、 MELT法で求 めた密着性 Cu層の K の関係を示すグラフである。  [FIG. 3] FIG. 3 is a graph showing the relationship between the temperature of atmospheric annealing or high-pressure annealing and the K of the adhesive Cu layer obtained by the MELT method.
appl  appl
[図 4]図 4は、密着性向上元素の含有量と、 MELT法で求めた密着性 Cu層の K の  [Fig. 4] Fig. 4 shows the content of adhesion improving elements and the K content of the adhesion Cu layer obtained by the MELT method.
appl  appl
[図 5]図 5は、密着性 Cu層の厚みと、 MELT法で求めた密着性 Cu層の K の関係を [Figure 5] Figure 5 shows the relationship between the thickness of the adhesive Cu layer and the K of the adhesive Cu layer obtained by the MELT method.
appl  appl
[図 6]図 6は、密着性 Cu層の厚みと、 MELT法で求めた密着性 Cu層の K の関係を [Figure 6] Figure 6 shows the relationship between the thickness of the adhesive Cu layer and the K of the adhesive Cu layer obtained by the MELT method.
appl  appl
[図 7]図 7は、常圧ァニール処理または高圧ァニール処理の温度と、 MELT法で求 めた密着性 Cu層の K の関係を示すグラフである。 [FIG. 7] FIG. 7 is a graph showing the relationship between the temperature of atmospheric annealing or high-pressure annealing and the K of the adhesive Cu layer obtained by the MELT method.
appl  appl
[図 8]図 8は、密着性向上元素の含有量と、 MELT法で求めた密着性 Cu層の K の  [Fig. 8] Fig. 8 shows the content of the adhesion improving element and the K of the adhesion Cu layer obtained by the MELT method.
appl 関係を示すグラフである。図 8の(b)は、図 8の(a)のうち、 0〜0. 2原子%の範囲を 拡大したグラフである。  It is a graph which shows appl relation. (B) in FIG. 8 is a graph obtained by enlarging the range of 0 to 0.2 atomic% in (a) of FIG.
[図 9]図 9は、密着性向上元素の含有量と、 MELT法で求めた密着性 Cu層の K の  [Fig. 9] Fig. 9 shows the content of the adhesion improving element and the K of the adhesion Cu layer obtained by the MELT method.
appl 発明を実施するための最良の形態  appl The best mode for carrying out the invention
[0020] Cu配線の配線本体部と、 TaNからなるバリア層との密着性を高めるには、ノ リア層 と直に接する層の成分組成を適切に調整することが重要である。 [0020] To improve the adhesion between the wiring body of the Cu wiring and the barrier layer made of TaN, It is important to appropriately adjust the component composition of the layer in direct contact with the substrate.
[0021] 即ち、ノ リア層と直に接する層が配線本体部の場合は、配線本体部を Pt、 In、 Ti、 Nb、 Bおよび Feよりなる群から選ばれる 1種以上の元素、或いはこれらの元素の他、 V、 Zr、 Hf、 Ga、 Tl、 Ru、 Reおよび Osよりなる群から選ばれる 1種以上の元素を合 計で 0. 05-3. 0原子%含有する Cuからなる配線とすればよい。一方、配線本体部 が純 Cuの場合は、配線本体部とバリア層との間に、これらと接するように、 Pt、 In、 Ti 、 Nb、 Bおよび Feよりなる群力、ら選ばれる 1種以上の元素、或いはこれらの元素の他 、 V、 Zr、 Hf、 Ga、 Tl、 Ru、 Reおよび Osよりなる群から選ばれる 1種以上の元素を合 計で 0. 05-3. 0原子%含有する Cuからなる中間層を設ければよい。 That is, when the layer directly in contact with the NOR layer is the wiring body part, the wiring body part is one or more elements selected from the group consisting of Pt, In, Ti, Nb, B, and Fe, or these In addition to the above elements, a wiring made of Cu containing 0.05 to 3.0 atomic% in total of one or more elements selected from the group consisting of V, Zr, Hf, Ga, Tl, Ru, Re and Os And it is sufficient. On the other hand, when the wiring body is pure Cu, one type selected from the group force consisting of Pt, In, Ti, Nb, B, and Fe so as to be in contact with the barrier between the wiring body and the barrier layer. In addition to these elements, or in addition to these elements, one or more elements selected from the group consisting of V, Zr, Hf, Ga, Tl, Ru, Re, and Os are combined. An intermediate layer made of Cu may be provided.
[0022] Pt、 In、 Ti、 Nb、 B、 Fe、 V、 Zr、 Hf、 Ga、 Tl、 Ru、 Reおよび Osは、いずれも、本 発明者らが種々実験を繰返した結果、 TaNからなるバリア層と Cuの密着性を高める 作用を有することが明らかになった元素(以下、密着性向上元素ということがある)で ある。これらの密着性向上元素がバリア層と Cuの密着性を高める理由については、 次のように考えられる。 [0022] Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, Re, and Os all consist of TaN as a result of various experiments conducted by the inventors. It is an element that has been found to have an effect of improving the adhesion between the barrier layer and Cu (hereinafter, sometimes referred to as an adhesion improving element). The reasons why these adhesion improving elements enhance the adhesion between the barrier layer and Cu are considered as follows.
[0023] Pt、 B、 Ru、 Reおよび Osは、バリア層と Cu (密着性向上元素を含有する配線本体 部または密着性向上元素を含有する中間層)の界面に析出して該界面における残 留応力を緩和する作用を有していると考えている。残留応力は、ノ リア層と Cuの界 面に最も高く付与されるため、この残留応力を緩和することにより、 Cuのバリア層に 対する密着性が向上すると考えられる。  [0023] Pt, B, Ru, Re, and Os are precipitated at the interface between the barrier layer and Cu (the wiring body containing the adhesion improving element or the intermediate layer containing the adhesion improving element) and remain at the interface. It is considered that it has the action of relaxing the residual stress. Residual stress is most highly applied to the interface between the noria layer and Cu, so it is considered that the adhesion to the Cu barrier layer is improved by relaxing this residual stress.
[0024] In、 Gaおよび T1は、ノ リア層と Cuの界面に拡散して該界面に Taと、 In、 Ga或いは T1の合金層を形成し、この合金層がバリア層と Cuの密着性を向上させるのに作用す ると考えられる。特に、 Inは融点が約 156°C、 Gaは融点が 29. 76°C、 T1は融点が 30 4°Cと低ぐ 50°C程度未満の低温や室温でも Cu中を拡散し易いと考えられる。  [0024] In, Ga, and T1 diffuse at the interface between the NOR layer and Cu to form an alloy layer of Ta, In, Ga, or T1 at the interface, and this alloy layer adheres to the barrier layer and Cu. It is thought that it works to improve. In particular, In has a melting point of about 156 ° C, Ga has a melting point of 29.76 ° C, and T1 has a melting point of 294 ° C, which is low, less than about 50 ° C. It is done.
[0025] Ti、 Nb、 Fe、 V、 Zrおよび Hfは、いずれも化学平衡計算力、らバリア層との反応性を 考えて選択した元素であり、良好な反応性によってこれらの元素と Taの間で化合物 や化学結合が形成され、 Cuのバリア層に対する密着性が向上すると考えられる。例 えば、 Tiは、 TaNからなるバリア層と接触することで、 TiNを形成すると考えられ、この TiNが Cuのバリア層に対する密着性を向上させると考えられる。 Feは、 TaNからなる ノ リア層と接触することで、低温側では Fe2Taまたは FeTa2を形成し、これらの化合物 力 SCuのバリア層に対する密着性を向上させると考えられる。 Nbは、 TaNからなるバリ ァ層と接触することで、 NbNを形成し、この NbNが Cuのバリア層に対する密着性を 向上させると考えられる。 Vは、 TaNからなるバリア層と接触することで、 VNを形成し 、この VNが Cuのバリア層に対する密着性を向上させると考えられる。 Zrは、 TaNか らなるバリア層と接触することで、 ZrNを形成し、この ZrNが Cuのバリア層に対する密 着性を向上させると考えられる。 Hfは、 TaNからなるバリア層と接触することで、 HfN を形成し、この HfNが Cuのバリア層に対する密着性を向上させると考えられる。 [0025] Ti, Nb, Fe, V, Zr, and Hf are all elements selected in consideration of the chemical equilibrium calculation power and reactivity with the barrier layer. Compounds and chemical bonds are formed between them, and the adhesion of Cu to the barrier layer is thought to improve. For example, Ti is considered to form TiN when in contact with a barrier layer made of TaN, and this TiN is considered to improve the adhesion of Cu to the barrier layer. Fe consists of TaN By contacting with the noria layer, it is considered that Fe 2 Ta or FeTa 2 is formed on the low temperature side and the adhesion of these compound forces SCu to the barrier layer is improved. Nb comes into contact with a TaN barrier layer to form NbN, and this NbN is thought to improve the adhesion of Cu to the barrier layer. V comes into contact with a barrier layer made of TaN to form VN, and this VN is considered to improve the adhesion of Cu to the barrier layer. Zr comes into contact with a barrier layer made of TaN to form ZrN, which is thought to improve the adhesion of Cu to the barrier layer. It is considered that Hf forms HfN by coming into contact with a TaN barrier layer, and this HfN improves the adhesion of Cu to the barrier layer.
[0026] 上記密着性向上元素を含有する Cu層を配線本体部として設ける場合は、バリア層 との密着性を高めると共に、配線自体の電気抵抗率を高めないために、上記密着性 向上元素のなかでも、特に Bや Ptを含有することが好ましい。また、バリア層との密着 性を高めると共に、配線溝や層間接続路への埋め込み性を高めるには、上記密着 性向上元素のなかでも、特に Inを含有することが好ましい。  [0026] When the Cu layer containing the above-mentioned adhesion improving element is provided as a wiring main body portion, the adhesion improving element is used in order to increase the adhesion to the barrier layer and not to increase the electrical resistivity of the wiring itself. Among these, it is particularly preferable to contain B or Pt. Further, in order to improve the adhesion to the barrier layer and to improve the embedding property in the wiring groove or the interlayer connection path, it is particularly preferable to contain In among the above-mentioned adhesion improving elements.
[0027] 一方、上記密着性向上元素を含有する Cu層を中間層として設ける場合は、主とし てバリア層との密着性を高めるために、上記密着性向上元素のなかでも、特に Nbや Ti、 Feを含有することが好ましい。  [0027] On the other hand, when a Cu layer containing the above-mentioned adhesion improving element is provided as an intermediate layer, in order to mainly improve the adhesion with the barrier layer, among the above-mentioned adhesion improving elements, particularly Nb and Ti , Fe is preferably contained.
[0028] なお、本発明では、上記密着性向上元素を含有する Cu層を、配線本体部または 中間層として設ける場合を問わず、密着性 Cu層ということがある。  In the present invention, the Cu layer containing the above-mentioned adhesion improving element may be referred to as an adhesive Cu layer regardless of the case where it is provided as a wiring body portion or an intermediate layer.
[0029] 配線本体部または中間層に含有させる密着性向上元素の量は、合計で 0. 05〜3 . 0原子%であればよい。密着性向上元素が 0. 05原子%未満では、ノ リア層と配線 本体部の密着性を充分に高めることができない。密着性向上元素の含有量は 0. 05 原子%以上であり、好ましくは 0. 5原子%以上、より好ましくは 1原子%以上、更に好 ましくは 1. 5原子%以上である。しかし密着性向上元素を過剰に含有させても、その 効果は飽和するし、過剰な元素は Cu配線の電気抵抗率を高める原因となる。従って 密着性向上元素の含有量は 3. 0原子%以下であり、好ましくは 2. 5原子%以下、よ り好ましくは 2. 0原子%以下である。  [0029] The amount of the adhesion improving element contained in the wiring main body or the intermediate layer may be 0.05 to 3.0 atomic% in total. If the adhesion improving element is less than 0.05 atomic%, the adhesion between the NOR layer and the wiring main body cannot be sufficiently improved. The content of the adhesion improving element is 0.05 atomic% or more, preferably 0.5 atomic% or more, more preferably 1 atomic% or more, and even more preferably 1.5 atomic% or more. However, even if an adhesion improving element is contained excessively, the effect is saturated, and the excessive element increases the electrical resistivity of the Cu wiring. Therefore, the content of the adhesion improving element is 3.0 atomic% or less, preferably 2.5 atomic% or less, more preferably 2.0 atomic% or less.
[0030] 中間層の厚みは特に限定されないが、バリア層と配線本体部の密着性を改善する には 10nm以上であるのがよい。より好ましくは 15nm以上、更に好ましくは 20nm以 上である。しかし中間層を厚くし過ぎてもバリア層と配線本体部の密着性を改善する 効果は飽和するため、中間層の厚みの上限は 50nm程度とすればよい。より好ましく は 45nm以下であり、更に好ましくは 40nm以下である。 [0030] The thickness of the intermediate layer is not particularly limited, but is preferably 10 nm or more in order to improve the adhesion between the barrier layer and the wiring body. More preferably 15 nm or more, still more preferably 20 nm or more Above. However, even if the intermediate layer is made too thick, the effect of improving the adhesion between the barrier layer and the wiring body is saturated, so the upper limit of the intermediate layer thickness should be about 50 nm. More preferably, it is 45 nm or less, More preferably, it is 40 nm or less.
[0031] 中間層の厚みとは、絶縁膜に形成された配線溝または層間接続路の形状が露出 するように切断した Cu配線の断面を観察し、配線溝または層間接続路の内壁 (側壁 または底面)に沿って形成された中間層の厚みを測定したときに、最も小さい厚みを 意味する。例えば、配線溝や層間接続路の底面には、中間層が形成され易いが、配 線溝や層間接続路の側壁には中間層が形成され難い。そのため配線溝や層間接続 路の側壁に形成された中間層の厚みは小さくなる傾向がある。  [0031] The thickness of the intermediate layer refers to the cross section of the Cu wiring cut so that the shape of the wiring groove or interlayer connection path formed in the insulating film is exposed, and the inner wall (side wall or side wall of the wiring groove or interlayer connection path). It means the smallest thickness when the thickness of the intermediate layer formed along the bottom surface is measured. For example, an intermediate layer is easily formed on the bottom surface of a wiring groove or an interlayer connection path, but an intermediate layer is not easily formed on the side wall of the wiring groove or the interlayer connection path. Therefore, the thickness of the intermediate layer formed on the side wall of the wiring groove or the interlayer connection path tends to be small.
[0032] 配線溝または層間接続路が形成されている絶縁膜の種類は特に限定されず、例え ば、酸化シリコンゃ窒化シリコン、 BSG (Boro- Silicate Glass)、 PSG (Phospho-Silicat e〇1&33)、8?30
Figure imgf000009_0001
、丁£03 10?)等を用ぃることがで きる。
[0032] The type of insulating film in which the wiring trench or interlayer connection path is formed is not particularly limited. For example, silicon oxide is silicon nitride, BSG (Boro-Silicate Glass), PSG (Phospho-Silicat e01 & 33) 8-30
Figure imgf000009_0001
, £ 03 10?) Etc. can be used.
[0033] 次に、本発明の Cu配線を製造する方法について説明する。ノ リア層と直に接する 層が配線本体部の場合は、半導体基板上の絶縁膜に形成された配線溝または層間 接続路の表面に TaN層を形成した後、この TaN層の表面にスパッタリング法で Pt、 I n、 Ti、 Nb、 B、 Fe、 V、 Zr、 Hf、 Ga、 Tl、 Ru、 Reおよび Osよりなる群から選ばれる 1 種以上の元素 (密着性向上元素)を合計で 0. 05〜3. 0原子%含有する密着性 Cu 層(即ち、配線本体部)を形成すればよ!/、。  Next, a method for manufacturing the Cu wiring of the present invention will be described. If the layer that is in direct contact with the NOR layer is the wiring body, a TaN layer is formed on the surface of the wiring groove or interlayer connection formed in the insulating film on the semiconductor substrate, and then the surface of this TaN layer is sputtered. 1 or more elements selected from the group consisting of Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, Re, and Os (adhesion improving element) in total 05 ~ 3.0 Adhesive Cu layer (ie, the wiring body) should be formed! /.
[0034] TaN層を形成する方法は特に限定されず、スパッタリング法(例えば、 DCマグネト ロンスパッタリング法)や CVD法等で形成すればよ!/、。  [0034] The method for forming the TaN layer is not particularly limited, and may be formed by sputtering (for example, DC magnetron sputtering) or CVD!
[0035] TaN層の表面に密着性 Cu層を形成するには、スパッタリング法を採用すればよい 。スパッタリング法を採用すれば、密着性向上元素を含有する密着性 Cu層を簡単に TaN層付き配線溝や層間接続路の表面に形成できる。  [0035] In order to form an adhesive Cu layer on the surface of the TaN layer, a sputtering method may be employed. If the sputtering method is adopted, an adhesive Cu layer containing an adhesion improving element can be easily formed on the surface of a wiring groove with an TaN layer or an interlayer connection path.
[0036] スパッタリング法は、例えば、 (DC)マグネトロンスパッタリング法やロングスロースパ ッタリング法であってもよい。特にロングスロースパッタリング法は、後述するように埋 め込み性の観点から好ましく採用できる。ロングスロースパッタリング法とは、ウェハー とターゲットの距離を長く取ったスパッタリング法であり、本発明では、この距離を 150 mm以上としてスパッタする方法をロングスロースパッタリングと呼ぶ。 [0036] The sputtering method may be, for example, a (DC) magnetron sputtering method or a long throw sputtering method. In particular, the long throw sputtering method can be preferably employed from the viewpoint of embedding properties as described later. The long throw sputtering method is a sputtering method in which the distance between the wafer and the target is long. Sputtering with a thickness of at least mm is called long throw sputtering.
[0037] 密着性向上元素を含有する密着性 Cu層をスパッタリング法で形成するには、スパ ッタリングターゲットとして、密着性向上元素を含有する Cuターゲットを用いるか、純 Cuターゲットの表面に密着性向上元素を含有する Cu片または密着性向上元素から なる金属片を貼付したチップオンターゲットを用い、不活性ガス雰囲気下でスパッタリ ングすればよい。 [0037] To form an adhesion Cu layer containing an adhesion improving element by sputtering, a Cu target containing an adhesion improving element is used as a sputtering target, or adhesion to the surface of a pure Cu target. Sputtering may be performed in an inert gas atmosphere using a chip-on target to which a Cu piece containing an improving element or a metal piece made of an adhesion improving element is attached.
[0038] 不活性ガスとしては、例えば、ヘリウムやネオン、アルゴン、クリプトン、キセノン、ラド ンなどを用いることができる。好ましくはアルゴンやキセノンを用いるのがよぐ特にァ ルゴンは比較的安価であり、好適に用いることができる。その他のスパッタリング条件 (例えば、到達真空度、スパッタガス圧、放電パワー密度、基板温度、極間距離など) は、特に限定されず、通常の範囲で調整すればよい。  [0038] As the inert gas, for example, helium, neon, argon, krypton, xenon, or radon can be used. Argon or xenon is preferably used, and especially argon is relatively inexpensive and can be suitably used. Other sputtering conditions (for example, ultimate vacuum, sputtering gas pressure, discharge power density, substrate temperature, interelectrode distance, etc.) are not particularly limited, and may be adjusted within a normal range.
[0039] スパッタリングで形成する密着性 Cu層の厚みは、配線溝や層間接続路の深さに応 じて変更すればよぐ少なくとも配線溝または層間接続路の深さと等しい厚みの密着 性 Cu層を形成すればよい。密着性 Cu層の厚みの上限は、例えば 2 である。厚 みが大きくなり過ぎると、密着性 Cu層の強度が大きくなるため、後述するように加熱- 加圧しても密着性 Cu層を配線溝や層間接続路に埋め込むことが難くなる。  [0039] The thickness of the adhesive Cu layer formed by sputtering may be changed according to the depth of the wiring groove or interlayer connection path. The adhesive Cu layer having a thickness at least equal to the depth of the wiring groove or interlayer connection path. May be formed. The upper limit of the thickness of the adhesive Cu layer is, for example, 2. If the thickness is too large, the strength of the adhesive Cu layer will increase, so that it will be difficult to embed the adhesive Cu layer in the wiring trench or interlayer connection path even after heating and pressurizing as described later.
[0040] 一方、配線本体部が純 Cuの場合は、半導体基板上の絶縁膜に形成された配線溝 または層間接続路の表面に TaN層を形成した後、この TaN層の表面にスパッタリン グ法で Pt、 In、 Ti、 Nb、 B、 Fe、 V、 Zr、 Hf、 Ga、 Tl、 Ru、 Reおよび Osよりなる群か ら選ばれる 1種以上の元素を合計で 0. 05〜3. 0原子%含有する密着性 Cu層(即ち 、中間層)を形成し、次いで前記密着性 Cu層の表面に純 Cu層(即ち、配線本体部) を形成すればよい。  [0040] On the other hand, when the wiring body is pure Cu, a TaN layer is formed on the surface of the wiring trench or interlayer connection path formed in the insulating film on the semiconductor substrate, and then sputtered on the surface of this TaN layer. One or more elements selected from the group consisting of Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, Re, and Os in a total of 0.05 to 3. An adhesive Cu layer containing 0 atomic% (that is, an intermediate layer) may be formed, and then a pure Cu layer (that is, a wiring body portion) may be formed on the surface of the adhesive Cu layer.
[0041] TaN層の表面に中間層として密着性 Cu層を形成する方法は、密着性 Cu層を配線 本体部として形成する場合と同じでよい。  [0041] The method for forming the adhesive Cu layer as an intermediate layer on the surface of the TaN layer may be the same as the method for forming the adhesive Cu layer as the wiring body.
[0042] ノ リア層と配線本体部の間に、中間層として密着性 Cu層を形成する場合は、密着 性 Cu層の厚みを 10〜50nm程度とすればよい。 [0042] When an adhesive Cu layer is formed as an intermediate layer between the noria layer and the wiring main body, the thickness of the adhesive Cu layer may be about 10 to 50 nm.
[0043] 純 Cu層を形成する方法は特に限定されな!/、が、例えば、電解メツキ法や化学気相 成長法(CVD法)、(アーク)イオンプレーティング法、スパッタリング法などを採用で きる。特に電解メツキ法を採用すれば、純 Cu層を配線溝や層間接続路の底から徐々 に埋め込みながら充填することができる。スパッタリング法は、例えば、(DC)マグネト ロンスパッタリング法やロングスロースパッタリング法であってもよぐ特に埋め込み性 の観点からロングスロースパッタリング法を好ましく採用できる。純 Cuの純度は、例え ば、 99原子%以上(特に、 99. 9—99. 99原子%)であればよい。 [0043] The method of forming a pure Cu layer is not particularly limited! /, But, for example, an electrolytic plating method, a chemical vapor deposition method (CVD method), an (arc) ion plating method, a sputtering method, etc. can be adopted. wear. In particular, if the electrolytic plating method is used, it is possible to fill a pure Cu layer while gradually burying it from the bottom of the wiring groove or interlayer connection path. As the sputtering method, for example, a (DC) magnetron sputtering method or a long throw sputtering method may be used. In particular, the long throw sputtering method can be preferably employed from the viewpoint of embedding. For example, the purity of pure Cu may be 99 atomic% or more (particularly 99.9-99.99 atomic%).
[0044] 純 Cu層の厚みは、配線溝や層間接続路の深さに応じて変更すればよぐ少なくと も配線溝または層間接続路の深さと等しレ、厚みの純 Cu層を形成すればよ!/、。純 Cu 層の厚みの上限は、例えば 2 である。厚みが大きくなり過ぎると、純 Cu層の強度 が大きくなるため、純 Cu層をスパッタリング法で形成する場合には、後述するように加 熱-加圧しても純 Cu層を配線溝や層間接続路に埋め込むことが難しくなる。  [0044] If the thickness of the pure Cu layer is changed according to the depth of the wiring groove or interlayer connection path, the thickness of the pure Cu layer is at least equal to the depth of the wiring groove or interlayer connection path. Do it! / The upper limit of the thickness of the pure Cu layer is, for example, 2. If the thickness becomes too large, the strength of the pure Cu layer will increase, so when forming a pure Cu layer by sputtering, the pure Cu layer will be connected to wiring trenches and interlayer connections even when heated and pressurized as described later. It becomes difficult to embed in the road.
[0045] 例えば、配線溝または層間接続路カ 幅が 0. 15 μ m以下で、この幅に対する深さ の比(深さ/幅)が 1以上の場合に、密着性向上元素を含有する Cu層や純 Cu層を 配線本体部としてスパッタリング法で形成すると、配線溝または層間接続路の幅が狭 ぐまた深いため、配線本体部が配線溝や層間接続路内に完全に埋め込まれず、配 線本体部が配線溝や層間接続路の開口部を覆うようにブリッジングして、配線溝や 層間接続路の内部に空隙が形成されることがある。  [0045] For example, when the width of a wiring groove or interlayer connection path is 0.15 μm or less and the ratio of depth to this width (depth / width) is 1 or more, Cu containing an adhesion improving element When a wiring layer or pure Cu layer is formed by sputtering as a wiring body, the wiring body or wiring layer is not completely embedded in the wiring groove or interlayer connection path because the wiring groove or interlayer connection path is narrow and deep. The main body part may be bridged so as to cover the wiring groove and the opening of the interlayer connection path, and a gap may be formed inside the wiring groove and the interlayer connection path.
[0046] そこで配線本体部をスパッタリング法で形成した場合は、これを加熱しつつ加圧し て配線本体部を配線溝または層間接続路内に押し込むのがよい。具体的には、 500 °C以上(好ましくは 550°C以上)に加熱しつつ、 150MPa以上(好ましくは 160MPa 以上)に加圧するのがよい。加熱温度の上限は 700°C程度である。 700°Cを超えて 加熱する装置は現実的に難しぐまた温度を高くし過ぎると、 Cu配線の電気抵抗率 が大きくなる傾向がある。また半導体基板自体に変形を生じることもある。好ましい上 限は 650°C、より好ましい上限は 600°Cである。なお、加熱するときの雰囲気は特に 限定されないが、例えば、上記した不活性ガス雰囲気であればよい。圧力はできるだ け高くすることが好ましいが、 200MPaを超えると圧力が高過ぎて実用的ではないた め、上限は 200MPa程度である。好ましくは 180MPa以下である。  Therefore, when the wiring main body is formed by the sputtering method, it is preferable to press the wiring main body into the wiring groove or the interlayer connection path by applying pressure while heating. Specifically, it is preferable to pressurize to 150 MPa or more (preferably 160 MPa or more) while heating to 500 ° C or more (preferably 550 ° C or more). The upper limit of heating temperature is about 700 ° C. Equipment that heats above 700 ° C is practically difficult, and if the temperature is too high, the electrical resistivity of the Cu wiring tends to increase. In addition, the semiconductor substrate itself may be deformed. A preferred upper limit is 650 ° C, and a more preferred upper limit is 600 ° C. In addition, although the atmosphere at the time of heating is not specifically limited, For example, what is necessary is just the above-mentioned inert gas atmosphere. The pressure is preferably as high as possible, but if it exceeds 200 MPa, the pressure is too high to be practical, so the upper limit is about 200 MPa. Preferably it is 180 MPa or less.
[0047] なお、配線溝または層間接続路カ 幅が 0. 15 μ m以下で、この幅に対する深さの 比(深さ/幅)力 以上であっても、配線本体部をロングスロースパッタリング法で形成 すれば、配線溝や層間接続路内に配線本体部をほぼ確実に埋め込むことができる。 従って配線本体部をロングスロースパッタリング法で形成した場合は、加熱加圧しな くてもよいが、必要に応じて加熱する力、、加圧するか、加熱加圧してもよい。また、配 線本体部が純 Cuの場合は、純 Cu層を電解メツキ法で形成してもよぐ配線溝または 層間接続路が、幅が 0. 15 m以下で、この幅に対する深さの比(深さ/幅)が 1以 上であっても、配線溝や層間接続路内に純 Cu層をほぼ確実に埋め込むことができる 。従って純 Cu層を電解メツキ法で形成した場合にも加熱加圧しなくてよいが、必要に 応じて加熱するか、加圧するか、加熱加圧してもよい。 [0047] Even if the width of the wiring groove or interlayer connection path is 0.15 μm or less and the ratio of the depth to this width (depth / width) force or more, the wiring main body is subjected to the long throw sputtering method. Formed with By doing so, the wiring main body can be almost surely embedded in the wiring groove or the interlayer connection path. Accordingly, when the wiring main body is formed by the long throw sputtering method, it is not necessary to heat and pressurize, but it may be heated, pressed or heated and pressed as necessary. In addition, when the wiring main body is pure Cu, the wiring groove or the interlayer connection path where the pure Cu layer may be formed by the electrolytic plating method has a width of 0.15 m or less, and the depth relative to this width. Even if the ratio (depth / width) is 1 or more, a pure Cu layer can be almost surely embedded in the wiring trench and the interlayer connection path. Therefore, even when a pure Cu layer is formed by an electrolytic plating method, it is not necessary to apply heat and pressure, but it may be heated, pressurized, or heated and pressed as necessary.
[0048] 加熱するときの温度は、室温を超えていればよぐ例えば 50°C以上(特に、 200°C 以上)である。加圧するときの圧力は、常圧を超えていればよぐ例えば IMPa以上( 特に、 lOMPa以上)である。  [0048] The temperature at the time of heating should be above room temperature, for example, 50 ° C or higher (particularly 200 ° C or higher). For example, IMPa or more (especially lOMPa or more) is sufficient if the pressure is higher than normal pressure.
[0049] 但し、加圧せずに加熱すると、密着性は却って悪くなる。加熱すると、加熱前と比べ て、 Cuにかかる引張応力が増加し、この引張応力は、密着に反してノ リア層からの C uの剥離を促進させるのに作用する。これに対し、加熱と加圧を併せて行なうと、 TaN 力もなるバリア層と Cuの界面に、例えば、 Cuと Taが混合した非晶質層を形成し、こ の非晶質層の厚みが増大することによって、 Cuのバリア層に対する密着性が向上す る。従って、ロングスロースパッタリング法で配線本体部を形成した場合でも、加熱加 圧することが好ましい。  [0049] However, when heating is performed without applying pressure, the adhesion deteriorates. When heated, the tensile stress applied to Cu is increased compared to before heating, and this tensile stress acts to promote Cu delamination from the noria layer against adhesion. On the other hand, when heating and pressurization are performed together, for example, an amorphous layer in which Cu and Ta are mixed is formed at the interface between the barrier layer that also has TaN force and Cu, and the thickness of this amorphous layer is reduced. By increasing, the adhesion of Cu to the barrier layer is improved. Therefore, even when the wiring main body is formed by the long throw sputtering method, it is preferable to apply heat and pressure.
[0050] 加熱加圧するときの加熱温度は、室温を超えていればよぐ例えば 50°C以上(特に 、 200°C以上)である。加熱加圧するときの圧力は、例えば 50MPa以上(特に、 100 MPa以上)である。  [0050] The heating temperature at the time of heating and pressurization may be, for example, 50 ° C or more (particularly 200 ° C or more) as long as it exceeds room temperature. The pressure at the time of heating and pressing is, for example, 50 MPa or more (particularly, 100 MPa or more).
[0051] 上記密着性 Cu層や純 Cu層、 TaNからなるバリア層の膜厚は、各層の形成条件を 制御することで調整できる。即ち、各層の形成条件を適宜制御して予めダミーの薄膜 を形成し、この薄膜の膜厚を触針式の膜厚計で測定しておけば、各層の形成条件を 制御することで膜厚を調整できる。  [0051] The film thickness of the adhesive Cu layer, pure Cu layer, and barrier layer made of TaN can be adjusted by controlling the formation conditions of each layer. That is, if a dummy thin film is formed in advance by appropriately controlling the formation conditions of each layer, and the film thickness of this thin film is measured with a stylus type film thickness meter, the film thickness can be controlled by controlling the formation conditions of each layer. Can be adjusted.
実施例  Example
[0052] 以下、本発明を実施例によって更に詳細に説明するが、下記実施例は本発明を限 定する性質のものではなく、前 ·後記の趣旨に適合し得る範囲で適当に変更して実 施することも可能であり、それらはレ、ずれも本発明の技術的範囲に含まれる。 [0052] Hereinafter, the present invention will be described in more detail with reference to examples. However, the following examples are not intended to limit the present invention, and are appropriately modified within a range that can meet the gist of the preceding and following description. Fruit It is also possible to apply them, and they are included in the technical scope of the present invention.
[0053] [実験例 1]  [0053] [Experiment 1]
φ 4インチのシリコンウェハー表面に、 TaN層を DCマグネトロンスパッタリング法で 厚みが 50nmとなるように成膜し、次いで純 Cu層(下記表 1の No. 1)または下記表 1 に示す元素を含有する密着性 Cu層(残部は Cuおよび不可避不純物)を DCマグネト ロンスパッタリング法で厚みが 200nmとなるように成膜して積層体を得た。  A TaN layer is formed on the surface of a φ4 inch silicon wafer by DC magnetron sputtering to a thickness of 50 nm, and then contains a pure Cu layer (No. 1 in Table 1 below) or the elements shown in Table 1 below. Adhesive Cu layer (the remainder is Cu and inevitable impurities) was deposited by DC magnetron sputtering to a thickness of 200 nm to obtain a laminate.
[0054] スパッタリング装置としては、島津製作所社製の HSM— 552型スパッタ装置を用い 、純 Cuターゲットまたはチップオンターゲットを用いてスパッタリングした。チップオン ターゲットとしては、ベースとなる純 Cuターゲット(φ 100mm)の表面に、 5mm角の 金属チップ (所望の元素を含有する Cuチップまたは所望の元素からなる金属チップ) を 3〜6枚エロージョン位置付近に貼り付けたものを用い、金属チップの種類を変える ことで密着性 Cu層の成分を調整し、金属チップの枚数や貼付位置を変化させること で、密着性 Cu層に含まれる組成を制御した。  [0054] As a sputtering apparatus, an HSM-552 type sputtering apparatus manufactured by Shimadzu Corporation was used, and sputtering was performed using a pure Cu target or a chip-on target. As a chip-on target, 3 to 6 erosion positions of 5 mm square metal chips (Cu chips containing a desired element or metal chips made of a desired element) on the surface of a pure Cu target (φ 100 mm) as a base The adhesive Cu layer composition is adjusted by changing the type of the metal tip using the one pasted, and the composition contained in the adhesive Cu layer is controlled by changing the number of metal tips and the location of the metal tip. did.
[0055] TaN層を成膜するときのスパッタリング条件は、到達真空度を 133 X 10— 6Pa以下( [0055] Sputtering conditions for forming the TaN layer, the ultimate pressure of 133 X 10- 6 Pa or less (
1 X 10— 6Torr以下)、スパッタリング時の雰囲気ガスを Arと Nの混合ガス(Nガスを 2 0体積0 /0含有する Arガス)、スパッタガス圧を 667 X 10— 3Pa (5 X 10— 3Torr)、放電パ ヮー密度を 2. 0W/cm2 (DC)、基板温度を室温 (Ts = 20°C)、極間距離を 55mm、 とした。 1 X 10- 6 Torr or less), a mixed gas (N gas 2 0 vol 0/0 Ar gas containing the atmospheric gas during sputtering Ar and N), the sputtering gas pressure 667 X 10- 3 Pa (5 X 10- 3 Torr), the discharge path Wa density 2. 0W / cm 2 (DC) , at room temperature and the substrate temperature (Ts = 20 ° C), and the distance between electrodes 55 mm, and.
[0056] 純 Cu層または密着性 Cu層を成膜するときのスパッタリング条件は、到達真空度を  [0056] Sputtering conditions when forming a pure Cu layer or an adhesive Cu layer are based on the ultimate vacuum.
133 X 10— 6Pa以下(1 X 10— 6Torr以下)、スパッタリング時の雰囲気ガスを Arガス、ス パッタガス圧を 267 X 10— 3Pa (2 X 10— 3Torr)、放電パワー密度を 3. 2W/cm2 (DC )、基板温度を室温 (Ts = 20°C)、極間距離を 55mm、とした。なお、下記表 1に示す No. 8に示す例では、スパッタリングターゲットとして純 Cuターゲットを用い、スパッタ リング時の雰囲気ガスを Arと Nの混合ガス(Nガスを 3体積%含有する Arガス)とし て密着性 Cu層を形成した。 133 X 10- 6 Pa or less (1 X 10- 6 Torr or less), the ambient gas during sputtering Ar gas, scan Pattagasu pressure of 267 X 10- 3 Pa (2 X 10- 3 Torr), the discharge power density 3 2 W / cm 2 (DC), substrate temperature was room temperature (Ts = 20 ° C), and distance between electrodes was 55 mm. In the example shown in No. 8 shown in Table 1 below, a pure Cu target was used as the sputtering target, and the atmosphere gas during sputtering was a mixed gas of Ar and N (Ar gas containing 3% by volume of N gas). An adhesive Cu layer was formed.
[0057] スパッタリングして成膜した密着性 Cu層に含まれる密着性向上元素量を、島津製 作所製の ICP発光分光分析装置「ICP— 8000型」を用いて ICP発光分光法で定量 した。 [0058] 得られた積層体について、 TaN層に対する、純 Cu層または密着性 Cu層の密着性 を、 MELT法で密着力を測定することにより評価した。 MELT法とは、純 Cu層または 密着性 Cu層の表面に、エポキシ樹脂を塗布し、これを冷却することによりエポキシ樹 脂にかかる応力を利用して純 Cu層または密着性 Cu層を TaN層との界面から引き剥 がすときの力(密着力)を測定する方法である。密着力は、純 Cu層または密着性 Cu 層を TaN層との界面で分離するために必要な力 Gc (j/m2)であり、下記(1)式で表 され、 Gcは下記(2)式で算出できる。 [0057] Adhesiveness deposited by sputtering The amount of adhesion-enhancing element contained in the Cu layer was quantified by ICP emission spectroscopy using an ICP emission spectrometer “ICP-8000” manufactured by Shimadzu Corporation . [0058] With respect to the obtained laminate, the adhesion of the pure Cu layer or the adhesion Cu layer to the TaN layer was evaluated by measuring the adhesion force by MELT method. The MELT method is the application of an epoxy resin to the surface of a pure Cu layer or adhesive Cu layer, and cooling it to apply the pure Cu layer or adhesive Cu layer to the TaN layer using the stress applied to the epoxy resin. This is a method for measuring the force (adhesion) when peeling from the interface. The adhesion force is the force Gc (j / m 2 ) required to separate the pure Cu layer or adhesion Cu layer at the interface with the TaN layer, and is expressed by the following formula (1). ).
[0059] [数 1]  [0059] [Equation 1]
Figure imgf000014_0001
Figure imgf000014_0001
[0060] [数 2] [0060] [Equation 2]
Figure imgf000014_0002
Figure imgf000014_0002
[0061] 上記(1)式中、 Uは TaN層に対する、純 Cu層または密着性 Cu層の付着力 (J)、 A は付着面積 (m2)である。上記(2)式中、 σ はエポキシ樹脂層の残留応力、 hはェポ In the above formula (1), U is the adhesion force (J) of the pure Cu layer or adhesive Cu layer to the TaN layer, and A is the adhesion area (m 2 ). In the above equation (2), σ is the residual stress of the epoxy resin layer, h is the Epoch
0  0
キシ樹脂層の厚み、 Vはエポキシ樹脂層のポアソン比、 Eはエポキシ樹脂層のヤン グ率である。なお、上記(2)式中の h、 V、 Eはエポキシ樹脂の種類によって定まる既 知の値である。なお、エポキシ樹脂層の残留応力 σ (Pa)とエポキシ樹脂層の厚み h The thickness of the xy-resin layer, V is the Poisson's ratio of the epoxy resin layer, and E is the yang ratio of the epoxy resin layer. In the above equation (2), h, V, and E are known values determined by the type of epoxy resin. The residual stress σ (Pa) of the epoxy resin layer and the thickness h of the epoxy resin layer h
(m)から下記(3)式で求められる K (Pa -m1")を密着性の指標として用いることも K (Pa -m 1 ") obtained from (m) by the following equation (3) can also be used as an index of adhesion.
appl  appl
できる。 K 値が大きいほど密着性に優れている。  it can. The larger the K value, the better the adhesion.
[0062] [数 3]  [0062] [Equation 3]
Kappl = o0 fh/2 (3) [0063] 密着力の測定は、具体的には次の手順で行った。シリコンウェハーの表面に成膜し た純 Cu層または密着性 Cu層の表面に、エポキシ樹脂を 100 mの厚みで塗布し、 これを 170°Cで 1時間べ一キングした後、外周スライサー(ダイシングソ一)で 12mm X 12mm角に切断した。切断した供試体(クーポン)の四隅の端面をエメリー紙で研 磨し、 # 1000で仕上げた。得られた供試体について、 TaN層に対する、純 Cu層ま たは密着性 Cu層の密着力を、 FMS社製薄膜密着度テスター(FMS Laminar Se ries II)を用いて測定した。密着力は、得られた供試体をチャンバ一内で冷却し、純 Cu層または密着性 Cu層が TaN層から剥離するときの温度を測定し、この温度から σ を求め、上記(3)式から Κ 値を求めた。 MELT法で求めた純 Cu層または密着 性 Cu層の K を下記表 1に示す。 K appl = o 0 fh / 2 (3) [0063] Specifically, the adhesion was measured by the following procedure. An epoxy resin is applied to the surface of a pure Cu layer or adhesive Cu layer deposited on the surface of a silicon wafer to a thickness of 100 m, and this is baked at 170 ° C for 1 hour, and then a peripheral slicer (dicing solution). 1) was cut into 12mm x 12mm square. The edge of the four corners of the cut specimen (coupon) was polished with emery paper and finished with # 1000. For the obtained specimen, the adhesion of the pure Cu layer or adhesion Cu layer to the TaN layer was measured using a thin film adhesion tester (FMS Laminar Series II) manufactured by FMS. The adhesion force is determined by cooling the obtained specimen in the chamber, measuring the temperature at which the pure Cu layer or adhesive Cu layer peels from the TaN layer, and obtaining σ from this temperature, Κ value was calculated from Table 1 below shows the K values of pure Cu or adhesive Cu layers determined by the MELT method.
[0064] 下記表 1から次のように考察できる。 No. 1は、 TaN層のうえに純 Cu層を積層した ί列であり、この No. 1よりも、 No. 2〜7のように、 Pt, In, Ti, Nb, Bおよび Feよりなる 群から選ばれる 1種以上の元素を 0· 05〜3· 0原子%の範囲で含有する密着性 Cu 層を積層した方が密着性に優れている。一方、 No. 8は、 TaN層のうえに Nを含有す る密着性 Cu層を積層した例、 No. 9は、 TaN層のうえに Sbを含有する密着性 Cu層 を積層した例であり、密着性 Cu層の密着性の向上は認められなかった。  [0064] From Table 1 below, it can be considered as follows. No. 1 is a series of pure Cu layers stacked on a TaN layer, and consists of Pt, In, Ti, Nb, B, and Fe, as in Nos. 2 to 7, rather than No. 1 An adhesive Cu layer containing one or more elements selected from the group in a range of 0.05 to 30 atomic percent is superior in adhesion. On the other hand, No. 8 is an example in which an adhesive Cu layer containing N is laminated on the TaN layer, and No. 9 is an example in which an adhesive Cu layer containing Sb is laminated on the TaN layer. , Adhesion No improvement in adhesion of the Cu layer was observed.
[0065] [表 1] [0065] [Table 1]
Cu合金薄膜の成分組成 Composition of Cu alloy thin film
•^a pl  • ^ a pl
No. 含有量  No. content
合金元素 (MPa - m1 /2) Alloy elements (MPa-m 1/2 )
(原子%)  (Atom%)
1 .一 一 0.161 .1 1 0.16
2 Pt 2.12 0.222 Pt 2.12 0.22
3 In 1.07 0.233 In 1.07 0.23
4 Ti 1.79 0.41 4 Ti 1.79 0.41
5 Nb 2.35 0.455 Nb 2.35 0.45
6 B 0.79 0.266 B 0.79 0.26
7 Fe 1.88 0.287 Fe 1.88 0.28
8 N 0.50 0.168 N 0.50 0.16
9 Sb 1.93 0.08 9 Sb 1.93 0.08
[0066] [実験例 2] [0066] [Experiment 2]
上記実験例 1において、 TaN層の表面に、 Pt, In, Ti, Nb, Bまたは Feの含有量 を調整した密着性 Cu層(残部は Cuおよび不可避不純物)を形成した以外は、上記 実験例 1と同じ条件で積層体を得た。  Except that in Example 1 above, an adhesive Cu layer with the Pt, In, Ti, Nb, B or Fe content adjusted on the surface of the TaN layer was formed (the remainder being Cu and inevitable impurities). A laminate was obtained under the same conditions as in 1.
[0067] 得られた積層体について、上記実験例 1と同じ条件で、 TaN層に対する密着性 Cu 層の密着力を測定した。密着性向上元素の含有量と、 MELT法で求めた密着性 Cu 層の の関係を図 1に示す。図 1において、口は Pt、 ·は In、〇は Ti、♦は Nb、 appl O は B、國は Feの結果を夫々示している。図 1の(b)は、図 1の(a)のうち、 0〜0. 2原 子%の範囲を拡大したグラフである。 [0067] With respect to the obtained laminate, the adhesion of the Cu layer to the TaN layer was measured under the same conditions as in Experimental Example 1. Figure 1 shows the relationship between the content of adhesion improving elements and the adhesion Cu layer determined by the MELT method. In Figure 1, the mouth is Pt, · is In, ○ is Ti, ♦ is Nb, appl O is B, and country is Fe. Fig. 1 (b) is a graph enlarging the range of 0 to 0.2 atomic% in Fig. 1 (a).
[0068] 図 1の(a)から明らかなように、密着性向上元素の含有量が増加するほど TaN層に 対する密着性 Cu層の密着力は高くなる。特に、密着性向上元素として Nbや Tiを含 有させると、他の元素を含有させた場合と比べて密着力を 2倍程度以上向上させるこ とができる。但し、密着性向上元素は 3原子%を超えて含有させても、密着性向上効 果は飽和する傾向を示す。 As shown in FIG. 1 (a), the adhesion to the TaN layer increases as the content of the adhesion improving element increases. In particular, when Nb or Ti is included as an element for improving adhesion, the adhesion can be improved by about twice or more compared to the case where other elements are included. You can. However, the adhesion improving effect tends to saturate even if the adhesion improving element exceeds 3 atomic%.
[0069] 図 1の (b)から明らかなように、密着性向上元素を 0. 05原子%含有させることで、 密着性向上効果は急激に発揮されることが分かる。  [0069] As is apparent from (b) of Fig. 1, it can be seen that the adhesion improving effect is rapidly exerted by adding 0.05 atomic% of the adhesion improving element.
[0070] [実験例 3]  [0070] [Experiment 3]
上記実験例 1において、 TaN層の表面に、 Fe含有量を調整した密着性 Cu層(残 部は Cuおよび不可避不純物)を形成した後、常圧で加熱(以下、常圧ァニール処理 ということ力 Sある)する力、、加熱しつつ加圧(以下、高圧ァニール処理ということがある) して積層体を得た。常圧ァニール処理は、常圧(0. IMPa)の Ar雰囲気中で、室温 力も 500°Cまで昇温速度 5°C/分で加熱し、 500°Cで 15分間保持した後、室温まで 降温速度 5°C/分で冷却して行なった。高圧ァニール処理は、 133 X 10— 6Pa以下( 1 X 10— 6Torr以下)の真空で、 150MPaにカロ圧し、室温から 500°Cまで昇温速度 15 °C /分で加熱し、 500°Cで 15分間保持した後、室温まで降温速度 10°C/分で冷却 して fiなった。 In Experimental Example 1 above, after forming an adhesive Cu layer with the Fe content adjusted on the surface of the TaN layer (the remainder being Cu and inevitable impurities), heating at normal pressure (hereinafter referred to as normal pressure annealing treatment) The laminate was obtained by applying pressure (hereinafter also referred to as high-pressure annealing) while heating. Normal pressure annealing is performed in an Ar atmosphere at normal pressure (0. IMPa), heated to 500 ° C at a heating rate of 5 ° C / min, held at 500 ° C for 15 minutes, and then cooled to room temperature. Cooled at a rate of 5 ° C / min. High pressure Aniru process, a vacuum of 133 X 10- 6 Pa or less (1 X 10- 6 Torr or less), pressure Caro to 150 MPa, and heated at 500 ° C until a Atsushi Nobori rate 15 ° C / min from room temperature, 500 ° After holding at C for 15 minutes, it cooled to room temperature at a cooling rate of 10 ° C / min.
[0071] 得られた積層体について、上記実験例 1と同じ条件で、 TaN層に対する密着性 Cu 層の密着力を測定した。 Feの含有量と MELT法で求めた密着性 Cu層の K の関  [0071] With respect to the obtained laminate, the adhesion of the Cu layer to the TaN layer was measured under the same conditions as in Experimental Example 1. Relation between Fe content and adhesion obtained by MELT K of Cu layer
appl 係を図 2に示す。図 2において、 ·は常圧ァニール処理、▲は高圧ァニール処理の 結果を夫々示している。また、図 2には、常圧ァニール処理も高圧ァニール処理もし なレ、場合 (未処理;〇)の結果につ!/、ても併せて示した。  Figure 2 shows the appl staff. In Fig. 2, · indicates atmospheric pressure annealing, and ▲ indicates high pressure annealing. Fig. 2 also shows the results for both cases (untreated; ◯) without normal pressure annealing or high pressure annealing.
[0072] 図 2から明らかなように、 TaN層のうえに密着性 Cu層を形成したままの状態(未処 理)でも、密着性 Cu層を形成した後に、常圧ァニール処理または高圧ァニール処理 しても、 Fe含有量が増加するほど TaN層に対する密着性 Cu層の密着力は大きくな ること力 S分力、る。但し、いずれの場合でも、 Feを 3原子%を超えて含有させても、密着 性向上効果は飽和する傾向を示す。  [0072] As is apparent from FIG. 2, even if the adhesive Cu layer is still formed on the TaN layer (untreated), after forming the adhesive Cu layer, normal pressure annealing or high pressure annealing treatment is performed. Even so, as the Fe content increases, the adhesion to the TaN layer increases the adhesion of the Cu layer. However, in any case, even if Fe is contained in an amount exceeding 3 atomic%, the adhesion improving effect tends to be saturated.
[0073] 密着性 Cu層を形成した後に、常圧ァニール処理すると、未処理の場合よりも密着 力は低下することが分かる。これに対し、密着性 Cu層を形成した後に、高圧ァニー ル処理すると、未処理の場合よりも密着力は向上することが分かる。常圧ァニール処 理した場合に、未処理の場合よりも密着力が低下するのは、加熱による密着力の低 下と、加圧による密着力の向上の両方に支配されることによると考えられる。つまり常 圧ァニール処理では、加熱による密着性低下効果が強く作用することによって、未処 理の場合よりも密着力が低下すると考えられる。 [0073] Adhesiveness It can be seen that if the atmospheric annealing process is performed after the Cu layer is formed, the adhesive force is lower than that in the case of no treatment. On the other hand, it can be seen that if the high-pressure annealing treatment is performed after forming the adhesive Cu layer, the adhesion strength is improved as compared with the case of no treatment. When the normal pressure annealing treatment is performed, the adhesion strength is lower than that when the treatment is not performed. This is considered to be governed by both the lowering and the improvement of the adhesion by pressurization. In other words, in the normal pressure annealing treatment, the adhesion lowering effect due to heating acts strongly, so that the adhesion strength is considered to be lower than that in the case of no treatment.
[0074] [実験例 4] [0074] [Experiment 4]
上記実験例 1において、 TaN層の表面に Feを 1. 88原子%含有する密着性 Cu層 (残部は Cuおよび不可避不純物)を形成した後、上記実験例 3のように常圧で加熱 するか(常圧ァニール処理)、加熱しつつ加圧(高圧ァニール処理)して積層体を得 た。  In Example 1 above, after forming an adhesive Cu layer containing 1.88 atomic% Fe on the surface of the TaN layer (the remainder being Cu and inevitable impurities), is heating at normal pressure as in Example 3 above? (Normal pressure annealing treatment) and pressurizing (high pressure annealing treatment) while heating to obtain a laminate.
[0075] 常圧ァニール処理は、常圧(0. IMPa)の Ar雰囲気中で、加熱した状態で 15分間 保持して行なった。高圧ァニール処理は、 133 X 10— 6Pa以下(1 X 10— 6Torr以下)の 真空で、 150MPaに加圧し、加熱した状態で 15分間保持して行なった。常圧ァニー ル処理と高圧ァニール処理は、加熱温度を 200°C、 500°C、 700°Cとし、加熱時の昇 温速度は 5°C/分、加熱後の降温速度は 5°C/分とした。 [0075] The atmospheric annealing treatment was carried out in an Ar atmosphere at normal pressure (0. IMPa) while being heated for 15 minutes. High pressure Aniru process, a vacuum of 133 X 10- 6 Pa or less (1 X 10- 6 Torr or less), pressurized to 150 MPa, was carried out for 15 minutes in a heated state. In normal pressure annealing and high pressure annealing, the heating temperature is 200 ° C, 500 ° C, 700 ° C, the heating rate during heating is 5 ° C / min, and the cooling rate after heating is 5 ° C / min. Minutes.
[0076] 得られた積層体について、上記実験例 1と同じ条件で、 TaN層に対する密着性 Cu 層の密着力を測定した。常圧ァニール処理または高圧ァニール処理の温度と、 ME LT法で求めた密着性 Cu層の K の関係を図 3に示す。図 3において、 ·は常圧ァ  [0076] With respect to the obtained laminate, the adhesion of the Cu layer to the TaN layer was measured under the same conditions as in Experimental Example 1. Figure 3 shows the relationship between the temperature of atmospheric annealing or high-pressure annealing and the K of the adhesion Cu layer determined by the ME LT method. In Fig. 3,
appl  appl
ニール処理、▲は高圧ァニール処理の結果を夫々示している。また、図 3には、常圧 ァニール処理も高圧ァニール処理もしな!/、場合(未処理;〇)の結果につ!/、ても併せ て示した。  Neal processing and ▲ indicate the results of high-pressure annealing. In addition, Fig. 3 also shows the results of the normal pressure treatment and the high pressure annealing treatment! /, And the case (untreated; ○).
[0077] 図 3から明らかなように、加圧する場合は、高温でァニール処理する方が、 TaN層 に対する密着性 Cu層の密着力を高めることができる。一方、常圧で加熱すると、高 温になるほど、 TaN層に対する密着性 Cu層の密着力はやや低下することが分かる。  As is apparent from FIG. 3, when pressure is applied, the annealing treatment at a high temperature can enhance the adhesion of the Cu layer to the TaN layer. On the other hand, it can be seen that when heated at normal pressure, the adhesion to the TaN layer decreases slightly as the temperature increases.
[0078] [実験例 5]  [0078] [Experiment 5]
上記実験例 1において、 TaN層の表面に、 Pt, In, Ti, Nb, Bまたは Feの含有量 を調整した密着性 Cu層(残部は Cuおよび不可避不純物)を 50nm形成した後、純 C u層を DCマグネトロンスパッタリング法で厚みが 200nmとなるように成膜して積層体 を得た。  In Example 1 above, after forming an adhesive Cu layer with the Pt, In, Ti, Nb, B, or Fe content adjusted to 50 nm on the surface of the TaN layer (the remainder being Cu and inevitable impurities), pure Cu The layer was formed by DC magnetron sputtering to a thickness of 200 nm to obtain a laminate.
[0079] 得られた積層体について、上記実験例 1と同じ条件で、 TaN層に対する密着性 Cu 層の密着力を測定した。密着性向上元素の含有量と、 MELT法で求めた密着性 Cu 層の の関係を図 4に示す。図 4において、口は Pt、 ·は In、〇は Ti、♦は Nb、◊ appl [0079] The obtained laminate was bonded to TaN layer under the same conditions as in Experimental Example 1 Cu The adhesion of the layers was measured. Figure 4 shows the relationship between the content of adhesion improving elements and the adhesion Cu layer determined by the MELT method. In Fig. 4, the mouth is Pt, · is In, ○ is Ti, ♦ is Nb, ◊ appl
は B、國は Feの結果を夫々示している。  Shows the result of B, and the country shows the result of Fe.
[0080] 図 4から明らかなように、密着性 Cu層の表面に純 Cu層を形成した場合でも、密着 性 Cu層が含有する密着性向上元素量が増加するほど TaN層に対する密着性 Cu層 の密着力は高くなる。但し、密着性向上元素は 3原子%を超えて含有させても、密着 性向上効果は飽和する傾向を示す。  [0080] As is apparent from FIG. 4, even when a pure Cu layer is formed on the surface of the adhesive Cu layer, the adhesive Cu layer adheres to the TaN layer as the amount of the adhesion improving element contained in the adhesive Cu layer increases. The adhesion strength of becomes higher. However, even if the adhesion improving element is contained in an amount exceeding 3 atomic%, the adhesion improving effect tends to be saturated.
[0081] [実験例 6]  [0081] [Experiment 6]
上記実験例 1において、 TaN層の表面に、 Tiを 1. 79原子%含有する密着性 Cu層 (残部は Cuおよび不可避不純物)を 10〜50nm形成した後、純 Cu層を DCマグネト ロンスパッタリング法で厚みが 200nmとなるように成膜して積層体 Aを得た。また、純 Cu層を DCマグネトロンスパッタリング法で成膜する代わりに、電解メツキ法で厚みが 200nmとなるように成膜して積層体 Bを得た。電解メツキは、電流密度 17mA/cm2 で fiなった。 In Example 1 above, an adhesive Cu layer containing 1.79 atomic percent of Ti (the remainder is Cu and inevitable impurities) is formed on the surface of the TaN layer by 10 to 50 nm, and then the pure Cu layer is formed by DC magnetron sputtering. The film was formed to a thickness of 200 nm to obtain a laminate A. Also, instead of depositing a pure Cu layer by DC magnetron sputtering, a laminate B was obtained by depositing a film to a thickness of 200 nm by electrolytic plating. The electrolytic plating became fi at a current density of 17 mA / cm 2 .
[0082] 得られた積層体 Aと積層体 Bについて、上記実験例 1と同じ条件で、 TaN層に対す る密着性 Cu層の密着力を測定した。密着性 Cu層の厚みと MELT法で求めた密着 性 Cu層の K の関係を図 5に示す。図 5において、〇は純 Cu層を DCマグネトロンス appl  [0082] With respect to the obtained laminate A and laminate B, the adhesion to the TaN layer was measured under the same conditions as in Experimental Example 1 above. Figure 5 shows the relationship between the adhesion Cu layer thickness and the K of the adhesion Cu layer determined by the MELT method. In Fig. 5, ○ indicates pure Cu layer and DC magnetrons appl
ノ クタリング法で形成した例 (積層体 A)、 ·は純 Cu層を電解メツキ法で形成した例( 積層体 B)の結果を夫々示して!/、る。  The results of an example formed by the knocking method (laminate A), and the example of the pure Cu layer formed by the electrolytic plating method (laminate B) are shown.
[0083] 図 5から明らかなように、密着性 Cu層のうえに純 Cu層を DCマグネトロンスパッタリ ング法で形成しても、電解メツキ法で形成しても、 TaN層に対する密着性 Cu層の密 着力は殆ど変化しないことが分かる。  [0083] As is apparent from FIG. 5, whether the pure Cu layer is formed on the adhesive Cu layer by the DC magnetron sputtering method or the electrolytic plating method, the adhesive Cu layer to the TaN layer is formed. It can be seen that the adhesive strength of the material hardly changes.
[0084] [実験例 7]  [0084] [Experiment 7]
上記実験例 1において、 TaN層の表面に、 Nbを 2. 35原子%含有する密着性 Cu 層(残部は Cuおよび不可避不純物)を 10〜50nm形成した後、純 Cu層を DCマグネ トロンスパッタリング法で厚みが 200nmとなるように成膜し、次いで常圧で加熱(常圧 ァニール処理)する力、、加熱しつつ加圧(高圧ァニール処理)して積層体を得た。常 圧ァニール処理と高圧ァニール処理は、上記実験例 3で示した条件で行なった。 [0085] 得られた積層体について、上記実験例 1と同じ条件で、 TaN層に対する密着性 Cu 層の密着力を測定した。密着性 Cu層の厚みと、 MELT法で求めた密着性 Cu層の K の関係を図 6に示す。図 6において、 ·は常圧ァニール処理、▲は高圧ァニール appl In Example 1 above, an adhesive Cu layer containing 2.35 atomic percent of Nb (the remainder is Cu and inevitable impurities) is formed on the surface of the TaN layer to 10 to 50 nm, and then the pure Cu layer is formed by DC magnetron sputtering. Then, a film was formed to a thickness of 200 nm, and then a layered product was obtained by applying pressure (high pressure annealing treatment) while heating with normal pressure (normal pressure annealing treatment) and heating. The normal pressure annealing and the high pressure annealing were performed under the conditions shown in Experimental Example 3 above. [0085] With respect to the obtained laminate, the adhesion of the Cu layer to the TaN layer was measured under the same conditions as in Experimental Example 1. Figure 6 shows the relationship between the thickness of the adhesive Cu layer and the K of the adhesive Cu layer determined by the MELT method. In Fig. 6, · is normal pressure annealing, ▲ is high pressure annealing appl
処理の結果を夫々示している。また、図 6には、常圧ァニール処理も高圧ァニール処 理もしな!/、場合 (未処理;〇)の結果につ!/、ても併せて示した。  The results of the processing are shown respectively. Figure 6 also shows the results of the normal pressure annealing and the high pressure annealing! /, And the case (untreated; ○).
[0086] 図 6から明らかなように、密着性 Cu層の厚みを大きくすることで、 TaN層に対する密 着性 Cu層の密着力は大きくなることが分かる。また、密着性 Cu層を形成した後に、 常圧ァニール処理すると、未処理の場合よりも密着力は低下することが分かる。これ に対し、密着性 Cu層を形成した後に、高圧ァニール処理すると、未処理の場合より も密着力は向上することが分かる。  [0086] As is apparent from FIG. 6, it can be seen that increasing the thickness of the adhesive Cu layer increases the adhesive force of the adhesive Cu layer to the TaN layer. In addition, it can be seen that if the atmospheric pressure annealing is performed after forming the adhesive Cu layer, the adhesive strength is lower than that in the case of no treatment. On the other hand, it can be seen that if the high pressure annealing treatment is performed after forming the adhesive Cu layer, the adhesion strength is improved as compared with the case of no treatment.
[0087] [実験例 8]  [0087] [Experiment 8]
上記実験例 1において、 TaN層の表面に、 Feを 1. 88原子%含有する密着性 Cu 層(残部は Cuおよび不可避不純物)を 50nm形成した後、純 Cu層を DCマグネトロン スパッタリング法で厚みが 200nmとなるように成膜し、次いで常圧で加熱(常圧ァニ ール処理)するか、加熱しつつ加圧(高圧ァニール処理)して積層体を得た。常圧ァ ニール処理と高圧ァニール処理は、上記実験例 3で示した条件で行なった。  In Example 1 above, after forming an adhesive Cu layer containing 1.88 atomic% Fe (the remainder is Cu and inevitable impurities) to 50 nm on the surface of the TaN layer, the thickness of the pure Cu layer is increased by the DC magnetron sputtering method. A film was formed to 200 nm, and then heated at normal pressure (normal pressure annealing treatment) or pressurized (high pressure annealing treatment) while heating to obtain a laminate. Normal pressure annealing and high pressure annealing were performed under the conditions shown in Experimental Example 3 above.
[0088] 得られた積層体について、上記実験例 1と同じ条件で、 TaN層に対する密着性 Cu 層の密着力を測定した。常圧ァニール処理または高圧ァニール処理の温度と、 ME LT法で求めた密着性 Cu層の K の関係を図 7に示す。図 7において、 ·は常圧ァ  [0088] With respect to the obtained laminate, the adhesion of the Cu layer to the TaN layer was measured under the same conditions as in Experimental Example 1. Figure 7 shows the relationship between the temperature of atmospheric annealing or high-pressure annealing and the K of the adhesion Cu layer determined by the ME LT method. In Fig. 7, · is the atmospheric pressure key.
appl  appl
ニール処理、▲は高圧ァニール処理の結果を夫々示している。また、図 7には、常圧 ァニール処理も高圧ァニール処理もしな!/、場合(未処理;〇)の結果につ!/、ても併せ て示した。  Neal processing and ▲ indicate the results of high-pressure annealing. In addition, Fig. 7 also shows the results of the normal pressure treatment and the high pressure annealing treatment! /, And the case (untreated; ○) results!
[0089] 図 7から明らかなように、加圧する場合は、高温でァニール処理する方が、 TaN層 に対する密着性 Cu層の密着力を高めることができる。一方、常圧で加熱した場合は 、加熱温度を高くするほど、 TaN層に対する密着性 Cu層の密着力はやや低下する ことが分かる。  As is apparent from FIG. 7, when pressurizing, annealing at a high temperature can enhance the adhesion of the Cu layer to the TaN layer. On the other hand, when heating at normal pressure, it can be seen that the higher the heating temperature, the lower the adhesion of the Cu layer to the TaN layer.
[0090] [実験例 9]  [0090] [Experiment 9]
シリコンウェハー表面に形成した絶縁膜 (TEOS膜: SiOF膜)に、直径 0· 12 [i m 120nm)、深さ 0. 55 m (550nm)、ピッチ 450nmのビアを設けた評価素子(TEG )を用いた。この TEGの表面に、 TaN層を DCマグネトロンスパッタリング法で上記実 験例 1と同じ条件で厚みが 50nmとなるように成膜した後、 Feを 1. 88原子%含有す る密着性 Cu層(残部は Cuおよび不可避不純物)をスパッタリング法(CS法)または口 ングスロースパッタリング法(LTS法)で厚みが 500nmとなるように成膜した。 An insulating film (TEOS film: SiOF film) formed on the surface of a silicon wafer has a diameter of 0 · 12 [im An evaluation element (TEG) provided with vias having a thickness of 120 nm), a depth of 0.55 m (550 nm), and a pitch of 450 nm was used. On the surface of this TEG, a TaN layer was deposited by DC magnetron sputtering so that the thickness was 50 nm under the same conditions as in Experiment 1 above, and then an adhesive Cu layer containing 1.88 atomic% Fe ( The balance was Cu and inevitable impurities) were deposited by sputtering (CS method) or mouth-throw sputtering method (LTS method) to a thickness of 500 nm.
[0091] 密着性 Cu層を成膜するときのスパッタリング条件は、上記実験例 1で示した条件と 同じである。密着性 Cu層を成膜するときのロングスロースパッタリング条件は、到達真 空度を 133 X 10— 6Pa以下(1 X 10— 6Torr以下)、スパッタリング時の雰囲気ガスを Ar ガス、スパッタガス圧を 266 X 10— 3Pa (2 X 10— 3Torr)、放電パワー密度を 25W/cm 2 (0 、基板バィァスを—200¥、基板温度 Tsを 0°C、極間距離を 300mm、とした。 [0091] Adhesive The sputtering conditions for forming the Cu layer are the same as those shown in Experimental Example 1 above. Long throw sputtering conditions for forming the adhesion Cu layer is reached vacuum degree 133 X 10- 6 Pa or less (1 X 10- 6 Torr or less), Ar gas ambient gas during sputtering, the sputtering gas pressure the 266 X 10- 3 Pa (2 X 10- 3 Torr), the discharge power density of 25W / cm 2 (0, a substrate Baiasu -200 ¥, the substrate temperature Ts 0 ° C, the distance between electrodes was 300 mm, and .
[0092] 密着性 Cu層を成膜した後、上記実験例 3のように常圧で加熱(常圧ァニール処理) するか、加熱しつつ加圧(高圧ァニール処理)して積層体を得た。常圧ァニール処理 と高圧ァニール処理は、上記実験例 4で示した条件で行なった。なお、下記表 2の N o. 11と No. 18は、密着性 Cu層を成膜した後、常圧ァニール処理も高圧ァニール 処理も行ってレ、な!/、例である。  [0092] Adhesiveness After the Cu layer was formed, the laminate was obtained by heating at normal pressure (normal pressure annealing treatment) as in Experimental Example 3 above or by applying pressure (high pressure annealing treatment) while heating. . The normal pressure annealing and the high pressure annealing were performed under the conditions shown in Experimental Example 4 above. Note that No. 11 and No. 18 in Table 2 below are examples in which normal pressure annealing and high pressure annealing are performed after forming an adhesive Cu layer.
[0093] 処理後の TEGに対して、ビア断面が露出する様に集束イオンビーム装置 (FIB装 置)で加工し、該断面を FIB装置の SIM像で観察し、ビア部への密着性 Cu層の埋め 込み状態(埋込特性)を調べた。埋込特性は、ビア断面の SIM像を画像解析し、下 記 (4)式で算出される埋め込み率で評価した。ビアは 15個分について観察し、夫々 のビアについて埋め込み率を算出し、これを平均した。埋め込み率を下記表 2に示 す。  [0093] The processed TEG is processed with a focused ion beam device (FIB device) so that the via cross-section is exposed, and the cross-section is observed with a SIM image of the FIB device. The embedded state (embedding characteristics) of the layer was investigated. The embedding characteristics were evaluated using the embedding rate calculated by the following equation (4) by analyzing the SIM image of the via cross section. 15 vias were observed, and the filling rate was calculated for each via and averaged. The embedding rate is shown in Table 2 below.
埋め込み率(%) = [ (ビアに埋め込まれて!/、る密着性 Cu層の断面積) / (ビアの断 面積)] X 100 · · · (4)  Embedding rate (%) = [(embedded in via! /, Cross-sectional area of Cu layer) / (cross-sectional area of via)] X 100 · · · (4)
表 2から明らかなように、密着性 Cu層をビアに埋め込むために密着性 Cu層をスパ ッタリング法で形成した場合は、 500°C以上に加熱しつつ 150MPaに加圧すればよ いことが分かる。また、密着性 Cu層をロングスロースパッタリング法で形成した場合は 、常圧'加圧問わず、加熱すれば密着性 Cu層をビアに完全に埋め込むことができる [0094] [表 2] As can be seen from Table 2, when the adhesive Cu layer is formed by sputtering to embed the adhesive Cu layer in the via, it is only necessary to pressurize to 150 MPa while heating to 500 ° C or higher. I understand. In addition, when the adhesive Cu layer is formed by the long throw sputtering method, the adhesive Cu layer can be completely embedded in the via by heating regardless of atmospheric pressure. [0094] [Table 2]
Figure imgf000022_0001
Figure imgf000022_0001
CS法 =スパッタリング法、 LTS法 =ロングスロースパッタリング法  CS method = Sputtering method, LTS method = Long throw sputtering method
[0095] [実験例 10] [0095] [Experiment 10]
上記実験例 9において、 TaN層の表面に、 Tiを 1. 79原子%含有する密着性 Cu層 (残部は Cuおよび不可避不純物)をスパッタリング法(CS法)で厚みが 10〜50nmと なるように形成し、次いで純 Cu層を電解メツキ法、スパッタリング法(CS法)、ロングス ロースパッタリング法(LTS法)で厚みが 500nmとなるように成膜した。  In Experimental Example 9 above, on the surface of the TaN layer, an adhesive Cu layer containing 1.79 atomic percent of Ti (with the remainder being Cu and inevitable impurities) is formed to a thickness of 10 to 50 nm by sputtering (CS method). After that, a pure Cu layer was formed to have a thickness of 500 nm by an electrolytic plating method, a sputtering method (CS method), and a long slow sputtering method (LTS method).
[0096] 密着性 Cu層を成膜するときのスパッタリング条件は、上記実験例 1で示した条件と 同じである。純 Cu層を成膜するときの電解メツキ条件は上記実験例 6、スパッタリング 条件は上記実験例 1、ロングスロースパッタリング条件は上記実験例 9で示した条件 と同じである。  [0096] Adhesiveness The sputtering conditions for forming the Cu layer are the same as those shown in Experimental Example 1 above. The electrolytic plating conditions for forming a pure Cu layer are the same as those shown in Experimental Example 6, the sputtering conditions are the same as those in Experimental Example 1, and the long throw sputtering conditions are the same as those in Experimental Example 9.
[0097] 純 Cu層を成膜した後、上記実験例 4のように常圧で加熱(常圧ァニール処理)する 力、、加熱しつつ加圧(高圧ァニール処理)して積層体を得た。常圧ァニール処理は、 常圧(0. IMPa)の Ar雰囲気中で、加熱した状態で 15分間保持して行なった。高圧 ァニール処理は、 133 X 10— 6Pa以下(1 X 10— 6Torr以下)の真空で、 150MPaにカロ 圧し、加熱した状態で 15分間保持して行なった。常圧ァニール処理と高圧ァニール 処理は、加熱温度を 200°Cまたは 500°Cとし、加熱時の昇温速度は 5°C/分、加熱 後の降温速度は 5°C/分とした。なお、下記表 3の No. 31— 33, No. 38、 No. 44 は、純 Cu層を成膜した後、常圧ァニール処理も高圧ァニール処理も行っていない例 である。 [0097] After a pure Cu layer was formed, a laminate was obtained by applying pressure (high-pressure annealing) while heating at normal pressure (normal-pressure annealing) as in Experimental Example 4 above. . The normal pressure annealing treatment was carried out in an Ar atmosphere at normal pressure (0. IMPa) while being heated for 15 minutes. High pressure Aniru process, a vacuum of 133 X 10- 6 Pa or less (1 X 10- 6 Torr or less), pressure Caro to 150 MPa, was carried out for 15 minutes in a heated state. Normal pressure annealing and high pressure annealing In the treatment, the heating temperature was 200 ° C or 500 ° C, the heating rate during heating was 5 ° C / min, and the cooling rate after heating was 5 ° C / min. No. 31-33, No. 38, and No. 44 in Table 3 below are examples in which neither a normal-pressure annealing process nor a high-pressure annealing process is performed after a pure Cu layer is formed.
[0098] 処理後の TEGに対して、上記実験例 11と同じ条件で、ビア部への密着性 Cu層と 純 Cu層の埋め込み状態(埋込特性)を調べた。埋め込み率を下記表 3に示す。  [0098] Adhesion to the via portion and the embedded state of the pure Cu layer (embedding characteristics) were examined for the TEG after the treatment under the same conditions as in Experimental Example 11. The embedding rate is shown in Table 3 below.
[0099] 表 3から次のように考察できる。 No. 3;!〜 37は、いずれも密着性 Cu層を薄くし、純 Cu層を電解メツキ法で形成しているため、ァニール処理しなくても密着性 Cu層と純 Cu層を凹部に完全に埋め込むことができる。 No. 42〜43から明らかなように、純 Cu 層をスパッタリング法で形成した場合には、 500°C以上に加熱した状態で、 150MPa に加圧して押圧すれば、純 Cu層をビアに押し込むことができる。 No. 44〜50から明 らかなように、純 Cu層をロングスロースパッタリングで形成した場合には、ァニール処 理しなくても純 Cu層をビアに押し込むことができる。  [0099] From Table 3, the following can be considered. No. 3;! -37 are all made by thinning the adhesive Cu layer and forming the pure Cu layer by electrolytic plating, so the adhesive Cu layer and the pure Cu layer can be formed in the recess without annealing. Can be completely embedded. As is clear from Nos. 42 to 43, when a pure Cu layer is formed by sputtering, pressurizing and pressing at 150 MPa while heating to 500 ° C or higher will push the pure Cu layer into the via. be able to. As is clear from Nos. 44 to 50, when a pure Cu layer is formed by long throw sputtering, the pure Cu layer can be pushed into the via without annealing.
[0100] [表 3] [0100] [Table 3]
ァニール処理条件 Annealing conditions
Cu合金薄膜の Cu合金薄膜の 純 Cu薄膜の 埋め込み率 Cu alloy thin film Cu alloy thin film Pure Cu thin film embedding rate
No. No.
成膜方法 膜厚 (nm) 成膜方法 /皿度 圧力 時間 (%)  Deposition method Film thickness (nm) Deposition method / dishness Pressure Time (%)
(。c) (MPa) (分)  (.C) (MPa) (minutes)
31 CS法 10 電解めつき法 なし 100 31 CS method 10 Electrolytic plating method None 100
32 CS法 30 電解めつき法 なし 10032 CS method 30 Electrolytic plating method None 100
33 CS法 50 電解めつき法 なし 10033 CS method 50 Electrolytic plating method None 100
34 CS法 50 電解めつき法 200 0.1 15 10034 CS method 50 Electrolytic plating method 200 0.1 15 100
35 CS法 50 電解めつき法 500 0.1 15 10035 CS method 50 Electrolytic plating method 500 0.1 15 100
36 CS法 50 電解めつき法 200 150 15 10036 CS method 50 Electrolytic plating method 200 150 15 100
37 CS法 50 電解めつき法 500 150 15 10037 CS method 50 Electrolytic plating method 500 150 15 100
38 CS法 50 CS法 なし 6538 CS method 50 CS method None 65
39 CS法 50 CS法 500 0.1 15 6839 CS method 50 CS method 500 0.1 15 68
40 CS法 50 CS法 700 0.1 15 6940 CS method 50 CS method 700 0.1 15 69
41 CS法 50 CS法 200 150 15 7841 CS method 50 CS method 200 150 15 78
42 CS法 50 CS法 500 150 15 10042 CS method 50 CS method 500 150 15 100
43 CS法 50 CS法 700 150 15 10043 CS method 50 CS method 700 150 15 100
44 CS法 50 LTS法 なし 9844 CS method 50 LTS method None 98
45 CS法 50 LTS法 200 0.1 15 10045 CS method 50 LTS method 200 0.1 15 100
46 CS法 50 LTS法 500 0.1 15 10046 CS method 50 LTS method 500 0.1 15 100
47 CS法 50 LTS法 700 0.1 15 10047 CS method 50 LTS method 700 0.1 15 100
48 CS法 50 LTS法 200 150 15 10048 CS method 50 LTS method 200 150 15 100
49 CS法 50 LTS法 500 150 15 10049 CS method 50 LTS method 500 150 15 100
50 CS法 50 LTS法 700 150 15 10050 CS method 50 LTS method 700 150 15 100
CS法 =スパッタリング法 CS method = Sputtering method
[0101] [実験例 11]  [0101] [Experiment 11]
上記実験例 1において、 TaN層の表面に、 V, Zr, Re, Ru, Hf, Ga, Osまたは Tl の含有量を調整した密着性 Cu層(残部は Cuおよび不可避不純物)を形成した以外 は、上記実験例 1と同じ条件で積層体を得た。なお、 Gaは融点が低いため、 Ga元素 力もなる金属チップを製造することができない。そこで、 Gaについては、 Gaを 5原子 %または 10原子%含有する Cu合金チップ (残部は、不可避不純物)を作製し、ベー スとなる純 Cuターゲット( φ 100mm)の表面に貼り付ける 5mm角の Cu合金チップを 3〜6枚エロージョン位置付近に貼り付けたものをチップオンターゲットとして用いた。  In Example 1 above, except that an adhesive Cu layer (with the balance being Cu and inevitable impurities) with an adjusted content of V, Zr, Re, Ru, Hf, Ga, Os or Tl was formed on the surface of the TaN layer. A laminate was obtained under the same conditions as in Experimental Example 1 above. In addition, since Ga has a low melting point, it is not possible to produce a metal chip having a Ga elemental force. Therefore, for Ga, a Cu alloy chip containing 5 atomic% or 10 atomic% of Ga (the remainder is an inevitable impurity) is manufactured, and a 5 mm square is attached to the surface of a pure Cu target (φ 100 mm). A chip alloy target with 3 to 6 Cu alloy chips pasted near the erosion position was used.
Cu合金チップの種類や枚数、貼付位置を変化させることで、密着性 Cu層に含まれ る組成を制御した。  The composition contained in the adhesive Cu layer was controlled by changing the type and number of Cu alloy chips and the position of application.
[0102] 得られた積層体について、上記実験例 1と同じ条件で、 TaN層に対する密着性 Cu 層の密着力を測定した。密着性向上元素の含有量と、 MELT法で求めた密着性 Cu 層の の関係を図 8に示す。図 8において、口は V、 ·は Zr、〇は Re、♦は Ru、◊ appl [0102] With respect to the obtained laminate, the adhesion of the Cu layer to the TaN layer was measured under the same conditions as in Experimental Example 1. Adhesion improving element content and adhesion Cu obtained by MELT method Figure 8 shows the relationship between layers. In Fig. 8, mouth is V, · is Zr, ○ is Re, ♦ is Ru, ◊ appl
は Hf、國は Ga、△は Os、▲は T1の結果を夫々示している。図 8の(b)は、図 8の(a) のうち、 0〜0. 2原子%の範囲を拡大したグラフである。  Is Hf, country is Ga, △ is Os, ▲ is T1 result. FIG. 8B is a graph obtained by enlarging the range of 0 to 0.2 atomic% in FIG. 8A.
[0103] 図 8の(a)から明らかなように、密着性向上元素の含有量が増加するほど TaN層に 対する密着性 Cu層の密着力は高くなる。但し、密着性向上元素は 3原子%を超えて 含有させても、密着性向上効果は飽和する傾向を示す。 As is clear from (a) of FIG. 8, as the content of the adhesion improving element increases, the adhesion to the TaN layer increases the adhesion of the Cu layer. However, even if the adhesion improving element is contained in an amount exceeding 3 atomic%, the adhesion improving effect tends to be saturated.
[0104] 図 8の (b)から明らかなように、密着性向上元素を 0. 05原子%させることで、密着 性向上効果は急激に発揮されることが分かる。 [0104] As is clear from (b) of Fig. 8, it can be seen that the adhesion improving effect is rapidly exhibited by adding 0.05 atomic% of the adhesion improving element.
[0105] [実験例 12] [0105] [Experiment 12]
上記実験例 1において、 TaN層の表面に、 V, Zr, Re, Ru, Hfまたは Gaの含有量 を調整した密着性 Cu層(残部は Cuおよび不可避不純物)を 50nm形成した後、純 C u層を DCマグネトロンスパッタリング法で厚みが 200nmとなるように成膜して積層体 を得た。  In Example 1 above, after forming an adhesive Cu layer with the V, Zr, Re, Ru, Hf or Ga content adjusted to 50 nm on the surface of the TaN layer (the remainder being Cu and inevitable impurities), pure Cu The layer was formed by DC magnetron sputtering to a thickness of 200 nm to obtain a laminate.
[0106] なお、 Gaについては、上記実験例 11の手順で密着性 Cu層に含まれる組成を制御 した。  [0106] Regarding Ga, the composition contained in the adhesive Cu layer was controlled by the procedure of Experimental Example 11 above.
[0107] 得られた積層体について、上記実験例 1と同じ条件で、 TaN層に対する密着性 Cu 層の密着力を測定した。密着性向上元素の含有量と、 MELT法で求めた密着性 Cu 層の の関係を図 9に示す。図 9において、口は V、 ·は Zr、〇は Re、♦は Ru、◊ appl  [0107] With respect to the obtained laminate, the adhesion of the CuN layer to the TaN layer was measured under the same conditions as in Experimental Example 1. Figure 9 shows the relationship between the content of adhesion improving elements and the adhesion Cu layer determined by the MELT method. In Figure 9, mouth is V, · is Zr, ○ is Re, ♦ is Ru, ◊ appl
は Hf、國は Ga、△は Os、▲は T1の結果を夫々示している。  Is Hf, country is Ga, △ is Os, ▲ is T1 result.
[0108] 図 9から明らかなように、密着性 Cu層の表面に純 Cu層を形成した場合でも、密着 性 Cu層が含有する密着性向上元素量が増加するほど TaN層に対する密着性 Cu層 の密着力は高くなる。但し、密着性向上元素は 3原子%を超えて含有させても、密着 性向上効果は飽和する傾向を示す。  [0108] As is apparent from FIG. 9, even when a pure Cu layer is formed on the surface of the adhesive Cu layer, the adhesive Cu layer adheres to the TaN layer as the amount of the adhesion improving element contained in the adhesive Cu layer increases. The adhesion strength of becomes higher. However, even if the adhesion improving element is contained in an amount exceeding 3 atomic%, the adhesion improving effect tends to be saturated.
[0109] 本発明を特定の態様を参照して詳細に説明したが、本発明の精神と範囲を離れる ことなく様々な変更および修正が可能であることは、当業者にとって明らかである。  [0109] Although the invention has been described in detail with reference to specific embodiments, it will be apparent to those skilled in the art that various changes and modifications can be made without departing from the spirit and scope of the invention.
[0110] なお、本出願は、 2006年 11月 28日付けで出願された日本特許出願(特願 2006 [0110] This application is a Japanese patent application filed on November 28, 2006 (Japanese Patent Application 2006).
— 320572)、及び 2007年 10月 12日付けで出願された日本特許出願(特願 2007— 320572) and Japanese patent applications filed October 12, 2007 (Japanese Patent Application 2007)
— 267180)に基づいており、その全体が引用により援用される。 [0111] また、ここに引用されるすべての参照は全体として取り込まれる。 — 267180), which is incorporated by reference in its entirety. [0111] Also, all references cited herein are incorporated as a whole.
産業上の利用可能性  Industrial applicability
[0112] 本発明によれば、 Cu配線の配線本体部の成分組成を適切に調整する力、、 Cu配線 の配線本体部が純 Cuの場合は、純 Cuと TaNからなるバリア層の間に成分組成を適 切に調整した中間層を介在させて!/、るため、配線本体部とバリア層の密着性を改善 できる。これにより配線本体部とバリア層の間にボイド等が発生せず、 Cu配線の信頼 性を高めることができる。し力、も本発明によれば、配線溝や層間接続路の幅が狭ぐ 深い場合でも、配線溝や層間接続路を覆うように Cu系配線材料を形成した後、加熱 するか、必要に応じて更に加圧することで、ノ リア層と配線本体部の密着性を損なう ことなぐ配線溝や層間接続路内に Cu系配線材料を埋め込むことができる。  [0112] According to the present invention, the force to appropriately adjust the component composition of the wiring body portion of the Cu wiring, and, when the wiring body portion of the Cu wiring is pure Cu, between the barrier layer made of pure Cu and TaN, Since an intermediate layer with an appropriately adjusted component composition is interposed! /, The adhesion between the wiring body and the barrier layer can be improved. As a result, no voids are generated between the wiring body and the barrier layer, and the reliability of the Cu wiring can be improved. However, according to the present invention, even when the width of the wiring groove or the interlayer connection path is narrow, the Cu-based wiring material is formed so as to cover the wiring groove or the interlayer connection path, and then heated or necessary. By further applying pressure accordingly, Cu-based wiring material can be embedded in wiring grooves and interlayer connection paths that do not impair the adhesion between the NOR layer and the wiring body.

Claims

請求の範囲 [1] 半導体基板上の絶縁膜に形成された配線溝または層間接続路に埋め込まれた Cu 配泉であって、 前記 Cu配線は、 ( 1 )配線溝側または層間接続路側に形成された TaNからなるバリア層と、 (2) Pt、 In、 Ti、 Nb、 B、 Fe、 V、 Zr、 Hf、 Ga、 Tl、 Ru、 Reおよび Osよりなる群から 選ばれる 1種以上の元素を合計で 0. 05〜3. 0原子%含有する Cuからなる配線本 体部とで構成されて!/、る半導体装置の Cu配線。 [2] 半導体基板上の絶縁膜に形成された配線溝または層間接続路に埋め込まれた Cu 配泉であって、 前記 Cu配線は、 Claims [1] A Cu spring embedded in a wiring groove or interlayer connection path formed in an insulating film on a semiconductor substrate, wherein the Cu wiring is (1) formed on the wiring groove side or interlayer connection path side And (1) one or more elements selected from the group consisting of Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, Re, and Os. Consisting of 0.05 to 3.0 atomic% of Cu wiring itself and the Cu wiring of the semiconductor device. [2] A Cu spring embedded in a wiring groove or an interlayer connection formed in an insulating film on a semiconductor substrate, wherein the Cu wiring is
( 1 )配線溝側または層間接続路側に形成された TaNからなるバリア層と、  (1) a barrier layer made of TaN formed on the wiring trench side or interlayer connection path side;
(2)純 Cuからなる配線本体部と、  (2) A wiring body made of pure Cu,
(3)前記バリア層と前記配線本体部との間にこれらと接して形成され、かつ Pt、 In、 T i、 Nb、 B、 Fe、 V、 Zr、 Hf、 Ga、 Tl、 Ru、 Reおよび Osよりなる群から選ばれる 1種以 上の元素を合計で 0. 05- 3. 0原子%含有する Cuからなる中間層とで構成されて (3) formed between and in contact with the barrier layer and the wiring body, and Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, Re and It is composed of an intermediate layer made of Cu containing 0.05 to 3.0 atomic percent of one or more elements selected from the group consisting of Os in total.
V、る半導体装置の Cu配線。 V, Cu wiring for semiconductor devices.
[3] 前記中間層の厚みが 10〜50nmである請求項 2に記載の Cu配線。 3. The Cu wiring according to claim 2, wherein the intermediate layer has a thickness of 10 to 50 nm.
[4] 前記配線溝または前記層間接続路は、幅が 0. 1 5 m以下で、この幅に対する深 さの比(深さ/幅)が 1以上である請求項 1〜3のいずれかに記載の Cu配線。 [4] The wiring groove or the interlayer connection path according to any one of claims 1 to 3, wherein a width is 0.15 m or less and a ratio of depth to the width (depth / width) is 1 or more. Cu wiring described.
[5] 半導体基板上の絶縁膜に形成された配線溝または層間接続路の表面に TaN層を 形成する工程と、 [5] forming a TaN layer on the surface of the wiring groove or interlayer connection path formed in the insulating film on the semiconductor substrate;
この TaN層の表面にスパッタリング法で Pt、 In、 Ti、 Nb、 B、 Fe、 V、 Zr、 Hf、 Ga、 Tl、 Ru、 Reおよび Osよりなる群から選ばれる 1種以上の元素を合計で 0. 05—3. 0 原子%含有する Cu層を形成する工程を含む半導体装置の Cu配線の製造方法。  A total of one or more elements selected from the group consisting of Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, Re, and Os are formed on the surface of this TaN layer by sputtering. 0.05-3.0 A method for manufacturing a Cu wiring of a semiconductor device, including a step of forming a Cu layer containing atomic percent.
[6] 前記配線溝または前記層間接続路は、幅が 0. 1 5 m以下で、この幅に対する深 さの比(深さ/幅)が 1以上であり、前記 Cu層が形成された後、加熱によって Cu層が TaN層付き配線溝または層間接続路に押し込まれる請求項 5に記載の製造方法。 [6] The wiring groove or the interlayer connection path has a width of 0.15 m or less, a ratio of depth to this width (depth / width) of 1 or more, and after the Cu layer is formed 6. The manufacturing method according to claim 5, wherein the Cu layer is pushed into the TaN layer-attached wiring groove or the interlayer connection path by heating.
[7] 前記配線溝または前記層間接続路は、幅が 0. 15 m以下で、この幅に対する深 さの比(深さ/幅)が 1以上であり、前記 Cu層が形成された後、加熱及び加圧によつ て Cu層が TaN層付き配線溝または層間接続路に押し込まれる請求項 5に記載の製 造方法。 [7] The wiring groove or the interlayer connection path has a width of 0.15 m or less, a ratio of depth to this width (depth / width) of 1 or more, and after the Cu layer is formed, 6. The manufacturing method according to claim 5, wherein the Cu layer is pushed into the wiring groove with the TaN layer or the interlayer connection path by heating and pressing.
[8] 半導体基板上の絶縁膜に形成された配線溝または層間接続路の表面に TaN層を 形成する工程と、  [8] forming a TaN layer on the surface of the wiring groove or interlayer connection formed in the insulating film on the semiconductor substrate;
この TaN層の表面にスパッタリング法で Pt、 In、 Ti、 Nb、 B、 Fe、 V、 Zr、 Hf、 Ga、 Tl、 Ru、 Reおよび Osよりなる群から選ばれる 1種以上の元素を合計で 0. 05—3. 0 原子%含有する Cu層を形成する工程と、  A total of one or more elements selected from the group consisting of Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, Re, and Os are formed on the surface of this TaN layer by sputtering. 0.05-3.0. Forming a Cu layer containing 0 atomic%;
前記 Cu層の表面に純 Cu層を形成する工程を含む半導体装置の Cu配線の製造 方法。  A method of manufacturing a Cu wiring of a semiconductor device including a step of forming a pure Cu layer on the surface of the Cu layer.
[9] 前記配線溝または前記層間接続路は、幅が 0. 15 m以下で、この幅に対する深 さの比(深さ/幅)が 1以上であり、前記純 Cu層が形成された後、加熱によって純 Cu 層が Cu層付き配線溝または層間接続路に押し込まれる請求項 8に記載の製造方法 [9] The wiring groove or the interlayer connection path has a width of 0.15 m or less, a ratio of depth to the width (depth / width) of 1 or more, and after the pure Cu layer is formed The manufacturing method according to claim 8, wherein the pure Cu layer is pushed into the wiring groove with Cu layer or the interlayer connection path by heating.
Yes
[10] 前記配線溝または前記層間接続路は、幅が 0. 15 m以下で、この幅に対する深 さの比(深さ/幅)が 1以上であり、前記純 Cu層が形成された後、加熱及び加圧によ つて純 Cu層が Cu層付き配線溝または層間接続路に押し込まれる請求項 8に記載の 製造方法。  [10] The wiring groove or the interlayer connection path has a width of 0.15 m or less, a ratio of depth to the width (depth / width) of 1 or more, and after the pure Cu layer is formed 9. The manufacturing method according to claim 8, wherein the pure Cu layer is pushed into the wiring groove with the Cu layer or the interlayer connection path by heating and pressing.
PCT/JP2007/072417 2006-11-28 2007-11-19 SEMICONDUCTOR DEVICE Cu WIRING AND METHOD FOR MANUFACTURING THE SAME WO2008065925A1 (en)

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JP2007267180A JP4896850B2 (en) 2006-11-28 2007-10-12 Cu wiring of semiconductor device and manufacturing method thereof

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000200789A (en) * 1998-11-02 2000-07-18 Kobe Steel Ltd Formation method for wiring film
JP2004193552A (en) * 2002-10-17 2004-07-08 Mitsubishi Materials Corp Copper alloy sputtering target for forming semiconductor device interconnect line seed layer
JP2006041128A (en) * 2004-07-26 2006-02-09 Kobe Steel Ltd METHOD OF FORMING Cu-BASED WIRE FOR SEMICONDUCTOR DEVICE

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000200789A (en) * 1998-11-02 2000-07-18 Kobe Steel Ltd Formation method for wiring film
JP2004193552A (en) * 2002-10-17 2004-07-08 Mitsubishi Materials Corp Copper alloy sputtering target for forming semiconductor device interconnect line seed layer
JP2006041128A (en) * 2004-07-26 2006-02-09 Kobe Steel Ltd METHOD OF FORMING Cu-BASED WIRE FOR SEMICONDUCTOR DEVICE

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