JP3337876B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device having an electrode wiring on a semiconductor substrate, and more particularly to a method for manufacturing a semiconductor device or a compound semiconductor device having a highly reliable electrode wiring. The present invention relates to a method for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art In recent years, in a semiconductor device, for example, an integrated circuit device (integrated circuit element) typified by a logic device, the degree of integration has been remarkably increased. It is inevitably required to miniaturize wiring for electrically connecting elements. Since high current density and high operating temperature are required for the fine wiring, the reliability of the semiconductor device is improved by forming the wiring with a material having high electromigration resistance.

[0003] Further, in this type of semiconductor device, it is also required to increase the operating speed, and RC delay is a serious problem in increasing the operating speed. As a solution to the RC delay problem, it is necessary to lower the dielectric constant of the passivation film and lower the resistance of the wiring material. As a wiring material corresponding to such a demand, Al or an Al alloy, and furthermore, Cu, Ag, and the like, whose electric resistance is lower than that of Al and whose activation energy of diffusion is Al or more, are known.

On the other hand, in order to miniaturize the electrode wiring, RIE (Reactive Ion Etching) method, ion milling method and the like are generally known as processing means. However, for example, in the case of Al wiring, a problem of bleeding due to light reflection in lithography in a processing process,
However, there is a problem such as non-uniformity in processing caused by the presence of precipitates and grain boundaries. These problems face the inconvenience that the wiring shape is deteriorated and the wiring reliability is deteriorated.

In the case of Cu wiring, for example,
Even if it is attempted to process by RIE method, it is difficult to implement Cu chloride and fluoride due to low vapor pressure. In other words, if the temperature of the semiconductor substrate to be processed is raised to increase the vapor pressure of chlorides, fluorides, etc., the chloride reaction and the fluorination reaction are also promoted, and the chloride reaction and the fluorination reaction are carried out inside the wiring. Continue to. However, there is no resist material that can cope with these reactions, and as a result, the fine processing of the electrode wiring cannot be achieved.

Further, in the case of a physical processing method by ion milling, it is difficult to peel and remove a mask material after processing due to ion damage, and a short circuit between electrode wirings occurs due to reattachment of milled atoms. There is a problem such as easy.

In recent years, attention has been paid to an embedded wiring method for the wiring processing method in the manufacturing process of the semiconductor device, and the method is becoming mainstream. That is, CMP (Chemical Mechanical Poli
With the development of shing) technology, required electrode wiring can be formed in the form of buried wiring, and electrode wiring using Al or Cu as a material has been formed. In this method, an insulating film (interlayer film) is provided on a semiconductor substrate provided with an active region or the like, for example, an Si substrate, before forming a wiring metal, and an electrode wiring of the insulating film is formed. A groove is previously formed (formed) in a region to be formed.

Next, a wiring metal is formed on the surface having been subjected to the processing such as the groove formation by a method such as ordinary sputtering, collimation sputtering (anisotropic sputtering), or CVD. Then, by adding heat treatment,
The deposited metal is reflowed to fill grooves and the like, and then unnecessary metal films are removed by CMP.
The required electrode wiring is formed.

At this time, the connection with the active portion or the lower layer electrode is also made by embedding a metal in a contact hole formed in the insulating film in advance or at the time of forming the wiring. Before forming the metal film for use, a barrier metal is formed.

[0010] The heat treatment for reflowing the wiring metal and filling the inside of the groove is carried out by (1) keeping a high vacuum after forming the metal film, or (2) forming Cu or Ag. If the film is once released to atmospheric pressure after film deposition, the heat treatment chamber is evacuated to a vacuum below the equilibrium dissociation pressure of the oxide or high vacuum, and then heat-treated in a hydrogen stream, or (3) atmospheric pressure heat treatment. In the case of ( ₁₎ , the reaction is performed in a high-purity forming gas (a mixed gas of N ₂ and H ₂ , usually having a H ₂ concentration of 10 to 20%).

That is, in each case, the heat treatment is performed in an atmosphere in which the oxidizing gas is removed as much as possible or in a reducing gas atmosphere.

Here, in the reflow heat treatment,
There are two problems.

First, as schematically shown in FIG. 25A, for example, in order to increase the initial deposition amount in the groove 1, the metal film is usually deposited 1.5 times to 2.0 times the depth of the groove 1. The film is formed in an amount. For this reason, during the reflow heat treatment process, the space between the grooves 1 is increased.
The opposite deposited film (metal film) 3b on 2a comes into contact to form a bridge 3a, and as shown schematically in FIG. Inhibits reflow.
In the figure, reference numerals ₂ and 5 denote insulating films such as a SiO ₂ film and a SiN film.

In this respect, when the wiring metal is deposited by physical vapor deposition such as sputtering or vacuum vapor deposition, the incident direction of the flying particles has a cosine distribution. The upper deposit grows in the direction of the groove 1 to generate an overhanging portion 3b, which inhibits the deposit in the groove 1. When the heat treatment is performed in a state where the overhanging portion 3b grows as described above, the adjacent portions come into contact with each other due to thermal expansion or the like, and the growth (necking) of the contact portion proceeds, and a space called a bridge 3a is formed.
The connection between 2a proceeds. With the progress of the connection between the spaces 2a, an initial space remains under the so-called bridge region, and this cavity cannot be buried by ordinary heat treatment. Therefore, when the wiring is processed by the subsequent CMP, the cavity remains in the wiring. Will take the form.

Second, as schematically shown in FIG. 26A, even if the bridge 3a as described above is not generated, the groove is formed as shown in FIG. 26B during the reflow heat treatment process. There is a problem that the deposits in the groove 1 are sucked up onto the space 2a between the grooves 1 and the voids 4 are formed in the grooves 1 to cause a decrease in the reliability of the wiring or a disconnection. That is, in this case, by performing the heat treatment, the movement of the metal once deposited in the groove 1 progresses due to the surface diffusion caused by the difference in the surface curvature radius, as schematically shown in FIG. However, at this stage, since the energy is in a metastable state, the movement of the deposited film 3 is further promoted by reducing the surface and interface energy. The direction of movement of the deposited film 3 at this time is determined by the relationship between the amount of deposition in the space 2a and the amount of deposition in the groove 1, and assuming a simple sphere, the reaction is inversely proportional to the fourth or third power of the particle size. proceed. That is, as schematically shown in FIG. 26B, the metal film moves from the direction in which the deposition amount is small to the direction in which the deposition amount is large. Further, when the wiring metal is deposited by ordinary sputtering, in an extreme case, before the reflow heat treatment is performed, the connection of the deposited film occurs between the spaces 2a, and the holes 4 may be formed in the groove 1.

FIGS. 27 (A), 27 (B) and 27 (C) schematically show a state in which Cu as a metal for wiring is buried in trench 1 in a conventional heating sputtering method. Generally, sputtering of a metal for wiring is performed in an inert atmosphere such as Ar gas in order to prevent an increase in resistance value due to oxidation of the metal. At this time, in the sputtering on the surface of the Si substrate provided with the groove 1, the deposition rate inside the groove is lower than that in the flat portion. That is, at the bottom of the groove 1 with a step,
This is because the angle range in which the sputtered particles can enter (expected angle) is narrower than the flat part.

Here, when a film is formed by a sputtering method while heating a Si substrate, as shown in FIG. 27 (A), at the initial stage of the film formation, the metal forms an island-like aggregation so as to lower the surface energy. Cause In particular, since the inner wall of the groove 1 has a low deposition rate, the aggregation is easily caused. When the side wall agglomeration occurs in the groove 1, the prospective angle is reduced by the island-shaped metal in the opening of the groove 1, and the incidence of sputtered particles into the groove 1 is hindered. As shown, only the island-shaped metal in the opening grows preferentially. As a result, the island-like metals grown preferentially from the side walls of the opposing openings come into contact with and adhere to each other, and the holes 4 are formed in the grooves 1.
27, the groove 1 cannot be filled with the deposited film 3 as shown in FIG.

As described above, when the film is formed by the ordinary physical vapor deposition, due to the effect of the portion 3b where the deposit overhangs on the space 2a, the film thickness on the space 2a is larger than the film thickness in the groove 1. Since the deposited film thickness is large, the above two problems cannot be solved. As a method of increasing the amount of deposition in the groove 1, anisotropic film formation is also available. However, this method is inferior in film formation efficiency and has a small groove side wall thickness. There is a problem that the movement of the deposited metal from above 2a into the groove 1 is hindered.

Further, in the formation of the buried wiring using the CMP technique, it is required to form the wiring-like groove accurately. Therefore, during the photoetching process, it is necessary to prevent the resist exposure from being disturbed due to the irregular reflection of light from the underlying material, and in order to prevent the irregular reflection, the TiN layer having a low reflectance has a light reflection property. The prevention film is formed prior to the metal film for electrode wiring.
In addition, the TiN layer is also used as a diffusion barrier for a metal for wiring that easily diffuses into an insulator such as Cu. By the way, since the TiN is a conductor, for example, after forming a Cu wiring, an unnecessary portion of the TiN must be removed. However, Cu, which is a metal for wiring, has poor acid resistance,
Since it is difficult to remove by etching with an acidic solution, it is desired to remove them collectively by the CMP technique.

On the other hand, in the formation of the wiring by the buried wiring method, it is desired not to excessively polish a lower layer material when an unnecessary metal film is removed by polishing in a CMP process. However, since the TiN film is hard, in order to remove the lower layer material without excessive polishing, it is necessary to provide an insulating lower layer having a lower polishing rate than the TiN film, and there are many difficulties in selecting this material. With or
This leads to an increase in the number of steps.

In order to solve such a problem, the use of a C (carbon) film having a lower reflectance than the TiN film and a lower polishing rate has been studied. That is, the use of the C film as the antireflection film not only suppresses a decrease in the accuracy of the resist pattern due to irregular reflection of light, but also functions as a polishing stop film for the TiN film. This avoids excessive polishing of the underlying material
Although removal of the TiN film is possible, removal of the C film is required. The removal of the C film can be performed, for example, in oxygen plasma. However, Cu wiring and the like exposed to oxygen plasma are oxidized with an increase in the temperature of the substrate, resulting in deformation of the wiring and an increase in resistance. Tend.

[0022]

The above-mentioned method of forming an electrode wiring utilizing the CMP technique is useful in manufacturing a semiconductor device.
Despite much interest, there are still some practical problems. For example, when an electrode wiring is formed using Cu as a material, there is a problem in that the semiconductor wiring deteriorates after passing through a base insulating film or the like in a reflow heat treatment process and reaching, for example, a Si substrate. In order to solve such a problem, a method of preventing Cu from diffusing into the Si substrate by using a barrier metal or an interlayer film has been adopted. However, at this stage, there is no sufficient barrier, so that the reflow temperature is constrained as a result, and a sufficient reflow temperature cannot be secured. In particular, in order to reflow a metal film formed by ordinary sputtering, for example, a heat treatment at 750 ° C. for 10 minutes or more in a high vacuum is required, so that deterioration of semiconductor characteristics due to diffusion of the electrode wiring metal is remarkable. That's a problem.

As one of the countermeasures, there is also provided a collimation spatter which can enhance the filling in a groove at a film forming stage by removing a high angle component of an incident angle with respect to a semiconductor substrate by utilizing a linear component of sputter particles. Attempted.
However, since the collimation sputtering uses a linear component of sputter particles, the efficiency of film formation is lower by almost one digit than that of ordinary sputter film formation, and there is a problem in productivity or mass productivity.

As another method of forming the electrode wiring, there is a method of using a groove filling method by selective CVD (Chemical Vapor Deposition), but in each case, there is a technically unsolved problem and the cost is high. There is such a problem.

The present invention has been made in view of the above circumstances. By reflowing a conductive film formed by a general film forming method at a relatively low temperature, the conductive film formed in a groove or a contact hole forming an electrode wiring forming region is formed. An object of the present invention is to provide a method of manufacturing a semiconductor device in which an electrode wiring can be easily formed without being sufficiently buried and resulting in deterioration of semiconductor characteristics.

The present invention also relates to a method of manufacturing a semiconductor device capable of forming a dense and highly reliable buried wiring when forming a buried wiring by reflowing a conductive film in a groove or a contact hole forming an electrode wiring forming region. The purpose is to provide.

A further object of the present invention is to provide a method of manufacturing a semiconductor device capable of forming a dense and highly reliable buried wiring in a groove and a contact hole having a high aspect ratio forming an electrode wiring forming region. And

[0028]

According to a first method of manufacturing a semiconductor device according to the present invention, there is provided a method of manufacturing a semiconductor device in which an electrode wiring is formed on a semiconductor substrate. On a semiconductor substrate in which at least one of the holes is formed, a conductive film mainly containing Cu is formed, and the conductive film is reflowed while supplying at least an oxidizing gas. And / or performing a heat treatment so as to fill the contact hole, and then removing the conductive film in a region other than the electrode wiring formation region by polishing to form the electrode wiring.

Further, in the first method for manufacturing a semiconductor device according to the present invention, in the heat treatment step, the conductive film is reflowed by supplying both the oxidizing gas and the reducing gas. This is one of the features of the manufacturing method.

Still another feature of the first aspect of the present invention is that a partial pressure of the oxidizing gas is smaller than an equilibrium partial pressure of oxidation of the conductive film. Further, the partial pressure of the oxidizing gas ^ranges from 1 × 10 ⁻⁷ to 5 × 10 ^−5.
It is within the range of Torr. further,
In the first method for manufacturing a semiconductor device according to the present invention,
It is effective to form a first conductive film in which an oxide has conductivity as a base of the conductive film mainly containing Cu, and to form the conductive film thereon.

At this time, the first conductive film is preferably formed via a barrier layer formed on the semiconductor substrate. The substance forming the first conductive film has a negative Gibbs free energy change in the oxidation reaction by the oxidizing gas, and has an absolute value of the absolute value of the Gibbs free energy change in the oxidation reaction of the barrier layer. A larger metal is chosen. As the metal forming the first conductive film, Nd, Ti, Nb, La, Sm, Re, V, Ru, Rh, Os, Ir, Pt
At least one selected from the group of In particular, for Nd, La, and Sm, the absolute value of the free energy change of Gibbs in the oxidation reaction is larger than the absolute value of the free energy change of Gibbs in the oxidation reaction of TiN, which is typically used as a barrier. This is desirable because the effect of suppressing the oxidation of the layer is large.

According to a second method of manufacturing a semiconductor device according to the present invention, in the method of manufacturing a semiconductor device in which electrode wiring is formed on a semiconductor substrate, at least one of a groove and a contact hole is previously formed in an electrode wiring forming region. A conductive film is formed on the semiconductor substrate, and a uniaxial stress is applied to the surface of the semiconductor substrate having the conductive film from above, and heat treatment is performed so that the conductive film reflows and fills the groove and / or the contact hole. After the application, the conductive film in the region other than the electrode wiring formation region is removed by polishing to form the electrode wiring.

According to a third method of manufacturing a semiconductor device according to the present invention, in the method of manufacturing a semiconductor device in which an electrode wiring is formed on a semiconductor substrate, at least one of a groove and a contact hole is previously formed in an electrode wiring forming region. A film mainly composed of Cu and a film mainly composed of Ag are deposited and laminated on the semiconductor substrate, and the obtained conductive film is subjected to a heat treatment to reflow the conductive film. The method is characterized in that a contact hole is filled, and a conductive film other than the filled electrode wiring forming region is removed by polishing to form an electrode wiring.

According to a fourth method of manufacturing a semiconductor device according to the present invention, in the method of manufacturing a semiconductor device in which electrode wiring is formed on a semiconductor substrate, at least one of a groove and a contact hole is previously formed in an electrode wiring forming region. It was a conductive film formed on a semiconductor substrate, removing at least the groove and / or a portion such that the thickness is thinned surface of the conductive film located in the vicinity of the contact hole, an oxidizing gas and
Heat treatment is performed by supplying a reducing gas , and the remaining conductive film is reflowed to fill the groove and / or the contact hole, and the conductive film other than the filled electrode wiring formation region is removed by polishing. It is characterized in that electrode wiring is formed.

According to a fifth method of manufacturing a semiconductor device according to the present invention, in the method of manufacturing a semiconductor device in which an electrode wiring is formed on a semiconductor substrate, at least one of a groove and a contact hole is previously formed in the electrode wiring forming region. Heating the formed semiconductor substrate and flowing Cu into the groove and / or the contact hole while supplying at least an oxidizing gas to form a conductive film mainly composed of Cu. The electrode wiring is formed by removing the conductive film other than the electrode wiring formation region filled in the hole by polishing.

Further, the fifth method of manufacturing a semiconductor device according to the present invention is characterized in that an oxidizing gas and a reducing gas are supplied in a film forming step by heat treatment.

Further, in the fifth method of manufacturing a semiconductor device according to the present invention, in the film forming step, in the first half of the film forming step of the conductive film for the electrode wiring, the partial pressure of the oxidizing gas on the surface of the semiconductor substrate is reduced. The partial pressure of the oxidizing gas and the partial pressure of the reducing gas should be higher than the equilibrium partial pressure of the oxidizing gas partial pressure and the reducing gas partial pressure. It is characterized by controlling the supply amounts of the reducing gas and the oxidizing gas so as to be larger than the equilibrium partial pressure with the pressure.

Further, in the fifth method of manufacturing a semiconductor device according to the present invention, it is one feature that the partial pressure of the oxidizing gas is smaller than the equilibrium partial pressure of oxidation of the conductive film. Further, the partial pressure of the oxidizing gas is 1 × 10 ⁻⁷
To 5 × 10 ⁻⁵ Torr. In the fifth method of manufacturing a semiconductor device according to the present invention, a first conductive film whose oxide is conductive is formed as a base of the conductive film mainly containing Cu, and the conductive film is formed thereon. It is effective to form a film.

At this time, preferably, the first conductive film is formed via a barrier layer formed on the semiconductor substrate, and the first conductive film is formed as in the case of the first manufacturing method. As the substance to be converted, a metal having a negative Gibbs free energy change in the oxidation reaction by the oxidizing gas and a larger absolute value than the absolute value of the Gibbs free energy change in the oxidation reaction of the barrier layer is selected.

Specifically, as the first metal, Ti,
V, Cr, Ni, Nb, Mo, Ru, Rh, Pd, Sb, La, W, Re, Os, Ir, Pt, Tl, Pb, B
At least one selected from the group consisting of i, Nd, Sm, and Er is preferable, and at least one selected from the group consisting of La, Nd, and Sm is particularly preferable.

According to a sixth method of manufacturing a semiconductor device of the present invention, in the method of manufacturing a semiconductor device in which electrode wiring is formed on a semiconductor substrate, at least one of a groove and a contact hole is previously formed in an electrode wiring forming region. After forming a film mainly composed of Cu containing oxygen or an oxide film of Cu on the semiconductor substrate formed, heating the semiconductor substrate and supplying an oxidizing gas and a reducing gas.
After flowing Cu into the groove and / or the contact hole to form a conductive film mainly containing Cu, the conductive film other than the electrode forming region filled in the groove and / or the contact hole is polished. It is characterized by removing and forming an electrode wiring.

Note that the oxygen-containing metal film or oxide film here has a form already containing oxygen at the time of film formation.
Alternatively, it may be formed by oxidizing a metal film.

[0043]

[0044]

Hereinafter, the present invention will be further described.

In the present invention, first, a conductive film formed by general sputtering or the like is reflowed at a low temperature of about 600 ° C. or less to cause diffusion of a wiring metal such as Cu into a semiconductor substrate. It aims to establish a technique for forming embedded wiring with high efficiency while suppressing deterioration of semiconductor characteristics.
In other words, through experiments and diffusion simulations, it was found for the first time that the reflow of the conductive film progressed mainly by surface diffusion, and that uniaxial stress in the conductive film accelerated the diffusion. The main point is to form a highly reliable electrode wiring by easily reflowing the conductive film while suppressing or avoiding diffusion of Cu or the like into the inside of the substrate.

That is, diffusion is generally a thermal activation process, and proceeds exponentially as the temperature increases. In addition, even on the surface of the semiconductor substrate on which the groove is formed, the material transport phenomenon occurring in the formed conductive film has a moving speed determined by the temperature. In particular, in the reflow phenomenon, of the diffusion, surface diffusion predominates, and this surface diffusion is caused by a difference in surface curvature (difference in chemical potential). Further, the moving direction of the surface diffusion depends on the surface shape (curvature), and the moving speed depends on the temperature. However, as another factor, the uniaxial stress applied to the conductive film has a large effect.

In the case of the first invention, the surface of the Cu film, the Ag film, and the Au film is raised to a required reflow temperature in the reflow due to the surface diffusion of the Cu film, the Ag film, and the Au film. That is, in the case of a Cu film, the heat of oxidation and reduction of Cu is used.

First, in the case of the reduction reaction, the Cu film is locally raised to a required reflow temperature according to the exothermic equation (1) accompanying the reduction reaction to promote the surface diffusion.

CuO + H ₂ → Cu + H ₂ O−20.8 kcal / mol (at 700 K) (1) Here, the reduction reaction of Cu oxide includes, for example, H ₂ , C
One or more reducing gases such as H ₄ and CO are used, and these may be generally used in a mixed system with an inert gas. When a reduction reaction occurs when the surface of the Cu film is oxidized, the Cu atoms forming the oxide are rearranged into a Cu crystal lattice on the released Cu surface. At this time, the heat of the reduction reaction is supplied to the surface atoms, and the atoms in the vicinity of the activated surface become substantially the same as when a temperature of about several hundred degrees Celsius is added by the heat of the reduction reaction. When the surface diffusion progresses and the reaction heat is deprived, the diffusion of the surface atoms returns to the diffusion at the temperature of the semiconductor substrate (environmental temperature).

Next, in the case of the oxidation reaction, when the surface oxidation of the Cu film is performed by O ₂ , the exothermic reaction is represented by the following equation (2), and the diffusion at the interface between the Cu oxide and Cu is promoted. However, since the oxidation by H ₂ O is an endothermic reaction, heat is supplied from the semiconductor substrate side.

Cu + 1/2 O ₂ → CuO-37.9 kcal / mol (at 700 K) (2) As described above, even when the semiconductor substrate is at about 300 ° C., for example, even when the temperature of the semiconductor substrate is about 300 ° C. In the vicinity of the Cu surface, a sufficient reflow temperature is ensured, and the required reflow proceeds easily and in a short time. Therefore, the groove can be easily filled with the Cu film in a form in which diffusion of Cu into the semiconductor substrate is suppressed or prevented. In the case of an Ag film, a sufficient reflow temperature is locally ensured near the surface of the Ag film because the oxidation reaction is exothermic regardless of whether the surface oxidation is performed with O ₂ or H ₂ O.

Even when the oxidizing gas is introduced alone, the partial pressure of the oxidizing gas is lower than the equilibrium partial pressure of oxidation at the heat treatment temperature (specifically, about 1 × 10 ⁻⁷ to 5 × 10 ⁻⁵ Torr). When set, chemi-sorption and desorption of oxidizing gas on the Cu surface without oxidizing Cu
ption) reaction can proceed, and the energy resulting from this reaction accelerates surface diffusion and reflow proceeds.

These phenomena are not limited to Cu, and the same phenomena proceed particularly strongly with materials having a strong catalytic action such as Ag and Au. At this time, O ₂ , CO ₂ , H ₂ O, or the like is desirable as the oxidizing gas, and the heat treatment may be performed in a mixed gas of these. Note that this reaction has the same effect even during film formation. After the reaction treatment, it is desirable to expose to a reducing gas atmosphere such as H ₂ .

As described above, the reflow temperature can be lowered by controlling the amount of the oxidizing gas mixed.

Incidentally, such a Cu film is generally made of pure Cu.
However, even if an element that cannot be reduced in the reflow temperature range is added, the total content may be 10 atom% or less, preferably 5 atom% or less. That is, when the total content of the non-reducible elements in the reflow temperature range exceeds 10 atomic%, the film surface is covered with an oxide film of this element, and the reflow phenomenon tends to be suppressed.

The Cu film can be formed by any of ordinary sputtering, anisotropic sputtering (collimation sputtering, long distance sputtering), helicon wave sputtering, vacuum evaporation, ICB evaporation or CVD evaporation. May be. In addition, if the crystal grain size in the Cu film at the time of the film formation is made small and the grain boundary energy that disappears with the crystal grain growth during the heat treatment is used, the reflow of the Cu film is promoted. That is, by cooling the semiconductor substrate with liquid nitrogen at the time of film formation or by applying a bias to the semiconductor substrate at the time of film formation, a Cu film with fine crystal grains can be formed, and the reflow effect can be further improved. Here, the bias voltage applied to the semiconductor substrate is desirably −50 V or more. The effect of the Cu film is further promoted by appropriately adding and containing a recrystallization promoting element. Further, examples of the heating source or the heating method for the semiconductor substrate include a resistance furnace, substrate heater heating, laser heating, and image furnace heating.

When both the oxidizing gas and the reducing gas are supplied, the oxidizing gas and the reducing gas are simultaneously supplied in order to make the oxidation reaction and the reduction reaction reversible.
Alternatively, the heat treatment is performed while alternately supplying. Therefore, the formed Cu film is sequentially exposed at least once to an oxidizing gas atmosphere and a reducing gas atmosphere, or at least once to an oxidizing gas-reducing gas mixed atmosphere.
When alternately exposing to an atmosphere of an oxidizing gas and a reducing gas, it is preferable to shorten the switching interval in terms of lowering the reflow temperature and shortening the reflow processing time. In this case, there is no problem even if an inert gas or a residual gas at the time of evacuation are mixed.

On the other hand, in the case of exposure to a mixed atmosphere of an oxidizing gas and a reducing gas, a region near the equilibrium partial pressure of the oxidation reaction and the reduction reaction is mixed. In other words, in this case, the oxidation reaction and the reduction reaction are simultaneously proceeding in a part of the Cu film surface due to the fluctuation of the oxidizing gas and the reducing gas, but both reactions are proceeding comprehensively. become. It is also desirable to artificially change the oxidation and reduction partial pressures. In this case, in order to avoid the deterioration of the Cu film, the aggregation of the Cu film, and the diffusion of Cu due to the temperature rise of the entire semiconductor substrate,
It is desired to set the gas partial pressure so that the oxidation amount is 20% or less of the Cu film. Further, after the reflow by the oxidation and reduction reactions, it is preferable to finally expose the substrate to a reducing atmosphere such as pure H ₂ in order to remove the Cu oxide film.

The atmosphere of the oxidation reaction and the reduction reaction may be plasma. For example, even if the oxidizing gas plasma and the reducing gas plasma are individually or simultaneously exposed to the Cu film, the reflow is performed in accordance with the above condition setting. Is obtained. Here, as plasma, rf, D
C, ECR, helicon wave plasma, etc. are preferred. Also,
When a bias is applied to the semiconductor substrate, the reaction is accelerated. However, considering the sputtering phenomenon of the Cu film, the applied bias is desirably −50 V or less. In addition, these things are Ag and Au
The same applies to the case of.

Further, in the first method of manufacturing a semiconductor device according to the present invention, a first conductive film whose oxide is conductive is formed as a base on a substrate surface on which a groove and / or a contact hole is formed, By forming a Cu or Cu alloy film on it, when forming Cu embedded wiring by reflow technology using redox reaction, even if the underlying film is oxidized by heat treatment in the presence of oxidizing gas, It is possible to provide a highly reliable semiconductor device by avoiding an increase in resistance.

As described above, in order to form a Cu or Cu alloy embedded wiring by a reflow technique utilizing an oxidation-reduction reaction without deteriorating semiconductor characteristics, it is necessary to increase the resistance of a barrier layer or a substrate surface due to oxidation. Technology is needed. Here, some oxides have high conductivity. For example, ReO ₃ and NbO
Low resistance of μΩcm. By forming a conductive film made of an oxide having conductivity as a base film of a Cu or Cu alloy film, even if the base film is oxidized by heat treatment in the presence of an oxidizing gas, the groove or the contact is formed. An increase in contact resistance in the hole can be avoided.

That is, when performing reflow utilizing an oxidation-reduction reaction, depending on the oxygen partial pressure in the heat treatment atmosphere, the oxidation reaction may reach the barrier layer under Cu or the substrate surface. Here, as a Cu underlayer,
When a conductive film made of a substance that becomes a good conductor oxide when oxidized is formed, good conductivity can be maintained regardless of whether the underlying film is oxidized or not. A rise in resistance can be avoided. At this time, the same effect can be obtained even if the conductive film used as the base film is entirely oxidized to be an oxide or only a part thereof is oxidized to be present as a conductive oxide. . Note that the conductive oxide formed by oxidizing the conductive film used as the base film may be out of the stoichiometric composition. The resistivity is desirably 100 μΩcm or less.

When the conductive film is solely formed as a base film, the conductive film also functions as a Cu barrier layer. Even when no other barrier layer is interposed between the substrate and the Cu wiring, the conductive film is formed on the Cu substrate. Diffusion to the substrate and diffusion of oxygen contained in Cu to the substrate are prevented.

Further, when such a chemical change or a state change is handled thermodynamically, a change ΔG in Gibbs free energy due to a change in the state of the system is an index indicating whether the change can occur spontaneously. Become. If the value of ΔG associated with a change in the system is 0, the change is a reversible change, and ΔG <0
, The change in that direction occurs spontaneously, and conversely, Δ
If G> 0, it indicates that no change in that direction can occur.

ΔG in the change in the oxidation reaction of the material forming the conductive film depends on the oxygen partial pressure of the atmosphere to which the substrate is exposed during film formation or reflow and the temperature range.
When it has a negative value and its absolute value is larger than ΔG of Cu, the conductive film has an action of reducing Cu. In this case, since the conductive film plays a role of absorbing oxygen introduced into Cu, when performing reflow using an oxidation-reduction reaction, it exhibits higher barrier properties and supplies a reducing gas. Even when a Cu film is formed without using the film, or when the oxidation amount of the Cu film exceeds 20%, the resistance of the Cu wiring and the contact resistance can be prevented from increasing due to the reducing action of the conductive film. .

When the conductive film is laminated on a barrier layer made of a material different from the conductive film, it is possible to prevent the barrier layer from being oxidized, thereby preventing an increase in the resistance of the barrier layer. Becomes In particular, ΔG in the oxidation reaction of the material forming the conductive film has a negative value in the oxygen partial pressure and temperature range of the atmosphere to which the substrate is exposed during reflow, and its absolute value constitutes the barrier layer. When the absolute value of ΔG of the material is larger than that of the barrier layer, the effect of suppressing the oxidation of the barrier layer appears more remarkably because the oxidation of the conductive film has priority over the oxidation of the barrier layer.

Further, when the conductive film satisfies this condition, the laminated conductive film has a function of reducing the barrier layer even if a natural oxide film exists on the surface of the barrier layer. In forming the film, the contact resistance does not increase even if the barrier layer is once exposed to the air.

The method for forming the conductive film may be any of sputtering, vacuum deposition, and CVD. The amount of oxygen introduced into the Cu film during film formation or reflow is
It changes depending on the partial pressure of the atmosphere at that time. The thickness of the conductive film is desirably not less than a thickness capable of reducing all the oxygen introduced into the Cu film at the oxygen partial pressure at which the film formation or the reflow is performed.

Elements constituting the conductive film include Ti,
V, Cr, Ni, Nb, Mo, Ru, Rh, Pd, Sb, La, W, Re, O
It is desirable to include at least one of s, Ir, Pt, Tl, Pb, Bi, Nd, Sm, and Er. In particular, for Nd, La, and Sm, the absolute value of the free energy change of Gibbs in the oxidation reaction is larger than the absolute value of the free energy change of Gibbs in the oxidation reaction of TiN, which is widely used as a barrier layer. It has a great effect of suppressing oxidation of
preferable. Further, the Cu film to be formed can use either Cu or a Cu alloy, and the same applies to the case of Ag or Au.

By forming a conductive film made of a substance in which the above-mentioned oxide becomes a conductive oxide as a base film of Cu, Ag and Au, a Cu embedded wiring is formed by a reflow technique utilizing an oxidation-reduction reaction. Even if the underlying film is oxidized in the heat treatment in the presence of the oxidizing gas, an increase in contact resistance can be avoided, and a highly reliable semiconductor device can be provided.

Further, in the case of the second invention, in reflowing the conductive film, a factor other than surface diffusion that governs the reflow phenomenon, that is, a uniaxial stress applied to the conductive film is used. That is, in a certain high temperature state, if a difference occurs in the stress applied to the conductive film or the like, a high temperature creep phenomenon occurs in which a substance (metal atom) moves from a high stress side to a low stress side. Therefore, here, when a uniaxial stress is applied to the convex portion of the conductive film having the uneven shape by the groove formed in the semiconductor substrate, a high stress is applied to the conductive film in the convex portion.
Since a low stress is applied to the conductive film in the concave portion and a stress gradient is generated in the conductive film, diffusion from the convex portion to the concave portion of the conductive film proceeds reliably, and a lower reflow temperature is realized.

At this time, the applied uniaxial stress (pressure) is:
The higher the temperature is, the greater the acceleration effect is, and the degree of diffusion progress varies depending on the film formation (as depo) shape, but the reflow temperature can be substantially reduced by several hundred degrees centigrade. The uniaxial stress (applied stress) applied here is 1 kg / mm ² or more, preferably
Set to ² kg / mm ² or more. Further, a uniaxial stress exceeding the yield stress causes a plastic deformation of the conductive film. The plastic deformation facilitates the filling of the concave portion, while the change in structure and the like accumulated in the conductive film during the processing is alleviated by the heat treatment, and the reflow proceeds by the energy at that time. The heating at this time may be performed at the same time as the application of the uniaxial stress or after the plastic deformation by the application of the uniaxial stress. However, the simultaneous heating can achieve a lower reflow temperature.
However, the upper limit of the uniaxial stress here is the semiconductor substrate material,
In particular, the yield stress is preferably equal to or less than the yield stress of the Si substrate. When a general stress such as a hydrostatic pressure is applied instead of a uniaxial stress, a stress gradient generated in the conductive film is small, and the reflow temperature is not lowered much.

In the second invention, the conductive film is pure A
l, Al alloy, pure Cu, Cu alloy (for example, Cu-Ag alloy), pure A
g. These conductive films can be formed by any of ordinary sputtering, anisotropic sputtering (collimation sputtering, long distance sputtering), helicon wave sputtering, vacuum evaporation, ICB evaporation or CVD evaporation. Good. In addition, if the crystal grain size in the conductive film at the time of the film formation is made small and the grain boundary energy which disappears with the crystal grain growth at the time of heat treatment is used, the reflow of the conductive film is promoted. That is, by cooling the semiconductor substrate with liquid nitrogen at the time of film formation, or by applying a bias to the semiconductor substrate at the time of film formation, a conductive film having fine crystal grains can be formed, and the reflow effect can be further improved. Here, the bias voltage applied to the semiconductor substrate is desirably −50 V or more. The effect of the conductive film is promoted by appropriately adding and including a recrystallization promoting element.

As the atmosphere during the heat treatment, when the conductive film is Al, the surface is oxidized, and the reflow property is likely to be impaired. Therefore, the film is kept at a vacuum of 1 × 10 ⁻⁸ Torr or less after film formation. It is preferable to heat under pressure. On the other hand, Cu, Ag
Or, in the case of Au, the surface oxide film can be easily reduced, so it is not necessary to expose it to the atmosphere after film formation. Even if the Cu, Ag, or Au film is oxidized, it can be reduced in a reducing atmosphere or an oxide dissociation pressure during heating under pressure. The following degree of vacuum may be used. Needless to say, the heat treatment may be performed while supplying the oxidizing gas and the reducing gas simultaneously or alternately. further,
When the conductive film is a Cu-Ag alloy, it is a simple eutectic alloy, the electric resistance is at most 1.9 μΩcm, the eutectic temperature is 779 ° C., and the melting point is quite low, so that the reflow temperature is also lowered.

As the uniaxial stress applied in the second invention, a material having an extremely flat surface for the stress transmitting jig is selected from the necessity of applying the uniaxial stress uniformly to the entire sample. Specifically, a mirror-finished Si, Si thermal oxide film or the like is desirable, and a film that does not react with the conductive film is selected. For example, when the material of the conductive film is Cu, it is preferable to use SiO ₂ because it reacts with Si to form silicide. Further, the heating method for the reflow may be any of a resistance furnace, a substrate heater heating, a laser heating, an image furnace heating, etc. However, in order to have a thermal diffusion effect by a temperature gradient, a uniaxial stress applying jig, gas, liquid Is preferred.

According to a third aspect of the present invention, the conductive film at the time of film formation is made of a Cu film, an Ag film,
The film is of a stacked type and utilizes the fact that the energy of the interface formed by different metals is released during alloying of these metals, and that the released energy contributes to lowering the reflow temperature. Here, the heat treatment may be performed on the stacked film while supplying the oxidizing gas and the reducing gas, or while applying a uniaxial stress to the conductive film above the semiconductor substrate surface. In the third invention, not only energy at the interface between dissimilar metals, but also free energy on the surface of the conductive film, grain boundary energy in the film, and the like are appropriately used. For example, at the time of film formation, the surface area is increased by utilizing the anisotropy of the film-formed incident particles, or the crystal grain size is reduced, whereby the grain boundary energy and the like are effectively used, and reflow is promoted. You.

In this reflow, since the interface needs to be eliminated, it is premised that oxides that pin the movement of the interface are eliminated as much as possible. Therefore, in order to avoid impurity contamination during film formation, particularly the influence of O ₂ , for example, in the case of sputtering film formation, it is desirable to form a film in a high-purity Ar atmosphere and a high-purity target in an environment with a very low ultimate pressure. .

Further, the Cu-Ag film may appropriately contain and contain a recrystallization promoting element. On the other hand, by cooling the semiconductor substrate with liquid nitrogen during film formation or applying a bias to the semiconductor substrate during film formation, it is possible to form a Cu-Ag film with fine crystal grains, further improving the reflow effect. obtain. Here, the bias voltage applied to the semiconductor substrate is desirably −50 V or more.

Secondly, the present invention suppresses and prevents the occurrence of bridges during the reflow heat treatment, and at the same time, suppresses the deposition of the deposits in the grooves and the contact holes for forming the electrode wirings to the space surface side, thereby reducing the presence of cavities. The main point is to form electrode wiring that is not used.

That is, according to the manufacturing method of the fourth invention, after forming a conductive film by ordinary physical vapor deposition, the deposited film thickness on the space is reduced in advance prior to the reflow heat treatment, and the deposited film thickness on the space and the inside of the groove are reduced. By appropriately controlling the thickness of the deposited film and controlling the movement of the deposited film, the generation of the bridge and the generation of the vacancy are suppressed or avoided.

Here, it is desirable that the deposited film on the space is polished or the like so as to be about the same as the deposited film thickness in the groove or the like. Since the amount of movement is reduced, for example, in the schematic diagram of FIG. 1, when the deposited film thickness in the groove 6 is a and the deposited film thickness in the space between the wiring grooves 6 is b, the following formula: (2/3) a <B <(3 /
2) It is desirable that the film thickness ratio is set in the range of a. In FIG. 1, 7 is an insulating film such as an SiO ₂ film, and 8 is Cu
A conductive film such as a film, and 10 is an insulating film such as a SiO ₂ film and a SiN film.

In order to reduce the film thickness by partially removing the deposited film on the space after the film formation, the MP (Mech
anion polihing), CMP, or ion etching.

When Al is deposited and the film thickness is reduced by the MP and the CMP, reflow does not occur smoothly unless the surface oxide film is ion-etched during the heat treatment. On the other hand, when Cu is deposited, heat treatment is performed in a reducing environment of the Cu oxide, such as in a gas containing hydrogen or CO, or ion etching is performed during the heat treatment, or in a high vacuum environment. Heat treatment may be performed.

When the deposited film is a Cu film, an Ag film, or an Au film, the heat treatment temperature can be reduced by selecting an atmosphere of a mixed-oxidation-reduction gas atmosphere or an atmosphere in which the oxidation-reduction is alternately performed. And the substrate temperature at this time (environmental temperature)
Preferably, the temperature is 200 ° C. or higher, at which the reduction reaction proceeds rapidly, and the heating means at this time is resistance furnace, substrate heater heating,
Laser heating, image furnace heating, and the like can be mentioned, but substrate heater heating, which allows quick heat transfer even at a low temperature, is preferable. Further, as for the atmosphere in the heat treatment, in order to avoid the deterioration of the film and the temperature rise of the semiconductor substrate, a gas partial pressure ratio and an interval of oxidation / reduction are preferable so that the oxidation amount is 20% or less of the film thickness.

The atmosphere during the heat treatment may be plasma, and the deposition surface of the conductive film may be exposed to reducing gas plasma and oxidizing gas plasma simultaneously or alternately. Here, simultaneous exposure is the same as simultaneous supply of an oxidizing gas and a reducing gas, and in any case, an inert gas may be mixed as another gas.
The plasma is preferably rf, DC, ECR, helicon wave plasma, etc., and the reaction is promoted when a substrate bias is applied. However, in consideration of sputtering of a conductive film to be formed, the bias is -50 V or less. Is preferred.

Further, as the conductive film, Al, Cu, Ag,
Not only Au but also 10 atm% or less, preferably 5 a
It may be made of a tm% or less Cu alloy or the like. It is also desirable to provide a base film to reduce the interfacial energy in order to suppress the deposits in the grooves from being sucked into the spaces between the grooves. This underlayer is preferably formed of an element that does not mix with the material of the conductive film in order to avoid an increase in the electrical resistance of the deposited conductive film. For example, for Al, amorphous TaAl, amorphous NbAl, and Cu are used. N for
b, amorphous TaCu, amorphous WCo, and the like.

Thirdly, in the present invention, at least supply of an oxidizing gas is performed at the time of forming a conductive film or removing a polishing stop film after a CMP process, thereby forming a dense and reliable embedded wiring with a high aspect ratio. The main point is that.

That is, in the case of the fifth invention, the Cu film, the Ag film, and the Au film are formed while heating the semiconductor substrate and supplying at least an oxidizing gas, thereby forming the semiconductor substrate. After flowing and embedding in a groove or a contact hole, it is polished to form an electrode wiring. For example, in the case of a Cu film, by utilizing the oxidation and reduction reactions of Cu as in the first semiconductor device manufacturing method, the temperature of the surface of the Cu film locally rises and the surface diffusion is promoted. However, even at low temperatures, the flow of the Cu film into the grooves proceeds.

Here, even when the oxidizing gas is introduced alone, the partial pressure of the oxidizing gas is lower than the equilibrium partial pressure of oxidation of the conductive film at the heating temperature, specifically from 1 × 10 ⁻⁷ to 5 × 10 ^−5. Torr
When it is set to about the same degree, it is possible to promote the chemical adsorption and desorption reactions of the oxidizing gas on the Cu surface without oxidizing Cu, and the energy resulting from this reaction accelerates the surface diffusion and increases the Cu diffusion. Flows. On the other hand, the fifth
In the production method of (1), if both the oxidizing gas and the reducing gas are supplied, the efficiency is further improved as compared with the case of introducing only the oxidizing gas, as in the production method of the first invention. Further, in the manufacturing method of the fifth invention, the supply of the oxidizing gas and the reducing gas during the film formation is performed, and the oxidizing gas partial pressure on the surface of the semiconductor substrate during the first half of the film formation is reduced by the oxidizing gas and the reducing gas Conversely, during the latter half of film formation, the oxidizing gas and the reducing agent are set so that the reducing gas partial pressure becomes higher than the equilibrium partial pressure of the oxidizing gas and the reducing gas. By controlling the gas supply amount, good film formation is promoted. Similar effects can be obtained by controlling the temperature of the semiconductor substrate during the film formation to be higher in the latter half of the film formation than in the first half of the film formation.

Note that this phenomenon is not limited to Cu, and the same phenomenon is particularly strong when a material having a strong catalytic action such as Ag or Au is used. At this time, O ₂ , CO ₂ , H ₂
O or the like is desirable, and the film may be formed in a mixed gas of these. Also, after film formation, it is desirable to expose to a reducing gas atmosphere such as H ₂ . As described above, in the fifth aspect, by controlling the amount of the oxidizing gas mixed, the conductive film can be sufficiently buried in the groove or the contact hole having a high aspect ratio at a low temperature.

Here, as the film forming method, for example, a normal sputtering method, a long-distance sputtering method in which the distance between TS (the distance between the target and the substrate) is increased to increase the perpendicular incidence component of sputtered particles on the semiconductor substrate, Examples include an anisotropic sputtering method such as a collimation sputtering method in which a collimator plate for attaching sputter particles other than a normal incidence component is attached between TSs, and a bias sputtering method in which a DC voltage or a high-frequency voltage is applied to a semiconductor substrate. In particular, when the aspect ratio of the groove is high, the anisotropic sputtering method or the bias sputtering method is used to increase the efficiency of sputter particle adhesion in the groove and coat the inner surface of the groove with a Cu film containing O atoms, which is difficult to aggregate. This makes it easier to bury a groove having a higher aspect ratio.

Further, productivity can be improved by adopting a method of forming a Cu film which does not easily cause agglomeration by the bias sputtering method and then filling the inside of the contact hole by a normal sputtering method having a high film forming rate. Since the In bias sputtering, is deposited while pulling good perpendicularity the ionized Ar ⁺ ions into the semiconductor substrate, wherein Ar ⁺
Cu film with ions protruding into the opening (overhang shape)
Not only does not narrow the opening of the contact hole where Cu atoms are incident, but also has the effect of increasing the coverage by re-adhering the sputter-etched Cu to the inner wall surface of the contact hole. The desired effect can be obtained even when the bias sputtering is performed in a hydrogen or oxygen atmosphere in which little or no Ar amount is supplied, and the reliability of the wiring due to the drawing of the Ar ⁺ ions into the semiconductor substrate is improved. The decrease can be avoided by heating the semiconductor substrate or by forming a Cu film by a normal sputtering method thereafter.

Further, the on / o of the bias applied to the substrate
By gradually decreasing the ff and the bias, the primary Cu film and the secondary Cu film can be continuously formed in the same chamber, so that the film formation time can be reduced.
Furthermore, after forming a Cu film that is unlikely to cause aggregation by long-distance sputtering, the distance between TSs may be continuously reduced to shift to sputtering with a high deposition rate, or a Cu film that is unlikely to cause aggregation may be collimated. After forming by sputtering, the collimator may be moved from between TSs to shift to sputtering with a high film forming rate.

Also in the fifth method of manufacturing a semiconductor device, a first conductive film whose oxide is conductive is formed as a base layer on the substrate surface on which the groove and / or the contact hole is formed. By forming a Cu or Cu alloy film on the surface, in the formation of Cu embedded wiring using heat of oxidation and reduction reactions, even if the underlying film is oxidized when the semiconductor substrate is heated in the presence of an oxidizing gas, contact It is possible to provide a highly reliable semiconductor device that avoids an increase in resistance.

Further, as the Cu film to be formed, either Cu or Cu alloy is used.

In other words, in the same manner as in the first method for manufacturing a semiconductor device, a conductive film made of a substance whose oxide is a conductive oxide is formed as a Cu, Ag, Au underlayer film, so that oxidation and reduction reactions can be performed. In forming Cu buried interconnects using heat, good conductivity is maintained regardless of whether the underlying film is oxidized when the semiconductor substrate is heated in the presence of an oxidizing gas, thereby avoiding an increase in contact resistance Meanwhile, a highly reliable semiconductor device can be provided. In addition, as a substance in which the oxide used here becomes a conductive oxide, those exemplified as a base film in the first method for manufacturing a semiconductor device can also be used.

The production method of the sixth invention is based on the following findings in the overlapping studies of the present inventors.

That is, the semiconductor substrate is heated during the formation of the conductive film, and is set in a mixed atmosphere of an oxidizing gas and a reducing gas. Under these conditions, for example, a gas containing O ₂ as an oxidizing gas is supplied during sputtering, and Cu
When a film is formed, many O atoms are mixed in the Cu film at the initial stage of film formation. Then, the mixed O atoms act in the direction of suppressing the aggregation of the Cu film due to the heating of the substrate, thereby avoiding the island-like aggregation of the Cu film in the initial stage of film formation, which is observed during the conventional heating sputtering.

Further, when an H ₂ gas is supplied as a reducing gas during sputtering to form a Cu film, the Cu film surface during film formation or deposition is constantly reduced, so that the Cu film surface maintains an active state. Therefore, it is possible to easily move into the groove formed in the wiring pattern without suppressing free surface diffusion.

In the formation of a conductive film by sputtering or the like in a mixed atmosphere of an oxidizing gas and a reducing gas,
For example, since both the oxidation reaction and the reduction reaction of Cu are exothermic reactions, the surface of the Cu film where oxidation and reduction occur is locally heated. That is, even if the substrate temperature is low, the surface diffusion can be activated, so that Cu, Ag,
Au can be embedded in the groove at a low temperature.

Further, when a plasma is generated in a mixed gas atmosphere of the oxidizing gas and the reducing gas to ionize or release O ⁺ ions or radicals or H ⁺ ions or radicals, the reactivity is improved. Can be. Therefore, the substrate temperature can be further lowered, and for example, even at about 200 ° C., Cu or the like can be sufficiently embedded in the groove. Considering the diffusion of Cu atoms and the like into the semiconductor substrate, the substrate temperature is preferably about 200 to 600 ° C.

That is, in the manufacturing method according to the sixth invention, a conductive film containing oxygen is deposited on the surface of the insulating film where the grooves and contact holes are formed on the semiconductor substrate, and the conductive film is formed while heating the semiconductor substrate. By forming a film, a conductive film is buried in the groove or the contact hole, and then polished to form an electrode wiring. The deposition (film formation) of the oxygen-containing conductive film can be performed, for example, by using a Cu, Ag, or Au target mixed with O atoms, or by controlling the supply amount of an oxidizing gas. Here, the state containing oxygen may be dispersed throughout the conductive film or may be in the form of an oxide film. Further, in the present invention, the grooves and the contact holes can be filled at a lower temperature by forming the conductive film while supplying the oxidizing gas and the reducing gas.

In the manufacturing method according to the sixth aspect of the present invention, aggregation of the Cu film is suppressed by, for example, O (oxygen) contained in the Cu film. Further, the aggregation of the Cu film, Ag film, Au film and the like is closely related to the substrate temperature, the atmosphere during film formation, and the film formation speed. In particular, in the case of Cu film formation, the relationship with the film formation speed is closely related. For example, Cu atoms coming from the target form stable nuclei after diffusing on the substrate, and Cu atoms coming later also diffuse on the substrate and are absorbed by the stable nuclei. The higher the substrate temperature, the more active the surface diffusion, and the island-like growth (aggregation) in the heating sputtering method.
Is caused by the film formation process described above.

If the film formation rate is high, Cu atoms fly one after another before reaching the existing stable nuclei.
Aggregation does not become noticeable because it bonds with Cu atoms to form new nuclei. However, when the film formation rate is low, the time during which Cu atoms can diffuse on the surface becomes long, the probability of being absorbed by existing stable nuclei increases, and aggregation tends to occur. This tendency is the same even in the case of a Cu film containing O atoms which is unlikely to cause aggregation.In particular, the film formation speed is also affected by the aspect ratio of the groove or the contact hole, which is the electrode wiring formation region, and is different from that in the groove. It is difficult to control the film forming speed on the flat surface in the same manner.

In the case of sputtering in an oxidizing atmosphere or a reducing atmosphere in which the film forming speed is not uniform in the groove and on the flat surface, the amount of O atoms that suppress aggregation is reduced by one. It is also difficult to control in a similar manner, and aggregation of the Cu film is likely to occur. In this regard, when a Cu target to which O atoms are added is used, the content of O atoms can be controlled almost uniformly, so that a Cu film without step disconnection can be easily formed.

As a method for forming a film containing oxygen and a conductive film, for example, a long-distance sputtering method in which the distance between the target and the substrate (between the TS) is increased to increase the perpendicular incidence component of sputtered particles on the semiconductor substrate; Examples include an anisotropic sputtering method such as a collimation sputtering method in which a collimator for attaching a sputter particle other than the normal incidence component is interposed therebetween, and a bias sputtering method in which a DC voltage or a high-frequency voltage is applied to a semiconductor substrate.

In particular, when the aspect ratio of the groove is high, the anisotropic sputtering method or the bias sputtering method increases the efficiency of sputtered particles adhering to the groove, and makes it difficult to coagulate the inner surface of the groove. It becomes easy to cover with a film or the like, and a groove having a higher aspect ratio can be embedded. In addition, after forming a Cu film, Ag film, Au film, etc., which are unlikely to cause aggregation by the bias sputtering method, the productivity can be improved by adopting a method of filling the trench with a normal sputtering method with a high film forming rate. it can. Further, in the bias sputtering method, be supplied with an inert gas such as Ar, for such Cu film is formed while pulling good perpendicularity the ionized Ar ⁺ ions into the semiconductor substrate, wherein Ar ⁺ ions into the opening The protruding overhanging portion is sputter-etched, so that the angle range of the opening through which Cu atoms can be incident is not narrowed, and the sputter-etched Cu re-adheres to the inner wall surface of the groove to improve coverage.

In this case, the same effect can be obtained even if the bias sputtering method is performed in an atmosphere of hydrogen or oxygen to which little or no inert gas such as Ar is supplied. In addition, a decrease in the reliability of the electrode wiring due to the incorporation of Ar ⁺ ions into the semiconductor substrate can be sufficiently avoided by heating the semiconductor substrate or forming a conductive film by a normal sputtering method thereafter.

Further, the on / o of the bias applied to the substrate is
By performing ff control or gradually reducing the bias voltage, the formation of the Cu film containing oxygen and the formation of the conductive film can be performed continuously in the same chamber, so that the film formation time can be reduced. In addition, after forming a Cu film that is unlikely to cause aggregation by long-distance sputtering, the distance between TS may be continuously reduced to shift to sputtering with a high deposition rate, or O atoms that are unlikely to cause aggregation may be mixed. Cu
After the film is formed by collimation sputtering, the collimator plate may be removed from between the TSs and the process may shift to normal sputtering.

According to a seventh aspect of the present invention, in the manufacturing method, a C (carbon) film is provided as an anti-reflection film and a polishing stopper film on the surface of the insulating film in which the grooves and the contact holes are formed, and the grooves with high precision are formed. On the other hand, excessive polishing is prevented or avoided on the other hand, and highly reliable electrode wiring is easily formed.

In other words, although it is common to the first to sixth inventions, in forming the groove by so-called photoetching, an anti-reflection film and a conductive film are provided to prevent and reduce patterning disturbance due to irregular reflection of light. After embedding in the groove, a C film is used as a polishing stop film to prevent excessive polishing and removal of the lower layer material during polishing and molding. In this case, since the C film has conductivity, the remaining film electrically affects not only the electrode wiring to be formed but also the entire semiconductor device to be manufactured. Therefore, after performing the functions of anti-reflection and polishing stop, it is necessary to remove the C film in a region where insulation is required without adversely affecting a substrate or the like. In a plasma in a mixed atmosphere of reducing gas and a reducing gas, it is easily and reliably removed, and at this time, the conductive film made of Cu or the like is not oxidized.

Further, according to the present invention, for example, TiN, Ta, Cr, TiW, Nb, amorphous
TiSiN, amorphous Ti (O, N), amorphous WCo, amorphous NbCr, amorphous CrTa, amorphous Co
Layers such as V, amorphous CoMo, amorphous CoNb, amorphous CoTa, amorphous TaCu, amorphous WN, and amorphous WSiN may be arranged.

In each of the above inventions, examples of the semiconductor substrate on which the electrode wiring is formed include a Si substrate or a compound semiconductor substrate on which an active region or an insulating film is formed as desired. Further, the shape of the groove and / or the contact hole formed in the electrode wiring formation region on the semiconductor substrate surface is not particularly limited.

[0115]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings.

Example 1 FIGS. 2 (A), 2 (B), 2 (C) and 2 (D), and FIG. 3 schematically show an embodiment of this example. As shown in cross section in FIG. 2 (A), on a Si substrate (100) 9 provided with required active areas,
A p-SiN insulating film 10 of 00 nm is formed. Further, as shown in cross section in FIG. 2B, after forming a SiO ₂ film 7 to a thickness of 1 μm by CVD, the space width is set to 500 nm by PEP and RIE, and as shown in cross section in FIG. Many grooves 6 having a width of 1 μm and a depth of 1 μm were formed in the SiO ₂ film 7. Next, on the surface of the SiO ₂ film 7 where the groove 6 was formed, FIG.
As shown in cross section in (D), TiN is used as the barrier layer 11.
After forming a film having a thickness of 30 nm,
A Cu film 8 was formed. At this time, the barrier layer 11 and
Before the formation of the Cu film 8, a contact hole (via hole) was buried in advance by a selective CVD method, and connection with the active region was performed.

Next, a heat treatment involving an oxidation / reduction reaction was performed using a reduced pressure heat treatment apparatus as schematically shown in FIG. That is, a reduced-pressure heat treatment main body 13 equipped with a mounting table (hot plate) 12 with a heater capable of mounting a sample,
An oxidizing gas supply source 15 and a reducing gas supply source 16 connected to the reduced pressure heat treatment main body 13 via valves 14a and 14b,
A valve 14c and a filter are provided in the vacuum heat treatment main body 13.
The rotary pump 18 is connected through the vacuum pump 17 to exhaust the inside of the reduced pressure heat treatment main body 13, and the vacuum gauges 19 a and 19 b installed on the gas supply side and the exhaust side to the reduced pressure heat treatment main body 13 respectively.
Was prepared. This vacuum heat treatment apparatus has an exhaust system of a turbo-molecular pump, has an ultimate vacuum of 10 ^-7 Torr, and has a structure capable of introducing various gases from a gas supply (introduction) line.

The hot plate 12 is provided with the Cu
The Si substrate 9 on which the film 8 was formed was placed, and then the vacuum was pumped down to 10 ⁻⁷ Torr by the turbo molecular pump 5. Next, an oxidizing gas (O ₂ 21%, N ₂ 79%) is supplied from the supply source 15 and the pressure in the chamber is 4 × 10 ⁻⁶ Torr and the temperature is 600 ° C., 10 ° C.
As a result of performing the heat treatment for one minute, as shown in FIG.
Flow into the groove was confirmed.

As a comparative example, in a vacuum of 1 × 10 ⁻⁷ Torr,
FIG. 4B shows the result of performing the heat treatment at 650 ° C. for 10 minutes.

The promotion of reflow as described above was confirmed at a heat treatment temperature of 400 ° C. or more and an oxygen partial pressure of 1 × 10 ⁻⁵ Torr or less. At an oxygen partial pressure exceeding this, oxidation of the surface proceeded and reflow was suppressed. Further, the specific resistance of the wiring-processed product measured by CMP was 2.0 μΩcm.

In this embodiment, after the Cu film was formed, an oxidizing gas was supplied and reflow was promoted. However, during the heating film formation at a substrate temperature in the range of 350 ° C. to 450 ° C., the oxygen partial pressure was 5 ×. 10 ^-5 To
The effect of accelerating the reflow was also confirmed when mixed in the range of rr or less.

Example 2 As in Example 1, as shown in cross section in FIG. 2A, a 100 nm-thick p-type film was formed on a Si substrate (100) 9 provided with a required active region. -The SiN insulating film 10 is formed. Further as shown in cross section in Figure ₂ (B), SiO 2 by CVD
After forming the film 7 to a thickness of 400 nm, a large number of trenches 6 having a width of 400 nm were formed in the SiO ₂ film 7 by PEP and RIE with a space width of 800 nm, as shown in cross section in FIG. Then, as shown in cross section in FIG. 2D, a 30 nm thick TiN film is formed as a barrier layer 11 on the SiO ₂ film 7 having the groove 6 formed thereon, and then a 800 nm thick Cu film is formed by sputtering.
The film 8 was formed. At this time, the barrier layer 11 and Cu
Before the film 8 was formed, a contact hole (via hole) was buried in advance by a selective CVD method, and connection with the active region was performed.

Next, a heat treatment involving an oxidation / reduction reaction was performed using the reduced pressure heat treatment apparatus shown in FIG.

The Si substrate 9 on which the Cu film 8 was formed was placed on the hot plate 12 and then evacuated by the rotary pump 18. At this time, the degree of vacuum is about 0.01 torr.
The Cu film 8 was reflowed by performing a heat treatment for 30 min. In Table 1, H ₂ 100
%, H ₂ 10%-N ₂ 90% are shown, but in each case, O ₂ 20%-N ₂
80% was supplied at a flow rate of 0.1 l / min from above the reduced pressure heat treatment apparatus main body 13 by adjusting a valve 14a.

[0125]

[Table 1] After the heat treatment and cooling, the results of observation of the reflow shape of each sample by SEM are shown in Table 1 together. Here, the mark ○ indicates that the embedding amount of the groove is 110 of the groove depth.
% Or more, the symbol △ indicates that the groove filling amount is 100 to 110 of the groove depth.
%, The cross mark indicates that the reduction reaction is not sufficient and the embedding amount by reflow is less than 100% of the groove depth. The relationship between the flow rate of the reducing gas on the supply side (curve A) and the exhaust gas side (curve B) in the heat treatment and the internal pressure of the heat treatment apparatus was as shown in FIG.

[0126] Wiring processing by CMP is performed for those having the reflow shape marked with a circle, and the wiring shape is changed to SEM.
As a result, the electric resistance was 1.8 μΩcm as a result of measuring the electric resistance by the four-terminal method.
Incidentally, a reducing gas _{(H 2 10% - N 2} 90%) flow rate of 0.4l
In a sample of not more than / min, a Cu oxide film is formed on the surface because the partial pressure of the oxidizing gas and the reducing gas is in an oxidized region with respect to the Cu film.

Example 3 In the case of Example 2, O ₂ and H _{2 were used} as oxidizing gases.
O or O ₂ -H ₂ O system, H ₂ or H ₂ 80% -CO 20% was used as the reducing gas, respectively, and at certain intervals (min), under the conditions shown in Table 2, the oxidizing gas and The electrode wiring was formed under the same conditions except that the reducing gas was repeatedly supplied.

When alternately flowing the oxidizing gas and the reducing gas, the evacuation time of 10 sec was set, and the flow rate of the gas was unified to 0.1 l / min.
50 ° C, 30 min, remaining time after repeated supply of oxidizing gas and reducing gas, and 100% H ₂ when cooling Cu film
Was supplied at 0.1 l / min.

[0129]

[Table 2] After the heat treatment and cooling, the results of observation of the reflow shape of each sample by SEM are also shown in Table 2. Here, the mark ○ indicates that the embedding amount of the groove is 110 of the groove depth.
% Or more, the symbol △ indicates that the groove filling amount is 100 to 110 of the groove depth.
%.

When the reflow shape is marked with a circle,
In each case, the amount of oxidation of the Cu film was less than 20% of the film thickness. Wiring was performed by CMP, and the wiring shape was evaluated by SEM. Further, for each sample after the reflow, the diffusion amount of Cu into the Si substrate was measured by SIMS, and was below the detection limit. Example 4 In the case of Example 2, H ₂ was used as the reducing gas, and O ₂ was used as the oxidizing gas. The partial pressure ratios (P _H2 / P _O2 ) shown in Tables 3, 4, 5 and 6 respectively, The electrode wiring was formed by performing a reflow treatment under the conditions of the total gas pressure, the heat treatment temperature, and the time.

[0131]

[Table 3]

[Table 4]

[Table 5]

[Table 6] After performing the heat treatment, to avoid the influence of oxidation, 20
After cooling in a pure hydrogen atmosphere at Torr pressure, S
Table 3, Table 4, Table 5, and Table 6 also show the results of observation of the reflow shape by EM. Here, the mark ○ indicates that the groove filling amount is 110% or more of the groove depth, the mark Δ indicates that the groove filling amount is 100 to less than 110% of the groove depth, and the mark × indicates that the oxidation / reduction reaction is not performed. This is the case where the filling amount due to reflow is less than 100% of the groove depth.

In place of cooling in a pure hydrogen atmosphere at a pressure of 20 Torr, a forming gas containing 80% of N ₂ was used.
(H ₂ 20%, N ₂ 80%) gave similar results. As a barrier layer, for example, in addition to TiN, for example, Ta,
Cr, TiW, Nb, amorphous TiSiN, amorphous WC
The same action and effect can be obtained by using o, amorphous NbCr, amorphous CrTa, amorphous CoV, amorphous CoMo, amorphous NbCo, amorphous CoTa, amorphous TaCu, amorphous WN and amorphous WSiN.

Example 5 First, a 100 nm-thick p-SiN film was formed as a base on a Si substrate (100) provided with a required active region, and a SiO ₂ film was formed to a thickness of 400 nm by CVD. Thereafter, the SiO ₂ film is formed with a width of 400 nm by PEP and RIE to a space width of 800 nm.
Many grooves of nm were formed.

Next, a TiN film having a thickness of 30 nm was formed as a barrier layer on the SiO ₂ film surface on which the grooves were formed, and a Cu film having a thickness of 250 nm was formed by CVD. At this time, before the formation of the barrier layer and the Cu film, contact holes were buried in advance by a selective CVD method, and connection with the active region was performed.

The SiO ₂ film and the Cu film were formed by hexafluoroacetylacetone / vinyltrimethylsilane copper [(CF ₃ CO) ₂ CH] Cu (C ₅ H ₁₂ Si), respectively.
Was performed as a raw material by thermal CVD.

Further, the film formation / deposition temperature is 200 ° C., and the raw material partial pressure is 0.
25 Torr, source gas flow rate 8 sccm, deposition rate 4 nm / sec
Met. Then, according to the case of Example 2, O ₂ 20%
- While supplied from the heat treatment apparatus above the N ₂ 80% at a flow rate of _{0.1l / min, H 2 10%} - the N ₂ 90% of the reducing gas 0.5 l / m
The Cu film was simultaneously supplied at a flow rate of in for 30 min to reflow the Cu film at 300 ° C.

After cooling, the reflow profile of the sample was observed by SEM.
As in the case where the Cu film was formed, the filling amount of the groove was 127% of the groove depth. At the time of cooling, 100% H ₂ was added at 1 l / m
It was supplied at a flow rate of in. 6 (A) and 6 (B),
3 shows micrographs of a cross-sectional state before and after reflow of a Cu film in this example.

The wiring was processed by CMP, and the wiring shape was evaluated by SEM. The results were all good. The electric resistance was measured by the four-terminal method.
cm.

Example 6 First, a 100 nm-thick p-SiN film was formed as a base on a Si substrate (100) provided with a required active region, and a SiO ₂ film was formed to a thickness of 400 nm by CVD. As shown in FIG. 2C, a large number of grooves having a width of 400 nm were formed in the SiO ₂ film by using PEP, RIE and a space width of 800 nm.

Next, a 30-nm-thick TiN film was formed as a barrier layer on the SiO ₂ film surface on which the groove was formed, and then a 800-nm-thick film was formed by sputtering using a high vacuum sputtering apparatus.
Was formed. At this time, before the formation of the barrier layer and the Cu film, contact holes were buried in advance by a selective CVD method, and connection with the active region was performed. In the above-mentioned sputtering film formation of Cu, Cu having a purity of 7N was used as a sputtering source, the ultimate vacuum degree was 1 × 10 ⁻⁸ Torr, and high-purity Ar gas (dew point −90
The temperature was 5 mTorr and the deposition rate was 15 nm / sec.

Next, a pressure heat treatment was carried out while applying a uniaxial stress using a pressure heat treatment apparatus as schematically shown in FIG. That is, a carbon mounting table 20 on which a sample can be mounted, a hydraulic mechanism 21 for vertically moving the carbon mounting table 20, and pressing the upper surface of the carbon mounting table 20 raised by the hydraulic mechanism 21, A pressurized heat treatment main body 24 internally containing pressurized bodies 23 each having a heater power supply unit 22 for heating the carbon mounting table 20 side,
24, a reducing gas supply source 26 connected via a valve 25, a rotary pump 27 and an oil diffusion pump 28 connected to the pressurized heat treatment main body 24 for exhausting the pressurized heat treatment main body 24.
Was prepared.

[0142] This pressure heat treatment apparatus has the ultimate vacuum degree.
A 10 ^-7 Torr, has a structure capable of introducing various gases from the gas supply (introduction) lines, as further shown in FIG. 8, the distal end portion of the pressing body 23 provided with the SiO ₂ layer 23a Si
Piece 23b is installed.

The carbon mounting table 20 is
A Si substrate on which a Cu film was formed was mounted and installed, and then evacuated by a rotary pump 27 and an oil diffusion pump. The degree of vacuum at this time is about 1 × 10 ⁻⁷ Torr. After this evacuation, a reducing gas (forming gas) of N ₂ 90% −H ₂ 10% was set at atmospheric pressure at a flow rate of 0.1 l / min. Sink
The heating temperature was set to 300 ° C. for 30 min or 450 ° C. for 30 min, and the pressure heat treatment was performed by changing the pressure value on the Cu film by the pressing body 23.

The results are shown in Tables 7 and 8, respectively.
FIG. 8 schematically shows a state in which a pressure (uniaxial stress) is applied to the Cu film of the sample.

Here, Table 7 shows the case where the heating temperature was 300 ° C., and Table 8 shows the case where the heating temperature was 450 ° C. The degree of reflow (wiring shape) was evaluated based on the depth D of the groove and the inside of the groove. At the minimum Cu film thickness D _min ratio (D _min / D).

[0146]

[Table 7]

[Table 8] In Tables 7 and 8, a circle indicates D _min / D = 1.2.
In the above cases, the mark x indicates the case where D _min / D is less than 1, and the mark − indicates the case where measurement is impossible. For reference, when no stress was applied in the course of the heat treatment, reflow was insufficient and electrode wiring could not be formed.

FIG. 9 illustrates the relationship between the degree of reflow (D _min / D) and the applied stress kgf / mm ^{2 under} the above reflow conditions. Curve C shows the case where the heating temperature is 300 ° C. Curve D shows the case where the heating temperature is 450 ° C., respectively.

As can be seen from FIG. 9, the higher the applied stress and the processing temperature, the more the reflow proceeds, and the applied stress is 16 kgf /
At ² mm, plastic deformation was observed, and at an applied stress of 50 kgf / mm ²
The Si substrate had defects.

Further, the reflow was performed at the heating temperature of 300 ° C. for 30 min and the applied stress of 7 kgf / mm ^2.
FIGS. 10 (A) and 10 (B) show the results of comparing and observing the reflow state with a micrograph of the case where reflow was performed at 00 ° C. for 30 min (without applied stress). here,
FIG. 10 (A) shows a case where reflow was performed by applying an applied stress. When excess Cu was removed by CPM, a good electrode wiring was formed. On the other hand, without applying the applied stress of FIG. 10 (B). In the case of reflow, the reflow was insufficient and a desired electrode wiring could not be formed.

Tables 7 and 8 show that the electrical resistance was measured by the four-terminal method with respect to the sample in which the electrode film was formed by reflowing the Cu film by the above-mentioned heat treatment. Result (average value of 50 measurement objects)
Are also shown.

That is, by applying an applied stress of 1 kgf / mm ² or more to the Cu film, the reflow temperature of the Cu film can be lowered. In particular, it was found that when the applied stress was 2 kgf / mm ² or more, the reflow temperature of the Cu film could be remarkably lowered.

In this embodiment, in the pressurizing / heating treatment, a plurality of Si substrates on each of which a Cu film was formed were laminated.
Similar results were obtained when the Cu film was reflowed by pressurizing and heating.

Comparative Example 1 An electrode formed by reflowing the Cu film in Example 6 by applying hydrostatic pressure instead of applying uniaxial pressure (uniaxial stress) to the Si substrate on which the required Cu film was formed. When the wiring was evaluated, the heating temperature was 450 ° C or higher, and the processing time was 30 min.
When the above conditions are set, a practically usable wiring can be formed for the first time, but it is disadvantageous in terms of complicated operation steps and mass productivity.

Example 7 First, a 100 nm-thick p-SiN film was formed as a base on a Si substrate (100) provided with a required active region, and a SiO ₂ film was formed to a thickness of 400 nm by CVD. Thereafter, as shown in a cross section in FIG. 2C, a large number of grooves having a width of 400 nm were formed in the SiO ₂ film by PEP and RIE with a space width of 800 nm.

Then, a 30 nm thick TiN film was formed as a barrier layer on the SiO ₂ film surface on which the groove was formed, and then a 800 nm thick film was formed by sputtering using a high vacuum sputtering apparatus.
An Al film was formed. At this time, before the formation of the barrier layer and the Al film, a contact hole was buried in advance by a selective CVD method, and connection with the active region was performed.

When the Al film was formed by sputtering, Al having a purity of 5N was used as a sputtering source and the ultimate vacuum degree was 1 ×.
5-8 mTorr using 10 ^-8 Torr, high purity Ar gas (dew point -90 ° C or less)
rr, the deposition rate was 10 nm / sec.

FIG. 11 shows a schematic configuration of the sputtering / pressurizing heat treatment apparatus used here. The sputtering region is the same as the region where the heat treatment is performed while applying uniaxial stress to the formed Al film. The system is installed in a vacuum system.
In FIG. 11, 29a and 29b are rotary pumps, 30a and
30b is a turbo molecular pump, 31 is a substrate mounting table 31a and Al
The sputtering area 32 in which the target 31b mounting portion is arranged is moved vertically by a hydraulic mechanism 32a, while a load cell 32b for mounting a sample and a pressing body 32c having a built-in heater arranged opposite to the load cell 32b are provided. The heat treatment area (hot press chamber) 32d is a heater power supply for heating the pressing body 32c.

Next, after the Al film was formed in the sputtering region 31 of the sputtering / pressurizing heat treatment apparatus, the film was transferred onto the load cell 32b in the heat treatment region 32, and was pressed by the hydraulic mechanism 32a. During this period, a uniaxial stress of 1 kgf / mm ² was applied, and pressure heat treatment was performed at 250 ° C., 350 ° C., or 450 ° C. for 30 minutes, and the Al film was reflowed to form electrode wirings.

The relationship between the reflow condition indicated by the ratio of the thickness Dmin of the Al film embedded in the groove by the reflow to the depth D of the groove and the reflow condition is shown by a curve E in FIG. For comparison, the curve F shows the case where no uniaxial stress was applied in the reflow treatment.

As shown in FIG. 12, by applying a uniaxial stress of 1 kgf / mm ^{2 to} the Al film, the reflow temperature of the Al film could be sufficiently lowered. Further, for each sample of the above example, after wiring was processed by CMP, resistance was measured by a four-terminal method, and it was 2.8 μΩcm.

Example 8 A barrier layer (TiN) was formed under the same conditions as in Example 2, then a multi-source sputtering apparatus was used, and 7NCu and 6NAg were prepared as target sources. 10 ^-9 To
rr, high purity Ar gas (dew point -90 ° C or less) atmosphere, pressure 5mTo
rr, at a film formation rate of 1 to 10 nm / sec, a single-layer film or a laminated film as shown in Tables 9 and 10 was formed.

[0162]

[Table 9]

[Table 10] Next, a reducing gas of N ₂ 90% −H ₂ 10% was applied to the sample on which the single-layer film or the laminated film was formed at 1 l / min.
In the reduced pressure heat treatment apparatus shown in FIG. 3, heat treatment was performed at 450 ° C. for 30 minutes while the metal films were reflowed to form electrode wirings.

The reflow degree indicated by the ratio of the thickness Dmin of the metal film buried in the groove by the reflow to the depth D of the groove and the result of resistance measurement by the four-terminal method after performing wiring processing by CMP are shown below. 9 and Table 10 together. In Table 10, it is considered that the reflow degree is improved as the number of layers of the Cu film and the Ag film is increased due to the interfacial energy reduction effect and the mixed entropy effect of Cu and Ag. Example 9 In the case of Example 2, 7NCu was used as the target material, the deposition rate was 10 nm / sec, and as shown in Table 11, the temperature of the Si substrate was set to liquid nitrogen temperature or room temperature (23
° C), and a Cu film was formed under the same conditions except that a bias voltage was applied to the Si substrate.

Thereafter, O ₂ 20 was applied to each of the obtained samples.
% - N ₂ 80% of an oxidizing gas at a flow rate of 0.1l / min, N ₂ 90%
Heat treatment was performed at 300 ° C. for 30 min while simultaneously supplying a reducing gas of 10% H ₂ at a flow rate of 1 l / min, and the Cu film was reflowed to form electrode wirings.

Table 11 also shows the degree of reflow indicated by the ratio of the thickness Dmin of the Cu film embedded in the groove by the reflow to the depth D of the groove. Prior to the reflow treatment, the crystal grain size of the Cu film was measured by TEM, and the film stress value in the direction perpendicular to the longitudinal direction of the wiring groove was measured by stress X-ray.

As can be seen from Table 11, the lower the temperature of the Si substrate or the higher the bias voltage applied to the Si substrate, the smaller the crystal grain size, the larger the absolute value of the in-film stress, and the higher the reflow degree.

[0167]

[Table 11] Example 10 First, a 6-inch Si substrate provided with a required active area (100)
A p-SiN film having a thickness of 100 nm is formed thereon, and a SiO ₂ film is formed to a thickness of 400 nm by CVD. A 400 nm groove is formed in the SiO ₂ film by forming a space width of 800 nm by PEP and RIE. Many were formed. Next, the SiO ₂ having the groove
A 30 nm thick TiN film was formed as a barrier layer on the film surface, and a Cu film was further formed.

In forming the Cu film, a magnetron sputtering apparatus capable of changing the distance between substrate targets was used as a sputtering apparatus, Cu of 7N purity was used as a sputtering source, the ultimate vacuum degree was 1 × 10 ^-8 Torr, and high purity was used. Film formation was performed with Ar gas (dew point -90 ° C or less) and a pressure of 5 mTorr.

The feature of the magnetron sputtering apparatus used here is that it is possible to change between the substrate and the target without lowering (deteriorating) the vacuum state. Therefore, FIGS. 13A and 14A are schematic diagrams respectively. Maximum incident angle of incident particle 26.6 ° (LD: 2.0) or 45 ° (LD: 1.0)
Then, set the deposition rate to 5 to 10 nm / sec and set the
A film was formed.

FIGS. 13B and 14B
Fig. 3 schematically shows the cross-sectional state of the Cu film immediately after film formation.

Thereafter, O ₂ 20 was applied to each of the obtained samples.
% - N ₂ 80% of an oxidizing gas at a flow rate of 0.1l / min, N ₂ 90%
-While simultaneously supplying a reducing gas of 10% H ₂ at a flow rate of 1 l / min, heat treatment was performed for 30 min under the processing conditions shown in Table 12, and the Cu film was reflowed to form electrode wirings. . Table 12 shows the results of resistance measurement by the four-terminal method after wiring processing by CMP.

As can be seen from Table 12, here, 250 ° C.
It has been found that the Cu film can be sufficiently reflowed at a low temperature.

[0173]

[Table 12] Example 11 First, a 100-nm-thick p-SiN film was formed on a 6-inch Si substrate (100) provided with a required active region, and further formed by CVD.
After the iO ₂ film was formed to a thickness of 400 nm, a large number of 400 nm wide grooves were formed in the SiO ₂ film by PEP and RIE with a space width of 800 nm.

Then, a TiN film having a thickness of 30 nm was formed as a barrier layer on the SiO ₂ film surface on which the groove was formed, and then a 800 nm-thick film was formed by sputtering using a high vacuum sputtering apparatus.
Cu was deposited. At this time, before forming the barrier layer and the Cu film, a contact hole is buried in advance by a selective CVD method,
Connection with the active area was made.

[0175] When the Cu film was formed by sputtering, Cu having a purity of 7N was used as a sputtering source and the ultimate vacuum degree was 1 ×.
The pressure was 5 mTorr and the deposition rate was 15 nm / sec in an atmosphere of 10 ^-8 Torr, high-purity Ar gas (dew point -90 ° C or less).

Next, a reflow treatment was performed by a pressure heat treatment apparatus whose schematic structure is shown in cross section in FIG. That is, a heating roller 34a and a cooling roller 34b, which convey the sample 33 in a fixed direction while sandwiching the sample 33 on both sides, are mounted on a pair of the main body 34 and one end of the main body 34. A preparation chamber 36 in which a cartridge 35 having a sample 33 to be mounted is stored, a take-out chamber 37 installed at the other end of the main body 34 to take out the processed sample 33, and a main chamber 34, a preparation chamber 36, A pressurized heat treatment apparatus having a vacuum exhaust system 38a, 38b, 38c for evacuating the extraction chamber 37 and a gas line 39 for supplying a forming gas into the main body 34 was prepared.

First, the sample 33 on which the Cu film was formed was used.
Is loaded and loaded into the cartridge 35, and stored and set in the preparation chamber 36, while evacuating to a vacuum degree of 1 × 10 ⁻⁶ Torr, and then forming gas (for example, a mixed gas of N ₂ 90% −H ₂ 10%). At normal pressure. In this state, a forming gas (for example, N ₂ 90%
−H ₂ 10% mixed gas), and the transport rollers 34 a and 34 b are driven to sequentially transport the sample 33 mounted and loaded in the cartridge 35 through the main body 34.
Heat and pressurize. In this transport process, the Cu film of the sample 33 is heated and pressed by the heating roller 34a and reflowed. Here, the heating roller 34a is maintained at about 400 ° C. by a built-in heater, the cooling roller 34b is at or below room temperature, the pressure by both is 1 kgf / mm ² , and the rotation speed is 10 cm / s.
ec.

As described above, the reflow degree indicated by the ratio of the thickness Dmin of the Cu film in which the Cu film was buried in the groove by the reflow to the depth D of the groove was 1.2 or more, which was good.
In addition, for each sample, after wiring processing by CMP,
When the resistance was measured by the four probe method, it was 1.9 μΩcm.

Example 12 A 100 nm-thick p-SiN film is formed as a base on a Si substrate (100) provided with a required active region according to the case of Example 2. Next, after forming a SiO ₂ film to a thickness of 400 nm by CVD, a space width of 800 nm is formed by PEP and RIE.
A large number of grooves each having a width of 400 nm were formed in the SiO ₂ film.

Thereafter, a TiN film having a thickness of 30 nm was formed as a barrier layer on the surface of the SiO ₂ film having the grooves formed thereon, and a Cu film having a thickness of 800 nm was formed by sputtering. At this time, before forming the barrier layer and the Cu film,
The contact hole was buried by the method and the connection with the active area was made.

Next, with respect to the formed Cu film, the Cu film on the space was cut to a film thickness as shown in Table 13 by CMP, and then subjected to a heat treatment using a reduced pressure heat treatment apparatus shown in FIG. . In addition, partial cutting in the thickness direction of the Cu film,
Ion etching was also performed. In this case, after the Cu film is formed, the sample substrate is placed in 100 MHz rf Ar plasma.
Apply a bias voltage of -100 V to mainly
After ion etching the film to a predetermined thickness, FIG.
The heat treatment was performed using the reduced pressure heat treatment apparatus shown in FIG.

[0182]

[Table 13] This heat treatment was performed under the following conditions. That is, the Si substrate on which the Cu film was formed was placed on the hot plate 12, and then evacuated by the rotary pump 18. The degree of vacuum at this time is about 0.01 torr. The atmosphere during the heat treatment was a heat treatment at 400 ° C. for 30 minutes in an atmosphere with a partial pressure ratio of H ₂ and O ₂ (P _H2 / P _O2 ) of 30 and a total pressure of 20 Torr.
H ₂ 10%-N ₂ 90% in forming gas 650 ℃, 30
Minutes heat treatment.

After the heat treatment and cooling, the cross-sectional shape of each sample was observed by SEM,
The surface shape (reflow shape) of the electrode wiring after the Cu film was removed by CMP was observed, and the result of confirming the presence or absence of voids was also shown in Table 13. In the item of “Cross-sectional shape” in Table 13, the mark “が” indicates that the embedded amount of the groove is 110% or more of the groove depth,
The marks indicate the case where the embedding amount of the groove is less than 110% of the depth of the groove or the case where a void is generated in the groove. Table 13
In the item “Presence / absence of holes after CMP”, the circle mark indicates that the number of holes is one or less per 1 mm length on average of the total wiring length of 100 mm, and the cross mark indicates two or more.

As is clear from Table 13, the space
If the Cu film is cut down to a thickness of about 100 nm, coagulation (step breakage of the film) occurs due to reflow heat treatment, so that the movement of Cu from the space becomes insufficient and the groove is sufficiently filled. Could not. Also,
When the Cu film thickness on the space was 600 nm or 800 nm, bridging and suction from inside the groove occurred, respectively, and generation of a large amount of vacancies was confirmed.

Further, a sample in which no void was observed in the electrode wiring in the above observation / evaluation was selected, and the resistance of the wiring circuit was measured. In each case, the specific resistance was 1.8 μΩcm.
Met.

Embodiment 13 This embodiment is an example of a method of manufacturing a semiconductor device including a step of forming a buried wiring having an aspect ratio of 1.5 or less.

FIGS. 16 (A), 16 (B), 16 (C),
16 (D), 16 (E) and FIGS. 17 (A), 17
(B) and (C) schematically show an embodiment of this embodiment. First, as shown in cross section in FIG. 16 (A), a required active region or lower wiring region is provided in advance. On the thus obtained Si substrate 9 having a diameter of 150 mm, a SiO ₂ film 7 was formed to a thickness of 3500 nm by CVD.

After that, by PEP and RIE, FIG.
As shown in cross section in (B), width 1500nm-5000nm, depth
Many 2000 nm grooves 6 were formed. Next, a contact hole connecting the active region and the trench 6 was formed by PEP and RIE, and a W plug or a Cu plug was filled in the contact hole by a selective CVD method.

Next, as shown in FIG. 16C, a barrier layer 11 for preventing Cu diffusion is formed on the surface of the SiO ₂ film 7 in which the groove 6 is formed, for example, with a thickness of 30 nm.
A TiN film was formed.

Thereafter, a Cu film was formed on the barrier layer 11 forming surface by DC magnetron sputtering while embedding the 3000 nm-thick Cu film 8 at an input power of 10 kW as shown in cross section in FIG. .

At this time, the inside of the chamber was Ar / H ₂
/ O ₂ mixed atmosphere of 11/20/2, total pressure 0.85
Pa was set. The sputter target has a diameter of 3
Cu of 90.0999% purity of 00 mm was used, and the distance between the substrate and the target was set to 75 mm. Furthermore, the substrate is fixed on a PID-controlled PBN heater by an electrostatic chuck,
Ar gas was introduced at a pressure of 80 Pa and heated to 450 ° C. on the back side of the substrate to improve thermal conductivity.

After the completion of the sputtering, the Cu film 8 is cooled in, for example, an Ar-H ₂ -based mixed gas atmosphere so that the Cu film 8 is not oxidized, and then the Cu film 8 outside the groove is formed by a chemical mechanical polishing (CMP) method. And TiN film
11 was removed to obtain a semiconductor device provided with a Cu wiring 8a as shown in cross section in FIG.

When the reflow shape of the sample was observed by SEM, it was found that the embedding amount of the groove was 110% or more of the groove depth and the electrode wiring was uniformly embedded with an aspect ratio of 1.5 or less as designed. Next, the wiring was processed by CMP, and the wiring shape was evaluated by SEM. All were good, and the electrical resistance was measured by the four-terminal method. The result was 1.8 μΩcm or less.

Further, as a result of the accelerated test, the formed Cu wiring
8a has high electromigration and stress migration resistance, and it has been confirmed that reliability for high current density can be guaranteed.

Further, FIGS. 17A, 17B and 17C schematically show a state where the Cu film 8 is buried in the groove 6 in the sputtering.
Here, since the Cu film formation atmosphere is a mixed system of an oxidizing gas and a reducing gas and the substrate is heated, O atoms are mixed into Cu at the initial stage of film formation. Then, due to the incorporation of the O atoms, the aggregation of the Cu film due to the heating of the substrate is suppressed, and a uniform continuous film grows in the initial stage of the growth as shown in the cross section in FIG.

Further, during this sputtering, since H ₂ is supplied as a reducing gas, the surface of the Cu film being deposited is constantly reduced and maintains an active state. By this active state, free surface diffusion easily proceeds, and FIG.
As shown in a cross-sectional view in (B), Cu moves into and fills the groove 6.

Further, the inside of the groove 6 is densely filled with the Cu film so as to lower the surface free energy (FIG. 17).
(C)).

In the sputtering, plasma is generated in an atmosphere in which O ₂ as an oxidizing gas and H ₂ as a reducing gas are supplied. O ⁺ ions or radicals or H ⁺ ions (or radicals) ionized or released by this plasma
Since higher reactivity as compared with O ₂ or H _2, after Cu film forming, simply compared with the case of supplying the O ₂ or H ₂ heat treatment, even if the substrate temperature to low temperature, high reaction rates The flow of the Cu film easily progresses due to the oxidation and reduction reactions of Cu. Here, the oxidizing gas and the reducing gas are not limited to the above-described O ₂ -based or H ₂ -based gas as long as the gas decomposed in the plasma does not remain in the Cu film as an impurity.

In the above description, the film was formed by setting the substrate temperature to 450 ° C. However, the film can be formed in a temperature range of 200 to 600 ° C. while avoiding the diffusion of Cu atoms into the Si substrate. Met.

Further, in the above, a Cu film was formed on a Si substrate having a diameter of 150 mm by a sputtering method using a target having a diameter of 300 mm and a distance between TSs of 75 mm, but the perpendicular incidence component of sputtered particles on the substrate was increased. An anisotropic sputtering method such as a long-distance sputtering method, a collimation sputtering method in which a collimator plate for attaching sputter particles other than the normal incidence component is attached, or a bias sputtering method in which a DC voltage or a high-frequency voltage is applied to a substrate may be used. Furthermore, when performing bias sputtering or long-distance sputtering, it is desirable to switch to normal high-efficiency film formation after the required embedding is obtained in order to increase the film formation efficiency.

Although the Cu film has been described above, a conductive film made of a low-resistance metal such as Ag or Au may be used. In particular, Ag is used when the oxidation and reduction reactions are Cu. The electrode wiring is easily formed by selecting the type and mixing ratio of the oxidizing gas and the reducing gas, and setting the substrate temperature appropriately.

Embodiment 14 This embodiment is an example of a method for manufacturing a semiconductor device including a step of forming a contact hole having an aspect ratio of 2 or less.

FIGS. 18 (A), 18 (B), 18 (C),
18 (D) schematically shows an embodiment of this example. First, an SiO ₂ film 7 was formed to a thickness of 600 nm by CVD on a Si substrate 9 having a diameter of 150 mm in which a required active region or lower wiring region was provided in advance. Then, PEP,
By RIE, for example, a contact hole 6a having a diameter of 300 to 800 nm was formed.

Next, a 30-nm-thick TiN film is formed as a barrier layer 11 for preventing Cu diffusion on the surface of the SiO ₂ film on which the contact hole 6a is formed. As a result, as shown in a cross section in FIG. 18A, a primary film of a 100 nm-thick Cu film 8 was formed.

At this time, the inside of the chamber is Ar / H ₂
/ O ₂ mixture ratio of 11/20/2 mixed atmosphere, total pressure 0.85
Pa was set. The sputter target has a diameter of 3
The thickness between the substrate and the target (distance between TS) was set to 200 mm using 00mm pure 99.9999% Cu. The power input during film formation was 15 kW.

Further, the Si substrate 9 is fixed on a PID-controlled PBN heater by an electrostatic chuck, and Ar gas is introduced at a pressure of 80 Pa at 350 ° C. to improve thermal conductivity on the back side of the substrate. Heated to a temperature not exceeding.

Thereafter, the substrate temperature was increased to 450 ° C.
As shown in a sectional view in FIG.
6a, for example, a 300 nm thick Cu
The film 8 was formed secondarily. At this time, the atmosphere in the chamber,
The distance between TS is the same as in the case of the primary film formation.

After the completion of the sputtering for the secondary film formation, until the substrate is cooled, the Cu film is cooled in, for example, an Ar-H ₂ -based mixed gas atmosphere in order to prevent oxidation of the Cu film. The cooling atmosphere is set so that the reduction rate is always higher than the oxidation rate.

Next, the Cu outside the contact hole 6a is removed by chemical mechanical polishing (CMP).
The film 8 and the TiN film were removed to obtain a Cu plug 8b as shown in cross section in FIG. Thereafter, in the same manner as in the thirteenth embodiment, an SiO ₂ film 7 ′ is formed on the surface on which the Cu plug 8 b is formed by the CVD method, the groove 6 is formed, a TiN film 11 ′ is formed, and Cu is formed. A film (filling in the groove 6) and chemical mechanical polishing were performed to obtain a semiconductor device having a Cu embedded wiring 8a as shown in cross section in FIG.

[0210] In the electrode wiring, the contact hole 6a having an aspect ratio of 2 is uniformly buried as designed.
In addition, when the resistance was measured, the specific resistance was
It was 1.8 μΩcm or less.

Further, as a result of performing an acceleration test on a semiconductor device in which an electrode wiring having a via chain structure was formed, the formed electrode wiring had high electromigration and stress migration resistance, and the reliability for a high current density was improved. It was confirmed that no voids or hillocks were generated especially on the upper and lower surfaces of the Cu plug 8b.

In the above description, the substrate temperature was set to 350 ° C. in the first half of the film formation of Cu and to 450 ° C. in the second half, but this temperature was set by the mixing ratio of the oxidizing gas and the reducing gas. The primary film formation can be performed as appropriate, for example, in the process of raising the secondary film formation temperature to 450 ° C. without stepping as described above. In this case, the film formation time can be reduced. This also contributes to improving productivity.

In this embodiment, as in the case of the thirteenth embodiment, various modifications and conditions can be set for the conditions such as the film forming method and the film forming atmosphere.

Embodiment 15 This embodiment is an example of a method of manufacturing a semiconductor device including a step of forming a buried wiring having an aspect ratio of 1 and a contact hole having an aspect ratio of 3.

FIGS. 19 (A), 19 (B), 19 (C) and FIGS. 20 (A), 20 (B), 20 (C), 20
(D) schematically shows an embodiment of this example. First, on a Si substrate 9 having a diameter of 150 mm on which a required active area or lower wiring area is provided in advance, FIG.
As shown in the cross section in (A), the thickness of 850 nm
SiO ₂ film 7, 50 nm thick SiN film 41, and 400 nm thick
An SiO ₂ film 7 ′ was sequentially formed.

Then, the SiN film was formed by PEP and RIE.
A groove 41 having a width of 400 nm and a depth of 400 nm is formed as shown in FIG.
Was formed on the SiO ₂ film 7 ′.

Next, PEP and RIE are performed again to obtain a SiN film.
41 and the SiO ₂ film 7 are patterned and, as shown in cross section in FIG.
Contact hole 6a was formed.

Thereafter, as a barrier layer for preventing the diffusion of Cu on the surface where the contact hole 6a is formed, as shown in cross section in FIG.
A TiN film 11 'was formed.

Next, by anisotropic sputtering,
As shown in the cross section in FIG. 20B, the primary deposition of the Cu film 8 having a thickness of 300 nm was performed with the input power of 30 kW. At this time, the Ar / H ₂ / O ₂ mixture ratio was set at 11/10 in the chamber.
/ 2 mixed atmosphere, total pressure was 0.85 Pa. The sputter target has a purity of 99.9999% with a diameter of 300 mm.
Was used, and the distance between the substrate and the target (distance between TS) was set to 300 mm.

Further, the substrate is fixed on a PBN-controlled PBN heater by an electrostatic chuck, and Ar gas is introduced at a pressure of 80 Pa on the rear surface side of the substrate at a pressure of 80 Pa so as not to exceed 350 ° C. Heated to temperature.

Thereafter, the substrate temperature was increased to 450 ° C.
0 (C), the contact hole
In order to completely fill the groove 6a and the groove 6, for example,
A Cu film 8 of 300 nm was further formed secondarily. At this time, the atmosphere in the chamber was such that the Ar / H ₂ / O ₂ mixture ratio was 11/20/2.
Was changed to a mixed atmosphere. In addition, the distance between TS is 1
This is the same as the case of the next film formation.

After the sputtering for the secondary film formation is completed, until the Si substrate is cooled, for example, an Ar-H ₂ system (Ar / H ₂ / O ₂ mixing ratio) is used to prevent oxidation of the Cu film. To
The mixture was cooled in an atmosphere of (11/20/0 mixed gas). The cooling atmosphere is set so as to always maintain a reducing atmosphere. Next, the Cu film 8 and the TiN 11 'film outside the groove 6 are removed by a chemical mechanical polishing (CMP) method, and a Cu plug as shown in cross section in FIG.
A semiconductor device provided with 8b and Cu embedded wiring 8a was obtained.

Note that the Cu plug 8b and the Cu embedded wiring 8a
Were embedded uniformly with the aspect ratio as designed, and the resistivity was measured. As a result, the specific resistance was 1.8 μΩcm or less in each case.

Further, as a result of performing an acceleration test on a semiconductor device having an electrode wiring having a via chain structure, the formed electrode wiring has high electromigration and stress migration resistance, and has a high reliability against a high current density. It was confirmed that no voids or hillocks were generated especially on the upper and lower surfaces of the Cu plug 8b.

The above-mentioned Cu film can be formed by various methods such as anisotropic sputtering and bias sputtering. For example, a Cu film which is unlikely to be agglomerated by the bias sputtering is applied to the bottom and side walls of the contact hole. The productivity can be improved by forming a film and then using a normal sputtering method with a high film forming rate.

Also, in the case of this embodiment, various modifications and conditions can be set for the conditions such as the film forming method and the film forming atmosphere as in the case of the embodiments 13 and 14. It is. Embodiment 16 This embodiment is an example of a method of manufacturing a semiconductor device including a step of forming a buried wiring having an aspect ratio of 1 and a contact hole having an aspect ratio of 3.

FIGS. 19 (A), 19 (B), 19
(C) and FIGS. 20 (A), 20 (B), 20 (C),
This embodiment will be described with reference to FIG.

First, on a Si substrate 9 having a diameter of 150 mm on which a required active region or lower wiring region is provided in advance, FIG.
As shown in the cross section in (A), the thickness of 850 nm
SiO ₂ film 7, 50 nm thick SiN film 41, and 400 nm thick
An SiO ₂ film 7 ′ was sequentially formed. Then, PEP, R
According to IE, the SiN film 41 is used as an etching stopper, for example, as shown in FIG.
A groove 6 having a thickness of 00 nm and a depth of 400 nm was formed in the SiO ₂ film 7 ′.

Next, PEP and RIE are again performed to obtain a SiN film.
41 and the SiO ₂ film 7 are patterned and, as shown in cross section in FIG.
Contact hole 6a was formed. Thereafter, a TiN film 11 'having a thickness of, for example, 30 nm was formed as a barrier layer for preventing diffusion of Cu on the surface where the contact hole 6a was formed, as shown in cross section in FIG.

Next, by the anisotropic sputtering method,
As shown in cross section in FIG. 20B, a Cu film having a thickness of 300 nm mixed (contained) with O atoms was formed.

At this time, the chamber was filled with Ar
It was supplied at a flow rate of sccm, and the total pressure was 0.17 Pa. In addition, as a sputter target, Cu containing O atoms having a diameter of 300 mm was used, and the distance between the substrate and the target (distance between TS) was set to 300 mm. The input power is 30 kW.

Further, the substrate is fixed on a PID-controlled PBN heater by an electrostatic chuck, and an Ar gas is introduced at a pressure of 80 Pa on the back side of the substrate at a pressure of 80 Pa so as not to exceed 350 ° C. Heated to temperature.

Next, the substrate was set in a second film forming chamber via a high vacuum transfer chamber, and a 300 nm-thick film was formed by anisotropic sputtering, as shown in cross section in FIG.
A Cu film was formed. At this time, Ar /
The mixed atmosphere of H ₂ / O ₂ was 11/20/1, and the total pressure was 0.85 Pa. The sputtering target used was Cu with a diameter of 300 mm and a purity of 99.9999%, and the distance between the substrate and the target (distance between TS) was set to 300 mm.

Further, the substrate is fixed on a PBN-controlled PBN heater by an electrostatic chuck, and Ar gas is introduced at a pressure of 80 Pa on the back side of the substrate at a pressure of 80 Pa so as not to exceed 450 ° C. Heated to temperature.

After the completion of the sputtering, until the substrate is cooled, in order to prevent oxidation of the Cu film, for example, Ar
- H ₂ system (a mixed gas of _{Ar / H 2 / O 2 =} 11/20/0) was cooled in an atmosphere. The cooling atmosphere is set so as to always maintain a reducing atmosphere.

Thereafter, the Cu film 8 and the TiN outside the groove 6 are formed by chemical mechanical polishing (CMP).
The film 11 'was removed to obtain a semiconductor device having a Cu plug 8b and a Cu buried interconnect 8a as shown in cross section in FIG.

The Cu plug 8b and the Cu embedded wiring 8a
Were uniformly embedded with the aspect ratio as designed, and their resistance was measured. In each case, the specific resistance was 1.8 μΩcm or less.

Further, as a result of performing an acceleration test on a semiconductor device in which an electrode wiring having a via chain structure was formed, the formed electrode wiring had high electromigration and stress migration resistance, and the reliability for high current density was improved. It was confirmed that no voids or hillocks were generated especially on the upper and lower surfaces of the Cu plug 8b.

The formation of the oxygen-containing Cu film and the formation of the Cu film may be performed in the same film forming chamber if the supply amounts of the oxidizing gas and the reducing gas are appropriately selected. The contained Cu target may be used continuously as it is. By adopting such a method, the manufacturing process can be shortened, etc.
This will increase productivity. In addition, instead of targeting Cu containing O atoms as a target for forming a Cu film containing O atoms,
Similar results were obtained using a high-purity Cu target whose surface was previously oxidized.

Further, also in this embodiment, for example, Ag or Au may be formed in place of Cu.
As in the case of 14, various modifications and condition settings are possible.

Example 17 First, a 100 nm-thick p-SiN film was formed as a base on a Si substrate (100) provided with a required active region, and a SiO ₂ film was formed to a thickness of 400 nm by CVD. According to PEP, RIE, a space width of 800 nm was applied to the SiO ₂ film, and a width of 400 nm was applied.
Many grooves of nm were formed.

Next, on the SiO ₂ film surface on which the grooves were formed, amorphous WSiN was formed as a barrier layer to a thickness of 30 nm, and then amorphous CuTa was formed to a thickness of 10 nm.

After the primary deposition of the Cu film, the substrate temperature was set to 350 ° C.
And a second Cu film having a thickness of 600 nm was formed. At this time, the Ar / H ₂ / O ₂ mixture ratio 11/10 /
In a mixed atmosphere of 2, the total pressure was 0.85 Pa.

After the film formation, the shape of the film was observed by SEM. As a result, 120% or more of the groove depth was buried, and the measurement result of the degree of crystal orientation by X-ray was detected as θ−2θ. The peak was only Cu (111), and the rocking curve of Cu (111) was measured. As a result, the half value width was 2.0 ° and the crystal orientation was extremely good.

Further, as a result of wiring processing of the film by CMP, no void or the like was observed at all, and the specific resistance was 1.8 μΩcm or less as measured by a four-terminal method.

Further, the electromigration and stress migration of the electrode wiring formed by the above method were measured and evaluated. As a result, the electrode wiring had high electromigration and stress migration resistance.

After forming the base film having good wettability with Cu as described above, the primary film of Cu is formed while maintaining a clean surface on which no oxide film is formed. Even when a Cu secondary film was formed, the Cu film did not fracture, the flow of Cu atoms during the secondary film progressed quickly, and the orientation was further improved.

That is, a material having good wettability with a metal for wiring, such as Cu, is selected as a base film, and preferably, a film is formed while keeping its surface clean. The formation can be performed, and the reliability of the formed electrode wiring is further improved.

The underlying film is made of amorphous CuTa.
In addition, good results were obtained using Ta, W, Nb, Mo, amorphous WCo, amorphous NbCr, amorphous CrTa, amorphous CoV, amorphous CoNb, amorphous CoTa, and the like. Furthermore, even if the underlying film is once exposed to the atmosphere and an oxide film is formed on the surface, if the surface is cleaned by plasma etching such as substrate bias cleaning, the same good results as in the case of continuous film formation can be obtained. Was.

Embodiment 18 In this embodiment, an antireflection film and a polishing stopper film are used.
3 is an example of a method of manufacturing a semiconductor device including a step of forming a buried electrode wiring and a contact hole provided with a C (carbon) film.

FIGS. 21 (A), 21 (B), 21 (C) and FIGS. 22 (A), 22 (B), 22 (C), 22
(D) schematically shows an embodiment example of this embodiment.

First, on a Si substrate 9 having a diameter of 150 mm in which a required active region or lower wiring region is provided in advance, FIG.
As shown in the cross section in (A), the thickness of 850 nm
SiO ₂ film 7, SiN film 41 with a thickness of 50 nm, SiO _{2 with} a thickness of 400 nm
A film 7 'and a C film 40 having a thickness of 100 nm were sequentially laminated.

Thereafter, the SiN film was formed by PEP and RIE.
A groove 41 having a width of 400 nm and a depth of 400 nm, for example, is formed as shown in FIG.
Was formed on the C film 40 and the SiO ₂ film 7 '.

Next, PEP and RIE are performed again to obtain a SiN film.
41 and the SiO ₂ film 7 are patterned and, as shown in cross section in FIG.
Contact hole 6a was formed.

Then, a barrier layer for preventing diffusion of Cu is formed on the surface where the contact hole 6a is formed.
As shown in the cross section of FIG.
A TiN film 11 'was formed.

Next, by anisotropic sputtering,
As shown in the cross section in FIG. 22B, the primary deposition of the Cu film 8 having a thickness of 300 nm was performed with the input power of 30 kW. At this time, the Ar / H ₂ / O ₂ mixture ratio was set at 11/10 in the chamber.
/ 2 mixed atmosphere, total pressure was 0.85 Pa. The sputter target has a purity of 99.9999% with a diameter of 300 mm.
Was used, and the distance between the substrate and the target (distance between TS) was set to 300 mm.

Further, the substrate is fixed on a PID-controlled PBN heater by an electrostatic chuck, and Ar gas is introduced at a pressure of 80 Pa on the back surface side of the substrate at a pressure of 80 Pa so as not to exceed 350 ° C. Heated to temperature.

Thereafter, the substrate temperature was increased to 450 ° C.
As shown in cross section in FIG.
In order to completely fill the groove 6a and the groove 6, for example,
A Cu film 8 of 300 nm was further formed secondarily. At this time, the atmosphere in the chamber was such that the Ar / H ₂ / O ₂ mixture ratio was 11/20/2.
Was changed to a mixed atmosphere. In addition, the distance between TS is 1
This is the same as the case of the next film formation.

After the sputtering for the secondary film formation is completed, until the Si substrate is cooled, for example, an Ar—H ₂ system (Ar / H ₂ / O ₂ mixing ratio) is used to prevent oxidation of the Cu film. To
The mixture was cooled in an atmosphere of (11/20/0 mixed gas). The cooling atmosphere is set so as to always maintain a reducing atmosphere.

Next, the C film 40 is used as a polishing stopper film by a chemical mechanical polishing (CMP) method as shown in FIG.
The external Cu film 8 and TiN film 11 'were removed.

Thereafter, the mixture was set in a quartz cylindrical chamber having a cylindrical electrode mounted on the outer periphery, and the atmosphere in the chamber was changed to a mixed gas having a H ₂ / O ₂ mixing ratio of 100/1.
A high frequency power of 13.56 MHz, 800 W, was applied to the external electrodes for 30 minutes, and in a plasma in a mixed atmosphere of H ₂ and O ₂ ,
The C film 40 was selectively removed to obtain a semiconductor device having a Cu plug 8b and a Cu embedded wiring 8a as shown in cross section in FIG.

Note that the Cu plug 8b and the Cu embedded wiring 8a
Was uniformly embedded with a high-accuracy aspect ratio as designed, and Cu was not oxidized at all. That is, irregular reflection of light is prevented during patterning by photoetching, so that the problem that the processed shape of the resist is broken is solved, and excessive polishing and removal of embedded wiring and the like due to the CMP process are also suppressed. In addition, required electrode wirings and the like could be formed.

When the resistance of the wiring portion of the semiconductor device formed above was measured, the specific resistance was 1.8 μΩcm or less in each case. Furthermore, as a result of performing an acceleration test on a semiconductor device having an electrode wiring having a via chain structure, the formed electrode wiring has high electromigration and stress migration resistance, and can guarantee reliability against high current density. Especially Cu
It was confirmed that voids and hillocks did not occur on the upper and lower surfaces of the plug 8b.

Also in the case of this embodiment, for example, Ag or Au may be formed instead of Cu. Example 16
As in the case of, various deformations, condition settings, and the like are possible.

Embodiment 19 In this embodiment, a conductive film in which an oxide becomes a conductive oxide is formed as a Cu base film to form a buried Cu wiring by a reflow technique utilizing an oxidation-reduction reaction. The present invention relates to a method for manufacturing a semiconductor device capable of avoiding an increase in contact resistance even when a base film is oxidized in a heat treatment in the presence of an oxidizing gas.

FIGS. 23 (A), 23 (B), 23 (C),
This will be described with reference to 23 (D), 23 (E) and 23 (F).

First, as shown in FIG. 23A, a film is formed as a base on a Si substrate (100) 9 provided with a required active region.
After a p-SiN film 41 of 100 nm is formed and a SiO ₂ film 7 is formed to a thickness of 400 nm by CVD as shown in FIG. 23B, a groove 6 having a width of 400 nm and a space width of 800 nm is formed by PEP and RIE. A large number of contact holes were formed (FIG. 23).
(C)). The aspect ratio of the contact hole was 0.5.

The underlying layer is made of TiN as a barrier layer 11 to a thickness of 30 nm.
After the film formation, a Cu film 8 was formed to a thickness of 600 nm by sputtering, and a TiN film was formed as a barrier layer 11 to a thickness of 30 nm, an Nd film 51 as a Cu base film was formed to a thickness of 30 nm, and the Cu film 8 was formed to a thickness of 30 nm. A sample formed by sputtering with a film thickness of 600 nm (Fig. 2
3 (D)). Barrier layer 11, Nd film 51, Cu film 8
Formed films continuously.

Next, each sample was subjected to a heat treatment accompanied by an oxidation-reduction reaction using the reduced pressure heat treatment apparatus shown in FIG.
The Cu film 8 was buried (FIG. 23E).

That is, first, the sample was set on the sample mounting table 12 installed inside the decompression processing device main body 13, and the sample was evacuated by the rotary pump 18. The degree of vacuum at this time is 0.01 To
After the evacuation, a heat treatment was performed at 450 ° C. for 30 minutes under the environment shown in Table 14.

After cooling, the reflow shape was observed by SEM. In all samples, the embedding amount of the groove portion was 11 times the groove depth.
At 0% or more, a good embedded shape was shown.

The oxygen content of each sample after reflow was measured using SIMS. In the sample in which the Nd film was present between the barrier layer and the Cu film, oxygen was detected in the Nd film, but the amount of oxygen in the TiN film and the Cu film was below the detection limit. On the other hand, oxygen was detected in the TiN film for the sample without the Nd film.

Each of the samples was subjected to wiring processing by CMP, and the wiring shape was evaluated by SEM.

Next, the process of creating the via chain used for the wiring resistance measurement will be described with reference to FIGS. 24 (A), 24 (B), 24 (C), and FIG.
Shown at 24 (D), 24 (E) and 25 (F).

First, a 100 nm-thick p-SiN film 41 is formed on a Si (100) substrate 9 as shown in FIG. 24A, and then a SiO ₂ film is formed by CVD as shown in FIG. 7 to 400 nm
After the film was formed to be thick, a large number of grooves having a width of 400 nm and a length of 15 μm were formed (FIG. 24C).

On this base, TiN was used as a barrier layer 11 to a thickness of 30 nm.
After the film formation, the Cu film 8 was formed to a thickness of 600 nm by sputtering, and the TiN film was formed as a barrier layer 11 to a thickness of 30 nm, then the Nb film 51 was formed to a thickness of 30 nm, and the Cu film 8 was formed to a thickness of 600 nm by sputtering. A sample was prepared. Barrier layer 11,
The Nb film 51 and the Cu film 8 were continuously formed.

Each sample was subjected to a heat treatment accompanied by an oxidation-reduction reaction in the same manner as in Example 2 using the reduced pressure heat treatment apparatus shown in FIG. 3 to bury the Cu film 8 in the groove. Thereafter, the wiring was processed by CMP (FIG. 24D).

Subsequently, on the substrate on which the Cu wiring was formed,
Figure 24 (E), the post-forming p-SiN film 41 having a thickness of 100nm, and a SiO ₂ film 7 to 400nm thickness by CVD, further 100nm the p-SiN film 41, SiO ₂ by CVD 400n for membrane 7
m were sequentially formed. Thereafter, via holes and grooves connecting them were formed by PEP and RIE. The via hole interval is 10 μm, and the number is 500.

On the substrate having the via hole and the groove,
After forming a TiN film as a barrier layer 11 to a thickness of 30 nm, a Cu film 8
A 30 nm thick Nb film 51 having a thickness of 30 nm and a Cu film having a thickness of 30 nm
A sample in which the film 8 was formed to a thickness of 600 nm by sputtering was prepared. The barrier layer 11, the Nb film 51, and the Cu film 8 were continuously formed. Each sample was subjected to a heat treatment involving an oxidation-reduction reaction in the same manner as in Example 2 using the reduced pressure heat treatment apparatus shown in FIG. 3 to bury a Cu film in the groove and the via hole. Thereafter, wiring processing was performed by CMP to form a via chain (FIG. 24F). The total electrical resistance of the via chain was measured by the four terminal method. On the other hand, after a TiN film was formed as a barrier layer on the substrate to a thickness of 30 nm, a Cu film was formed by sputtering to a thickness of 600 nm, and the total electrical resistance of the sample subjected to the same heat treatment in a reducing atmosphere was measured. It was compared with a sample heat-treated in a redox atmosphere.
The results are shown in Table 14. In Table 14, the symbol 〇 indicates that the resistance rise is within 5%, and the symbol △ indicates that the resistance rise is 5 to 10%.

[0280]

[Table 14] As a result, even when the heat treatment was performed in the oxidation-reduction atmosphere, the increase in the wiring resistance was within 5% for the sample in which the Nd film was present, but the wiring resistance exceeded 5% in the absence of the Nd film. Some of them showed a rise.

Further, instead of Nd, Ti, Nb, La, Sm, Re, V, R
Similar effects were obtained when u, Rh, Os, Ir, and Pt were used. In particular, for Nd, La, and Sm, the absolute value of the free energy change of Gibbs in the oxidation reaction is larger than the absolute value of the free energy change of Gibbs in the oxidation reaction of TiN used as the barrier layer. The effect of suppressing the oxidation of was larger.

Example 20 On the same underlayer as in Example 19, TiN was used as a barrier layer to a thickness of 30 nm.
After the film formation, a sample in which a Cu film was formed to a thickness of 600 nm by sputtering, and a film of TiN as a barrier layer having a thickness of 30 nm,
A sample was formed by sputtering a film with a thickness of 30 nm and a Cu film with a thickness of 600 nm. In the preparation of the sample, the substrate was once exposed to the air after the formation of the barrier layer and the Nd film.

Next, using the same apparatus as in Example 19, O ₂
20% - H ₂ 80% of _{0.11l / min, H 2 10%} - N ₂ 90% 0.5
Heat treatment was performed in an atmosphere of l / min. Heat treatment temperature 450
° C for 30 minutes. After cooling, the reflow profile was observed by SEM. In each of the samples, the embedding amount in the groove portion was 110% or more of the groove depth, and a good embedding shape was exhibited. The oxygen content of each sample after reflow was measured using SIMS. In the sample in which the Nd film exists between the barrier layer and the Cu film, oxygen was detected in the Nd film.
The oxygen content in the N and Cu films was below the detection limit. On the other hand, oxygen was detected in the TiN film for the sample without the Nd film.

Wiring was performed on each of the samples by CMP and the wiring shape was evaluated by SEM. Further, the total electric resistance of the via chain was measured and evaluated by the four-terminal method in exactly the same manner as in Example 19. In other words, after forming a 30 nm TiN film as a barrier layer on the same substrate, forming a Cu film by sputtering to a thickness of 600 nm without exposing it to the atmosphere, and performing the same heat treatment in a reducing atmosphere to measure the total electric resistance. Then, the total electric resistance of the sample heat-treated in this reducing atmosphere and the sample heat-treated in the above-mentioned redox atmosphere were compared. As a result, in the sample in which the Nd film was present, the increase in the resistance was within 5%, but in the absence of the Nd film, the increase in the wiring resistance was more than 10%. Example 21 On the same underlayer as in Example 19, 30 nm of TiN was used as a barrier layer.
After the film formation, a Cu film was formed by sputtering to a thickness of 600 nm, and a TiN film was formed as a barrier layer to a thickness of 30 nm.
A sample was prepared by sputtering an alloy film of W and W with a thickness of 30 nm and a Cu film with a thickness of 600 nm by sputtering. Barrier layer, Mn
-W alloy film and Cu film were continuously formed in vacuum.

Next, using the same apparatus as in Example 19,
₂ 20% - H ₂ 80% of _{0.11l / min, H 2 10%} - N 2 90% of
Heat treatment was performed in an atmosphere of 0.5 l / min. Heat treatment temperature 450
° C for 30 minutes. After cooling, the reflow profile was observed by SEM. In each of the samples, the embedding amount in the groove portion was 110% or more of the groove depth, and a good embedding shape was exhibited.

The oxygen content of each sample after reflow was measured using SIMS. Mn- between the barrier layer and the Cu film
For the sample containing the W alloy film, oxygen was detected in the Mn-W alloy film, but the oxygen content in the TiN film and Cu film was below the detection limit. On the other hand, oxygen was detected in the TiN film for the sample without the Mn-W alloy film.

Each of the samples was processed for wiring by CMP, and the wiring shape was evaluated by SEM. As a result, all were good. Further, the total electric resistance of the via chain was measured and evaluated by the four-terminal method in exactly the same manner as in Example 19. That is, on a similar substrate, TiN is used as a barrier layer.
After forming a 30 nm film, a Cu film was formed by sputtering to a thickness of 600 nm without being exposed to the air, and then subjected to the same heat treatment in a reducing atmosphere to measure the total electric resistance. The total electrical resistance was compared for the samples heat treated in a reducing atmosphere. As a result, in the sample in which the Mn-W alloy film was present, the increase in resistance was within 5%,
For the sample without the Mn-W alloy film, an increase in wiring resistance of more than 10% was observed.

Instead of Mn-W alloy, La-Ni alloy, Pb-
Ru alloy, Bi-Ru alloy, Tl-Rh alloy, Ti-Os alloy, Pb-Os
Similar effects were observed when an alloy or a Pb-Ir alloy was used. Example 22 On the same underlayer as in Example 19, 30 nm of TiN was used as a barrier layer.
After the film formation, a Cu film was formed by sputtering to a thickness of 600 nm, and a TiN film was formed as a barrier layer to a thickness of 30 nm.
A sample was formed by sputtering a film with a thickness of 30 nm and a Cu film with a thickness of 600 nm. The barrier layer, V film, and Cu film were continuously formed in a vacuum.

Next, using the same apparatus as in Example 19,
₂ 20% - H ₂ 80% of _{0.11l / min, H 2 10%} - N 2 90% of
Heat treatment was performed in an atmosphere of 0.5 l / min. Heat treatment temperature 450
° C for 30 minutes. After cooling, the reflow profile was observed by SEM. In each of the samples, the embedding amount in the groove portion was 110% or more of the groove depth, and a good embedding shape was exhibited.

The oxygen content of each sample after reflow was measured using SIMS. In the sample in which the V film exists between the barrier layer and the Cu film, oxygen was detected in the V film, but the amount of oxygen in the TiN film and the Cu film was below the detection limit. On the other hand, oxygen was detected in the TiN film for the sample without the V film. As for samples V film exists, in the vicinity of the interface between the Cu film and the V film, it was found that Cu _x VO _y becomes compound is formed.

Each of the samples was processed for wiring by CMP, and the wiring shape was evaluated by SEM. As a result, all were good. Further, the total electric resistance of the via chain was measured and evaluated by the four-terminal method in exactly the same manner as in Example 19. In other words, after forming a 30 nm TiN film as a barrier layer on the same substrate, forming a Cu film by sputtering to a thickness of 600 nm without exposing it to the atmosphere, and performing the same heat treatment in a reducing atmosphere to measure the total electric resistance. Then, the total electric resistance of the sample heat-treated in this reducing atmosphere and the sample heat-treated in the above-mentioned oxidation-reduction atmosphere were compared. As a result, in the sample having the V film, the increase in the resistance was within 5%, but in the sample without the V film, the increase in the wiring resistance in the range of 5 to 10% was recognized.

As is clear from the above Examples 19 to 22, a conductive film made of a substance in which an oxide is a conductor is formed as a Cu base film, so that a Cu-buried wiring is formed by a reflow technique utilizing oxidation-reduction. In the case where the semiconductor device is manufactured by using the method described above, even if the underlying film is oxidized in the heat treatment in the presence of the oxidizing gas, an increase in contact resistance can be avoided, and a highly reliable semiconductor device can be provided.

[0293]

As described above in detail, the first embodiment according to the present invention is described.
In the third method of manufacturing a semiconductor device, it is possible to substantially lower the reflow temperature substantially and, for example, to suppress diffusion of Cu to the semiconductor substrate side. In addition, it is possible to obtain a highly reliable semiconductor device using the embedded wiring method while avoiding the problem reliably. Further, in the fourth method of manufacturing a semiconductor device according to the present invention, in forming a buried wiring or the like by reflow of a conductive metal, one of the deposited metal films is formed so that no voids are generated or remain in a groove or the like. Since the portions are removed in advance, it is possible to manufacture a highly reliable semiconductor device having a fine wiring structure, good and uniform characteristics at all times.

Further, in the fifth to seventh methods for manufacturing a semiconductor device according to the present invention, even when the aspect ratio of the trench or the like serving as the buried wiring portion is high, a wiring having a precise structure can be easily formed. It is formed. In addition, in the fifth and sixth manufacturing methods of the semiconductor device, in particular, the film formation and embedding, that is, the embedding of the groove and the like while forming the metal can be performed at a relatively low temperature, so that the productivity and the process margin can be improved. obtain.

[Brief description of the drawings]

FIG. 1 shows a method for manufacturing a semiconductor device according to the present invention.
FIG. 4 is a schematic diagram for explaining an embedded wiring formation mode by reflow.

FIGS. 2A, 2B, 2C, and 2D are cross-sectional views schematically showing an embodiment of forming an electrode wiring in an example of a method for manufacturing a semiconductor device according to the present invention.

FIG. 3 is a view showing a schematic configuration of a reduced pressure heat treatment apparatus used in an example of a method of manufacturing a semiconductor device according to the present invention.

FIG. 4A is a micrograph showing a cross-sectional state after reflow of a Cu film in an example of a method for manufacturing a semiconductor device according to the present invention. (B) is a micrograph showing a cross-sectional state after reflow of a Cu film of a comparative example shown in comparison with the example shown in (A).

FIG. 5 is a diagram showing the relationship between the reducing gas flow rate during reflow and the internal pressure of the heat treatment apparatus in the example of the method for manufacturing a semiconductor device according to the present invention.

FIG. 6A is a micrograph showing a cross-sectional state before reflow of a Cu film in an example of a method for manufacturing a semiconductor device according to the present invention. (B) is a micrograph showing a cross-sectional state after reflow of the Cu film in the example of the method for manufacturing a semiconductor device according to the present invention.

FIG. 7 is a view showing a schematic configuration of a pressure / heat treatment apparatus used in an example of a method of manufacturing a semiconductor device according to the present invention.

FIG. 8 is a schematic cross-sectional view showing a state during a uniaxial pressing / heating process in the example of the method for manufacturing a semiconductor device according to the present invention.

FIG. 9 is a curve diagram showing an example of a relationship between a uniaxial stress and a reflow degree in the method of manufacturing a semiconductor device according to the present invention.

FIG. 10A is a photomicrograph showing an example in which a uniaxial stress is applied and reflow is performed in an example of a method for manufacturing a semiconductor device. (B) is a micrograph showing a comparative example in which reflow was performed without applying uniaxial stress in the example of the method for manufacturing a semiconductor device.

FIG. 11 is a diagram showing a schematic configuration of a sputtering / pressing / heat treatment apparatus used in an example of a method of manufacturing a semiconductor device according to the present invention.

FIG. 12 is a curve showing the relationship between the degree of reflow and the temperature of the Si substrate in a case where reflow is performed by applying uniaxial stress and in a case where reflow is performed without applying uniaxial stress in another example of a method of manufacturing a semiconductor device. FIG.

FIG. 13A shows the influence of the incident angle of particles during Cu film formation by sputtering in the example of the method for manufacturing a semiconductor device according to the present invention. 13B is a diagram schematically illustrating a cross section immediately after the Cu film formation based on the positional relationship with the target in FIG.

FIG. 14A shows an influence of a particle incident angle when forming a Cu film by sputtering in an example of a method for manufacturing a semiconductor device according to the present invention. 14B is a diagram schematically illustrating a cross section immediately after the Cu film formation based on the positional relationship with the target in FIG.

FIG. 15 is a view showing a schematic configuration of still another pressure / heat treatment apparatus used in the example of the method of manufacturing a semiconductor device according to the present invention.

16 (A), (B), (C), (D) and (E) are cross-sectional views schematically showing another embodiment of forming an electrode wiring in an example of a method for manufacturing a semiconductor device according to the present invention. FIG.

FIGS. 17A, 17B, and 17C are schematic diagrams for explaining a buried wiring formation mode by film formation and reflow of a conductive film in a method of manufacturing a semiconductor device according to the present invention.

18 (A), (B), (C) and (D) are cross-sectional views schematically showing still another embodiment of forming electrode wirings in the example of the method of manufacturing a semiconductor device according to the present invention. .

FIGS. 19A and 19B are cross-sectional views schematically showing an embodiment of patterning a wiring portion including a connection portion in an example of a method for manufacturing a semiconductor device according to the present invention.

FIGS. 20A, 20B, 20C, and 20D are cross-sectional views schematically showing an embodiment of forming a wiring including a connection portion in a semiconductor device manufacturing method according to the present invention. is there.

FIGS. 21A, 21B, and 21C are cross-sectional views schematically showing another embodiment of patterning a wiring portion including a connection portion in a semiconductor device manufacturing method according to the present invention. is there.

FIGS. 22A, 22B, 22C and 22D are cross-sectional views schematically showing another embodiment of forming a wiring including a connection portion in an example of a method for manufacturing a semiconductor device according to the present invention. FIG.

23 (A), (B), (C), (D), (E) and (F) schematically show another embodiment of the electrode wiring in the example of the method for manufacturing a semiconductor device according to the present invention. FIG.

24 (A), (B), (C), (D), (E) and (F) schematically show another embodiment of forming electrode wirings in the example of the method for manufacturing a semiconductor device according to the present invention. FIG.

FIGS. 25A and 25B are cross-sectional views schematically showing an embodiment of forming a buried wiring by reflowing a conductive film in a conventional method for manufacturing a semiconductor device.

FIGS. 26A and 26B are cross-sectional views schematically showing another embodiment of forming a buried wiring by reflowing a conductive film in a conventional method for manufacturing a semiconductor device.

FIGS. 27A, 27B, and 27C are cross-sectional views schematically showing a state of forming a conductive film by sputtering in a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

6 Groove 7 SiO ₂ film 8 Conductive film 9
…substrate

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Naofumi Kaneko 1st Toshiba-cho, Komukai, Saiwai-ku, Kawasaki-shi, Kanagawa Prefecture Inside the Research and Development Center, Toshiba Corporation (72) Inventor Nobuo Hayasaka Toshiba-cho, Komukai-ku, Kawasaki-shi, Kanagawa No. 1 Toshiba Corporation R & D Center (72) Inventor Junsei Tsutsumi Komukai Toshiba-cho, Kawasaki City, Kanagawa Prefecture 1 Toshiba Corporation R & D Center (72) Inventor Akihiro Kajita Kawasaki City, Kanagawa Prefecture No. 1 Muko Toshiba, Toshiba Corporation R & D Center (72) Inventor Junichi Wada No. 1 Komukai Toshiba Town, Sachi-ku, Kawasaki City, Kanagawa Prefecture Toshiba Corporation R & D Center (72) Inventor Haruo Okano Kawasaki City, Kanagawa No. 1, Komukai Toshiba-cho, Tokyo Toshiba R & D Center (56) References JP-A-6-204218 (JP A) (58) investigated the field (Int.Cl. ^7, DB name) H01L 21/3205 H01L 21/28 H01L 21/768

Claims (10)

(57) [Claims] In a method of manufacturing a semiconductor device in which an electrode wiring is formed on a semiconductor substrate, at least one of a groove and a contact hole is formed in a region where the electrode wiring is to be formed on the semiconductor substrate. A conductive film mainly composed of Cu is formed on a semiconductor substrate in which at least one of the contact holes is formed, and the conductive film is reflowed while supplying at least an oxidizing gas, so that the groove and / or the contact hole are formed. Heat treatment to be filled,
And a method of manufacturing a semiconductor device, comprising forming an electrode wiring by removing a conductive film other than a region where an electrode wiring is to be formed by polishing. 2. The method according to claim 1, wherein an oxidizing gas and a reducing gas are supplied in the heat treatment step. 3. The step of forming a conductive film mainly composed of Cu on a semiconductor substrate on which at least one of the groove and the contact hole is formed, comprises: 3. The method according to claim 1, further comprising forming the conductive film as a base film on the semiconductor substrate. 4. A method of manufacturing a semiconductor device in which an electrode wiring is formed on a semiconductor substrate, wherein at least one of a groove and a contact hole is formed in a region where the electrode wiring is to be formed on the semiconductor substrate. A conductive film is formed on a semiconductor substrate in which at least one of the contact holes is formed, and a uniaxial stress is applied to the conductive film from above on the semiconductor substrate surface having the conductive film, and the conductive film reflows. A method for manufacturing a semiconductor device, comprising: performing a heat treatment so as to fill a groove and / or a contact hole; and removing an electroconductive film other than a region where an electrode wiring is to be formed by polishing to form an electrode wiring. 5. A method of manufacturing a semiconductor device in which an electrode wiring is formed on a semiconductor substrate, wherein at least one of a groove and a contact hole is formed in a region where the electrode wiring is to be formed on the semiconductor substrate. A conductive film mainly composed of Cu on a semiconductor substrate on which at least one of the contact holes is formed, and
A stacked conductive film mainly composed of Ag is formed, heat treatment is performed so that the conductive film is reflowed to fill the groove and / or the contact hole, and a conductive film other than a region where an electrode wiring is to be formed is formed. A method for manufacturing a semiconductor device, comprising forming an electrode wiring by removing by polishing. 6. A method of manufacturing a semiconductor device in which an electrode wiring is formed on a semiconductor substrate, wherein at least one of a groove and a contact hole is formed in a region where the electrode wiring is to be formed on the semiconductor substrate. A conductive film is formed on a semiconductor substrate on which at least one of the contact holes is formed, a part of the conductive film located in the vicinity of the groove and the contact hole is removed from the film surface, and the remaining conductive film is formed. An oxidizing gas and a reducing gas are supplied so that the grooves and / or the contact holes are filled by reflow.
A method for manufacturing a semiconductor device, comprising: performing heat treatment by supplying the conductive film; and removing the conductive film other than a region where the electrode wiring is to be formed by polishing to form the electrode wiring. 7. A method of manufacturing a semiconductor device in which electrode wiring is formed on a semiconductor substrate, wherein at least one of a groove and a contact hole is formed in a region where the electrode wiring is to be formed on the semiconductor substrate. While heating the semiconductor substrate on which at least one of the contact holes is formed, while supplying at least an oxidizing gas, Cu
Flowing into the groove and / or the contact hole, forming a conductive film mainly composed of Cu, and removing the conductive film other than the region where the electrode wiring is to be formed by polishing to form the electrode wiring. A method for manufacturing a semiconductor device. 8. The method according to claim 7 , wherein an oxidizing gas and a reducing gas are supplied in the step of forming the conductive film. 9. A pre Kimizo and a contact hole on a semiconductor substrate in which at least one is Katachi設, the step of forming a conductive film mainly made of Cu, the first made of a material oxide has conductivity 8. The method according to claim 7, further comprising a step of forming one conductive film as a base film on the semiconductor substrate.
Or the method of 8. 10. A method of manufacturing a semiconductor device in which an electrode wiring is formed on a semiconductor substrate, wherein at least one of a groove and a contact hole is formed in a region where the electrode wiring is to be formed on the semiconductor substrate. On a semiconductor substrate on which at least one of the contact holes is formed,
By forming a film mainly containing Cu containing oxygen or an oxide film of Cu, heating the semiconductor substrate on which the film is formed, and supplying an oxidizing gas and a reducing gas.
By flowing Cu into the groove and / or the contact hole, a conductive film mainly composed of Cu is formed, and the conductive film other than the region where the electrode wiring is to be formed is removed by polishing to form the electrode wiring. A method for manufacturing a semiconductor device, comprising: