WO2008044573A1

WO2008044573A1 - Capacitor layer-forming material, method for producing capacitor layer-forming material, and printed wiring board comprising built-in capacitor obtained by using the capacitor layer-forming material

Info

Publication number: WO2008044573A1
Application number: PCT/JP2007/069365
Authority: WO
Inventors: Naohiko Abe; Akiko Sugioka; Akihiro Kanno; Hirotake Nakashima
Original assignee: Mitsui Mining & Smelting Co., Ltd.
Priority date: 2006-10-05
Filing date: 2007-10-03
Publication date: 2008-04-17
Also published as: TW200829099A; JPWO2008044573A1

Abstract

Disclosed is a capacitor layer-forming material for printed wiring boards which enables to improve temperature characteristics of an oxide dielectric layer having a perovskite structure, while reducing leakage current at the same time. Specifically disclosed is a capacitor layer-forming material (1) comprising a dielectric layer (2) between an upper electrode-forming layer (5) and a lower electrode-forming layer (6). This capacitor layer-forming material (1) is characterized in that the dielectric layer (2) is an oxide dielectric layer having a multilayer structure, which is composed of a manganese-less oxide dielectric layer (3) containing no manganese, and a manganese-containing oxide dielectric layer (4). Also disclosed is a method for producing such a capacitor layer-forming material, wherein a manganese-less oxide dielectric layer and a manganese-containing oxide dielectric layer are formed by any one of a physical deposition method, a chemical vapor reaction method and a sol-gel method.

Description

Specification

CAPACITOR LAYER FORMING MATERIAL, CAPACITOR LAYER FORMING MATERIAL MANUFACTURING METHOD, AND PRINTED WIRING BOARD HAVING BUILT-IN CAPACITOR OBTAINED BY USING THE CAPACITOR LAYER FORMING MATERIAL

Technical field

The invention according to the present application relates to a capacitor layer forming material, a method for manufacturing the capacitor layer forming material, and a printed wiring board including a built-in capacitor layer obtained by using the capacitor layer forming material.

Background art

In recent years, multilayer printed wiring boards with built-in capacitor circuits use one or more layers located in the inner layer as layers including the capacitor circuit, and inner layer circuits located on both sides of the dielectric layer of the capacitor circuit. The upper electrode and the lower electrode of the capacitor circuit have been used in the form of facing each other.

[0003] The capacitor circuit layer is composed of an upper electrode formation layer / dielectric layer / lower electrode formation layer.

As disclosed in Patent Document 1, a capacitor circuit forming material having a three-layer structure is obtained by processing using an etching method or the like. The internal capacitor layer forming material of the printed wiring board referred to in the present invention is expressed as having a configuration in which a dielectric layer is provided between the first conductive layer used for forming the upper electrode and the second conductive layer used for forming the lower electrode. The first conductive layer and the second conductive layer are processed so as to form a capacitor circuit by etching or the like, and used as a constituent material of an electronic material such as a printed wiring board.

[0004] The dielectric layer is insulating and accumulates a certain amount of electric charge. Various methods are employed for forming such a dielectric layer.

[0005] For example, Patent Document 2 describes a process of depositing an amorphous SrTiO-based thin film on a substrate at a temperature lower than 400 ° C, using the chemical vapor phase reaction method, and the amorphous SrTiO Thin

3 3 The film is crystallized by laser annealing or rapid thermal annealing.

3 A manufacturing method including a step of obtaining a thin film is disclosed. The purpose of the dielectric layer obtained by this method is to obtain an SrTiO-based thin film having a high dielectric constant.

Three

[0006] Next, in Patent Document 3, any sputtering method on a substrate is described as using a sputtering vapor deposition method. In a thin film capacitor in which a lower electrode, a high-dielectric constant dielectric, and an upper electrode are stacked on a layer, the high-dielectric constant dielectric is a polycrystal having a crystal grain and grain boundary force, and has a plurality of valences. A thin film capacitor is disclosed, which contains a metal ion that can be contained as an impurity and contains the impurity at a higher concentration in the vicinity of the crystal grain boundary than in the crystal grain. It is disclosed that Mn ions are suitable as possible metal ions. Thin film capacitors obtained by this method have long-term reliability and a long time to breakdown.

[0007] Further, in Patent Document 4, the sol-gel method is used, and after oxidizing the surface of the substrate, an oxide dielectric thin film using a metal alkoxide as a raw material is formed on the substrate. A method for manufacturing a dielectric thin film is disclosed. Here, the oxide dielectric that can be formed as a thin film is a metal oxide having dielectric properties, for example, LiNbO 2, Li B

3 2 4

〇, PbZrTiO, BaTiO, SrTiO, PbLaZrTiO, LiTaO, Zn〇, Ta〇 etc.

7 3 3 3 3 3 2 5 The oxide dielectric thin film obtained by this method is an oxide dielectric thin film having excellent orientation and crystallinity.

In particular, the formation of a dielectric layer using the sol-gel method disclosed in Patent Document 4 is a vacuum process compared to the formation of a dielectric layer using a chemical vapor reaction method (CVD method) or a sputtering deposition method. There is also an advantage that it is easy to form a dielectric layer on a substrate having a large area. In addition, since it is easy to make the components of the dielectric layer have a theoretical ratio and an extremely thin dielectric film can be obtained, it is expected to be a technique for forming a large-capacity capacitor layer.

[0009] Patent Document 1: Japanese Translation of Special Publication 2002-539634

Patent Document 2: Japanese Patent Laid-Open No. 06-140385

Patent Document 3: Japanese Patent Laid-Open No. 2001-358303

Patent Document 4: Japanese Patent Application Laid-Open No. 07-294862

Disclosure of the invention

Problems to be solved by the invention

However, the dielectric layer using the sol-gel method has advantages and disadvantages. Its advantages are that it can form a ω wide area dielectric layer, and (i) generally essential for large-capacity capacitor layers. It can be mentioned that it can be formed as a very thin dielectric film.

[0011] On the other hand, the disadvantages are (I) the problem of short circuit between the upper electrode and the lower electrode when the capacitor is formed due to the thinness of the film and the presence of gaps between the oxide particles. There are cases where the leakage current may increase and the production yield is low, and (II) the change in the ambient temperature causes a large change in the capacitance and the like, and the temperature characteristics are lacking.

[0012] From the above, in the market, it is possible to improve the temperature characteristics of oxide dielectric layers such as BST-based dielectric layers and reduce the leakage current. The demand has increased.

Means for solving the problem

[0013] Therefore, the inventors of the present invention, as a result of earnest research, have significantly improved the temperature characteristics of the printed circuit board as a capacitor circuit and formed an internal capacitor layer in the printed circuit board that can reduce leakage current. I came up with the material. Hereinafter, the present invention will be described.

[0014] Built-in capacitor layer forming material of printed wiring board according to the present invention: The built-in capacitor layer forming material of the printed wiring board according to the present invention is a layer including a dielectric layer between an upper electrode forming layer and a lower electrode forming layer. It is characterized in that it has a configuration and its dielectric layer strength is composed of various types of layers. This dielectric layer is characterized by being a multilayered oxide dielectric layer comprising a manganese-free layer, a manganese-less oxide dielectric layer, and a manganese-containing oxide dielectric layer.

[0015] The manganese-containing oxide dielectric layer of the built-in capacitor layer forming material of the printed wiring board according to the present invention is composed of n (2≤n) first sub-dielectric layers to n-th sub-dielectric layers. It is also preferable that the first sub-dielectric layer is a manganese-containing dielectric layer, and a part of the second sub-dielectric layer to the n-th sub-dielectric layer does not contain manganese.

[0016] In the built-in capacitor layer forming material for a printed wiring board according to the present invention, the manganese-containing oxide dielectric layer preferably has a thickness of 10 nm to 500 nm.

[0017] The thickness of the dielectric layer of the built-in capacitor layer forming material of the printed wiring board according to the present invention is preferably 201111 to 1111.

[0018] The lower electrode forming layer of the built-in capacitor layer forming material of the printed wiring board according to the present invention is preferably a nickel layer or a nickel alloy layer having a thickness of 1 μm to 100 m. [0019] Further, the upper electrode forming layer of the built-in capacitor layer forming material of the printed wiring board according to the present invention has a nickel layer, a copper layer, a nickel alloy layer, a copper alloy layer having a thickness of 0.5 m to 50 m. It is preferable to have a laminated structure of any of these or a combination thereof.

[0020] The dielectric layer of the built-in capacitor layer forming material of the printed wiring board according to the present invention is preferably resin-impregnated.

[0021] A method for manufacturing a built-in capacitor layer forming material for a printed wiring board according to the present invention: In the above-described manufacturing method for a built-in capacitor layer forming material for a printed wiring board according to the present invention, Either a gas phase chemical reaction method or a sol-gel method is used.

[0022] The method for producing a built-in capacitor layer forming material for a printed wiring board according to the present invention includes manganese on the lower electrode forming layer using any one of a physical vapor deposition method, a gas phase chemical reaction method, and a sol-gel method. A manganese-free oxide dielectric layer is formed, and a manganese-containing oxide dielectric layer is formed on the manganese-less oxide dielectric layer using a physical vapor deposition method, a gas phase chemical reaction method, or a sol-gel method. Thus, a multilayer oxide dielectric layer is formed, and an upper electrode forming layer is formed on the multilayer oxide dielectric layer.

[0023] In addition, when manufacturing a built-in capacitor layer forming material for a printed wiring board having a resin-impregnated dielectric layer, a physical vapor deposition method, a gas phase chemical reaction method, or a sol-gel method is used on the lower electrode forming layer. The manganese-free oxide dielectric layer is formed by using the slippery! /, And the physical vapor deposition method, the gas phase chemical reaction method, the sol-gel method V, the slippery method is formed on the manganeseless oxide dielectric layer. A manganese-containing oxide dielectric layer is used to form a multilayered oxide dielectric layer, and at least one of the manganese-less oxide dielectric layer or the manganese-containing oxide dielectric layer is impregnated with resin. It is preferable to adopt a method for producing a built-in capacitor layer forming material for a printed wiring board, characterized in that a resin-impregnated dielectric layer is formed and an upper electrode forming layer is formed on the multilayer oxide dielectric layer. .

[0024] Then, in the method for producing a built-in capacitor layer forming material for a printed wiring board having a resin-impregnated dielectric layer, the resin impregnation treatment is performed by applying a resin varnish to the surface of the dielectric layer and impregnating the resin layer, drying the resin, It is preferable to cure the resin.

[0025] Further, the method for producing a built-in capacitor layer forming material for a printed wiring board according to the present invention! / The multilayer oxide dielectric layer is formed by a sol-gel method, and is preferably obtained through the following steps a to f.

[0026] Step a: A first sol-gel solution for forming an unfired manganese-less dielectric layer and a manganese-free sub-dielectric layer is prepared.

Step b: Prepare a second sol-gel solution for forming a sub-dielectric layer containing manganese.

Step c: A first sol-gel solution is applied to the surface of the lower electrode formation layer, and then dried, and thermally decomposed in an oxygen-containing atmosphere to form an unfired manganese-less dielectric layer.

Step d: After applying the second sol-gel solution to the surface of the unfired manganese-less dielectric layer, drying and thermally decomposing in an oxygen-containing atmosphere are performed once to form the first unfired sub-dielectric layer. Form.

Step e: Then, after applying the first sol-gel solution or the second sol-gel solution! /, Either one of them is dried and then thermally decomposed in an oxygen-containing atmosphere as one unit step. By repeating (n-1) times, the second unfired subdielectric layer to the nth unfired subdielectric layer containing manganese in some or all layers are formed.

Step f: Multi-layer structure oxide having a manganese-free oxide dielectric layer containing no manganese and a manganese-containing oxide dielectric layer containing manganese by firing the unfired dielectric layer obtained in the above step Final firing is performed to form the dielectric layer.

[0027] Then, when the multilayer oxide dielectric layer is formed using a sol-gel method, in the step d and the step e, it is optionally 550 ° C to 800 ° prior to the process of one unit step. It is also preferable to provide a pre-baking treatment with C.

Furthermore, it is preferable to use a solution for forming an oxide dielectric film having a perovskite structure containing 0.01 mol% to 5.00 mol% of manganese as the second sol-gel solution.

[0029] Printed wiring board according to the present invention: A printed wiring board having a built-in capacitor layer obtained by using the built-in capacitor layer forming material of the printed wiring board according to the present invention described above has an electrostatic property. Excellent temperature characteristics, low leakage current, and high quality.

The invention's effect [0030] The built-in capacitor layer forming material of the printed wiring board according to the present invention includes a multilayer oxide oxide dielectric layer of manganeseless oxide dielectric layer / manganese-containing oxide dielectric layer. By using this capacitor layer forming material for the formation of the built-in capacitor circuit of the printed wiring board, the capacitor circuit formed by processing this capacitor layer forming material can be made to have a high height / average capacitance density, leakage current suppression, temperature As a result, it is possible to provide a printed wiring board on which a built-in capacitor layer having a very balanced electrical characteristic is formed. In particular, the temperature dependency of the capacitance density can be reduced and the effect of reducing the leakage current can be achieved.

[0031] Further, in the method for producing a built-in capacitor layer forming material for a printed wiring board according to the present invention, as a result, the dielectric layer has a multilayer structure of manganeseless oxide dielectric layer / manganese-containing oxide dielectric layer. However, it is possible to use any manufacturing method as long as possible. In particular, it is preferably applied to the formation of a BST-based dielectric film by the Zorgel method.

BEST MODE FOR CARRYING OUT THE INVENTION

[0032] Hereinafter, the form of the built-in capacitor layer forming material of the printed wiring board according to the present invention, the form of the manufacturing method thereof, and each form of the printed wiring board including the built-in capacitor layer will be described, and examples and comparative examples will be shown. Hereinafter, the built-in capacitor layer forming material of the printed wiring board is simply referred to as “capacitor layer forming material”.

[0033] Form of capacitor layer forming material according to the present invention: The capacitor layer forming material according to the present invention basically has a layer structure including a dielectric layer between an upper electrode forming layer and a lower electrode forming layer. FIG. 1 illustrates a schematic cross-sectional view so that the layer configuration of the dielectric layer 2 can be clearly seen in the layer configuration of the capacitor layer forming material 1 according to the present invention. As can be seen from FIG. 1, the dielectric layer between the upper electrode forming layer 5 and the lower electrode forming layer 6 is characterized by being composed of two layers. This dielectric layer 2 is a multilayer oxide oxide dielectric layer comprising a manganese-free oxide dielectric layer 3 and a manganese-containing oxide dielectric layer 4 that do not contain manganese.

[0034] First, the term oxide dielectric layer will be described. The oxide dielectric layer here refers to BaTiO, SrTiO, BaSrTiO, PbZrTiO, PbLaTiO

3 3 3 3 3

PbLaZrO, PbCaZrTiO, SrBi Ta O, etc.

3 3 2 2 9

It is a formed layer. When manganese is contained in the oxide dielectric layer, manganese is likely to exist mainly in the form of manganese oxide in the oxide dielectric layer. Manganese is considered to be present in the grain boundaries and grains of the oxide dielectric layer. Such manganese contributes to the reduction of leakage current in the performance as a capacitor circuit obtained by processing the capacitor layer forming material. The mechanism for reducing the leakage current is considered as follows. There is a high possibility that the leak current of the dielectric layer is generated through crystal grain boundaries and lattice defects of the oxide dielectric film. Therefore, it seems that the leakage current flow path is blocked by including manganese in the grain boundaries and grains of the oxide dielectric film.

[0036] Addition of manganese to the oxide dielectric layer also contributes to an improvement in temperature characteristics. The mechanism is not clear, but is considered as follows. When high temperature is applied during the production of an oxide dielectric layer due to the addition of manganese, the crystal grain growth is inhibited, the crystal grain size of the oxide dielectric layer becomes smaller, and it seems to exhibit paraelectric characteristics that are difficult to exhibit ferroelectric properties. I think to become. Also, manganese segregates at the grain boundary part, and manganese that does not have ferroelectric properties is arranged around the core that exhibits ferroelectric properties so that it forms a shell, and a pseudo core-shell structure is taken! /, It ’s not for the purpose! /

[0037] However, when manganese is uniformly contained in the entire oxide dielectric layer, the dielectric constant tends to greatly decrease. Therefore, the dielectric layer in the case of force is often unable to satisfy the required capacity density even if the temperature characteristics are good. Therefore, the force that would require a thinner and wider area dielectric layer, and the more severe such a requirement, the lower the productivity, so it is not suitable for mass production. On the other hand, when no manganese is contained in the oxide dielectric layer, the dielectric constant changes greatly due to temperature change, and even if it shows good dielectric properties at room temperature, it does not show good dielectric properties at high temperatures. There is a tendency that stable temperature characteristics cannot be obtained. Here, what is simply described as temperature characteristics is a characteristic in which the average capacitance density of the capacitor circuit changes in response to temperature changes. For example, when used as a capacitor circuit of a printed wiring board of a computer or the like that generates a lot of heat, the quality as a capacitor circuit varies depending on the temperature. Therefore, circuit design is also difficult.

[0038] Therefore, the dielectric layer does not contain a certain thickness of manganese! /, A manganese-less oxide dielectric layer ( Hereinafter, it is simply referred to as “manganese-less oxide dielectric layer”. ) To form a multilayer oxide dielectric layer with a manganese-containing oxide dielectric layer, thereby reducing the leakage current and improving the temperature characteristics.

[0039] The manganese-containing oxide dielectric layer is preferably composed of n (2≤n) first to n-th sub-dielectric layers. Each of the plurality of layers constituting the manganese-containing oxide dielectric layer 4 is referred to as a “sub-dielectric layer”, and each sub-dielectric layer is referred to as a first sub-dielectric layer to an n-th sub-dielectric layer. This sub-dielectric layer can be confirmed by observing the cross section with a scanning electron microscope or the like at a stage where it can be used as a dielectric layer of a capacitor circuit, for example. Note that the first sub-dielectric layer to the n-th sub-dielectric layer indicate sub-dielectric layers at positions counted in order from the lower electrode side.

[0040] It is also possible to configure the first sub-dielectric layer as a layer containing manganese, and a part or all of the subsequent second sub-dielectric layer to n-th sub-dielectric layer as a layer not containing manganese. . The layer design may be changed as appropriate in consideration of the required quality and usage environment when used as a capacitor circuit. FIGS. 2 (a) to 2 (c) show a part of the layer structure of the capacitor layer forming material according to the present invention other than that shown in FIG. 1 by clearly seeing the layer structure of the dielectric layer 2. As schematically illustrated, In this figure, the sub-dielectric layers constituting the manganese-containing oxide dielectric layer 4 are shown separately as a manganese-containing sub-dielectric layer m and a sub-dielectric layer n not containing manganese. It should be noted that in all of the drawings used for the explanation here, the layer thickness and the like do not relatively reflect the actual product thickness.

[0041] The manganese-containing oxide dielectric layer described above is necessary to obtain the effect of reducing the temperature dependence of the capacitance density and reducing the leakage current. The thickness is preferably 10 nm to 500 nm. When the thickness of the manganese-containing oxide dielectric layer is less than 1 Onm, it becomes difficult to reduce the temperature dependence of the capacitance density. On the other hand, if the thickness of the manganese-containing oxide dielectric layer exceeds 500 nm, the effect of improving the temperature characteristics will not become more significant, and it will be difficult to maintain a high capacity density.

[0042] The dielectric layer of the capacitor layer forming material according to the present invention preferably has a thickness of 20 nm to 1 m. The smaller the thickness of the dielectric layer, the higher the capacitance. But, When the thickness of the dielectric layer is less than 20 nm, even if a manganese-containing oxide dielectric layer is provided, the effect of suppressing the leakage current is lost, and the breakdown voltage characteristics are inferior and dielectric breakdown occurs early, resulting in longer life. I can't. On the other hand, from the viewpoint of maintaining a high electric capacity, the upper limit is about l ^ m.

[0043] From the relationship between the thickness of the above-described manganese-containing oxide dielectric layer and the thickness of the dielectric layer, the thickness of the manganless oxide dielectric layer can be naturally derived. The role of this manganese-less dielectric layer is necessary to make a dielectric layer that exhibits a high dielectric constant. This manganese-less oxide dielectric layer is preferably present immediately above the lower electrode.

Here, the amount of manganese contained in the dielectric layer will be described. As a whole dielectric layer, the manganese content is preferably in the range of 0.01 mol% to 5.00 mol%. When the amount of the manganese is less than 0.01 mol%, manganese is not sufficiently segregated at the crystal grain boundaries of the oxide dielectric layer, and a good leakage current blocking effect and good withstand voltage characteristics cannot be obtained. Yes. On the other hand, if the amount of manganese exceeds 5.00 mol%, manganese segregation to the crystal grain boundaries of the oxide dielectric layer becomes excessive, the dielectric layer becomes brittle and toughness is lost. Problems such as dielectric layer breakdown occur due to an etchant shower or the like when processing the shape and the like, and as a result, it is difficult to obtain a good leakage current blocking effect and a good withstand voltage characteristic. Therefore, by adopting an oxide dielectric film composition containing manganese in the above-described range, the withstand voltage characteristics are improved, the leakage current is further reduced, and the long life is achieved. More preferably, the amount of manganese contained in the oxide dielectric layer is 0.25 mol% to 3.00 mol%. This is to ensure the quality as an oxide dielectric layer containing manganese more reliably. The manganese content referred to in the present invention shall be ABO.

3 represents the oxide dielectric material, the manganese content mol% when the total amount of component A and component B is 100 mol%.

Next, the lower electrode forming layer of the capacitor layer forming material according to the present invention is preferably a nickel layer or a nickel alloy layer having a thickness of 1 μm to 100 m. These nickel layers or nickel alloy layers are preferred because they have the following advantages (1) to (4).

Yes

[0046] (1) Available as a metal foil, an oxide dielectric layer on the surface of the foil as it is Can be formed.

(2) Excellent oxidation resistance and anti-softening properties against severe thermal history when employing a method of forming an oxide dielectric layer that is subjected to high temperature load such as sol-gel method.

(3) The adhesiveness with the oxide dielectric layer can be controlled by changing the nickel alloy composition.

(4) By using the base metal layer, it becomes easy to form a fine capacitor circuit when forming the lower electrode shape by etching.

[0047] The nickel layer or nickel alloy layer here is mainly intended to use a metal foil. Therefore, the nickel layer is a layer formed of a pure nickelo foil having a so-called purity of 99 wt% (other unavoidable impurities) or higher. The nickel alloy layer is a layer formed using, for example, a nickel monolin alloy. The phosphorus content of the nickel-phosphorus alloy mentioned here is preferably 0.1 wt% to 1 wt%. The phosphorus component of the nickel-phosphorus alloy layer diffuses into the oxide dielectric layer when it is subjected to a high temperature load in the manufacturing process of the capacitor layer forming material and the normal manufacturing process of the printed wiring board. It is thought that the adhesion with the layer is deteriorated and the dielectric constant is also changed. However, the nickel-phosphorus alloy layer with the appropriate phosphorus content improves the electrical characteristics of the capacitor. When the phosphorus content is less than 0.1 wt%, it becomes the same as when pure nickel is used, and the significance of alloying is lost. On the other hand, if the phosphorus content exceeds l lwt%, phosphorus segregates at the interface with the oxide dielectric layer, the adhesiveness deteriorates, and peeling easily occurs. Accordingly, the phosphorus content is preferably in the range of 0.1 wt% to 1 wt%. In order to secure more stable adhesion between the nickel-phosphorus alloy layer and the oxide dielectric layer, there is a certain variation in the manufacturing process if the phosphorus content is in the range of 0.2 wt% to 3 wt%. Even with this, stable adhesion can be obtained. Of the oxide dielectric layers, the BST-based dielectric layer can ensure the best adhesion when the phosphorus content is 0.25 wt% to lwt%, and at the same time, can ensure a good dielectric constant. The phosphorus content in the present invention is a value converted as [P component weight] / [Ni component weight] X 100 (wt%).

[0048] The nickel foil and the nickel alloy foil referred to in the present invention include all those obtained by a rolling method and an electrolytic method. It is described as a concept including a composite foil provided with these nickel or nickel alloy layers on the outermost layer of the metal foil. For example, metal substrate As a material constituting the composite material, a composite material having a nickel layer or a nickel alloy layer on the surface of the copper foil may be used.

[0049] The metal base material having such a composition is deteriorated in strength even after a high temperature processing process of 300 ° C to 400 ° C used in a printed wiring board manufacturing process using a fluororesin substrate, a liquid crystal polymer, or the like as a substrate material. There is almost no. As a result, even if the oxide dielectric layer is formed on the surface of the metal foil by using a method of forming an oxide dielectric layer that is subjected to high temperature load such as a sol-gel method, there is almost no deterioration in the quality. . The crystal structure of the nickel foil and nickel alloy foil referred to in the present invention is preferably such that the crystal grains are as fine as possible and the strength is improved. More specifically, it is preferable that the average crystal grain size is refined to a level of 0.5 m or less and has high mechanical properties with high mechanical strength.

[0050] The thickness of the nickel layer or nickel alloy layer as the lower electrode forming layer is 1

〃 m˜; preferably 100 m. If the thickness is less than 1 m, the reliability as an electrode when a capacitor circuit is formed is remarkably lacking, and it becomes extremely difficult to form an oxide dielectric layer on the surface. On the other hand, there is almost no practical requirement for a thickness exceeding 100 m. In addition, when manufacturing a capacitor circuit forming material, if the thickness of the lower electrode forming layer is 10 m or less, handling becomes difficult. Accordingly, it is preferable that the metal foil constituting the lower electrode forming layer is a metal foil with a carrier foil bonded to the carrier foil via a bonding interface. The carrier foil may be removed at a subsequent stage after processing into the capacitor layer forming material according to the present invention.

[0051] The nickel foil or nickel alloy foil for the lower electrode forming layer described above can be produced by an electrolytic method or a rolling method. There are no particular limitations on these production methods.

[0052] Furthermore, the upper electrode forming layer of the capacitor layer forming material according to the present invention uses any one of a nickel layer, a copper layer, a nickel alloy layer, and a copper alloy layer having a thickness of 0.5 m to 50 m. I can do it. In order to minimize damage to the dielectric layer due to the etching solution when the capacitor circuit is formed by etching after forming the upper electrode, the upper electrode forming layer is generally formed as a thin layer. If the upper electrode formation layer is less than 0. δ πι, it is difficult to ensure film thickness uniformity by any manufacturing method. As a result, it becomes impossible to obtain a sufficient resistance against the pressure of the press working. On the other hand, if the upper electrode formation layer exceeds 50 m, the time required for etching to form the upper electrode circuit becomes longer, and the dielectric layer tends to be significantly damaged by the etching solution.

[0053] It is also preferable that at least a part of the dielectric layer of the capacitor layer forming material according to the present invention is impregnated with a resin. The resin varnish component used for this resin impregnation is preferably a resin composition using an epoxy resin as a main ingredient. Among them, it contains 40 wt% to 70 wt% of epoxy resin, 20 wt% to 50 wt% of polybutacetal resin, 0.1 wt% to 20 wt% of melamine resin or urethane resin, based on the total amount of resin components, It is preferable to use a resin composition in which 5 wt% to 80 wt% of the epoxy resin is a rubber-modified epoxy resin.

[0054] The epoxy resin used here can be used without particular limitation as long as it is commercially available for molding laminated boards and the like and electronic parts. For example, bisphenol A type epoxy resin, bisphenol F type epoxy resin, nopolac type epoxy resin, o-cresol nopolac type epoxy resin, triglycidyl isocyanurate, N, N-diglycidyl diphosphorine Glycidylamine compounds such as diglycidyl ester tetrahydrophthalate, and brominated epoxy resins such as tetrabromobisphenol A and diglycidyl ether. These epoxy resins are preferably used alone or in combination. The degree of polymerization and epoxy equivalent as an epoxy resin are not particularly limited.

[0055] The "curing agent" of the epoxy resin includes dicyandiamide, organic hydrazide, imidazoles, amines such as aromatic amines, phenols such as bisphenol A and brominated bisphenol A, phenolol. These include nopolacs such as pollac resins and cresol nopolac resins, and acid anhydrides such as phthalic anhydride. Further, one type of curing agent may be used alone, or two or more types may be used in combination. The amount of the curing agent added to the epoxy resin can be derived from the respective equivalents.

[0056] In addition, a curing accelerator may be appropriately added as necessary. As this curing accelerator, tertiary amine, imidazole-based, urea-based curing accelerator and the like can be used.

[0057] The amount of the epoxy resin blended in the resin composition is 40% of the total amount of the resin components. % To 70% by weight is preferred. If the blending amount is less than 40% by weight, the insulating properties and heat resistance as electrical characteristics deteriorate. On the other hand, if it exceeds 70% by weight, the resin flow during curing becomes too large, and the resin component tends to be unevenly distributed in the dielectric layer.

[0058] It is preferable to use a rubber-modified epoxy resin as a part of the epoxy resin composition. This rubber-modified epoxy resin can be used without particular limitation as long as it is a product marketed for adhesives or paints. Specific examples include "EPICLON TSR-960" (trade name, manufactured by Dainippon Ink and Company), "EPOTOHTO YR-102" (trade name, manufactured by Tohto Kasei Co., Ltd.), "Sumiepoxy ESC-500" (product) Name, manufactured by Sumitomo Chemical Co., Ltd.) and "EPOMIK VSR 3531" (trade name, manufactured by Mitsui Petrochemical Co., Ltd.). These rubber-modified epoxy resins may be used alone or in combination of two or more. The compounding amount of the rubber-modified epoxy resin here is 5% to 80% by weight of the total epoxy resin amount. The use of rubber-modified epoxy resin promotes the fixing of resin components in the BST dielectric layer. Therefore, when the compounding power of the rubber-modified epoxy resin is less than 3% by weight, the effect of promoting fixing in the BST-based dielectric layer cannot be obtained. On the other hand, if the amount of the rubber-modified epoxy resin is more than 80% by weight, the heat resistance of the cured resin will decrease.

[0059] Then, the polybulacetal resin used in the epoxy resin composition is synthesized by the reaction of polyvinyl alcohol and aldehydes. At present, polybulal alcohols with various degrees of polymerization and reaction products of one or more aldehydes are commercially available for paints and adhesives as polybulacetal resins. Nyacetalization degree can be used without any particular limitation. The degree of polymerization of the raw polyvinyl alcohol is not particularly limited, but considering the heat resistance of the cured resin and the solubility in solvents, it is possible to use a product synthesized from the power of polybulal alcohol having a polymerization degree of 2000-3500. desirable. In addition, modified polybulucetal resins having a carboxyl group or the like introduced in the molecule are also commercially available! /, But can be used without particular limitation as long as there is no problem in compatibility with the combined epoxy resin. The amount of the polyvinyl acetal resin blended in the insulating layer is 20% to 50% by weight of the total resin composition. If the blending amount is less than 20% by weight, the effect of improving the fluidity as a resin cannot be obtained. On the other hand, if the amount exceeds 50% by weight, the water absorption rate of the insulating layer after curing is high. Therefore, it is extremely undesirable as a constituent material for the BST-based dielectric layer.

[0060] In addition to the above components, the resin composition used in the present invention preferably contains a melamine resin or a urethane resin as a cross-linking agent for the polybulacetal resin. As the melamine resin used here, an alkylated melamine resin commercially available for coating can be used. Specific examples include methylated melamine resins, n-butylated melamine resins, iso-butylated melamine resins, and mixed alkylated melamine resins. The molecular weight and alkylation degree as a melamine resin are not particularly limited.

[0061] As the urethane resin, a resin containing an isocyanate group in a molecule marketed for adhesives and paints can be used. Specific examples include polyisocyanate compounds such as tolylene diisocyanate, diphenylmethane diisocyanate, polymethylene polyphenyl polyisocyanate, trimethylolpropane, polyether polyol, polyester polyol, etc. There is a reaction product with polyols. Since these compounds may polymerize with moisture in an atmosphere with high reactivity as a resin, in the present invention, these resins are stabilized with phenols and oximes to prevent this problem. The use of a urethane resin called rock isocyanate is preferred.

[0062] The blending amount of the melamine resin or the urethane resin added to the resin composition in the present invention is 0.1 wt% to 20 wt% of the total amount of the resin composition. If the blending amount is less than 0.1% by weight, the effect of crosslinking of the polybulucetal resin is insufficient, the heat resistance of the dielectric layer is lowered, and if the blending amount exceeds 20% by weight, it is fixed in the dielectric layer. Deteriorates.

[0063] In addition to the above essential components, additives such as inorganic fillers typified by talc and aluminum hydroxide, antifoaming agents, leveling agents, and coupling agents are used in this resin composition as desired. You can also These improve the permeability of the resin component to the dielectric layer, and are effective in improving flame retardancy and reducing costs. The specific method of impregnation using the resin composition described above will be described in detail in the manufacturing method described later.

Form of manufacturing method of capacitor layer forming material according to the present invention: The manufacturing method of a capacitor layer forming material according to the present invention includes a physical vapor deposition method, a gas phase chemical reaction method, a Zogel method for forming a dielectric layer. Either of these is used. In some cases, the dielectric layer is impregnated with resin.

[0065] The capacitor layer forming material according to the present invention is manufactured by physical vapor deposition on the lower electrode forming layer. The method begins with the formation of a manganese-free oxide dielectric layer that does not contain manganese using any one of the chemical method, chemical vapor reaction method, and sol-gel method. The lower electrode formation layer is as described above. When physical vapor deposition is used to form this manganese-less oxide dielectric layer, resistance heating, electron beam (EB) vapor deposition, laser ablation, molecular beam epitaxy, bipolar sputtering, magnetron sputtering Or reactive sputtering can be used. In these physical vapor deposition methods, a necessary manganese-less oxide dielectric layer can be appropriately formed by arbitrarily adjusting the composition of the vapor deposition material. The chemical vapor reaction method involves reacting a plurality of vaporized materials in the gas phase and landing the reaction product on the lower electrode formation layer to form a manganese-less oxide dielectric layer. Includes all methods. The sol-gel method will be described in detail later.

[0066] For the manganese-containing oxide dielectric layer formed on the manganese-less oxide dielectric layer, any one of the physical vapor deposition method, the gas phase chemical reaction method, and the sol-gel method similar to the above may be used. ! / A combination of a manganese-less oxide dielectric layer and a manganese-containing oxide dielectric layer is referred to as a multilayer oxide dielectric layer.

[0067] Further, when manufacturing a capacitor layer forming material in which the dielectric layer formed by the above method is a resin-impregnated dielectric layer, it is composed of a manganese-less oxide dielectric layer and a manganese-containing oxide dielectric layer by the above method. The multilayer oxide dielectric layer is manufactured by impregnating the multilayer oxide dielectric layer with resin. Here, since the resin composition used for the resin impregnation has been described above, only the impregnation technique using the resin composition will be described here. From the viewpoint of reducing the leakage current, it is preferable to impregnate the dielectric layer with a resin.

[0068] This resin composition is used as a dilute resin varnish whose solid content is controlled within a certain range using a solvent so that the dielectric layer can be easily impregnated. Here, the resin varnish to be applied to the surface of the dielectric layer is obtained by dissolving the above resin component using an organic solvent to obtain a resin varnish having a solid content of 0.1 wt% to 1. Owt%. Here, when the solid content is less than 0.1 wt%, the viscosity is too low, the organic component does not remain in the dielectric layer, and the significance of resin impregnation is lost. On the other hand, if the solid content exceeds 1. Owt%, the resin impregnation process varies and the viscosity is too high when an excessive amount of resin is applied. Since the oil film is formed and the thickness of the dielectric layer is increased, the electric capacity density is lowered as a result.

Accordingly, the solid content of the resin varnish should be in the range of 0.1 wt% to 1. Owt% to ensure good permeability into the dielectric layer. The organic solvent can be used, for example, by using any one of ethylmethylketone and cyclopentanone or a mixed solvent thereof. Ethyl methyl ketone and cyclopentanone can be easily volatilized and removed efficiently by heating at about 190 ° C., and the volatile gas can be easily purified. Moreover, it is easy to adjust the viscosity of the resin solution to a viscosity most suitable for impregnating the dielectric layer. And it is more preferable from an environmental point of view to dissolve using a mixed solvent of ethylmethylketone and cyclopentanone. There is no particular limitation on the mixing ratio in the case of a mixed solvent. However, when cyclopentanone is used, it is preferable to use ethylmethylketone as the coexisting solvent in consideration of the volatilization removal rate. is there. However, in addition to the solvents specifically mentioned here, any solvent can be used as long as it can dissolve all the resin components used in the present invention.

[0070] Various methods can be employed to apply this resin varnish to the surface of the dielectric layer. However, the strength of the solid content of the resin varnish is extremely dilute as compared with a normal resin varnish. Therefore, it is preferable to apply the spin coating method from the viewpoint of maintaining the coating uniformity.

[0071] Next, as an example of a preferable method for manufacturing the capacitor layer forming material according to the present invention, a method for forming the BST-based multilayer oxide dielectric layer using a sol-gel method will be described. The following steps a to f will be sequentially described.

[0072] Step a: In this step, a first sol-gel solution for forming a sub-dielectric layer containing no manganese is prepared. An example is the case of preparing the first sol-gel solution for producing the desired BST-based dielectric film. Regarding this step, a commercially available preparation agent with no particular limitation may be used, or it may be blended by itself. As a result, it is only necessary to form a desired BST dielectric film. That is, the BST-based dielectric film is a (Ba Sr) TiO (0≤χ≤1) film and may be a sol-gel solution capable of obtaining a dielectric film containing this composition. Here, when X = 1, it means SrTiO, and when x = 0, it means BaTiO. In any case, the effect of the present invention is exhibited, but it is more preferable that 0≤x≤0.5. In the present specification, a Mn-added (Ba Sr) TiO (0≤x≤1) film may be referred to as a BST-based dielectric film.

Step b: In this step, a second zonore gel solution for forming a sub-dielectric layer containing manganese is prepared. The second sol-gel solution is preferably a solution for forming an oxide dielectric film having a perovskite structure containing 0.01 mol% to 5.00 mol% of manganese! /. This is to maintain an appropriate range of the manganese content in the dielectric layer. There are no particular restrictions on the preparation of the second sol-gel solution. A commercially available preparation containing manganese may be used, or it may be blended by itself. As a result, for example, a BST dielectric film containing desired manganese may be formed. As a method for adding manganese to the second sol-gel solution, it is preferable to use a manganese compound solution and add a predetermined amount so as to be in the range of the above-mentioned mangan content.

[0074] Step In this step, the first sol-gel solution is applied to the surface of the metal foil constituting the lower electrode forming layer, and then dried, and thermally decomposed in an oxygen-containing atmosphere to form an unfired manganese-less dielectric layer. To do. To describe this process in more detail, the first sol-gel solution is applied to the surface of the metal foil constituting the lower electrode forming layer, dried in an oxygen-containing atmosphere at 120 ° C. to 250 ° C., and oxygen An unfired manganese-less dielectric layer is formed through a series of steps in which pyrolysis is performed under conditions of 270 ° C. to 390 ° C. in a contained atmosphere. The film thickness of the unfired manganese-less dielectric layer can be adjusted by repeating this series of steps a plurality of times. In the case of forming a dielectric layer by the sol-gel method, since all layer configurations are completed and final firing is performed, the manganese-less dielectric layer before final firing is deliberately referred to as “unfired”. It is called “manganless dielectric layer”!

[0075] Then, the formation conditions of the unfired manganese-less dielectric layer will be described in more detail. The drying conditions for the first sol-gel solution applied to the surface of the lower electrode formation layer are 120 ° C to 250 ° C. It is preferable to employ a temperature of Further, the drying time is preferably 30 seconds to 10 minutes. If the drying conditions are not met, the dielectric film can be dried inadequately, resulting in roughening of the surface of the dielectric film after the subsequent thermal decomposition, or if the drying is excessive, the subsequent thermal decomposition reaction may become non-uniform. It becomes easy to produce the local quality variation. Do this dry There is no particular restriction on the atmosphere during the event. On the other hand, when the thermal decomposition is performed, it is preferably performed in an oxygen-containing atmosphere. That is, the decomposition of organic substances is not promoted when carried out in a reducing atmosphere.

[0076] Further, regarding the thermal decomposition, it is preferable that the drying is completed and the thermal decomposition is performed in an oxygen-containing atmosphere under the conditions of 270 ° C to 390 ° C x 5 minutes to 30 minutes. Here, the employed pyrolysis temperature is extremely characteristic. The conventional pyrolysis temperature has been in the range of 450 ° C to 550 ° C. On the other hand, in the present invention, a thermal decomposition temperature in a low temperature range of 270 ° C. to 390 ° C. is employed to prevent excessive oxidation of the lower electrode formation layer. Here, if the thermal decomposition temperature is less than 270 ° C, no matter how long heating is continued, good thermal decomposition is unlikely to occur, productivity is insufficient, and good capacitor characteristics cannot be obtained. On the other hand, the dielectric film is formed on the surface of a metal foil or the like, and when heating above 390 ° C., the oxidation of the metal substrate surface becomes remarkable at the interface between the dielectric film and the metal foil. Therefore, in consideration of process variations and quality safety in mass production, it is more preferable to set the upper limit of about 370 ° C, which is a lower temperature. The heating time is determined by the decomposition temperature used and the properties of the sol-gel solution. On the premise that the above heating temperature range is used, sufficient heat decomposition cannot be performed with heating for less than 5 minutes. Also, even if the heating temperature exceeds 30 minutes, improvement in quality as a dielectric film cannot be expected, and production takes time and productivity is reduced.

[0077] Here, the application of the sol-gel solution will be described. The means for applying the sol-gel solution to the surface of the metal foil is not particularly limited. However, it is preferable to use the meniscus method as the spin coat method as long as the uniformity of the film thickness and the characteristics of the sol-gel solution are taken into consideration.

[0078] Step d: In this step, a series of steps of applying the second sol-gel solution to the surface of the unfired manganese-less dielectric layer, drying and thermally decomposing in an oxygen-containing atmosphere are performed once. 1 Form an unfired subdielectric layer. The conditions for drying and pyrolysis in this case are the same as in the case of using the first sol-gel solution described above, and a description thereof is omitted here.

[0079] Step Then, either the first sol-gel solution or the second sol-gel solution is applied on the first unsintered subdielectric layer, and then dried and thermally decomposed in an oxygen-containing atmosphere. A series of processes is defined as one unit process, and this one unit process is repeated (n-1) times, so that the second unsintered sub-dielectric layer containing manganese in some or all layers to the nth unsintered sub-layer Form a dielectric layer. In other words, a series of processes consisting of sol-gel solution application → drying → thermal decomposition is called one unit process. Therefore, either the first sol-gel solution (manganese-free sol-gel solution) or the second sol-gel solution (manganese-containing sol-gel solution) is selectively used for this sol-gel solution. By repeating this one unit process a plurality of times (n-1), the film thickness can be adjusted as a manganese-containing dielectric layer. In the case of the method for forming an oxide dielectric layer according to the present invention, for example, the second sol-gel solution is used in at least one unit process from the first unit process to the n-1 first unit process. In the other unit process, a manganese-containing dielectric layer having a layer structure in which a BST-based dielectric film containing manganese and a BST-based dielectric film not containing manganese are arranged in layers by using the first sol-gel solution, etc. And can. The conditions for drying and pyrolysis in this case are the same as in the case of using the first sol-gel solution described above, and a description thereof is omitted here.

In the case of forming the multilayer oxide dielectric layer using a sol-gel method, in the step d and the step e, it is optionally performed at a temperature of 550 ° C. to 800 ° C. prior to the process of one unit step. It is also preferable to provide a pre-baking treatment. That is, when one unit process for forming the unfired manganese-less dielectric layer and the first unfired sub-dielectric layer to the n-th unfired sub-dielectric layer is repeated a plurality of times, An optional pre-baking treatment is provided. For example, in the case of repeating 1 unit process of 6 times, if 1 preliminary firing process is provided, 1 unit process (1st) → preliminary firing process → 1 unit process (2nd) → 1 unit Process (3rd) → 1 unit process (4th) → 1 unit process (5th) → 1 unit process ½th) is adopted. Then, if two firing steps are provided, 1 unit process (first time) → preliminary firing step → 1 unit process (second time) → 1 unit process (3rd time) → preliminary firing step → 1 unit process (4 1st process (5th time) → 1 unit process (6th time). Furthermore, if a firing process is provided between all 1 unit processes, 1 unit process (first time) → pre-baking process → 1 unit process (2nd time) → pre-baking process → 1 unit process (3rd time) → Pre-baking process → 1 unit process (4th) → Pre-baking process → 1 unit process (5th) → Pre-baking process → 1 unit process (6th) It becomes.

[0081] And, this pre-baking treatment condition adopts the firing condition of 550 ° C-800 ° CX for 2-60 minutes between 1 unit process and 1 unit process when repeating 1 unit process multiple times It is preferable to do this. Since these conditions are almost the same as in step e described below, the critical significance of the numerical values will be described in the explanation. It should be noted that, when the pre-baking, unfired dielectric layer that existed before there is force the fired dielectric layer ^s, dare in the sense that not doing the final firing denoted by the "unfired"! / RU

[0082] The crystal state of the dielectric film obtained by the conventional sol-gel method has fine crystal grains, and a large number of voids can be confirmed in the crystal grains. On the other hand, by adopting this pre-baking step, the structure of the dielectric film becomes a state in which the film density is high and dense, and there are few structural defects in the crystal grains. As a result, the leakage current is small, the voltage resistance is excellent, and a high-capacity dielectric layer can be formed. The thickness of the dielectric layer can be adjusted by the number of repetitions of one unit process in the process d described above.

[0083] Step f: In this step, the unfired manganese-less dielectric layer containing no manganese obtained in the above step and the unfired manganese-containing dielectric layer containing manganese in some or all of the sub-dielectric layers The final baking which forms a multilayer structure oxide dielectric layer by baking is performed. This final baking is preferably performed at a temperature of 600 ° C to 1000 ° C on the premise of a temperature higher than the pre-baking temperature. Furthermore, the firing time is preferably 5 to 60 minutes. This firing step is a so-called main firing step, and after this firing, a final dielectric layer is obtained. In this firing step, it is preferable to perform heating in an inert gas replacement atmosphere or vacuum in order to prevent oxidative degradation of the lower electrode formation layer. If the heating is less than the temperature condition at this time, firing is difficult, the adhesiveness with the lower electrode forming layer is excellent, and a dielectric layer having an appropriate density and a crystal structure with an appropriate grain size cannot be obtained. If excessive heating is performed exceeding this temperature condition, deterioration of the dielectric layer and deterioration of the physical strength of the lower electrode formation layer proceed, and it becomes impossible to achieve high capacitance and long life as capacitor characteristics. From this viewpoint, a more preferable upper limit temperature is 900 ° C.

When the formation of the dielectric layer is completed as described above, the upper electrode forming layer is provided on the dielectric layer. As a method of forming the upper electrode formation layer, a metal foil is used. It is possible to employ a method of bonding, a method of forming a conductive layer by a plating method, a method of sputtering deposition, or the like.

[0085] Printed wiring board according to the present invention: By using the capacitor layer forming material according to the present invention, it is possible to obtain a printed wiring board having a high-quality built-in capacitor layer. .

[0086] The capacitor layer forming material according to the present invention is formed by forming a capacitor circuit shape on the lower electrode forming layer and the upper electrode forming layer on both surfaces of the capacitor layer forming material by an etching method. Used as material. In addition, by using the nickel or nickel alloy described above for the lower electrode formation layer, it becomes possible to form a lower electrode with excellent adhesion to the BST-based dielectric layer, and the lower electrode is a material with excellent heat resistance. For this reason, even if hot pressing in the range of 300 ° C to 400 ° C is performed multiple times, oxidation deterioration does not occur and physical property changes hardly occur. With respect to the method of manufacturing a printed wiring board having a built-in capacitor circuit using the capacitor layer forming material according to the present invention, any method without particular limitation can be adopted.

Example

In this embodiment, the BST-based dielectric layer is formed on the surface of the nickel foil that is the base metal (lower electrode forming layer), and the upper electrode-forming layer is further provided on the surface of the BST-based dielectric layer. Capacitor layer forming material was manufactured. Then, a capacitor circuit was formed by an etching method using this capacitor layer forming material, and leakage current characteristics and the like were evaluated.

[0088] Production of base metal (lower electrode forming layer): Here, a 50-inch thick nickel foil produced by a rolling method was used. The thickness of the nickel foil manufactured by the rolling method is indicated by the gauge thickness. This nickel foil constitutes the lower electrode formation layer when it becomes the capacitor layer formation material.

[0089] Formation of dielectric layer: A dielectric layer was formed on the surface of the nickel foil using a sol-gel method. The Nikkenole foil before forming the dielectric layer by the Zonolegel method is heated at 250 ° C for 15 minutes as a pretreatment, and then heated at 250 ° C to remove the deposits etc. present on the nickel foil surface. Irradiated with UV light for 1 minute.

[0090] In step a, a first sol-gel solution was prepared. Here, Mitsubishi Materials Corporation Product name of BST thin film forming agent 7 wt% BST, Ba Sr TiO composition oxide

0. 7 0. 3 3

A dielectric film was obtained.

[0091] In step b, a second sol-gel solution was prepared. Here, the product name BST thin film forming agent 7wt% BST manufactured by Mitsubishi Materials Corporation, Mn-03 (Manganese (III) oxide 2.8wt% ~ 3.2wt%, turpentine oil 44wt%, manufactured by High Purity Chemical Laboratory Co., Ltd.) And strontium with ˜26 wt%, butyl acetate 22 wt% -24 wt%, ethyl acetate 7 wt% -8 wt%, organic stabilizers 10 wt% -l lwt%, and other viscosity modifiers). A second sol-gel solution containing 0.86 mol% manganese with respect to the total mol number with titanium was prepared. Then, an oxide dielectric film having a composition of (Ba Sr) (Ti Mn) O can be obtained.

0. 7 0. 3 1 0. 017 3

It was.

[0092] In step c, the first sol-gel solution is applied to the surface of the nickel foil by spin coating, dried at 150 ° CX for 2 minutes in an oxygen-containing atmosphere, and 330 ° CX in an oxygen-containing atmosphere. A series of processes for thermal decomposition was performed under conditions of 15 minutes, and pre-baking was performed at this stage in an inert gas replacement atmosphere at 650 ° C. for 15 minutes. At this stage, the manganese-less dielectric layer is about 50 nm thick and has been fired.

[0093] In step d, a manganese-containing second sol-gel solution is applied to the surface of the manganese-less dielectric layer, dried in an oxygen-containing atmosphere at 150 ° C. for 2 minutes, and then in an oxygen-containing atmosphere. The first unsintered subdielectric layer was formed by a series of processes (one unit process) in which pyrolysis was performed under the condition of ° CX for 15 minutes.

[0094] Step e: Then, one unit step is repeated on the first unsintered subdielectric layer to form a second unsintered subdielectric layer, and the inert gas replacement at 700 ° C. for 15 minutes is performed. Pre-baking treatment was performed in a nitrogen-substituted atmosphere (the same applies hereinafter).

[0095] Thereafter, the above one unit process was repeated three times to form a third unsintered subdielectric layer to a sixth unsintered subdielectric layer. At this time, since preliminary firing was performed between the second unsintered sub-dielectric layer and the third unsintered sub-dielectric layer, the cross-section of the capacitor layer forming material as the final product was observed with a transmission electron microscope. Has a structure of manganese-less oxide dielectric layer / manganese-containing oxide dielectric layer, and the manganese-containing oxide dielectric layer is observed to be composed of two first sub-dielectric layers and second sub-dielectric layers Is done. The first sub-dielectric layer is the first sub-dielectric layer. The first unfired sub-dielectric layer and the second unfired sub-dielectric layer are layers formed by subjecting to pre-firing. The second sub-dielectric layer is a layer formed by integrating the third unsintered sub-dielectric layer to the sixth unsintered sub-dielectric layer through preliminary firing. This state is shown as a schematic cross-sectional view in the column of the example of FIG.

[0096] Step f: A BST having a perovskite structure on the surface of the rolled nickel foil constituting the lower electrode forming layer is baked in an inert gas replacement atmosphere (nitrogen replacement atmosphere) at 750 ° CXI for 5 minutes. A system dielectric layer was formed.

[0097] Then, the entire BST dielectric layer was impregnated with resin, and a BST dielectric layer with resin impregnation was also prepared. At this time, a resin varnish is applied to the surface of the BST-based dielectric layer using a spin coating method, left at room temperature for 30 minutes, and heated in an oven at 150 ° C for 5 minutes to remove a certain amount of solvent. And dried to a semi-cured state. Then, it was cured by heating in a 190 ° C oven for 30 minutes. The thickness of the BST-based dielectric layer obtained at this time was about 3 OOnm.

[0098] The resin varnish used at this time was prepared as follows. Non-rubber modified epoxy resin (trade name: EPOMIC R-301, manufactured by Mitsui Petrochemical Co., Ltd.) 40 parts by weight, rubber modified epoxy resin (trade name: EPOTOHTOYR-102, manufactured by Toto Kasei) 20 parts by weight, polybulucetal resin (Product name: Denkabutyral # 5000A, manufactured by Denki Kagaku Kogyo Co., Ltd.) 30 parts by weight, Melamine resin (Product name: Yuban 20SB, Mitsui Toatsu Chemicals Co., Ltd.) 10 parts by weight, latent epoxy resin curing agent (Dicyandiamide, reagent) 2 parts by weight (added in a dimethylformamide solution with a solid content of 25% by weight), curing accelerator (trade name: Cuazo Nore 2E4MZ, manufactured by Shikoku Chemicals) 0.5 part by weight dissolved in ethyl methyl ketone Thus, a resin varnish having a solid content of 0.22 wt% is obtained.

[0099] <Formation of upper electrode>

As described above, on the BST-based dielectric layer (including the case with resin impregnation) formed on each sample, a copper upper electrode circuit having a thickness of 2 ^ 111 is attached only to the portion where the upper electrode is to be formed. It was directly formed by the sputtering deposition method, and 10 capacitor circuits with an upper electrode area of Imm x 1mm size were formed.

[0100] <Evaluation of dielectric properties> Temperature characteristics: When the signal frequency is 1MHz and the sample 1 is not impregnated with resin (from 55 ° C to 125 ° C), the change rate of the capacity density is from 14.7% to 10.0%, sample 1 When the resin impregnation was carried out (55 ° C ~; temperature range of 100 ° C), the change rate of the capacity density was -4.3% to 4.4%. The rate of change is based on the capacity density at 25 ° C. {[Capacity density at 25 ° C]-[Capacity density at x ° C]} / [Capacity density at 25 ° C ] X 100 (%). For measurement of the temperature characteristics, an impedance analyzer 4194A manufactured by HIEURED Packard was used.

[0101] Leakage current: As can be judged from the values in the table shown in Fig. 3, the BST dielectric layer without resin impregnation is compared with the resin impregnation. It can be seen that the current is relatively small.

[0102] Electrode yield: After the capacitor circuit was formed, a predetermined voltage was applied to the 10 capacitor circuits of each sample, and the rate at which no short-circuit phenomenon was observed between the upper electrode and the lower electrode was observed. As a result, the production yield of Imm x lmm size capacitor circuits was 100% in both the case without resin impregnation and the case with resin impregnation.

[0103] capacitance density capacity density when the electrode area of the upper electrode was set to lmm X lmm size, if 1383nF / cm ² without resin impregnation, the case 1096nF / cm ² and higher have capacitance of there resin impregnation Indicated.

[0104] Dielectric loss: When measuring the dielectric loss of the capacitor circuit when the electrode area of the upper electrode is lmm x lmm size, it is 0.146 (14.6%) without resin impregnation and with resin impregnation. It was 0 · 016 (1.6%).

[0105] The characteristics described above are listed in the table of Fig. 3 so that they can be compared with the comparative examples described later.

Comparative example

In this comparative example, as a force sol-gel solution that employs the same manufacturing flow as in Example 1, only the first sol-gel solution was used, and one unit process was performed 6 times, followed by final firing.

That is, the first sol-gel solution was applied to the surface of the rolled nickel foil used in Example 1, dried in an oxygen-containing atmosphere at 150 ° C. for 2 minutes, and then in an oxygen-containing atmosphere. A series of processes for thermal decomposition at 330 ° CXI for 5 minutes was defined as one unit process. And this 1 unit After performing the process once, perform pre-baking treatment in an inert gas replacement atmosphere at 650 ° CX for 15 minutes, then repeat one unit process twice and then reserve in an inert gas replacement atmosphere at 650 ° CX for 15 minutes A baking treatment was performed. Furthermore, film thickness adjustment was performed by repeating the 1 unit process three times.

[0108] Then, the sample was subjected to a final firing treatment in an inert gas replacement atmosphere (nitrogen replacement atmosphere) at 700 ° C for 15 minutes to form a manganese-free BST-based dielectric layer.

[0109] As in Example 1, the dielectric layer of Comparative Sample 1 was impregnated with resin, and a BST-based dielectric layer impregnated with resin was also prepared.

[0110] In the same manner as in Example 1, 10 capacitor circuits having an upper electrode area of lmm x 1mm size were formed on the BST-based dielectric layer formed on each sample by sputtering deposition.

[0111] <Evaluation of dielectric properties>

Temperature characteristics: The rate of change in capacity density was determined in the same manner as in Example 1. As a result, the rate of change in capacity density when the sample for comparison was not impregnated with resin (temperature range from 55 ° C to 125 ° C) was-35

8% ~; 11 · 3%.

[0112] Leakage current: As can be judged from the values shown in Fig. 3, the leakage current of the resin-impregnated one is compared with the case where the BST dielectric layer is not impregnated with the resin. Can be understood to be relatively small.

[0113] Electrode Yield: After the capacitor circuit was formed, in the same manner as in Example 1, a ratio in which no short-circuit phenomenon was observed between the upper electrode and the lower electrode was observed. As a result, the production yield of the lmm x lmm size capacitor circuit is the case without resin impregnation and with resin impregnation.

100%.

[0114] Capacity Density: initial capacity density when the electrode area of the upper electrode was set to lmm X lmm size, if without resin impregnation 1247nF / cm ^2, the case with the resin-impregnated 1120nF / cm ² and higher capacitance showed that.

[0115] Dielectric loss: When the dielectric loss of the capacitor circuit when the electrode area of the upper electrode is lmm x lmm size is measured, 0.029 (2.9%) without resin impregnation and with resin impregnation It was 0 · 021 (2. 1%). [0116] The characteristics described above are listed in the table of Fig. 3 so that they can be compared with the above-described examples.

[0117] <Comparison between Examples and Comparative Examples>

Temperature characteristics: As described above, the rate of change of the capacity density is smaller than the range of the rate of change of the comparative example, regardless of whether or not the resin is impregnated. I understand. Therefore, it can be said that the capacitor circuit using the BST-based dielectric layer to which the technical idea of the present invention is applied has little influence on the dielectric characteristics even if the ambient temperature atmosphere changes. Fig. 4 shows this change in temperature characteristics as a graph. This figure 4 shows the temperature rise and fall curves of the example (with two types of resin impregnation and without resin impregnation) and the comparative example (resin impregnation, rep!, ...). The difference in the remarkable change rate between the example and the comparative example.

[0118] Leakage current: As can be judged from the values in the table shown in Fig. 1, the BST dielectric layer without resin impregnation is compared with the resin impregnation. Current tends to be relatively small. This tendency is the same in the comparative example, and it can be seen that resin impregnation is effective in suppressing leakage current.

[0119] Electrode Yield: The production yield of the capacitor circuit including the BST-based dielectric layer according to the present invention is extremely good at 100% in both the case of no resin impregnation and the case of resin impregnation. On the other hand, in the comparative example, the production yield is 100% both in the case without resin impregnation and in the case with resin impregnation, and there is no difference in production yield. In both the examples and the comparative examples, it is considered that the production yield was stabilized because the preliminary firing was provided.

[0120] Capacity density: As can be judged from the values in the table shown in Fig. 3, the initial capacity density when the electrode area of the upper electrode is lmm x lmm size is almost the same as the example and the comparative example. It can be judged that.

[0121] Considering all of the above, a capacitor having a BST-type dielectric layer to which the technical idea according to the present invention is applied has a capacitance density equivalent to that of the comparative example. Considering other characteristics such as the above, it exceeds the comparative example and can be judged to be a very balanced product.

Industrial applicability [0122] The capacitor layer forming material according to the present invention is suitable for forming a built-in capacitor layer of a printed wiring board, and is capable of forming a high-quality capacitor circuit with high electric capacity, good temperature characteristics, and reduced leakage current. Make it possible. Therefore, printed wiring boards equipped with built-in capacitor circuits obtained by using this capacitor layer forming material can be used more stably for electronic and electrical products in which the change in electrical characteristics of the capacitor circuit due to temperature changes is small. Become. In addition, by adopting the method for manufacturing a capacitor layer forming material according to the present invention, it is possible to form a high-quality dielectric layer that has excellent temperature characteristics with good yield and can suppress leakage current. It is possible to stably supply the capacitor layer forming material. In addition, the method for manufacturing a capacitor layer forming material according to the present invention does not require excessive capital investment.

Brief Description of Drawings

FIG. 1 is a schematic cross-sectional view for explaining a basic layer configuration of a dielectric layer of a capacitor layer forming material according to the present invention.

FIG. 2 is a schematic cross-sectional view showing a noiration of the layer structure of the dielectric layer of the capacitor layer forming material according to the present invention.

FIG. 3 is a list of dielectric characteristics including a schematic cross-sectional view of a capacitor layer forming material including a BST-based dielectric layer formed using the technical idea of the present invention.

FIG. 4 is a diagram showing each temperature characteristic (rate of change in temperature) between an example and a comparative example.

Explanation of symbols

[0124] 1 Capacitor layer forming material

2 Dielectric layer

3 Manganese-less oxide dielectric layer

4 Manganese-containing oxide dielectric layer

5 Upper electrode formation layer

6 Lower electrode formation layer

Claims

The scope of the claims

[1] In a capacitor layer forming material having a dielectric layer between an upper electrode forming layer and a lower electrode forming layer,

The material for forming an internal capacitor layer of a printed wiring board, wherein the dielectric layer is a multilayer oxide oxide layer of a manganese-free layer, a manganese-less oxide dielectric layer, and a manganese-containing oxide dielectric layer.

[2] The manganese-containing oxide dielectric layer is composed of n (2≤n) first to n-th sub-dielectric layers, and the first sub-dielectric layer is a manganese-containing oxide dielectric layer. 2. The built-in capacitor layer forming material for a printed wiring board according to claim 1, wherein a part of the second sub-dielectric layer to the n-th sub-dielectric layer does not contain manganese.

[3] The material for forming a built-in capacitor layer of a printed wiring board according to claim 1 or 2, wherein the manganese-containing oxide dielectric layer has a thickness of 10 nm to 500 nm.

[4] The material for forming a built-in capacitor layer of a printed wiring board according to any one of claims 1 to 3, wherein the dielectric layer has a thickness of 201 111 to 1 111.

5. The built-in capacitor layer forming material for a printed wiring board according to claim 1, wherein the lower electrode forming layer is a nickel layer or a nickel alloy layer having a thickness of 1 m to 100 m.

[6] The upper electrode forming layer has a laminated structure of a nickel layer, a copper layer, a nickel alloy layer, a copper alloy layer having a thickness of 0.5 m to 50 m, or a combination thereof. 6. A built-in capacitor layer forming material for a printed wiring board according to claim 1.

7. The built-in capacitor layer forming material for a printed wiring board according to any one of claims 1 to 6, wherein the dielectric layer is a resin-impregnated dielectric layer impregnated with resin.

[8] A method for producing a capacitor layer forming material comprising a dielectric layer between an upper electrode forming layer and a lower electrode forming layer,

A manganese-free oxide dielectric layer is formed on the lower electrode formation layer by using any one of physical vapor deposition, gas phase chemical reaction, and sol-gel method.

Physical vapor deposition, gas phase chemical reaction, sol-gel on the manganese-less oxide dielectric layer A multilayer oxide dielectric layer is formed by forming a manganese-containing oxide dielectric layer using any of the methods

A method of manufacturing a built-in capacitor layer forming material for a printed wiring board, wherein an upper electrode forming layer is formed on the multilayer oxide dielectric layer.

[9] A method for producing a capacitor layer forming material comprising a dielectric layer between an upper electrode forming layer and a lower electrode forming layer,

A manganese-containing oxide dielectric layer is formed on the manganese-less oxide dielectric layer using any one of physical vapor deposition, gas phase chemical reaction, and sol-gel method to form a multilayer oxide dielectric layer.

At least one of the manganese-less oxide dielectric layer or the manganese-containing oxide dielectric layer is impregnated with resin to form a resin-impregnated dielectric layer,

[10] In the method for producing a capacitor layer forming material according to claim 9,

10. The method for producing a built-in capacitor layer forming material for a printed wiring board according to claim 9, wherein the resin impregnation treatment is performed by applying and impregnating a resin varnish on the surface of the dielectric layer, drying the resin, and curing the resin.

[11] The multilayer oxide oxide layer according to any one of claims 8 to 10, which is formed by a sol-gel method, and is obtained through the following steps a to f. The manufacturing method of the built-in capacitor layer forming material of printed wiring board as described in any one of Claims 1-3.

Step a: Prepare the first sol-gel solution to form the unfired manganese-less dielectric layer and manganese! /, Sub-dielectric layer.

Step c: A first sol-gel solution is applied to the surface of the lower electrode formation layer, and then dried, and thermally decomposed in an oxygen-containing atmosphere to form an unfired manganese-less dielectric layer. Step d: After applying the second sol-gel solution to the surface of the unfired manganese-less dielectric layer, drying and thermally decomposing in an oxygen-containing atmosphere are performed once to form the first unfired sub-dielectric layer. Form.

[12] The built-in capacitor layer forming material for a printed wiring board according to claim 11, wherein, in the step d and the step e, a pre-baking treatment at 550 ° C. to 800 ° C. is optionally provided prior to the treatment of one unit step. Production method.

[13] The printed wiring according to claim 11 or 12, wherein the second sol-gel solution is a solution for forming an oxide dielectric film having a perovskite structure containing 0.01 mol% to 5.00 mol% of manganese. A method for producing a built-in capacitor layer forming material for a plate

[14] A printed wiring board comprising an internal capacitor layer obtained using the internal capacitor layer forming material for a printed wiring board according to any one of claims 1 to 7.