WO2008004426A1

WO2008004426A1 - Light emitting diode drive circuit

Info

Publication number: WO2008004426A1
Application number: PCT/JP2007/062137
Authority: WO
Inventors: Koichi Yamaguchi; Daisuke Suzuki
Original assignee: Mitsumi Electric Co., Ltd.
Priority date: 2006-07-07
Filing date: 2007-06-15
Publication date: 2008-01-10
Also published as: CN101485003A; JP2008016732A; CN101485003B

Abstract

A reference current unit (33) includes: a calculation amplifier (30) which controls a reference current so that a voltage generated by the reference current flowing in a resistor is identical to a constant reference voltage; and a first current mirror circuit which generates a first current based on the reference current. A current output unit of each channel includes: a second current mirror circuit which is configured together with a part of the reference current unit and generates a second current based on the first current; and a third current mirror circuit to which the second current is supplied and which generates a current proportional to the second current in response to one of the system switches which has turned ON. Each of the first, the second, and the third current mirror circuit is a 2-stage current mirror circuit formed by cascade connection.

Description

Specification

Light emitting diode drive circuit

Technical field

TECHNICAL FIELD [0001] The present invention relates to a light emitting diode driving circuit, and more particularly to a light emitting diode driving circuit that drives each of a plurality of arranged light emitting diodes.

Background art

As a means for exposing a photosensitive member in a printer or the like, there is one using an LED array in which light emitting diodes (hereinafter referred to as “LEDs”) are linearly arranged. As a drive circuit for driving each LED of such an LED array, there are those described in Patent Documents 1 and 2, for example.

FIG. 1 shows a circuit configuration diagram of an example of a conventional light emitting diode driving circuit. This drive circuit is a semiconductor integrated circuit.

In FIG. 1, the reference voltage Vref is applied from the reference voltage source 11 to the inverting input terminal of the operational amplifier 10. The output terminal of the operational amplifier 10 is connected to the gate of a p-channel MOS field effect transistor (hereinafter simply referred to as “MOS transistor”) Ml and to the gate of a p-channel MOS transistor M2. The sources of MOS transistors Ml and M2 are connected to the power supply Vddl. MOS transistors Ml and M2 constitute a current mirror circuit.

[0005] The drain of the MOS transistor Ml is connected to the non-inverting input terminal of the operational amplifier 10 and is grounded via the resistor R1. The drain of the MOS transistor M2 is commonly connected to the drain of the n-channel MOS transistor M4. Commonly connected, the sources of the MOS transistors M4 and M5 are grounded, and the MOS transistors M4 and M5 constitute a current mirror circuit. Connected to the network. The gate of MOS transistor M6 is connected to the gates of p-channel MOS transistors M7 and M8 via switches 15 and 16 such as analog switches, respectively. Yes. The sources of the MOS transistors M6, M7, M8 are connected to the power supply Vdd2, the drains of the MOS transistors M7, M8 are connected to the anode of the LED (light emitting diode) 18, and the power sword of the LED1 8 is grounded!

Switches 15 and 16 are switched on and off in accordance with a gradation control switch control signal supplied from terminals 17a and 17b, respectively. MOS transistors M7 and M8 form a current mirror circuit with MOS transistor M6 when switches 15 and 16 are on. Switch 15 is turned on when the LED 18 emits light, and switch 16 is turned on when gradation expression is performed by increasing the light emission luminance of the LED 18.

Patent Document 1: Japanese Patent No. 3296882

Patent Document 2: Japanese Patent No. 2516236

Disclosure of the invention

Problems to be solved by the invention

In the conventional LED driving circuit, the potential at the point A, which is the drain of the MOS transistor Ml constituting the current mirror circuit, and the potential at the point B, the drain of the MOS transistor M2, are not the same potential. In addition, the drain-to-source voltages of both transistors are different, and the variation of the conduction voltage Vt of both transistors is about 10%. For this reason, the drain current of the MOS transistor Ml and the drain current of the MOS transistor M2 do not become the ratio of the gate areas of the two transistors, and there is a problem that the accuracy of the current mirror is poor.

[0010] In addition, there is a problem that the accuracy of the current mirror is similarly poor even when other current mirror circuits constituted by the MOS transistors M4 and M5 and the MOS transistors M6, M7 and M8 are used. For this reason, even if the reference current Iref is constant, there is a problem that the current flowing through the LED 18 varies and the light emission luminance of the LED 18 varies.

The present invention has been made in view of the above points, and an object of the present invention is to provide a light emitting diode drive circuit that can suppress fluctuations in light emission luminance of the light emitting diode.

Means for solving the problem

[0012] A light emitting diode driving circuit of the present invention generates a reference current unit that generates a reference current and a plurality of systems of on / off control to generate a plurality of systems of drive current proportional to the reference current, thereby generating the light emitting diode. A light emitting diode consisting of multiple channels of current output The reference current unit includes an operational amplifier that controls the reference current so that a voltage generated when the reference current flows through a resistor is the same as a constant reference voltage, and the reference current A first current mirror circuit that generates a first current based on the first current mirror circuit, wherein the current output unit of each channel is configured together with a part of the reference current unit, and a second current based on the first current A second current mirror circuit for generating a current, and a current proportional to the second current corresponding to a switch that is turned on among the switches of the plurality of systems, and is supplied with the second current A third current mirror circuit is provided, and each of the first, second, and third current mirror circuits is a cascaded two-stage current mirror circuit, thereby suppressing variations in light emission luminance of the light emitting diode. This Can.

[0013] In the light emitting diode drive circuit, a resistor may be provided between each of the transistors constituting the first and third current mirror circuits connected to the high voltage power source and the high voltage power source. it can.

[0014] In the light emitting diode drive circuit, a resistor can be provided between each of the transistors constituting the second current mirror circuit connected to the low voltage side power supply and the low voltage side power supply.

[0015] In the light emitting diode drive circuit, the current output portions for the plurality of channels are arranged side by side in one direction, and a power supply wiring is disposed on the current output portion for the plurality of channels in one direction. A slit is formed in each channel so as to open and surround a part of the contact region of each channel connecting the power supply wiring and the current output portion of each channel. Can do.

The invention's effect

[0016] According to the present invention, it is possible to suppress fluctuations in the light emission luminance of the light emitting diode.

Brief Description of Drawings

FIG. 1 is a circuit configuration diagram of an example of a conventional light emitting diode driving circuit.

FIG. 2 is a block configuration diagram of an embodiment of an LED array device using the light emitting diode driving circuit of the present invention.

FIG. 3 is a circuit configuration diagram of an embodiment of a light-emitting diode driving circuit according to the present invention.

FIG. 4 is a circuit configuration diagram of a modification of the embodiment of the light-emitting diode driving circuit according to the present invention. FIG. 5 is a plan view of an example of a semiconductor integrated circuit.

FIG. 6 is an equivalent circuit diagram of an example of a semiconductor integrated circuit.

FIG. 7 is an equivalent circuit diagram of another example of the semiconductor integrated circuit.

FIG. 8 is a plan view of an embodiment of a semiconductor integrated circuit in the light emitting diode driving circuit of the present invention.

FIG. 9 is an equivalent circuit diagram of one embodiment of a semiconductor integrated circuit.

Explanation of symbols

[0018] 30 operational amplifier

31 Reference voltage source circuit

32 Reference current section

33, 35 Voltage source

36, 38, 40 switches

44 1 to 44 m Current output section

45— 1 to 45— m LED

50 Power supply wiring

51— 1 to 51— m Contact area

55— 1 to 55— m Slit

M11 to M28 MOS transistors

R11 ~ R18, Ra, Rb resistance

Vddl, Vdd2 power supply

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0020] <Configuration of LED array drive circuit>

FIG. 2 shows a block diagram of an embodiment of an LED array device using the light emitting diode driving circuit of the present invention. This LED array device has, for example, a 48-channel configuration.

In FIG. 2, shift register 20 is supplied with, for example, 6-bit light emission time data for 8 channels in time series for 1 channel, and is sequentially shifted and latched by shift register 20. After that, it is supplied to the pulse width modulation circuit 22. The pulse width modulation circuit 22 generates a light emission pulse having a pulse width indicated by the light emission time data for each channel, and supplies the light emission pulses for 48 channels to the LED array drive circuit 26.

[0022] One channel is supplied to the shift register 24 in a time series of, for example, 6-bit light emission luminance data power of 8 channels, sequentially shifted and latched by the shift register 24, and then supplied to the LED array drive circuit 26 Is done. The LED array drive circuit 26 decodes the light emission luminance data for each channel to generate n system switch control signals, and determines the MOS transistor to be turned on by the light emission pulse for each channel based on the n system switch control signals. . The LED array drive circuit 26 drives the 48-channel LEDs constituting the LED array 28 in units of channels.

[0023] <Configuration of LED driving circuit>

FIG. 3 is a circuit configuration diagram of an embodiment of a light-emitting diode driving circuit according to the present invention. This drive circuit is a semiconductor integrated circuit.

In FIG. 3, the reference voltage Vref is applied from the reference voltage source circuit 31 to the inverting input terminal of the operational amplifier 30. The output terminal of the operational amplifier 30 is connected to the gates of the p-channel MOS transistors Mil and M12. The sources of the MOS transistors Mil and M12 are connected to the power supply Vddl via the resistors Rl l and R12, respectively, to form a current mirror circuit. The drains of the MOS transistors Mil and Ml2 are connected to the sources of the p-channel MOS transistors M13 and M14, respectively.

[0025] The gates of the MOS transistors M13 and M14 are commonly connected to the drain of the MOS transistor M13 to form a current mirror circuit, and the drain of the MOS transistor M13 is connected to the non-inverting input terminal of the operational amplifier 30. Is connected to one end of a resistor R13. The other end of the resistor R13 is grounded.

Here, the MOS transistors Ml 3 and M14 cascade-connected to the MOS transistors Mil and M12 operate in the active region, and the gate-source voltage Vgs becomes substantially the same. Therefore, the potential at the point A that is the drain of the MOS transistor M1 constituting the current mirror circuit and the potential at the point B that is the drain of the MOS transistor M12 are substantially the same potential. For this reason, the drain-source voltage Vds of the MOS transistors Mil, M12 is substantially the same. In addition, the resistance values of the resistors Rl l and R12 connected to the sources of the MOS transistors Mi l and Ml 2 are selected to be, for example, about 100 times the conduction resistance of the MOS transistors Mi l and M12. . For this reason, the variation in the conduction voltage Vt of the MOS transistors Mil and M12 is compressed to less than 1% of the case where the resistances Rl l and R12 are not present, and the variation in the conduction voltage Vt can be ignored.

Here, the drain current Id of the MOS transistors Mil and M12 is expressed by the equation (1). In addition,

λ and ιχ are proportional constants, W is the gate width, and L is the gate length.

[0029] Id = (l + λ -Vds) X (1/2) X, u X (W / L) X (Vgs-Vt) ² "-(1)

In equation (1), Vds of MOS transistors Mil and M12 are substantially the same, and variations in Vt can be ignored. For this reason, the drain currents of the MOS transistors Mil and M12 become the ratio of the gate areas of both transistors, and the accuracy of the current mirror is improved. It is connected. The gate of the MOS transistor M15 is connected to the gate of the n-channel MOS transistor M16 to form a current mirror circuit.

[0031] The sources of the MOS transistors M15 and M16 are connected to the drains of the n-channel MOS transistors Ml7 and M18, respectively. The gates of the MOS transistors M17 and M18 are commonly connected to the drain of the MOS transistor M15 to form a current mirror circuit, and the sources of the MOS transistors M17 and M18 are grounded.

Since the MOS transistors M15 to M18 are configured by cascading current mirror circuits, the source potentials of the MOS transistors M15 and M16 are substantially the same and the gate area is the same as the MOS transistors Ml1 to M14. In the same case, the drain currents of the MOS transistors Ml 5 and M 16 are substantially the same. The constant voltage Va is applied from the voltage source 33 to the gates of the MOS transistors M15 and M16, so that the drain potential of the MOS transistors M17 and M18 is Va-Vgsl (Vgsl is between the gate and drain of the n-channel MOS transistor). Voltage).

The operational amplifier 30, the reference voltage source circuit 31, the MOS transistors Ml 1 to M15 and M17 constitute a reference current unit 32, and a reference current Iref flows through the drain of the MOS transistor M13. In addition, it is connected to the drain of MOS transistor M16 by a current mirror circuit. A current proportional to the quasi-current Iref flows. Connected. The source of the MOS transistor M22 is connected to the drain of the p-channel MOS transistor M21. The source of the MOS transistor M21 is connected to the power source Vdd2 through the resistor R15.

[0035] The gate of the MOS transistor M21 is connected to the drain of the MOS transistor M22, and is connected to the gates of the p-channel MOS transistors M23, M25, and M27 via the switches 36, 38, and 40 such as analog switches, respectively. /! Then, the MOS transistors M23, M25, and M27 are turned on with the gate potentials of the MOS transistors M23, M25, and M27 set to be the same as the gate voltage of the MOS transistor M21. When the switches 36, 38, and 40 are turned off, the MOS transistors M23, M25, and M27 are turned off by setting the gate potential of the MOS transistors M23, M25, and M27 to the power supply voltage Vdd2.

[0036] The sources of the MOS transistors M23, M25, and M27 are connected to the power supply Vdd2 via resistors R16, R17, and R18, respectively. MOS transistors M23, M25, and M27 form a current mirror circuit with MOS transistor M21 when switches 36, 38, and 40 are on.

The gate of the MOS transistor M22 is connected to the gates of the p-channel MOS transistors M24, M26, M28. The drains of the MOS transistors M23, M25, M27 are connected to the sources of the MOS transistors M24, M26, M28, and the MOS transistors M22, M24, M26, M28 constitute a current mirror circuit.

[0038] MOS transistors M21 to M28 have a configuration in which current mirror circuits are cascaded, so that the drain potentials of MOS transistors M21, M23, M25, and M27 are substantially the same as MOS transistors Ml1 to M14. When the gate areas are the same, the drain currents of the MOS transistors M22, M24, M26, and M28 are substantially the same. Here, in order to perform gradation expression, for example, the gate area of MOS transistors M23 and M24 is 6 times that of MOS transistors M21 and M22, and the gate area of MOS transistors M25 and M26 is 3 times. The gate areas of the MOS transistors M27 and M28 are doubled, such as double. Note that a constant voltage Vb is applied from the voltage source 35 to the gates of the MOS transistors M22, M24, M26, and M28, and the source potential of the MOS transistors M22, M24, M26, and M28 is Vb + Vgs2 (Vgs2 is p-channel MOS transistor gate-drain voltage)

[0040] The switches 36, 38, and 40 are switched on and off in accordance with n (here, n = 3) switch control signals supplied from the terminals 37, 39, and 41, respectively. Note that n is not limited to 3. The drains of MOS transistors M24, M26, and M28 are connected to the anode of LED45-1, and the power sword of LED45-1 is grounded.

[0041] Here, when the switches 36, 38, 40 are off, the MOS transistors M23, M25, M27 are turned off and no current flows through the LED 45-1. When switch 36 is turned on, the drain current force SLED45-1 of MOS transistor M23 flows. When switches 36 and 38 are turned on, the sum of the drain currents of MOS transistors M23 and M25 flows to LED45-1. When switches 36, 38, and 40 are turned on, the sum of the drain currents of MOS transistors M23, M25, and M27 flows through LED 45-1. Therefore, the luminance of LED45-1 increases as the flowing current increases.

[0042] The switches 36, 38, 40 and the MOS transistors M16, M18 to M28 constitute the current output unit 44-1. LED45-1 is part of LED array 28.

[0043] The current output units 44 1 to 44 m for m (= 48) channels have the same configuration, and drive the LEDs 45-1 to 45-m for m channels.

[0044] As described above, since the accuracy of the current mirror of each current mirror circuit can be improved, it is possible to suppress fluctuations in the emission luminance of 1 ^: 045-1 to 45-111 of each channel.

[0045] <Modification of LED driving circuit>

FIG. 4 shows a circuit configuration diagram of a modification of the embodiment of the light-emitting diode driving circuit according to the present invention. In FIG. 4, the differences from FIG. 3 will be described. In Figure 4, MOS transistor M17

The source of M18 is grounded through resistors Ra and Rb. If the power supplies Vddl and Vdd2 are high-voltage power supplies, grounding can be said to be a low-voltage power supply.

[0046] In this case, the MOS transistors cascade-connected to the MOS transistors M17 and M18

M15 and M16 operate in the active region, and the gate-source voltage Vgs is substantially the same. But Therefore, the potential at the point C which is the drain of the MOS transistor M17 constituting the current mirror circuit is substantially the same as the potential at the point D which is the drain of the MOS transistor M18. For this reason, the drain-source voltage Vds of the MOS transistors Mil and M12 is substantially the same.

In addition, the resistance values of the resistors Ra and Rb connected to the sources of the MOS transistors M17 and Ml8 are selected to be, for example, about 100 times the conduction resistance of the MOS transistors M17 and M18. Therefore, the variation in the conduction voltage Vt of the MOS transistors M17 and M18 is compressed to less than 1% with respect to the absence of the resistors Ra and Rb, and the variation in the conduction voltage Vt can be ignored. As a result, the drain currents of the MOS transistors M17 and M18 become the ratio of the gate areas of both transistors, and the accuracy of the current mirror is improved.

Furthermore, in this modification, it is possible to suppress the influence of the aluminum-um wiring that constitutes the ground line of the semiconductor integrated circuit.

In the configuration of FIG. 3, the case where the current output unit 44-m is arranged farthest from the reference current unit 32 and the ground terminal of the semiconductor integrated circuit is provided in the vicinity of the current output unit 44-m. Think. In this case, the resistance value of several ohms is generated by the aluminum-umum wiring of the ground line. For this reason, the source of the MOS transistor M18 of the current output unit 44-m is directly grounded, whereas the source of the MOS transistor M17 of the reference current unit 32 is grounded through a resistance value of several Ω. Therefore, even if the gate areas of the MOS transistors M17 and M18 are the same, the drain current of the MOS transistor M18 in the current output section 44-m is different from the drain current of the MOS transistor M17 in the reference current section 32.

[0050] On the other hand, let us consider the case where the resistance values of the resistors Ra and Rb are several hundred Ω in the configuration of FIG. In this case, even if a resistance value of several Ω is generated by the aluminum wiring of the ground line between the current output section 44—m and the reference current section 32, the resistance Ra of several hundred Ω only increases by several Ω, Such a change in resistance value can be ignored. Further, the drain current of the MOS transistor M18 in the current output section 44 m can be regarded as the same as the drain current of the MOS transistor M17 in the reference current section 32. That is, the influence of the aluminum-um wiring of the ground line can be sufficiently suppressed.

[0051] Ku power supply wiring> FIG. 5 shows a plan view of an example of a semiconductor integrated circuit for the current output portions 441 to 44 m in the light emitting diode driving circuit of the present invention. In FIG. 5, the current output units 44-1 to 44-m are arranged in a line in the X direction. The power supply wiring 50 shown in the satin region extends in the X direction above the current output portions 44 l to 44-m, and supplies the power supply Vdd2 to the current output portions 44-1 to 44 m.

[0052] Each of current output portions 44 1 to 44 111 is provided with contact regions 51-1 to 51-m indicated by hatching! Contacts for connecting the resistors R15 to R18 of the current output units 44-1 to 44-m to the power supply Vdd2 are provided in the contact regions 51-1 to 51-m. The equivalent circuit of Fig. 5 is as shown in Fig. 6. In FIG. 6, Rx is the wiring resistance of the power supply wiring 50.

[0053] In this case, all of the switches 36, 38, and 40 are turned on in one current output unit among the current output units 44 1 to 44 m, and any one of the switches 36, 38, and 40 is turned on in the other current output units. Is turned on. That is, the patterns that turn on the switches 36, 38, and 40 are different in each of the current output portions 441 to 44111. For this reason, the voltage drop generated in each of the current output units 44-1 to 44-m is different, and the drive current of the LED45-l to 45-m driven by each of the current output units 44-l to 44-m is not stable. In other words, the emission brightness of LEDs 45-l to 45-m is not stable.

[0054] As shown in FIG. 7, it is also conceivable to supply the power supply Vdd2 to each of the current output units 44 1 to 44 m with individual power wirings 52 to 52 m. However, the feasibility is extremely low because the area where individual power supply lines 52 to 52m are provided is greatly increased. In FIG. 7, Rx to Rxm are wiring resistances of the power supply wiring 50.

FIG. 8 is a plan view of an embodiment of a semiconductor integrated circuit corresponding to current output portions 44 1 to 44 m in the light emitting diode driving circuit of the present invention. In FIG. 8, the current output units 44 1 to 44 -m are arranged in a line in the X direction. The power supply wiring 50 shown in the satin region is arranged extending in the X direction on the current output portion 44 1 to 44 m, and supplies the power supply Vdd2 to the current output portion 44 1 to 44 m.

[0056] Each of the current output portions 44 1 to 44 111 is provided with contact regions 51-1 to 51-m indicated by hatching! In the contact area 51— 1 to 51—m, the current output section 44— Contacts are provided to connect each resistor R15 to R18 to the power supply Vdd2. A power supply wiring 50 is provided above the contact regions 51-l to 51-m.

[0057] Further, around each of the contact regions 51-l to 51-m, slit portions 55-1 to 55-m in which the power supply wiring 50 is notched are provided, and the contact regions 51-1 to 51-m are A part (current inflow part) is opened and surrounded by the slit part 55-1 to 55- m. The slits 55 — 1 to 55-m are provided to limit the current flowing into the contact regions 51-1 to 51-m. The equivalent circuit of Fig. 8 is as shown in Fig. 9. In FIG. 9, Ry is the wiring resistance of the power supply wiring 50, and Rs is the equivalent limiting resistance due to the slit portions 55-1 to 55-m. In FIG. 8, the slits 55-1 to 55-m are the force that opens and surrounds the left side of the contact areas 51-1 to 51-m. The right side, the upper side, or the lower side of the contact area 51-l to 51-m. It may be a shape that opens and surrounds.

[0058] By providing the slit portions 55-l to 55-m, the current output portions 44-l to 44-m can be turned on even if the switches 36, 38, 40 are turned on differently. 44 Current flowing into 1 to 44 m is limited to a certain amount or less. For this reason, the voltage drop which generate | occur | produces in each of the current output part 44-1-l-44-m is restrict | limited.

[0059] As a result, the power supply voltage ¥ (1 (12 can be stabilized in each of the current output portions 44 1 to 44 111. The current output portions 44 1 to 44 with respect to the power supply voltage Vddl of the reference current portion 32 can be stabilized. m When each power supply voltage Vdd2 is stable, the current output section 44 1 to 44 m each drive LED45— 1 to 45 — m Each drive current is stable, and the LED45—1 to 45—m emission brightness is stable. Stabilize.

[0060] The slit portions 55-1 to 55-m open and surround a part (current inflow portion) of the contact region 51-1 to 51-m, but any portion can be freely selected. .

The MOS transistors Ml 1 to M14 correspond to the first current mirror circuit described in the claims, the drain current of the MOS transistor M14 corresponds to the first current, and the MOS transistors M15 to M18 are the first current mirror circuit. 2 corresponds to the current mirror circuit, the drain current of the MOS transistor M16 corresponds to the second current, and the MOS transistors M21 to M28 correspond to the third current mirror circuit. [0062] The present invention is not limited to the specifically disclosed embodiments described above, and various modifications and improvements may be made without departing from the scope of the present invention.

[0063] This application is based on priority application Japanese Patent Application No. 2006-188443 filed on Jul. 7, 2006, the entire contents of which are incorporated herein by reference.

Industrial applicability

The present invention is applicable to a light emitting diode driving circuit that drives each of a plurality of arranged light emitting diodes.

Claims

The scope of the claims

[1] A reference current section for generating a reference current and on / off control of multiple systems of switches to generate multiple channels of drive current proportional to the reference current and supply them to multiple LEDs A light-emitting diode driving circuit that has an output power,

The reference current unit includes an operational amplifier that controls the reference current so that a voltage generated when the reference current flows through a resistor is the same as a constant reference voltage;

A first current mirror circuit that generates a first current based on the reference current, wherein the current output unit of each channel is configured together with a part of the reference current unit,

A second current mirror circuit for generating a second current based on the current of 1,

A third current mirror circuit that is supplied with the second current and generates a current proportional to the second current corresponding to a switch that is turned on among the plurality of switches; Each of the second and third current mirror circuits is a cascaded two-stage current mirror circuit.

[2] The light-emitting diode driving circuit according to claim 1,

A light-emitting diode drive circuit comprising a resistor between each of the transistors constituting the first and third current mirror circuits connected to a high-voltage power supply and the high-voltage power supply .

[3] The light-emitting diode drive circuit according to claim 1 or 2,

A light-emitting diode driving circuit comprising: a resistor provided between each of the transistors constituting the second current mirror circuit and connected to a low-voltage power supply; and the low-voltage power supply.

[4] The light-emitting diode driving circuit according to claim 1 or 2,

The current output portions for the plurality of channels are arranged side by side in one direction, and the power supply wiring is arranged to extend in the one direction on the current output portions for the plurality of channels,

A light emitting diode driving circuit comprising: a slit formed by notching the power supply wiring so as to surround and open a part of a contact region of each channel connecting the power supply wiring and the current output portion of each channel. . In the light emitting diode drive circuit according to claim 3,

A light emitting diode driving circuit comprising: a slit formed by notching the power supply wiring so as to surround and open a part of a contact region of each channel connecting the power supply wiring and the current output portion of each channel. .