WO2007026424A1 - プラズマディスプレイパネル - Google Patents
プラズマディスプレイパネル Download PDFInfo
- Publication number
- WO2007026424A1 WO2007026424A1 PCT/JP2005/015920 JP2005015920W WO2007026424A1 WO 2007026424 A1 WO2007026424 A1 WO 2007026424A1 JP 2005015920 W JP2005015920 W JP 2005015920W WO 2007026424 A1 WO2007026424 A1 WO 2007026424A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- display area
- effective display
- pitch
- electrodes
- effective
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
- H01J11/10—AC-PDPs with at least one main electrode being out of contact with the plasma
- H01J11/12—AC-PDPs with at least one main electrode being out of contact with the plasma with main electrodes provided on both sides of the discharge space
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
- H01J11/20—Constructional details
- H01J11/22—Electrodes, e.g. special shape, material or configuration
- H01J11/24—Sustain electrodes or scan electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2211/00—Plasma display panels with alternate current induction of the discharge, e.g. AC-PDPs
- H01J2211/20—Constructional details
- H01J2211/22—Electrodes
- H01J2211/24—Sustain electrodes or scan electrodes
- H01J2211/245—Shape, e.g. cross section or pattern
Definitions
- the present invention relates to a plasma display panel (PDP), and more particularly to an electrode structure of a surface discharge type PDP.
- PDP plasma display panel
- plasma display panels can be displayed on television due to the development of colorization, and are attracting attention as the most promising candidates for large flat panel display devices.
- an AC-driven three-electrode surface discharge type PDP is known!
- This PDP is provided with a large number of display electrodes in the horizontal direction on the inner surface of one substrate (for example, the front surface or the display surface), and light is emitted on the inner surface of the other substrate (for example, the rear surface substrate).
- Many address electrodes for cell selection are provided in the direction intersecting the display electrode, and the intersection between the display electrode and the address electrode is defined as one cell (unit light emitting region).
- One pixel is composed of three cells: a red (R) cell, a green (G) cell, and a blue (B) cell.
- the display electrode of the front substrate is covered with a dielectric layer.
- the address electrode of the substrate on the back side is also covered with a dielectric layer, and a partition is formed between the address electrode and the address electrode. Between the partitions in the corresponding areas of the R cell, G cell, and B cell, respectively. Phosphor layers for R, G, and B are formed.
- Patent Document 1 Japanese Patent Laid-Open No. 10-241571
- Such a surface discharge PDP has a cell configuration in which an effective display area is provided at the center of the screen, and an ineffective display area is provided adjacent to the outside of the effective display area.
- This ineffective display area is provided in order to stably operate the discharge of the peripheral cells in the effective display area.
- This ineffective display area is directly connected to the width of the frame (housing frame) as a set. ing. In recent years, it has been desired that the width of the housing frame be as narrow as possible. Therefore, it is necessary to make the ineffective display area as narrow as possible.
- the present invention has been made in view of such circumstances, and the ineffective display area is narrowed by making the cell pitch of the ineffective display area smaller than the cell pitch of the effective display area.
- the present invention provides a display by arranging a pair of substrates facing each other, forming a plurality of electrodes extending in a certain direction on the inner surface of at least one substrate, and generating a surface discharge between adjacent electrodes.
- a plasma display panel constituting a screen, wherein the display screen includes an effective display area formed in a central portion of the screen and an ineffective display formed adjacent to the effective display area outside the effective display area.
- the plasma display panel is characterized in that the pitch of the electrodes in the non-effective display area is smaller than the pitch of the electrodes in the effective display area.
- FIG. 1 is an explanatory diagram showing a configuration of a PDP according to the present invention.
- FIG. 2 is an explanatory diagram showing a state in which the PDP of the present invention is viewed in a plane.
- FIG. 3 is an explanatory diagram showing a discharge state of the PDP in FIG. 2.
- FIG. 4 is a comparative example showing an electrode structure when the cell pitch of the non-effective display area is equal to the cell pitch of the effective display area.
- FIG. 5 is a comparative example showing an electrode structure when the cell pitch of the non-effective display area is equal to the cell pitch of the effective display area.
- substrates such as glass, quartz, and ceramics, and desired components such as electrodes, insulating films, dielectric layers, and protective films are formed on these substrates.
- substrate is included.
- the electrode may be formed by a plurality of electrodes extending in a certain direction on the inner surface of at least one substrate. And what is necessary is just to comprise a display screen by generating a surface discharge between adjacent electrodes.
- This electrode can be formed using various materials and methods known in the art. Examples of materials used for the electrodes include ITO and SnO.
- the electrode As a method for forming the electrode, various methods known in the art can be applied. For example, it may be formed by using a thick film forming technique such as printing, or by using a thin film forming technique such as a physical deposition method or a chemical deposition method! / ⁇ . Examples of thick film forming techniques include screen printing. Among thin film formation techniques, examples of physical deposition methods include vapor deposition and sputtering. Examples of chemical deposition methods include thermal CVD, photo-CVD, and some! /, Plasma CVD.
- the display screen has an effective display area formed at the center of the screen, and an ineffective display area formed adjacent to the effective display area outside the effective display area.
- the effective display area is an area where a surface discharge is generated and the actual screen is displayed, and the non-effective display area is a surface discharge voltage applied, but the surface discharge is not This is an area where only a black screen is displayed without being generated.
- a pair of substrates are arranged to face each other, a plurality of main electrodes are formed on the inner surface of one substrate, extending in a certain direction, and intersecting the plurality of main electrodes on the inner surface of the other substrate.
- a plurality of address electrodes are formed in this direction, and is mainly applied to a plasma display panel constituting a display screen by generating a surface discharge between adjacent main electrodes.
- the pitch of the main electrodes in the non-effective display area should be smaller than the pitch of the main electrodes in the effective display area.
- the pitch force of the address electrodes in the non-effective display area may be smaller than the pitch of the address electrodes in the effective display area.
- a partition wall is formed between the address electrodes of the other substrate, and the pitch force of the address electrodes in the ineffective display area is smaller than the pitch of the address electrodes in the effective display area and is in the ineffective display area.
- the pitch of the partition walls may be smaller than the partition wall pitch of the effective display area.
- the width of the main electrode in the non-effective display area is narrower than that of the main electrode in the effective display area, so that the surface discharge gap force between the main electrodes in the non-effective display area is reduced. It is desirable to have a configuration that is substantially equal to the surface discharge gap between the main electrodes in the effective display area.
- Fig. 1 (a) and Fig. 1 (b) are explanatory diagrams showing the configuration of the PDP of the present invention.
- Fig. 1 (a) is an overall view
- Fig. 1 (b) is a partially exploded perspective view.
- This PDP is an AC-driven 3-electrode surface discharge PDP for color display.
- the PDP 10 includes a front substrate 11 and a rear substrate 21.
- a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used as the substrate 11 on the front side and the substrate 21 on the back side.
- display electrodes X and display electrodes Y are arranged at equal intervals in the horizontal direction.
- the display line L is entirely between the adjacent display electrode X and display electrode Y.
- Each display electrode X, Y consists of a wide transparent electrode 12 such as ITO, SnO, etc., for example, Ag, Au, A
- Cu, Cr, and their laminated bodies are composed of a narrow bus electrode 13 made of metal that also has equal force.
- the desired number and thickness of Ag and Au can be obtained by using a thick film formation technology such as screen printing, and the others using thin film formation technology such as vapor deposition and sputtering, and etching technology. It can be formed with length, width and spacing.
- a display electrode X and a display electrode Y are arranged at equal intervals, and a display line L is formed between adjacent display electrodes X and Y, which is a so-called PDP having a so-called ALiS structure.
- the present invention can also be applied to a PDP having a structure in which the pair of display electrodes X and Y are arranged with a gap (non-discharge gap) where no discharge occurs.
- a dielectric layer 17 for alternating current (AC) driving is formed on the display electrodes X and Y so as to cover the display electrodes X and Y.
- the dielectric layer 17 is formed by applying a low melting point glass paste on the substrate 11 on the front side by screen printing and baking.
- Dielectric layer 17 may be formed by depositing a SiO film by plasma CVD! /.
- a protective film 18 is formed on the dielectric layer 17 to protect the dielectric layer 17 from damage caused by ion collision caused by discharge during display.
- This protective film is made of MgO.
- the protective film can be formed by a thin film forming process known in the art, such as electron beam evaporation or sputtering.
- a plurality of address electrodes A are formed on the inner side surface of the substrate 21 on the back side in a direction intersecting the display electrodes X and Y in plan view, and the dielectric layer 24 covers the address electrodes A. Is formed.
- the address electrode A generates an address discharge for selecting a light emitting cell at the intersection with the Y electrode, and is formed of a three-layer structure of CrZCuZCr.
- the address electrode A can be formed of Ag, Au, Al, Cu, Cr, or the like.
- address electrode A uses thick film formation technology such as screen printing for Ag and Au, and thin film formation technology and etching technology such as vapor deposition and sputtering for the others.
- the dielectric layer 24 can be formed using the same material and the same method as the dielectric layer 17.
- a plurality of stripe-shaped partition walls 29 are formed on the dielectric layer 24 between the adjacent address electrodes A and A.
- the shape of the barrier ribs 29 is not limited to this, and may be a mesh shape that divides the discharge space into cells.
- the partition wall 29 can be formed by a sandblasting method, a printing method, a photoetching method, or the like.
- a glass paste having a low melting point glass frit, a binder resin, a solvent and the like is applied on the dielectric layer 24 and dried, and then a cutting mask having an opening of a partition pattern on the glass paste layer. It is formed by spraying cutting particles in the state of providing, cutting the glass paste layer exposed at the opening of the mask, and further firing.
- a photosensitive resin is used as a binder resin, and it is formed by baking after exposure and development using a mask.
- the red (R), green (G), and blue (B) phosphor layers 28R, 28G, and 28B are formed on the side surfaces of the partition walls 29 and on the dielectric layer 24 between the partition walls.
- a phosphor paste containing phosphor powder, binder resin and solvent is screen printed in the concave discharge space between the barrier ribs 29 or by a method using a dispenser. It is formed by coating, repeating this for each color, and firing.
- This phosphor layer 28R, 28G, 28 ⁇ is formed by photolithography using a sheet-like phosphor layer material (V, so-called green sheet) containing phosphor powder, photosensitive material and binder resin. You can also. In this case, a sheet of a desired color is attached to the entire display region on the substrate, and exposure and development are performed. By repeating this for each color, a phosphor layer of each color can be formed between the corresponding barrier ribs. it can.
- the substrate 11 on the front side and the substrate 21 on the back side are arranged so that the display electrode X, ⁇ and the address electrode ⁇ intersect with each other, the periphery is sealed, and the partition wall 29
- the discharge space 30 surrounded by is filled with a discharge gas mixed with Xe and Ne.
- the discharge space 30 at the intersection of the display electrodes X and Y and the address electrode A is one cell (unit light emitting region) which is the minimum unit of display.
- One pixel consists of three cells, R, G, and B.
- a reset voltage is applied between all the display electrodes X and Y to generate a reset discharge (this period is generally called a reset period), and the charged state of each cell is made uniform.
- a scanning voltage is sequentially applied to the display electrode Y, and a voltage is applied to the desired address electrode ⁇ ⁇ in the meantime, so that a selective discharge is generated at the intersection of the display electrode Y and the address electrode A so that the light emitting cell Select this (this period is generally called the address period), and a display discharge is generated between the display electrode X and the display electrode Y by using the wall charge formed on the display electrode Y of the cell as the light is emitted.
- the selective discharge is a counter discharge between the address electrode A and the display electrode Y facing each other in the vertical direction, and the display discharge is a surface discharge between the display electrodes X and Y arranged in parallel on a plane.
- FIG. 2 is an explanatory view showing a state of the PDP viewed in a plane
- FIG. 3 is an explanatory view showing a discharge state of the PDP in FIG.
- FIG. 31 show the upper right part of the panel.
- An effective display area 31 is provided in the central portion of the panel, and an ineffective display area 32 is provided outside the effective display area 31 adjacent to the effective display area 31.
- the effective display area 31 is indicated by a dotted line.
- the outer frame of the non-effective display area 32 is indicated by a dashed line.
- the illustration is omitted.
- the scanning voltage is applied to the display electrode Y in the address period, but no voltage is applied to the address electrode A. Therefore, the non-valid display area At 32, no selective discharge is generated. Therefore, in the subsequent display period, even if a display voltage is applied to the display electrodes X and Y, the cells in the ineffective display area 32 do not emit light. In this way, the cells in the non-effective display area 32 perform black display without causing selective discharge.
- the pitch of the address electrodes A in the effective display area 31 is Pl
- the key of the ineffective display area 32 is When the pitch of the dress electrode A is P2, the relationship between the electrode pitch P1 and the electrode pitch P2 is P1> P2.
- the pitch of the partition walls 29 is the same as the pitch of the address electrodes A.
- the pitch of the partition walls 29 in the effective display area 31 is Rl and the pitch of the partition walls 29 in the non-effective display area 32 is R2
- the partition pitch R1 and the partition walls The relationship of pitch R2 is R1> R2.
- the discharge start voltage of the cells in the non-effective display area 32 is made substantially equal to the cells in the effective display area 31. Therefore, it is desirable to make the distance (discharge gap) between the display electrodes X and Y in the non-effective display area 32 equal to the discharge gap in the effective display area 31.
- the display electrodes X and Y in the non-effective display area 32 may be composed of only bus electrodes.
- the electrode width is made narrower than the address electrode A in the effective display area 31.
- the partition wall 29 in the non-effective display area 32 is also made narrower than the partition wall 29 in the effective display area 31.
- FIG. 4 and FIG. 5 are comparative examples, and show an electrode structure when the cell pitch of the non-effective display area 32 and the cell pitch of the effective display area 31 are equal.
- Fig. 4 is a diagram corresponding to Fig. 2
- Fig. 5 is a diagram corresponding to Fig. 3.
- the pitch of the display electrodes X and Y in the effective display area 31 is set to S1.
- the pitch of the partition walls 29 is the same as the pitch of the address electrodes A.
- the pitch of the partition walls 29 in the effective display area 31 is Rl and the pitch of the partition walls 29 in the non-effective display area 32 is R2
- the inactive display area 32 It has an electrode structure in which the cell pitch of RUBITCH and effective display area 31 is equal.
- FIG. 4 When FIG. 4 is compared with FIG. 2, the hatched portion in FIG. 2 is narrower. Similarly, when Fig. 5 is compared with Fig. 3, the shaded area in Fig. 3 is narrower.
- the pitch S2 of the display electrodes X and Y of the non-effective display area 32 and the pitch P2 of the address electrode A are changed to the pitch S1 of the display electrodes X and Y of the effective display area 31 and the pitch of the address electrode A.
- the area of the ineffective display area 32 is reduced, and the width of the frame of the display panel is reduced. Even if the cell pitch is reduced, the non-effective display area 32 performs black display as in the conventional case, so that the peripheral cells of the effective display area 31 can perform stable discharge.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Gas-Filled Discharge Tubes (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/065,298 US20090230863A1 (en) | 2005-08-31 | 2005-08-31 | Plasma Display Panel |
PCT/JP2005/015920 WO2007026424A1 (ja) | 2005-08-31 | 2005-08-31 | プラズマディスプレイパネル |
JP2007533095A JPWO2007026424A1 (ja) | 2005-08-31 | 2005-08-31 | プラズマディスプレイパネル |
TW094136158A TW200709247A (en) | 2005-08-31 | 2005-10-17 | Plasma display panel |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2005/015920 WO2007026424A1 (ja) | 2005-08-31 | 2005-08-31 | プラズマディスプレイパネル |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2007026424A1 true WO2007026424A1 (ja) | 2007-03-08 |
Family
ID=37808528
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2005/015920 WO2007026424A1 (ja) | 2005-08-31 | 2005-08-31 | プラズマディスプレイパネル |
Country Status (4)
Country | Link |
---|---|
US (1) | US20090230863A1 (ja) |
JP (1) | JPWO2007026424A1 (ja) |
TW (1) | TW200709247A (ja) |
WO (1) | WO2007026424A1 (ja) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001216906A (ja) * | 1999-11-24 | 2001-08-10 | Mitsubishi Electric Corp | 面放電ac型プラズマディスプレイパネル用基板、面放電ac型プラズマディスプレイパネル及び面放電ac型プラズマディスプレイ装置 |
JP2003203576A (ja) * | 1995-08-25 | 2003-07-18 | Fujitsu Ltd | 面放電型プラズマ・ディスプレイ・パネルの製造方法 |
JP2005010788A (ja) * | 2003-06-20 | 2005-01-13 | Lg Electronics Inc | プラズマディスプレイパネルの駆動装置及び方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3163563B2 (ja) * | 1995-08-25 | 2001-05-08 | 富士通株式会社 | 面放電型プラズマ・ディスプレイ・パネル及びその製造方法 |
JP3313298B2 (ja) * | 1997-02-24 | 2002-08-12 | 富士通株式会社 | プラズマディスプレイパネル及びその製造方法 |
KR100536198B1 (ko) * | 2003-10-09 | 2005-12-12 | 삼성에스디아이 주식회사 | 플라즈마 디스플레이 패널 |
KR100578912B1 (ko) * | 2003-10-31 | 2006-05-11 | 삼성에스디아이 주식회사 | 개선된 전극을 구비한 플라즈마 디스플레이 패널 |
KR100542221B1 (ko) * | 2003-11-26 | 2006-01-11 | 삼성에스디아이 주식회사 | 쇼트부에 전극 비형성부를 갖는 플라즈마 디스플레이 패널 |
-
2005
- 2005-08-31 WO PCT/JP2005/015920 patent/WO2007026424A1/ja active Application Filing
- 2005-08-31 JP JP2007533095A patent/JPWO2007026424A1/ja not_active Withdrawn
- 2005-08-31 US US12/065,298 patent/US20090230863A1/en not_active Abandoned
- 2005-10-17 TW TW094136158A patent/TW200709247A/zh unknown
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003203576A (ja) * | 1995-08-25 | 2003-07-18 | Fujitsu Ltd | 面放電型プラズマ・ディスプレイ・パネルの製造方法 |
JP2001216906A (ja) * | 1999-11-24 | 2001-08-10 | Mitsubishi Electric Corp | 面放電ac型プラズマディスプレイパネル用基板、面放電ac型プラズマディスプレイパネル及び面放電ac型プラズマディスプレイ装置 |
JP2005010788A (ja) * | 2003-06-20 | 2005-01-13 | Lg Electronics Inc | プラズマディスプレイパネルの駆動装置及び方法 |
Also Published As
Publication number | Publication date |
---|---|
US20090230863A1 (en) | 2009-09-17 |
JPWO2007026424A1 (ja) | 2009-03-05 |
TWI301629B (ja) | 2008-10-01 |
TW200709247A (en) | 2007-03-01 |
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