WO2007023881A1 - Method for forming electrode pattern, method for connecting electrode patterns, method for forming dye sensitized semiconductor electrode and photoelectric cell module - Google Patents

Method for forming electrode pattern, method for connecting electrode patterns, method for forming dye sensitized semiconductor electrode and photoelectric cell module Download PDF

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Publication number
WO2007023881A1
WO2007023881A1 PCT/JP2006/316562 JP2006316562W WO2007023881A1 WO 2007023881 A1 WO2007023881 A1 WO 2007023881A1 JP 2006316562 W JP2006316562 W JP 2006316562W WO 2007023881 A1 WO2007023881 A1 WO 2007023881A1
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WO
WIPO (PCT)
Prior art keywords
electrode
forming
electrode pattern
substrate
layer
Prior art date
Application number
PCT/JP2006/316562
Other languages
French (fr)
Japanese (ja)
Inventor
Hideo Kogure
Original Assignee
Kansai Paint Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2005245520A external-priority patent/JP2007056345A/en
Priority claimed from JP2005245915A external-priority patent/JP2007059322A/en
Priority claimed from JP2005245974A external-priority patent/JP2007059324A/en
Application filed by Kansai Paint Co., Ltd. filed Critical Kansai Paint Co., Ltd.
Publication of WO2007023881A1 publication Critical patent/WO2007023881A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01MPROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M14/00Electrochemical current or voltage generators not provided for in groups H01M6/00 - H01M12/00; Manufacture thereof
    • H01M14/005Photoelectrochemical storage cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G9/00Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/20Light-sensitive devices
    • H01G9/2068Panels or arrays of photoelectrochemical cells, e.g. photovoltaic modules based on photoelectrochemical cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G9/00Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/20Light-sensitive devices
    • H01G9/2027Light-sensitive devices comprising an oxide semiconductor electrode
    • H01G9/2031Light-sensitive devices comprising an oxide semiconductor electrode comprising titanium oxide, e.g. TiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01MPROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M4/00Electrodes
    • H01M4/02Electrodes composed of, or comprising, active material
    • H01M4/04Processes of manufacture in general
    • H01M4/0402Methods of deposition of the material
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/542Dye sensitized solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10Energy storage using batteries

Definitions

  • electrode pattern formation method electrode pattern connection method, dye-sensitized semiconductor electrode formation method, and photovoltaic module
  • the present invention relates to a method for forming electrode patterns, a method for connecting electrode patterns, a method for forming dye-sensitized semiconductor electrodes, and a photovoltaic module.
  • a substrate on which an electrode pattern is formed is widely used in photovoltaic cells, displays, and the like that convert light energy such as sunlight into electrical energy.
  • a photovoltaic cell such as an amorphous silicon photovoltaic cell or a dye-sensitized photovoltaic cell
  • a plurality of photovoltaic cells having a photoelectric conversion layer between a pair of substrates each formed with an electrode pattern made of a transparent conductive film or the like are connected to a wiring portion.
  • a photovoltaic module is configured by connecting in series or in parallel via
  • Patent Document 2 discloses a photovoltaic cell using a connecting member such as a soldered copper ribbon. A solar cell module that is electrically connected to each other is disclosed.
  • a connecting member such as a soldered copper ribbon.
  • a method for forming a dye-sensitized semiconductor electrode on an electrode pattern for example, a patent As disclosed in Reference 3, after forming a semiconductor electrode by coating a dispersion of titanium oxide fine particles on an electrode substrate and drying it, the electrode substrate is immersed in a dye solution and light is applied to the semiconductor electrode. Conventionally, a method for supporting a sensitizing dye is known. However, such a method cannot efficiently form a dye-sensitized semiconductor electrode and is not suitable for mass production.
  • Patent Document 1 Japanese Patent Laid-Open No. 8-330692
  • Patent Document 2 Japanese Patent Laid-Open No. 2005-101519
  • Patent Document 3 Japanese Patent Laid-Open No. 2002-216861
  • an object of the present invention is to provide an electrode pattern forming method excellent in mass productivity, a connection method between electrode patterns, a dye-sensitized semiconductor electrode forming method, and a photovoltaic module.
  • the object of the present invention is to provide an electrode pattern on a substrate using a main electrode forming mask in which a hot melt layer is covered with a coating layer made of a metal material and has a main electrode forming opening penetrating the front and back surfaces.
  • an electrode pattern forming method comprising a step of forming a main electrode pattern on the substrate by performing vapor deposition and a step of peeling off the main electrode formation mask.
  • the object of the present invention is achieved by a photovoltaic module in which a photoelectric conversion layer and a counter electrode are laminated on a main electrode pattern formed on a substrate by the electrode pattern forming method.
  • the object of the present invention is a method of electrically connecting a pair of electrode patterns arranged via an insulating layer, in a laminate in which a base film is bonded to a hot melt layer.
  • a bonding mask having a wiring portion forming hole penetrating the front and back surfaces is connected to the first substrate having the first electrode pattern formed on the front surface with respect to the wiring portion forming hole and the first electrode.
  • the object of the present invention is a photovoltaic module comprising a plurality of photovoltaic cells each having a photovoltaic conversion layer between the first electrode pattern and the second electrode pattern, wherein one photovoltaic cell is provided. And the second electrode pattern and force in the other photovoltaic cell are connected by the connection method between the electrode patterns, and this is achieved by the photovoltaic module.
  • the object of the present invention is a method of forming a dye-sensitized semiconductor electrode on an electrode pattern, wherein the hot melt layer is covered with a coating layer made of a metal material and penetrates the front and back surfaces.
  • a step of thermocompression bonding a semiconductor electrode forming mask having an opening to a substrate on which an electrode pattern is formed so that the opening and the electrode pattern are aligned; and a semiconductor electrode in the opening A method of forming a dye-sensitized semiconductor electrode, comprising: a step of filling a material; a step of supporting a photosensitizing dye on a semiconductor electrode material filled in the opening; and a step of peeling off the semiconductor electrode formation mask. Is achieved.
  • the object of the present invention is achieved by a photovoltaic module in which a counter electrode is laminated on a semiconductor electrode formed by the method for forming a dye-sensitized semiconductor electrode.
  • an electrode pattern formation method it is possible to provide an electrode pattern formation method, a connection method between electrode patterns, a dye-sensitized semiconductor electrode formation method, and a photovoltaic module that are excellent in mass productivity.
  • connection method between electrode patterns of the present invention reliable conduction between electrode patterns can be obtained.
  • FIG. 1 is a process sectional view showing an example of a process of forming a main electrode pattern on a substrate of a front electrode film.
  • FIG. 2 is a process sectional view showing an example of a process for forming an auxiliary electrode pattern on a substrate of a front electrode film.
  • FIG. 3 is a process perspective view showing an example of a process for continuously forming the main electrode pattern and the auxiliary electrode pattern on a substrate.
  • FIG. 4 is a process cross-sectional view illustrating an example of a process for forming a semiconductor electrode.
  • FIG. 5 is a cross-sectional view showing an example of a back electrode film.
  • FIG. 6 is a process cross-sectional view showing an example of a pre-process for forming a wiring portion and an electrolyte layer.
  • FIG. 7 is a process cross-sectional view illustrating an example of a process for forming a wiring portion and an electrolyte layer.
  • FIG. 8 is a cross-sectional view of a photovoltaic module according to an embodiment of the present invention.
  • FIG. 9 is a process cross-sectional view illustrating an example of an electrolyte layer formation and sealing process.
  • FIG. 10 is a process sectional view showing another method for forming a main electrode pattern using a main electrode formation mask.
  • FIG. 11 is a cross-sectional view of a main electrode formation mask used in still another method for forming a main electrode formation pattern.
  • FIG. 12 is a process cross-sectional view illustrating another method for forming an electrode pattern.
  • FIG. 1 (a) a base film 6 having an adhesive layer 2 formed on one surface and a coating layer 4 formed on the other surface is prepared, and the adhesive layer 2 is exposed on the exposed surface.
  • the hot melt layer 8 is bonded together to form a laminate 10 as shown in FIG. 1 (b).
  • a heat-resistant strong pressure-sensitive adhesive such as acrylic resin or urethane resin can be used.
  • the thickness of the pressure-sensitive adhesive layer 2 is not particularly limited and is, for example, 1 to 40 / ⁇ ⁇ .
  • the coating layer 4 is made of a metal material such as aluminum or copper, and protects the surface of the base film 6 during a subsequent cleaning process.
  • the thickness of the coating layer 4 is not particularly limited. For example, 1 to 50 ⁇ .
  • the base film 6 is a hard film formed of force such as polypropylene, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), nylon, and the thickness is 20
  • the hot menoleto layer 8 is, for example, a known polyester resin, polyamide resin, EVA resin, polyolefin resin, or the like in which a rosin or terpene tackifier is added. Things can be used.
  • the opening 12a is an opening for forming a main electrode, and has a shape corresponding to a main electrode pattern formed on a substrate 20 described later.
  • a main electrode forming mask 10a having 12a is obtained.
  • this main electrode formation mask 10 a is adhered onto the substrate 20.
  • PET polyethylene terephthalate
  • PE polyethylene naphthalate
  • Examples thereof include a resin film having high heat resistance and insulation such as N), and a glass substrate.
  • examples include cetyl cellulose and acrylic resin.
  • the main electrode forming mask 10a can be bonded to the substrate 20 by thermocompression using a thermocompression roller or the like, but the adhesive strength is increased by making the hot melt layer 8 in a semi-molten state. It is preferable to adjust so as not to be too much and to allow easy peeling between the hot melt layer 8 and the substrate 20.
  • the upper surface side of the substrate 20 is subjected to corona discharge treatment, excimer treatment, and the like to clean the portion exposed from the opening 12a on the substrate 20, and then conductive through the opening 12a.
  • a main electrode pattern 22a is formed on the substrate 20 as shown in FIG. 1 (e).
  • the main electrode formation mask 10 a is peeled between the hot melt layer 8 and the substrate 20.
  • Examples of physical vapor deposition for forming the main electrode pattern 22a include vacuum vapor deposition, sputtering, and ion plating. Also as a conductive vapor deposition material Illustrative examples include transparent materials such as ITO (indium tin oxide), FTO (fluorine-doped tin oxide), and ⁇ (antimond-type tin oxide).
  • the pattern shape of the main electrode pattern 22a is not particularly limited, and various shapes such as a strip shape, a rectangular shape, and a linear shape are possible, and a plurality of pattern part forces can be configured.
  • the auxiliary electrode pattern 22b is formed on the same substrate 20 using the auxiliary electrode formation mask 10b.
  • the auxiliary electrode pattern 22b can be created by the same procedure as the method for creating the main electrode pattern 22a described above.
  • the auxiliary electrode pattern 22b is used for forming the auxiliary electrode instead of the opening 12a for forming the main electrode. It is obtained by forming the opening 12b.
  • the auxiliary electrode forming mask 10b is aligned with the substrate 20 so that the opening 12b is disposed at a desired position with respect to the main electrode pattern 22a on the substrate 20. Then, the hot melt layer 8 is temporarily bonded to the substrate 20 in the same manner as described above. Then, by performing physical vapor deposition of the conductive vapor deposition material through the opening 12b, the auxiliary electrode pattern 22b is formed along the main electrode pattern 22a on the substrate 20, as shown in FIG. 2 (b). To do.
  • the material of the auxiliary electrode pattern 22b include metal materials such as platinum, gold, copper, silver, chromium, copper-chromium, and the like, which preferably have a lower resistance than the main electrode pattern 22a.
  • the force is formed linearly along both longitudinal edges of the main electrode pattern 22a.
  • the position and shape of the auxiliary electrode pattern 22b are not particularly limited.
  • the auxiliary electrode forming mask 10b is peeled off, whereby the front electrode in which the electrode pattern 22 composed of the main electrode pattern 22a and the auxiliary electrode pattern 22b is formed on the substrate 20 as shown in FIG. 2 (c). Film 30 is obtained.
  • the auxiliary electrode pattern 22b is formed! /, But the auxiliary electrode pattern 22b is formed first and then the main electrode pattern 22a is formed. It may be formed.
  • the auxiliary electrode formation mask 10b is adhered on the substrate 20 such as an electrode film and the auxiliary electrode pattern 22b is formed through the opening 12b
  • the auxiliary electrode forming mask 10b is peeled off.
  • the main electrode formation mask 10a is attached on the substrate 20 on which the auxiliary electrode pattern 22b is formed, and after the cleaning process such as the corona discharge treatment is performed on the substrate 20 through the opening 12a, the opening is formed.
  • a main electrode pattern 22a is formed through the portion 12a.
  • the auxiliary electrode pattern 22b is formed along the outer peripheral edge of the main electrode pattern 22a, and the main electrode pattern 22a is formed so as to be filled therebetween.
  • a semiconductor electrode material is vapor-deposited through the opening 12a, and as shown in FIG. 12 (d), a semiconductor layer 34a is deposited on the upper surface of the main electrode pattern 22a, and then the upper surface of the semiconductor layer 34a.
  • a semiconductor electrode material is applied to the semiconductor electrode 34 with a squeegee or the like to form a semiconductor electrode 34 as shown in FIG. Thereafter, the main electrode forming mask 10a is peeled off.
  • the semiconductor electrode 34 is formed in addition to the formation of the main electrode pattern 22a by using the main electrode formation mask 10a. Therefore, the main electrode forming mask 10a can also be used as a semiconductor electrode forming mask, thereby improving the manufacturing efficiency.
  • the formation of the semiconductor electrode 34 will be described in detail later.
  • the main electrode forming mask 10a can be peeled off by a force that can be performed between the hot melt layer 8 and the substrate 20, or by forming the adhesive layer 2 with a weak adhesive force.
  • the front electrode film 30 in which the hot melt layer 8 remains can also be produced as shown in FIG. 12 (f).
  • the auxiliary electrode pattern 22b may be provided with only the main electrode pattern 22a on the substrate 20, which is not always necessary. However, when the main electrode pattern 22a is made of, for example, ITO, the power loss increases as the length in the longitudinal direction increases. In this case, the auxiliary electrode pattern along the longitudinal direction of the main electrode pattern 22a. It is preferable to provide 22b. In this case, the surface resistance value of the auxiliary electrode pattern 22b is made smaller than the surface resistance value of the main electrode pattern 22a by forming the auxiliary electrode pattern 22b with a material having a lower resistance than the material of the main electrode pattern 22a. Set as follows.
  • the surface resistance value of the main electrode pattern 22a in use is set to 1
  • the surface resistance value of the auxiliary electrode pattern 22b is preferably 0.1 or less.
  • the surface resistance of the main electrode pattern 22a is 100 ⁇
  • the surface resistance of the auxiliary electrode pattern 22b made of platinum The value can be 3 ⁇ / mouth.
  • the formation of the electrode pattern 22 (the main electrode pattern 22a and the auxiliary electrode pattern 22b) on the substrate 20 can be performed continuously as follows, for example. First, as shown in a perspective view in FIG. 3 (a), tl ⁇ standing holes H are formed on both side edges of the film-like substrate 20 and the laminate 10, respectively. Forms a main electrode forming mask 1 Oa by providing a plurality of openings 12a at regular intervals along the longitudinal direction.
  • the substrate 20 and the main electrode formation mask 10a are respectively transported by the transport rolls 42 and 44, and as shown in FIG.
  • the main electrode forming mask 10 a is thermocompression bonded to the substrate 20.
  • Pressure is 0.5MPa and pressurization time is 2 seconds.
  • thermocompression-bonding rolls 46, 46 are provided with engagement portions S on both sides, and the alignment holes H of the substrate 20 and the main electrode forming mask 10a are engaged with the engagement portions S.
  • the alignment of the main electrode forming mask 10a in the width direction and the longitudinal direction is performed.
  • the alignment of the substrate 20 and the main electrode forming mask 10a is not limited to such a method. For example, alignment of alignment marks provided in place of the alignment hole H and the engaging portion S is performed. Is possible.
  • the substrate 20 and the main electrode formation mask 10a may be aligned by a cold roll having sprocket holes before passing through the thermocompression-bonding rolls 46, 46. It is possible to easily redo the case.
  • the substrate 20 is wound around a winding roll (not shown) in a state where the main electrode forming mask 10a is temporarily bonded, and then loaded into a physical vapor deposition apparatus such as a vacuum vapor deposition apparatus. Then, the film is drawn out again in the physical vapor deposition apparatus, and after physical vapor deposition is performed through the opening 12a, the main electrode formation mask 10a is peeled off by the adhesive roll 48 as shown in FIG. The main electrode pattern 22a remains.
  • a winding roll not shown
  • an auxiliary electrode forming mask 10b is laminated on the surface of the substrate 20 on which the main electrode pattern 22a is formed by a transport roll (not shown), Thermocompression bonding
  • the auxiliary electrode forming mask 10b is temporarily bonded to the substrate 20 by supplying between the base plates 52 and 52. Thereafter, the substrate 20 is transported to the physical vapor deposition apparatus in the same manner as described above, and after physical vapor deposition is performed through the opening 12b, the auxiliary electrode formation mask 10b is peeled off, and the auxiliary electrode pattern remains. .
  • the electrode pattern can be continuously formed without using a water-soluble chemical solution or an organic solvent as in the prior art. Mass production can be made possible while reducing the load.
  • the hot melt layer is covered with a coating layer made of a metal material cover in the main electrode forming mask 10a (or the auxiliary electrode forming mask 10b), the physical property of the conductive material It is possible to prevent the hot melt layer 8 from sticking to the substrate 20 due to heat during vapor deposition, and the main electrode forming mask 10a (or the auxiliary electrode forming mask 10b) can be easily peeled off from the substrate 20. . Such an effect is particularly remarkable when the base film 6 is interposed between the coating layer 4 and the hot melt layer 8 as in the present embodiment.
  • the configuration of the main electrode formation mask 10a (or the auxiliary electrode formation mask 10b) is not necessarily limited to that of the present embodiment, and may be other configurations as long as the hot melt layer 8 is covered with the coating layer 4. For example, it may be performed by rubbing a structure in which the coating layer 4 is directly formed on the surface of the hot melt layer 8.
  • the electrode pattern forming method described above is suitable as a method for forming an electrode pattern of a dye-sensitized photovoltaic cell, as will be described later, but is not limited thereto, and is applicable to other types of photovoltaic cells. It can also be used as a method of forming electrode patterns used in other devices such as liquid crystal display devices and EL light emitting devices.
  • a semiconductor electrode to be a photoelectric conversion layer is formed on the substrate 20 on which the electrode pattern 22 is formed as follows. First, a semiconductor electrode formation mask 30a having an opening 32a, which is configured similarly to the main electrode formation mask 10a (see FIG. 1 (c)), is prepared. As shown in FIG. The semiconductor electrode forming mask 30a is bonded onto the substrate 20 while aligning with the opening 32a. In addition, in the semiconductor electrode formation mask 30a, the same code
  • the adhesion of the semiconductor electrode forming mask 30a to the substrate 20 may also be a temporary adhesion that can be easily peeled between the hot melt layer 8 and the substrate 20, similarly to the adhesion of the main electrode forming mask 10a. preferable.
  • the surface of the substrate 20 is subjected to a corona discharge treatment or the like to clean the surface of the electrode pattern 22 exposed from the opening 32a, and then the electrode pattern 22 is formed on the electrode pattern 22 as shown in FIG.
  • the first semiconductor layer 34a that also has a semiconductor electrode material force is formed by physical vapor deposition. Next, as shown in FIG.
  • a semiconductor electrode material is applied with a squeegee or the like, and a second semiconductor layer 34b is deposited on the first semiconductor layer 34a.
  • the second semiconductor layer 34b may be formed directly on the electrode pattern 22 that is not always necessary.
  • the semiconductor electrode material include oxides such as zinc, niobium, tin, titanium, indium, tandasten, tantalum, molybdenum, manganese, nickel, and copper, and gallium phosphate and indium phosphide.
  • the first semiconductor layer 34a is a dense film formed by physical vapor deposition, and prevents a photosensitizing dye and an electrolytic solution described later from coming into contact with the electrode pattern 22.
  • the second semiconductor layer 34b has a diameter of 5 ⁇ ! In order to increase the amount of photosensitizing dye supported later.
  • the desired thickness of the porous film formed by depositing semiconductor fine particles of about 200 nm is usually about 0.1 to 20 m. Further, after the semiconductor fine particles are deposited, water washing may be performed by applying a titanium sol or peroxotitanium sol such as a hydrolyzable titanium compound, a hydrolyzable titanium low condensate, titanium hydroxide, or a titanium hydroxide low condensate. After the above, the second semiconductor layer 34b can be obtained by evaporating water by heating as necessary.
  • the sensitizing dye solution is immersed in the second semiconductor layer 34b, electrophoretic or squeegee-coated, and then dried. As a result, a semiconductor electrode 34 on which is supported is obtained.
  • photosensitizing dyes used for dye sensitization in semiconductor electrode 34 can be used, for example, ruthenium-tris, ruthenium-bis, osmium-tris, osmium bis type transitions.
  • Metal complexes or ruthenium monocis-diaquabibilicil complexes, or so-called metal chelate complexes such as phthalocyanines, porphyrins, dithiolate complexes, and acetylethylacetonate complexes, and organic dyes such as cyanazine dyes, merocyanine dyes, rhodamine dyes, And oxadiazole derivatives, benzothiazole derivatives , Coumarin derivatives, stilbene derivatives, organic compounds having an aromatic ring, etc.
  • metal chelate complexes such as phthalocyanines, porphyrins, dithiolate complexes, and acetylethylacetonate complexes
  • organic dyes such as cyanazine dyes, merocyanine dyes, rhodamine dyes, And oxadiazole derivatives, benzothiazole derivatives , Coumarin derivatives, stilbene derivatives, organic compounds having
  • These dyes have a functional group such as a carboxyl group, a sulfonic acid group, a phosphoric acid group, an amide group, an amino group, a carboxylic group, and a phosphine group so that they are easily chemically adsorbed on the second semiconductor layer 34b. It preferably has a group.
  • these photosensitizing dyes can be dissolved in an appropriate solvent, and then the dye solution can be adsorbed and supported on the second semiconductor layer 34b.
  • the semiconductor electrode 34 remains on the electrode pattern 22 of the substrate 20 as shown in FIG. 4 (e).
  • the formation of the semiconductor electrode 34 on the substrate 20 can be performed in the same manner as the formation of the electrode pattern 22. That is, the film-like laminate 10 is also fed with a force such as a roll to form alignment hole alignment marks on both side edges and to provide an opening 32a corresponding to the electrode pattern 22, thereby providing a semiconductor electrode forming mask 30a. Form. Then, the semiconductor electrode forming mask 30a is laminated on the substrate 20, and after thermocompression bonding, it is conveyed to a coating apparatus such as a screen printing machine or a roll coating machine. The alignment between the substrate 20 and the semiconductor electrode forming mask 30a can be performed using alignment holes and alignment marks.
  • the substrate 20 is transported to a drying apparatus and subjected to heat drying. Thereby, the formation of the semiconductor electrode 34 on the substrate 20 is completed. Thereafter, the semiconductor electrode forming mask 30a is peeled off by the adhesive force of the adhesive roll, and the semiconductor electrode 34 remains.
  • a semiconductor electrode having high photoelectric conversion efficiency can be formed continuously and efficiently.
  • the back electrode film can be manufactured by forming a main electrode pattern on the substrate in the same procedure as in the case of the front electrode film 30 described above.
  • transparent materials such as ITO (Indium Tin Oxide), FTO (Fluorine-doped Oxidized Tin) and ATO (Antimony Monopoxide) are used.
  • metal materials such as gold, silver, copper, platinum, and chromium, and two or more of these may be stacked to form the main electrode pattern.
  • ITO Indium Tin Oxide
  • FTO Fluorine-doped Oxidized Tin
  • ATO Antimony Monopoxide
  • metal materials such as gold, silver, copper, platinum, and chromium, and two or more of these may be stacked to form the main electrode pattern.
  • the main electrode pattern of the knock electrode film can be formed.
  • an undercoat film is applied on the substrate and dried, so that an undercoat layer 81 is interposed on the substrate 82 as shown in FIG.
  • the back electrode film 80 on which the electrode pattern 83 is formed, whereby the adhesion of the electrode pattern 83 can be enhanced.
  • the knock electrode film can also be formed using a main electrode formation mask in which a hot melt layer and a coating layer are laminated via an adhesive layer. That is, as shown in FIG. 10 (a), after the coating layer 4 is bonded to the hot melt layer 8 via the adhesive layer 2, a die cutting process is performed as shown in FIG. 10 (b). By forming the opening 12a, the main electrode formation mask 1OOa can be obtained.
  • FIG. 10 the same parts as those shown in FIG.
  • the main electrode forming mask is adhered onto the substrate in the same procedure as shown in FIGS. 1 (d) to (f), and then the conductive material is physically vapor-deposited to form a hot melt layer.
  • the main electrode pattern can be formed on the substrate by peeling the main electrode forming mask between the substrate and the substrate.
  • an undercoat layer 81 may be formed on the surface of the substrate 20 to which the main electrode forming mask 100a is adhered by applying an undercoat material and drying it in advance. Good. Also, the hot melt layer 8 and the covering layer 4 can be bonded together by heat-bonding the hot melt layer 8 to the covering layer 4 and firmly adhering them instead of the adhesive layer 2. As shown in FIG. 11, the main electrode forming mask 10 la can be configured such that the hot melt layer 8 is directly bonded to the coating layer 4.
  • a base film 64 having an adhesive layer 62 formed on one side is prepared, and a hot-melt layer 66 is bonded to the adhesive layer 62, so that FIG.
  • a laminate 68 is formed.
  • the pressure-sensitive adhesive layer 62 is easily peelable from the hot-melt layer 66.
  • a heat-resistant slight pressure-sensitive adhesive made of a krill resin can be used.
  • the thickness of the pressure-sensitive adhesive layer 62 may be set in consideration of the thickness of the electrolyte layer described later, for example, 1 to 40 / ⁇ ⁇ .
  • the base film 64 is a hard film force formed of polypropylene, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), nylon, fluorine resin, etc., and has a thickness of about 20 to about LOO m. preferable.
  • the hot melt layer 66 is, for example, a publicly known material in which a rosin-based or terpene-based tackifier is added to a polyester-based resin, a polyamide-based resin, an EVA-based resin, a polyolefin-based resin, or the like. Can be used.
  • the bonding mask 69 is placed on the substrate 82 of the back electrode film 80 so that the wiring portion forming hole 68b and the electrode pattern 83 are aligned.
  • the hot melt layer 66 is thermocompression bonded to the substrate 82 using a thermocompression roller or the like. In this thermocompression bonding, it is preferable that the hot melt layer 66 is sufficiently melted and firmly adhered to the substrate 82.
  • the adhesive strength between the hot melt layer 66 and the substrate 82 is preferably 2 NZcm or more.
  • the adhesive strength between the adhesive layer 62 and the hot melt layer 66 is smaller than the adhesive strength between the hot melt layer 66 and the substrate 82, which is preferably easily peelable as described above. It is preferable. Specifically, the adhesive strength between the pressure-sensitive adhesive layer 62 and the hot melt layer 66 is preferably 0.01 to 0.2 NZcm.
  • the film-like laminate 68 is also fed with a force such as a roll to form alignment holes and alignment marks on both side edges, and to provide an electrolyte solution containing portion 68a and a wiring portion forming hole 68b.
  • a force such as a roll
  • the bonding mask 69 it can be continuously performed by placing on the substrate 82 and thermocompression bonding.
  • the conductive paste for forming the wiring portion described above is squeezed onto the bonding mask 69, whereby a conductive material is formed in the wiring portion forming hole 68b as shown in FIG. 7 (a). pace Fill with 61a. Then, the bonding mask 69 is peeled between the pressure-sensitive adhesive layer 62 and the hot melt layer 66 by a peeling roller or the like, and the base film 64 is removed while the hot melt layer is removed as shown in FIG. Layer 66 remains.
  • the conductive paste 61a is formed by stirring and mixing a solder alloy powder into a resin solution.
  • the solder alloy should preferably be exemplified by a low melting point solder alloy powder such as SnZBi, Sn / Bi / Pb, Sn / Bi / Zn, Bi / Pb, Sn Zln, Sn / Bi / Pb, Sn / Bi / ln, SnZBiZPbZln.
  • the desired melting point can be obtained by appropriately adjusting the composition ratio.
  • the average particle size of the solder alloy powder can be exemplified by about 0.01 to 50 m.
  • the liquidus temperature of the solder alloy powder is lower than the heat-resistant limit temperature of the substrate 20 and is 150 ° C or less at the maximum.
  • the “heat-resistant limit temperature” refers to the maximum temperature at which material deterioration and deterioration can be prevented.
  • PET about 130 ° C
  • methylmethacrylate acrylic resin about 70 ° C
  • silicone Fat About 180 ° C.
  • the liquidus temperature of the solder alloy powder is preferably 60 ° C or higher, more preferably 70 ° C or higher. Table 1 shows the relationship between the composition ratio and the solidus temperature and liquidus temperature.
  • the resin solution is made of various organic solvents, water, or a solvent that is a mixture of two or more of these, acrylic resin, acrylic urethane resin, urethane resin, polyester resin, phenol resin. What melt
  • the volume ratio (volume fraction) of the solder alloy powder in the volume of the resin solution is too large, adhesion to the substrate will be ensured, whereas if it is too small, good electrical conductivity will be ensured. Furthermore, it is preferable that the power is 50 to 90%, more preferably 70 to 85%.
  • the front electrode film 30 with the hot melt layer 8 (see FIG. 12 (f)) is connected to the conductive paste 61a with the electrode pattern 22 on the substrate 20 as shown in FIG. 7 (c).
  • alignment is performed so that the semiconductor electrode 34 on the electrode pattern 22 is accommodated in the electrolyte accommodating portion 68a, and the hot melt layers 8 and 66 are bonded together.
  • the hot melt layers 8 and 66 are heated and melted using a thermocompression roller or the like, and the front electrode film 30 and the back electrode film 80 are firmly adhered.
  • a plurality of photovoltaic cells having the semiconductor electrode 34 are formed between the electrode patterns 22 and 83, and the adjacent semiconductor electrodes 34 and 34 are connected to the electrode patterns 22 and 83, respectively.
  • the conductive paste 6 la filled in the wiring portion forming hole 68b by heating the hot melt layer 66 melts the resin and adheres to the front electrode film 30 and the back electrode film 80, respectively.
  • the heating temperature and calorie heating time of the hot melt layer 66 may be appropriately set in consideration of the material of the hot melt layer 66 and the conductive paste 61a, for example, about 120 to 150 ° C, about 10 to 15 Minutes.
  • the wiring portion is formed at the same time. Efficiency can be increased.
  • a resin film is used as the base film 64.
  • a film made of another material such as a metal film can be used.
  • the adhesive layer 62 interposed between the base film 64 and the hot melt layer 66 is not necessarily required. If the base film 64 can be easily peeled from the hot melt layer 66, the hot melt layer 66 is not necessary.
  • the base film 64 can be directly bonded to the substrate.
  • the above description is an example for achieving three-dimensional conduction between the front electrode film 30 and the back electrode film 80.
  • the electrode patterns 22, 83 are used.
  • the wiring part is formed by applying a conductive paste on the substrate with a squeegee or the like through a wiring part forming mask having an opening of a predetermined shape.
  • the wiring portion forming mask has a hot melt layer on one side of a base film made of PET or the like via an adhesive layer 2 made of a strong adhesive.
  • the formed configuration can be exemplified, and the hot melt layer can be temporarily bonded in a peelable manner by thermocompression bonding in a semi-molten state with a thermocompression-bonding roll or the like.
  • the surface of the base film may be coated with a heat resistant film as necessary.
  • the wiring portion formation mask can be configured to have a weak adhesive layer with adjusted adhesive strength on one surface of the base film, and can be crimped to the substrate by a crimping roll.
  • the above-described wiring part forming mask with a hot melt layer may be laminated on such a wiring part forming mask with a weak adhesive layer.
  • an electrolyte layer is formed between the front electrode film 30 and the back electrode film 80.
  • an electrolyte solution flow path is formed, which communicates the electrolyte container 68a with the outside.
  • the electrolyte solution is sucked on the OUT side of the electrolyte channel.
  • the electrolyte solution is supplied from the IN side of the flow path, and the electrolyte solution is injected into the electrolyte storage portion 68a, so that the electrolyte layer 90 is formed.
  • the electrolytic solution include those obtained by dissolving an electrolyte such as iodine Z iodide, bromine Z bromide, or a transition metal complex in a solvent such as acetonitrile or ethylene carbonate or an ionic liquid such as an imidazolium salt. Note that the flow of the electrolytic solution in FIG. 9 (a) is shown schematically, and actually the electrolytic solution flows in a direction penetrating the drawing.
  • the electrolyte layer is pre-coated with a gel electrolyte, a molten salt electrolyte, a solid electrolyte, or the like on the front electrode film 30 or the back electrode film 80, and then the front electrode film 30 Also, the back electrode film 80 can be bonded together.
  • the front electrode film 30 and the back electrode film 80 are ultrasonically welded so as to surround the entire electrolyte container 68a. 91 is formed, and the electrolyte solution of the electrolyte layer 90 is sealed. Then, by removing the outside of the sealing portion 91, as shown in FIG. 9C, a photovoltaic module in which the photoelectric conversion layer and the counter electrode are sequentially stacked on the electrode pattern is completed. The output from the photovoltaic module can be taken out from connection terminal holes 92 and 92 formed at two corners.
  • Ultrasonic welding can be performed using an ultrasonic welding apparatus including a horn to which vibration energy is transmitted from a vibrator and a pedestal on which an object to be welded is placed.
  • the upper surface of the pedestal is provided with a protrusion (energy director) for concentrating vibration energy.
  • the front electrode film 30 and the back electrode film 80 are pressed between the horn and the pedestal, and the horn force
  • the substrates 20, 82 of the front electrode film 30 and the back electrode film 80 and the hot melt layer 66 have the same material strength.
  • the “equivalent material” means a material having substantially the same physical property values such as a melting temperature and a thermal expansion coefficient in addition to the case where the materials are completely the same.
  • the specific material is preferably at least one selected from polyethylene terephthalate (PET), silicon-based resin, fluorine-based resin, and acryl-based resin, especially polyethylene terephthalate. Is preferred.

Abstract

Provided is a method for electrically connecting a pair of electrode patterns (22, 83) arranged through an insulating layer. A bonding mask (69) is provided with a wiring section forming hole (68b) penetrating the front and rear planes of a laminated body wherein a base material film (64) is bonded on a hot melt layer (66). The method is provided with a step of bonding the mask on a first substrate (82) whereupon the first electrode pattern (83) is formed on a front plane, by thermocompression so that a wiring section forming hole (68b) is aligned with the first electrode pattern (83). The method is also provided with a step of filling the wiring section forming hole (68b) with a conductive paste (61a); a step of peeling the base material film (64) from the hot melt layer (66); and a step of bonding a second substrate (20) whereupon a second electrode pattern (22) is formed on the front plane, on the exposed hot melt layer (66) by thermocompression so that the second electrode pattern (22) is aligned with the wiring section forming hole (68b).

Description

明 細 書  Specification
電極パターンの形成方法、電極パターン間の接続方法、色素増感半導 体電極の形成方法及び光電池モジュール 技術分野  Technical field of electrode pattern formation method, electrode pattern connection method, dye-sensitized semiconductor electrode formation method, and photovoltaic module
[0001] 本発明は、電極パターンの形成方法、電極パターン間の接続方法、色素増感半導 体電極の形成方法及び光電池モジュールに関する。  TECHNICAL FIELD [0001] The present invention relates to a method for forming electrode patterns, a method for connecting electrode patterns, a method for forming dye-sensitized semiconductor electrodes, and a photovoltaic module.
背景技術  Background art
[0002] 電極パターンが形成された基板は、太陽光などの光エネルギーを電気エネルギー に変換する光電池や、ディスプレイなどに広く用いられている。例えば、アモルファス シリコン光電池や、色素増感型光電池などの光電池の場合、透明導電膜などからな る電極パターンがそれぞれ形成された一対の基板間に光電変換層を有する複数の 光電池セルが、配線部を介して直列又は並列に接続されることにより、光電池モジュ ールが構成される。  [0002] A substrate on which an electrode pattern is formed is widely used in photovoltaic cells, displays, and the like that convert light energy such as sunlight into electrical energy. For example, in the case of a photovoltaic cell such as an amorphous silicon photovoltaic cell or a dye-sensitized photovoltaic cell, a plurality of photovoltaic cells having a photoelectric conversion layer between a pair of substrates each formed with an electrode pattern made of a transparent conductive film or the like are connected to a wiring portion. A photovoltaic module is configured by connecting in series or in parallel via
[0003] 電極パターンを基板上に形成する方法として、基板の表面に感光性榭脂を塗布し た後、フォトマスクを介して紫外線を照射し、薬液を用いてエッチングを行うフォトリソ グラフィ法が、従来力も知られている(例えば、特許文献 1)。ところが、電極パターン をフォトリソグラフィ法により形成する場合、基板の材質によっては薬液の酸やアル力 リによりダメージを受けるおそれがあるだけでなぐ電極パターンの形成を連続的に行 う場合には、廃棄される薬液の量も多くなつて環境汚染の問題が生じるなど、大量生 産には不向きであった。  [0003] As a method of forming an electrode pattern on a substrate, a photolithographic method in which a photosensitive resin is applied to the surface of the substrate, then ultraviolet rays are irradiated through a photomask, and etching is performed using a chemical solution. Conventional power is also known (for example, Patent Document 1). However, when the electrode pattern is formed by photolithography, depending on the material of the substrate, there is a risk that it will be damaged by the acid of the chemical solution or the strength of the solution. The amount of chemicals that are produced is also unsuitable for mass production due to environmental pollution problems.
[0004] また、隣接する 2つの光電池セル間において、一対の基板にそれぞれ形成された 電極パターン間の導通をとる方法として、特許文献 2には、半田メツキ銅リボンなどの 接続部材により太陽電池セル同士を電気的に接続した太陽電池モジュールが開示 されている。ところが、このような電極パターンの導通方法では、多数の光電池セルを 直列又は並列に接続する際に作業を効率良く行うことが困難であり、大量生産には 不向きであった。  [0004] In addition, as a method for establishing electrical connection between electrode patterns formed on a pair of substrates between two adjacent photovoltaic cells, Patent Document 2 discloses a photovoltaic cell using a connecting member such as a soldered copper ribbon. A solar cell module that is electrically connected to each other is disclosed. However, such an electrode pattern conduction method is not suitable for mass production because it is difficult to perform work efficiently when many photovoltaic cells are connected in series or in parallel.
[0005] また、電極パターン上に色素増感半導体電極を形成する方法として、例えば、特許 文献 3に開示されているように、酸化チタン微粒子の分散液を電極基板上に塗布し て乾燥させることにより半導体電極を形成した後、この電極基板を色素液に浸清して 半導体電極に光増感色素を担持させる方法が従来力 知られている。ところが、この ような方法では色素増感半導体電極を効率良く形成することができず、量産には不 向きであった。 Further, as a method for forming a dye-sensitized semiconductor electrode on an electrode pattern, for example, a patent As disclosed in Reference 3, after forming a semiconductor electrode by coating a dispersion of titanium oxide fine particles on an electrode substrate and drying it, the electrode substrate is immersed in a dye solution and light is applied to the semiconductor electrode. Conventionally, a method for supporting a sensitizing dye is known. However, such a method cannot efficiently form a dye-sensitized semiconductor electrode and is not suitable for mass production.
特許文献 1:特開平 8— 330692号公報  Patent Document 1: Japanese Patent Laid-Open No. 8-330692
特許文献 2:特開 2005— 101519号公報  Patent Document 2: Japanese Patent Laid-Open No. 2005-101519
特許文献 3 :特開 2002— 216861号公報  Patent Document 3: Japanese Patent Laid-Open No. 2002-216861
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0006] そこで、本発明は、量産性に優れる電極パターンの形成方法、電極パターン間の 接続方法、色素増感半導体電極の形成方法及び光電池モジュールの提供を目的と する。 Accordingly, an object of the present invention is to provide an electrode pattern forming method excellent in mass productivity, a connection method between electrode patterns, a dye-sensitized semiconductor electrode forming method, and a photovoltaic module.
課題を解決するための手段  Means for solving the problem
[0007] 本発明の前記目的は、ホットメルト層が金属材料からなる被覆層により覆われ、表 裏面を貫通する主電極形成用開口部を有する主電極形成マスクを用いて、基板上 に電極パターンを形成する方法であって、前記主電極形成マスクを、前記ホットメルト 層を介して基板の表面に熱圧着する工程と、前記主電極形成用開口部を介して導 電性蒸着材料の物理的蒸着を行うことにより、前記基板上に主電極パターンを形成 する工程と、前記主電極形成マスクを剥離する工程とを備える電極パターンの形成 方法により達成される。 [0007] The object of the present invention is to provide an electrode pattern on a substrate using a main electrode forming mask in which a hot melt layer is covered with a coating layer made of a metal material and has a main electrode forming opening penetrating the front and back surfaces. A step of thermocompression bonding the main electrode forming mask to the surface of the substrate through the hot melt layer, and a physical form of the conductive vapor deposition material through the opening for forming the main electrode. This is achieved by an electrode pattern forming method comprising a step of forming a main electrode pattern on the substrate by performing vapor deposition and a step of peeling off the main electrode formation mask.
[0008] また、本発明の前記目的は、上記電極パターンの形成方法により基板上に形成さ れた主電極パターンに、光電変換層及び対向電極を積層してなる光電池モジユー ルにより達成される。  [0008] The object of the present invention is achieved by a photovoltaic module in which a photoelectric conversion layer and a counter electrode are laminated on a main electrode pattern formed on a substrate by the electrode pattern forming method.
[0009] また、本発明の前記目的は、絶縁層を介して配置された一対の電極パターン間を 電気的に接続する方法であって、ホットメルト層に基材フィルムが張り合わされた積層 体に表裏面を貫通する配線部形成孔が形成された貼り合わせ用マスクを、第 1の電 極パターンが表面に形成された第 1の基板に対し、前記配線部形成孔と第 1の電極 ノターンとの位置合わせが行われるように熱圧着する工程と、前記配線部形成孔に 導電性ペーストを充填する工程と、前記基材フィルムを前記ホットメルト層から剥離す る工程と、露出した前記ホットメルト層に対し、第 2の電極パターンが表面に形成され た第 2の基板を、前記第 2の電極パターンと配線部形成孔との位置合わせが行われ るように熱圧着する工程とを備える電極パターン間の接続方法により達成される。 [0009] Further, the object of the present invention is a method of electrically connecting a pair of electrode patterns arranged via an insulating layer, in a laminate in which a base film is bonded to a hot melt layer. A bonding mask having a wiring portion forming hole penetrating the front and back surfaces is connected to the first substrate having the first electrode pattern formed on the front surface with respect to the wiring portion forming hole and the first electrode. A step of thermocompression bonding so as to align with the no-turn, a step of filling the wiring part formation hole with a conductive paste, a step of peeling the base film from the hot melt layer, and the exposed Thermocompression bonding a second substrate having a second electrode pattern formed on the surface thereof to the hot melt layer so that the second electrode pattern and the wiring portion forming hole are aligned. This is achieved by a connection method between the electrode patterns provided.
[0010] また、本発明の前記目的は、第 1の電極パターンと第 2の電極パターンとの間に光 電変換層を有する光電池セルを複数備える光電池モジュールであって、一の前記光 電池セルにおける第 1の電極パターンと、他の前記光電池セルにおける第 2の電極 パターンと力 上記の電極パターン間の接続方法により接続されて 、る光電池モジュ ールにより達成される。 [0010] Further, the object of the present invention is a photovoltaic module comprising a plurality of photovoltaic cells each having a photovoltaic conversion layer between the first electrode pattern and the second electrode pattern, wherein one photovoltaic cell is provided. And the second electrode pattern and force in the other photovoltaic cell are connected by the connection method between the electrode patterns, and this is achieved by the photovoltaic module.
[0011] また、本発明の前記目的は、電極パターン上に色素増感半導体電極を形成する方 法であって、ホットメルト層が金属材料からなる被覆層により覆われ、表裏面を貫通す る開口部を有する半導体電極形成マスクを、電極パターンが表面に形成された基板 に対し、前記開口部と電極パターンとの位置合わせが行われるように熱圧着するェ 程と、前記開口部に半導体電極材料を充填する工程と、前記開口部に充填された半 導体電極材料に光増感色素を担持させる工程と、前記半導体電極形成マスクを剥 離する工程とを備える色素増感半導体電極の形成方法により達成される。  [0011] Further, the object of the present invention is a method of forming a dye-sensitized semiconductor electrode on an electrode pattern, wherein the hot melt layer is covered with a coating layer made of a metal material and penetrates the front and back surfaces. A step of thermocompression bonding a semiconductor electrode forming mask having an opening to a substrate on which an electrode pattern is formed so that the opening and the electrode pattern are aligned; and a semiconductor electrode in the opening A method of forming a dye-sensitized semiconductor electrode, comprising: a step of filling a material; a step of supporting a photosensitizing dye on a semiconductor electrode material filled in the opening; and a step of peeling off the semiconductor electrode formation mask. Is achieved.
[0012] また、本発明の前記目的は、上記色素増感半導体電極の形成方法により形成され た半導体電極に、対向電極が積層された光電池モジュールにより達成される。 発明の効果  [0012] The object of the present invention is achieved by a photovoltaic module in which a counter electrode is laminated on a semiconductor electrode formed by the method for forming a dye-sensitized semiconductor electrode. The invention's effect
[0013] 本発明によれば、量産性に優れる電極パターンの形成方法、電極パターン間の接 続方法、色素増感半導体電極の形成方法及び光電池モジュールを提供することが できる。  [0013] According to the present invention, it is possible to provide an electrode pattern formation method, a connection method between electrode patterns, a dye-sensitized semiconductor electrode formation method, and a photovoltaic module that are excellent in mass productivity.
[0014] また、本発明の電極パターン間の接続方法によれば、電極パターン間の確実な導 通が得られる。  [0014] Further, according to the connection method between electrode patterns of the present invention, reliable conduction between electrode patterns can be obtained.
図面の簡単な説明  Brief Description of Drawings
[0015] [図 1]フロント電極フィルムの基板上に主電極パターンを形成する工程の一例を示す 工程断面図である。 [図 2]フロント電極フィルムの基板上に補助電極パターンを形成する工程の一例を示 す工程断面図である。 FIG. 1 is a process sectional view showing an example of a process of forming a main electrode pattern on a substrate of a front electrode film. FIG. 2 is a process sectional view showing an example of a process for forming an auxiliary electrode pattern on a substrate of a front electrode film.
[図 3]上記主電極パターン及び補助電極パターンを基板上に連続的に形成する工程 の一例を示す工程斜視図である。  FIG. 3 is a process perspective view showing an example of a process for continuously forming the main electrode pattern and the auxiliary electrode pattern on a substrate.
[図 4]半導体電極を形成する工程の一例を示す工程断面図である。  FIG. 4 is a process cross-sectional view illustrating an example of a process for forming a semiconductor electrode.
[図 5]バック電極フィルムの一例を示す断面図である。 FIG. 5 is a cross-sectional view showing an example of a back electrode film.
[図 6]配線部及び電解質層を形成するための前工程の一例を示す工程断面図であ る。  FIG. 6 is a process cross-sectional view showing an example of a pre-process for forming a wiring portion and an electrolyte layer.
[図 7]配線部及び電解質層を形成する工程の一例を示す工程断面図である。  FIG. 7 is a process cross-sectional view illustrating an example of a process for forming a wiring portion and an electrolyte layer.
[図 8]本発明の一実施形態に係る光電池モジュールの断面図である。  FIG. 8 is a cross-sectional view of a photovoltaic module according to an embodiment of the present invention.
[図 9]電解質層の形成及び封止工程の一例を示す工程断面図である。  FIG. 9 is a process cross-sectional view illustrating an example of an electrolyte layer formation and sealing process.
[図 10]主電極形成マスクを用いて主電極パターンを形成する他の方法を示す工程断 面図である。  FIG. 10 is a process sectional view showing another method for forming a main electrode pattern using a main electrode formation mask.
[図 11]主電極形成パターンを形成する更に他の方法に用いられる主電極形成マスク の断面図である。  FIG. 11 is a cross-sectional view of a main electrode formation mask used in still another method for forming a main electrode formation pattern.
[図 12]電極パターンを形成する他の方法を示す工程断面図である。  FIG. 12 is a process cross-sectional view illustrating another method for forming an electrode pattern.
符号の説明 Explanation of symbols
2 粘着剤層  2 Adhesive layer
4 被覆層  4 Coating layer
6 基材フィルム  6 Base film
8 ホットメノレト層  8 Hot menoleto layer
10 積層体 10 Laminate
10a 主電極形成マスク  10a Main electrode formation mask
12a 開口部  12a opening
20 基板  20 substrates
22 電極パターン  22 Electrode pattern
22a 主電極パターン  22a Main electrode pattern
22b 補助電極パターン 30 フロント電極フィルム 22b Auxiliary electrode pattern 30 Front electrode film
30a 半導体電極形成マスク  30a Semiconductor electrode formation mask
32a 開口部  32a opening
34 半導体電極  34 Semiconductor electrode
62 粘着剤層  62 Adhesive layer
64 基材フィルム  64 Base film
66 ホットメノレト層  66 Hot menoleto layer
68 積層体  68 Laminate
68a 電解液収容部  68a Electrolyte container
68b 配線部形成孔  68b Wiring part formation hole
69 貼り合わせ用マスク  69 Mask for bonding
80 バック電極フィルム  80 Back electrode film
90 電解質層  90 electrolyte layer
91 封止部  91 Sealing part
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0017] 以下、本発明の一実施形態に係る電極パターンの形成方法を用いた光電池モジ ユールの製造方法を、添付図面を参照しながら説明する。 Hereinafter, a method for producing a photovoltaic module using an electrode pattern forming method according to an embodiment of the present invention will be described with reference to the accompanying drawings.
1.フロント電極フィルムの形成  1.Formation of front electrode film
光電池モジュールを構成するフロント電極フィルムの製造方法につ!、て、図 1及び 図 2に示す工程断面図を参照して説明する。まず、図 1 (a)に示すように、一方面に 粘着剤層 2が形成され、他方面に被覆層 4が形成された基材フィルム 6を用意し、粘 着剤層 2の露出面にホットメルト層 8を貼り合わせて、図 1 (b)に示すように積層体 10 を構成する。  The method for producing the front electrode film constituting the photovoltaic module will be described with reference to the process cross-sectional views shown in FIGS. First, as shown in FIG. 1 (a), a base film 6 having an adhesive layer 2 formed on one surface and a coating layer 4 formed on the other surface is prepared, and the adhesive layer 2 is exposed on the exposed surface. The hot melt layer 8 is bonded together to form a laminate 10 as shown in FIG. 1 (b).
[0018] 粘着剤層 2は、アクリル榭脂、ウレタン榭脂など耐熱性の強粘着剤を使用することが できる。粘着剤層 2の厚みは、特に限定されるものではないが、例えば、 1〜40 /ζ πι である。  [0018] For the pressure-sensitive adhesive layer 2, a heat-resistant strong pressure-sensitive adhesive such as acrylic resin or urethane resin can be used. The thickness of the pressure-sensitive adhesive layer 2 is not particularly limited and is, for example, 1 to 40 / ζ πι.
[0019] 被覆層 4は、アルミニウムや銅などの金属材料カゝらなり、後工程のクリーン化処理時 などにお!ヽて基材フィルム 6の表面を保護する。被覆層 4の厚みも特に限定はな ヽが 、例えば、 1〜50 πιである。 [0019] The coating layer 4 is made of a metal material such as aluminum or copper, and protects the surface of the base film 6 during a subsequent cleaning process. The thickness of the coating layer 4 is not particularly limited. For example, 1 to 50πι.
[0020] 基材フィルム 6は、ポリプロピレン、ポリエチレンテレフタレート(PET)、ポリエチレン ナフタレート(PEN)、ナイロンなど力 形成された硬質フィルムからなり、厚みは、 20[0020] The base film 6 is a hard film formed of force such as polypropylene, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), nylon, and the thickness is 20
〜100 μ m程度が好ましい。 About 100 μm is preferable.
[0021] ホットメノレト層 8は、例えば、ポリエステル系榭脂、ポリアミド系榭脂、 EVA系榭脂、 ポリオレフイン系榭脂などに、ロジン系やテルペン系などの粘着付与剤などが添加さ れた公知のものを用いることができる。 [0021] The hot menoleto layer 8 is, for example, a known polyester resin, polyamide resin, EVA resin, polyolefin resin, or the like in which a rosin or terpene tackifier is added. Things can be used.
[0022] 次に、積層体 10に型抜き加工を施して、図 1 (c)に示すように開口部 12aを形成す る。この開口部 12aは、主電極形成用の開口部であり、後述する基板 20上に形成さ れる主電極パターンに対応した形状を有している。こうして、主電極形成用の開口部Next, the laminate 10 is subjected to die cutting to form an opening 12a as shown in FIG. 1 (c). The opening 12a is an opening for forming a main electrode, and has a shape corresponding to a main electrode pattern formed on a substrate 20 described later. Thus, the opening for forming the main electrode
12aを有する主電極形成マスク 10aが得られる。 A main electrode forming mask 10a having 12a is obtained.
[0023] ついで、図 1 (d)に示すように、この主電極形成マスク 10aを、基板 20上に接着するNext, as shown in FIG. 1 (d), this main electrode formation mask 10 a is adhered onto the substrate 20.
。基板 20としては、ポリエチレンテレフタレート(PET)、ポリエチレンナフタレート(PE. As the substrate 20, polyethylene terephthalate (PET), polyethylene naphthalate (PE
N)などの耐熱性及び絶縁性が高 ヽ榭脂フィルムや、ガラス基板を例示することがで き、その他に、ポリメチノレメタタリレート、ポリカーボネート、ポリスチレン、ポリエチレン サルファイド、ポリエーテルスルホン、ポリオレフイン、トリァセチルセルロース、アクリル 系榭脂等が挙げられる。 Examples thereof include a resin film having high heat resistance and insulation such as N), and a glass substrate. In addition, polymethylol methacrylate, polycarbonate, polystyrene, polyethylene sulfide, polyethersulfone, polyolefin, triflate. Examples include cetyl cellulose and acrylic resin.
[0024] 基板 20への主電極形成マスク 10aの接着は、熱圧着ローラなどを用いた熱圧着に より行うことができるが、ホットメルト層 8を半溶融状態にすることで接着強度が大きくな りすぎないように調整し、ホットメルト層 8と基板 20との間で容易に剥離可能にすること が好ましい。  [0024] The main electrode forming mask 10a can be bonded to the substrate 20 by thermocompression using a thermocompression roller or the like, but the adhesive strength is increased by making the hot melt layer 8 in a semi-molten state. It is preferable to adjust so as not to be too much and to allow easy peeling between the hot melt layer 8 and the substrate 20.
[0025] 次に、基板 20の上面側にコロナ放電処理やエキシマ処理などを施して、基板 20上 における開口部 12aから露出する部分をクリーンィ匕した後、開口部 12aを介して、導 電性蒸着材料の物理的蒸着を行うことにより、図 1 (e)に示すように、基板 20上に主 電極パターン 22aを形成する。そして、図 1 (f)に示すように、主電極形成マスク 10a を、ホットメルト層 8と基板 20との間で剥離する。  Next, the upper surface side of the substrate 20 is subjected to corona discharge treatment, excimer treatment, and the like to clean the portion exposed from the opening 12a on the substrate 20, and then conductive through the opening 12a. By performing physical vapor deposition of the vapor deposition material, a main electrode pattern 22a is formed on the substrate 20 as shown in FIG. 1 (e). Then, as shown in FIG. 1 (f), the main electrode formation mask 10 a is peeled between the hot melt layer 8 and the substrate 20.
[0026] 主電極パターン 22aを形成するための物理的蒸着法としては、真空蒸着、スパッタ リング、イオンプレーティングなどを挙げることができる。また、導電性蒸着材料として は、 ITO (インジウム錫酸化物)、 FTO (フッ素ドープ酸化錫)、 ΑΤΟ (アンチモンド一 プ酸化錫)などの透明性材料を例示することができる。主電極パターン 22aのパター ン形状は特に限定されず、帯状、矩形状、線状など種々の形状が可能であり、複数 のパターン部力も構成することができる。 [0026] Examples of physical vapor deposition for forming the main electrode pattern 22a include vacuum vapor deposition, sputtering, and ion plating. Also as a conductive vapor deposition material Illustrative examples include transparent materials such as ITO (indium tin oxide), FTO (fluorine-doped tin oxide), and ΑΤΟ (antimond-type tin oxide). The pattern shape of the main electrode pattern 22a is not particularly limited, and various shapes such as a strip shape, a rectangular shape, and a linear shape are possible, and a plurality of pattern part forces can be configured.
[0027] こうして、基板 20上に主電極パターン 22aを形成した後、補助電極形成マスク 10b を用いて、同じ基板 20上に補助電極パターン 22bを形成する。補助電極パターン 22 bは、上述した主電極パターン 22aの作成方法と同様の手順で作成することができ、 積層体 10に対して、主電極形成用の開口部 12aの代わりに補助電極形成用の開口 部 12bを形成することにより得られる。  Thus, after forming the main electrode pattern 22a on the substrate 20, the auxiliary electrode pattern 22b is formed on the same substrate 20 using the auxiliary electrode formation mask 10b. The auxiliary electrode pattern 22b can be created by the same procedure as the method for creating the main electrode pattern 22a described above. For the laminate 10, the auxiliary electrode pattern 22b is used for forming the auxiliary electrode instead of the opening 12a for forming the main electrode. It is obtained by forming the opening 12b.
[0028] 図 2 (a)に示すように、基板 20上の主電極パターン 22aに対して所望の位置に開口 部 12bが配置されるように、基板 20に対する補助電極形成マスク 10bの位置合わせ を行った後、基板 20に対してホットメルト層 8を上記と同様に仮接着する。そして、開 口部 12bを介して、導電性蒸着材料の物理的蒸着を行うことにより、図 2 (b)に示すよ うに、基板 20上の主電極パターン 22aに沿って補助電極パターン 22bを形成する。 補助電極パターン 22bの材料は、主電極パターン 22aよりも低抵抗であることが好ま しぐ白金、金、銅、銀、クロム 銅一クロムなどの金属材料を例示することができる。  [0028] As shown in FIG. 2 (a), the auxiliary electrode forming mask 10b is aligned with the substrate 20 so that the opening 12b is disposed at a desired position with respect to the main electrode pattern 22a on the substrate 20. Then, the hot melt layer 8 is temporarily bonded to the substrate 20 in the same manner as described above. Then, by performing physical vapor deposition of the conductive vapor deposition material through the opening 12b, the auxiliary electrode pattern 22b is formed along the main electrode pattern 22a on the substrate 20, as shown in FIG. 2 (b). To do. Examples of the material of the auxiliary electrode pattern 22b include metal materials such as platinum, gold, copper, silver, chromium, copper-chromium, and the like, which preferably have a lower resistance than the main electrode pattern 22a.
[0029] 本実施形態においては、補助電極パターン 22bを、主電極パターン 22aの長手方 向両縁部に沿って直線状に形成している力 主電極パターン 22aに沿って形成され ている限り、補助電極パターン 22bの位置や形状は特に限定されない。この後、補助 電極形成マスク 10bを剥離することにより、図 2 (c)に示すように、主電極パターン 22 a及び補助電極パターン 22bからなる電極パターン 22が基板 20上に形成されたフロ ント電極フィルム 30が得られる。  [0029] In the present embodiment, as long as the auxiliary electrode pattern 22b is formed along the main electrode pattern 22a, the force is formed linearly along both longitudinal edges of the main electrode pattern 22a. The position and shape of the auxiliary electrode pattern 22b are not particularly limited. Thereafter, the auxiliary electrode forming mask 10b is peeled off, whereby the front electrode in which the electrode pattern 22 composed of the main electrode pattern 22a and the auxiliary electrode pattern 22b is formed on the substrate 20 as shown in FIG. 2 (c). Film 30 is obtained.
[0030] 本実施形態においては、主電極パターン 22aを形成した後に、補助電極パターン 2 2bを形成して!/、るが、補助電極パターン 22bを先に形成してから主電極パターン 22 aを形成してもよい。  In the present embodiment, after the main electrode pattern 22a is formed, the auxiliary electrode pattern 22b is formed! /, But the auxiliary electrode pattern 22b is formed first and then the main electrode pattern 22a is formed. It may be formed.
[0031] すなわち、図 12 (a)に示すように、電極フィルムなどカゝらなる基板 20上に補助電極 形成マスク 10bを接着し、開口部 12bを介して補助電極パターン 22bを形成した後、 図 12 (b)に示すように補助電極形成マスク 10bを剥離する。そして、図 12 (c)に示す ように、補助電極パターン 22bが形成された基板 20上に主電極形成マスク 10aを接 着し、開口部 12aを介して基板 20上にコロナ放電処理などのクリーンィ匕処理を行つ た後、開口部 12aを介して主電極パターン 22aを形成する。本実施形態においては 、補助電極パターン 22bが主電極パターン 22aの外周縁部に沿って形成され、これ らの間に充填されるように主電極パターン 22aが形成される。 That is, as shown in FIG. 12 (a), after the auxiliary electrode formation mask 10b is adhered on the substrate 20 such as an electrode film and the auxiliary electrode pattern 22b is formed through the opening 12b, As shown in FIG. 12 (b), the auxiliary electrode forming mask 10b is peeled off. And as shown in Fig. 12 (c) As described above, the main electrode formation mask 10a is attached on the substrate 20 on which the auxiliary electrode pattern 22b is formed, and after the cleaning process such as the corona discharge treatment is performed on the substrate 20 through the opening 12a, the opening is formed. A main electrode pattern 22a is formed through the portion 12a. In the present embodiment, the auxiliary electrode pattern 22b is formed along the outer peripheral edge of the main electrode pattern 22a, and the main electrode pattern 22a is formed so as to be filled therebetween.
[0032] ついで、開口部 12aを介して半導体電極材料を蒸着し、図 12 (d)に示すように、主 電極パターン 22aの上面に半導体層 34aを堆積させた後、この半導体層 34aの上面 に半導体電極材料をスキージ等で塗布することにより、図 12 (e)に示すように、半導 体電極 34を形成する。この後、主電極形成マスク 10aを剥離する。  Next, a semiconductor electrode material is vapor-deposited through the opening 12a, and as shown in FIG. 12 (d), a semiconductor layer 34a is deposited on the upper surface of the main electrode pattern 22a, and then the upper surface of the semiconductor layer 34a. A semiconductor electrode material is applied to the semiconductor electrode 34 with a squeegee or the like to form a semiconductor electrode 34 as shown in FIG. Thereafter, the main electrode forming mask 10a is peeled off.
[0033] このように、補助電極パターン 22bの形成後に主電極パターン 22aを形成すること により、主電極形成マスク 10aを用いて、主電極パターン 22aの形成だけでなく半導 体電極 34を形成することができるので、主電極形成マスク 10aを半導体電極形成マ スクと兼用して、製造効率を高めることができる。半導体電極 34の形成については、 後に詳述する。  In this way, by forming the main electrode pattern 22a after the formation of the auxiliary electrode pattern 22b, the semiconductor electrode 34 is formed in addition to the formation of the main electrode pattern 22a by using the main electrode formation mask 10a. Therefore, the main electrode forming mask 10a can also be used as a semiconductor electrode forming mask, thereby improving the manufacturing efficiency. The formation of the semiconductor electrode 34 will be described in detail later.
[0034] 主電極形成マスク 10aの剥離は、ホットメルト層 8と基板 20との間で行うこともできる 力、粘着剤層 2を弱粘着剤力も形成する等してホットメルト層 8と基材フィルム 6との間 で行うことも可能であり、図 12 (f)に示すように、ホットメルト層 8が残留したフロント電 極フィルム 30を製造することもできる。  [0034] The main electrode forming mask 10a can be peeled off by a force that can be performed between the hot melt layer 8 and the substrate 20, or by forming the adhesive layer 2 with a weak adhesive force. The front electrode film 30 in which the hot melt layer 8 remains can also be produced as shown in FIG. 12 (f).
[0035] 補助電極パターン 22bは、必ずしも必要ではなぐ基板 20上に主電極パターン 22 aのみを設けてもよい。但し、主電極パターン 22aが、例えば ITOからなる場合には、 長手方向の長さが大きくなるにつれて電力損失も大きくなるので、この場合には、主 電極パターン 22aの長手方向に沿って補助電極パターン 22bを設けることが好まし い。この場合、主電極パターン 22aの材料よりも低抵抗の材料により補助電極パター ン 22bを形成する等して、補助電極パターン 22bの表面抵抗値を、主電極パターン 2 2aの表面抵抗値よりも小さくなるように設定する。より具体的には、使用時における主 電極パターン 22aの表面抵抗値を 1とした場合に、補助電極パターン 22bの表面抵 抗値は、 0. 1以下であることが好ましぐ例えば、 ITO力もなる主電極パターン 22aの 表面抵抗値が 100 Ω Z口に対して、白金カゝらなる補助電極パターン 22bの表面抵抗 値を 3 Ω /口とすることができる。 The auxiliary electrode pattern 22b may be provided with only the main electrode pattern 22a on the substrate 20, which is not always necessary. However, when the main electrode pattern 22a is made of, for example, ITO, the power loss increases as the length in the longitudinal direction increases. In this case, the auxiliary electrode pattern along the longitudinal direction of the main electrode pattern 22a. It is preferable to provide 22b. In this case, the surface resistance value of the auxiliary electrode pattern 22b is made smaller than the surface resistance value of the main electrode pattern 22a by forming the auxiliary electrode pattern 22b with a material having a lower resistance than the material of the main electrode pattern 22a. Set as follows. More specifically, when the surface resistance value of the main electrode pattern 22a in use is set to 1, the surface resistance value of the auxiliary electrode pattern 22b is preferably 0.1 or less. The surface resistance of the main electrode pattern 22a is 100 Ω The surface resistance of the auxiliary electrode pattern 22b made of platinum The value can be 3 Ω / mouth.
[0036] 基板 20への電極パターン 22 (主電極パターン 22a及び補助電極パターン 22b)の 形成は、例えば以下のようにして連続的に行うことができる。まず、図 3 (a)に斜視図 で示すように、フィルム状の基板 20及び積層体 10の両側縁部に、それぞ; tl^立置合 わせ孔 Hを形成すると共に、積層体 10には、開口部 12aを長手方向に沿って一定の 間隔で複数設けることにより、主電極形成マスク 1 Oaを形成する。  The formation of the electrode pattern 22 (the main electrode pattern 22a and the auxiliary electrode pattern 22b) on the substrate 20 can be performed continuously as follows, for example. First, as shown in a perspective view in FIG. 3 (a), tl ^ standing holes H are formed on both side edges of the film-like substrate 20 and the laminate 10, respectively. Forms a main electrode forming mask 1 Oa by providing a plurality of openings 12a at regular intervals along the longitudinal direction.
[0037] そして、これらの基板 20及び主電極形成マスク 10aを、搬送ロール 42, 44によりそ れぞれ搬送し、図 3 (b)に示すように、これらを積層した状態で一対の熱圧着ロール 4 6, 46間に供給することにより、主電極形成マスク 10aが基板 20に熱圧着される。熱 圧着ロール 46, 46による熱圧着条件は、ホットメルト層 8が半溶融状態で仮接着とな るように適宜設定することが好ましぐ一例を挙げると、ロール表面温度が 120°C、加 圧力が 0. 5MPa、加圧時間が 2秒である。  [0037] Then, the substrate 20 and the main electrode formation mask 10a are respectively transported by the transport rolls 42 and 44, and as shown in FIG. By supplying between the rolls 4 6 and 46, the main electrode forming mask 10 a is thermocompression bonded to the substrate 20. For example, it is preferable to set the thermocompression bonding conditions of the thermocompression rolls 46 and 46 so that the hot melt layer 8 is temporarily bonded in a semi-molten state. Pressure is 0.5MPa and pressurization time is 2 seconds.
[0038] 熱圧着ロール 46, 46は、係合部 Sを両側に備えており、基板 20及び主電極形成 マスク 10aの位置合わせ孔 Hが係合部 Sに係合することで、基板 20及び主電極形成 マスク 10aの幅方向及び長手方向の位置合わせが行われる。基板 20と主電極形成 マスク 10aとの位置合わせは、このような方法に限定されず、例えば、位置合わせ孔 H及び係合部 Sの代わりにそれぞれ設けたァライメントマーク同士の位置合わせによ り行うことが可能である。また、熱圧着ロール 46, 46を通過させる前に、スプロケット 孔を有する冷ロールにより基板 20及び主電極形成マスク 10aの位置合わせを行うよ うにしてもよぐこれによつて、位置が合わない場合のやり直しを容易にすることができ る。  [0038] The thermocompression-bonding rolls 46, 46 are provided with engagement portions S on both sides, and the alignment holes H of the substrate 20 and the main electrode forming mask 10a are engaged with the engagement portions S. The alignment of the main electrode forming mask 10a in the width direction and the longitudinal direction is performed. The alignment of the substrate 20 and the main electrode forming mask 10a is not limited to such a method. For example, alignment of alignment marks provided in place of the alignment hole H and the engaging portion S is performed. Is possible. In addition, the substrate 20 and the main electrode formation mask 10a may be aligned by a cold roll having sprocket holes before passing through the thermocompression-bonding rolls 46, 46. It is possible to easily redo the case.
[0039] 基板 20は、主電極形成マスク 10aが仮接着された状態で、巻き取りロール(図示せ ず)に巻き取られた後、真空蒸着装置などの物理的蒸着装置に装填される。そして、 物理的蒸着装置内において再び繰り出され、開口部 12aを介して物理的蒸着が行 われた後、図 3 (c)に示すように、粘着ロール 48により主電極形成マスク 10aが剥離 され、主電極パターン 22aが残留する。  [0039] The substrate 20 is wound around a winding roll (not shown) in a state where the main electrode forming mask 10a is temporarily bonded, and then loaded into a physical vapor deposition apparatus such as a vacuum vapor deposition apparatus. Then, the film is drawn out again in the physical vapor deposition apparatus, and after physical vapor deposition is performed through the opening 12a, the main electrode formation mask 10a is peeled off by the adhesive roll 48 as shown in FIG. The main electrode pattern 22a remains.
[0040] 次に、図 3 (d)に示すように、基板 20上の主電極パターン 22aが形成された面に、 搬送ロール(図示せず)により補助電極形成マスク 10bを積層し、一対の熱圧着ロー ル 52, 52間に供給することにより、基板 20に補助電極形成マスク 10bを仮接着する 。この後、基板 20は、上記と同様に物理的蒸着装置に搬送され、開口部 12bを介し て物理的蒸着がおこなわれた後、補助電極形成マスク 10bが剥離され、補助電極パ ターンが残留する。 Next, as shown in FIG. 3 (d), an auxiliary electrode forming mask 10b is laminated on the surface of the substrate 20 on which the main electrode pattern 22a is formed by a transport roll (not shown), Thermocompression bonding The auxiliary electrode forming mask 10b is temporarily bonded to the substrate 20 by supplying between the base plates 52 and 52. Thereafter, the substrate 20 is transported to the physical vapor deposition apparatus in the same manner as described above, and after physical vapor deposition is performed through the opening 12b, the auxiliary electrode formation mask 10b is peeled off, and the auxiliary electrode pattern remains. .
[0041] このように、本実施形態の電極パターンの形成方法によれば、従来のように水溶性 薬液や有機溶剤などを用いることなく電極パターンを連続的に形成することができ、 環境への負荷を軽減しつつ量産化を可能にすることができる。  [0041] Thus, according to the electrode pattern forming method of the present embodiment, the electrode pattern can be continuously formed without using a water-soluble chemical solution or an organic solvent as in the prior art. Mass production can be made possible while reducing the load.
[0042] また、主電極形成マスク 10a (又は補助電極形成マスク 10b)にお!/、て、ホットメルト 層が金属材料カゝらなる被覆層により覆われているので、導電性材料の物理的蒸着を 行う際の熱によりホットメルト層 8が基板 20に密着するのを防止することができ、主電 極形成マスク 10a (又は補助電極形成マスク 10b)を基板 20から容易に剥離すること ができる。このような効果は、本実施形態のように被覆層 4とホットメルト層 8との間に 基材フィルム 6が介在されて 、る場合にぉ 、て、特に顕著である。  In addition, since the hot melt layer is covered with a coating layer made of a metal material cover in the main electrode forming mask 10a (or the auxiliary electrode forming mask 10b), the physical property of the conductive material It is possible to prevent the hot melt layer 8 from sticking to the substrate 20 due to heat during vapor deposition, and the main electrode forming mask 10a (or the auxiliary electrode forming mask 10b) can be easily peeled off from the substrate 20. . Such an effect is particularly remarkable when the base film 6 is interposed between the coating layer 4 and the hot melt layer 8 as in the present embodiment.
[0043] 主電極形成マスク 10a (又は補助電極形成マスク 10b)の構成は、必ずしも本実施 形態のものに限定されず、ホットメルト層 8が被覆層 4に覆われて ヽる限り他の構成と することも可能であり、例えば、ホットメルト層 8の表面に被覆層 4が直接形成された構 成〖こすることちでさる。  [0043] The configuration of the main electrode formation mask 10a (or the auxiliary electrode formation mask 10b) is not necessarily limited to that of the present embodiment, and may be other configurations as long as the hot melt layer 8 is covered with the coating layer 4. For example, it may be performed by rubbing a structure in which the coating layer 4 is directly formed on the surface of the hot melt layer 8.
[0044] 上述した電極パターンの形成方法は、後述するように、色素増感型の光電池の電 極パターンを形成する方法として好適であるが、これに限定されず、他の種類の光電 池に用いられる電極パターンや、液晶表示装置、 EL発光デバイスなど他のデバイス に用いられる電極パターンを形成する方法としても、利用することができる。  [0044] The electrode pattern forming method described above is suitable as a method for forming an electrode pattern of a dye-sensitized photovoltaic cell, as will be described later, but is not limited thereto, and is applicable to other types of photovoltaic cells. It can also be used as a method of forming electrode patterns used in other devices such as liquid crystal display devices and EL light emitting devices.
2.半導体電極 (光電変換層)の形成  2. Formation of semiconductor electrode (photoelectric conversion layer)
電極パターン 22が形成された基板 20に対して、以下のようにして光電変換層とな る半導体電極を形成する。まず、主電極形成マスク 10aと同様に構成された(図 1 (c) 参照)、開口部 32aを有する半導体電極形成マスク 30aを用意し、図 4 (a)に示すよう に、電極パターン 22と開口部 32aとの位置合わせを行いながら、半導体電極形成マ スク 30aを基板 20上に貼り合わせる。尚、半導体電極形成マスク 30aにおいて、主電 極形成マスク 10aと同様の構成要素に同一の符号を付している。 [0045] 基板 20への半導体電極形成マスク 30aの接着についても、主電極形成マスク 10a の接着と同様に、ホットメルト層 8と基板 20との間で容易に剥離可能な仮接着とする ことが好ましい。この状態で、基板 20の表面にコロナ放電処理などを施し、開口部 32 aから露出する電極パターン 22の表面をクリーンィ匕した後、図 4 (b)に示すように、電 極パターン 22上に半導体電極材料力もなる第 1の半導体層 34aを物理的蒸着により 形成する。ついで、図 4 (c)に示すように、半導体電極材料をスキージ等により塗布し 、第 1の半導体層 34a上に第 2の半導体層 34bを堆積する。第 1の半導体層 34aは、 必ずしも必要ではなぐ電極パターン 22に第 2の半導体層 34bを直接形成してもよい 。半導体電極材料としては、例えば、亜鉛、ニオブ、錫、チタン、インジウム、タンダス テン、タンタル、モリブデン、マンガン、ニッケル、銅などの酸化物や、さらにはリンィ匕 ガリウム、リン化インジウムなどが挙げられる。 A semiconductor electrode to be a photoelectric conversion layer is formed on the substrate 20 on which the electrode pattern 22 is formed as follows. First, a semiconductor electrode formation mask 30a having an opening 32a, which is configured similarly to the main electrode formation mask 10a (see FIG. 1 (c)), is prepared. As shown in FIG. The semiconductor electrode forming mask 30a is bonded onto the substrate 20 while aligning with the opening 32a. In addition, in the semiconductor electrode formation mask 30a, the same code | symbol is attached | subjected to the component similar to the main electrode formation mask 10a. [0045] The adhesion of the semiconductor electrode forming mask 30a to the substrate 20 may also be a temporary adhesion that can be easily peeled between the hot melt layer 8 and the substrate 20, similarly to the adhesion of the main electrode forming mask 10a. preferable. In this state, the surface of the substrate 20 is subjected to a corona discharge treatment or the like to clean the surface of the electrode pattern 22 exposed from the opening 32a, and then the electrode pattern 22 is formed on the electrode pattern 22 as shown in FIG. The first semiconductor layer 34a that also has a semiconductor electrode material force is formed by physical vapor deposition. Next, as shown in FIG. 4C, a semiconductor electrode material is applied with a squeegee or the like, and a second semiconductor layer 34b is deposited on the first semiconductor layer 34a. In the first semiconductor layer 34a, the second semiconductor layer 34b may be formed directly on the electrode pattern 22 that is not always necessary. Examples of the semiconductor electrode material include oxides such as zinc, niobium, tin, titanium, indium, tandasten, tantalum, molybdenum, manganese, nickel, and copper, and gallium phosphate and indium phosphide.
[0046] 第 1の半導体層 34aは、物理的蒸着により形成された密な膜であり、後述する光増 感色素及び電解液が電極パターン 22に接触するのを防止する。一方、第 2の半導 体層 34bは、後述する光増感色素の担持量を増やすために、直径が 5ηπ!〜 200nm 程度の半導体微粒子を堆積してなる多孔質膜であることが望ましぐその厚みは、通 常、約 0. 1〜20 m程度である。また、半導体微粒子の堆積後に、加水分解性チタ ン化合物、加水分解性チタン低縮合物、水酸化チタン及び水酸化チタン低縮合物な どによるチタンゾル又はペルォキソチタンゾルを塗布してもよぐ水洗を行った後、必 要に応じて加熱により水を蒸発させたものを第 2の半導体層 34bとすることもできる。  [0046] The first semiconductor layer 34a is a dense film formed by physical vapor deposition, and prevents a photosensitizing dye and an electrolytic solution described later from coming into contact with the electrode pattern 22. On the other hand, the second semiconductor layer 34b has a diameter of 5ηπ! In order to increase the amount of photosensitizing dye supported later. The desired thickness of the porous film formed by depositing semiconductor fine particles of about 200 nm is usually about 0.1 to 20 m. Further, after the semiconductor fine particles are deposited, water washing may be performed by applying a titanium sol or peroxotitanium sol such as a hydrolyzable titanium compound, a hydrolyzable titanium low condensate, titanium hydroxide, or a titanium hydroxide low condensate. After the above, the second semiconductor layer 34b can be obtained by evaporating water by heating as necessary.
[0047] この後、図 4 (d)に示すように、第 2の半導体層 34bに増感色素液を浸漬、電気泳 動あるいはスキージ塗布などした後、乾燥させること〖こより、光増感色素が担持された 半導体電極 34を得る。  Thereafter, as shown in FIG. 4 (d), the sensitizing dye solution is immersed in the second semiconductor layer 34b, electrophoretic or squeegee-coated, and then dried. As a result, a semiconductor electrode 34 on which is supported is obtained.
[0048] 半導体電極 34にお 、て色素増感に用いられる光増感色素は、従来公知のものが 使用でき、例えば、ルテニウム—トリス、ルテニウム—ビス、オスミウム—トリス、ォスミゥ ム ビス型の遷移金属錯体、またはルテニウム一シス -ジアクア ビビリシル錯体、 またはフタロシアニンやポルフィリン、ジチオラート錯体、ァセチルァセトナート錯体な どのいわゆる金属キレート錯体、およびシァ-ジン色素、メロシアニン色素、ローダミ ン色素などの有機色素、およびォキサジァゾール誘導体、ベンゾチアゾール誘導体 、クマリン誘導体、スチルベン誘導体、芳香環を有する有機化合物などが挙げられる[0048] Conventionally known photosensitizing dyes used for dye sensitization in semiconductor electrode 34 can be used, for example, ruthenium-tris, ruthenium-bis, osmium-tris, osmium bis type transitions. Metal complexes, or ruthenium monocis-diaquabibilicil complexes, or so-called metal chelate complexes such as phthalocyanines, porphyrins, dithiolate complexes, and acetylethylacetonate complexes, and organic dyes such as cyanazine dyes, merocyanine dyes, rhodamine dyes, And oxadiazole derivatives, benzothiazole derivatives , Coumarin derivatives, stilbene derivatives, organic compounds having an aromatic ring, etc.
。これらの色素は、第 2の半導体層 34b上に化学的に吸着し易いように、カルボキシ ル基、スルホン酸基、リン酸基、アミド基、アミノ基、カルボ-ル基、ホスフィン基などの 官能基を有することが好ましい。これらの光増感色素は、例えば、適当な溶媒に溶解 した後、この色素溶液を第 2の半導体層 34bに吸着、担持させることができる。 . These dyes have a functional group such as a carboxyl group, a sulfonic acid group, a phosphoric acid group, an amide group, an amino group, a carboxylic group, and a phosphine group so that they are easily chemically adsorbed on the second semiconductor layer 34b. It preferably has a group. For example, these photosensitizing dyes can be dissolved in an appropriate solvent, and then the dye solution can be adsorbed and supported on the second semiconductor layer 34b.
[0049] この後、半導体電極形成マスク 30aを剥離することにより、図 4 (e)に示すように、基 板 20の電極パターン 22上に半導体電極 34が残留する。  Thereafter, by removing the semiconductor electrode formation mask 30a, the semiconductor electrode 34 remains on the electrode pattern 22 of the substrate 20 as shown in FIG. 4 (e).
[0050] 基板 20への半導体電極 34の形成についても、電極パターン 22の形成と同様に行 うことができる。すなわち、フィルム状の積層体 10をロールなど力も繰り出して、両側 縁部に位置合わせ孔ゃァライメントマークを形成すると共に、電極パターン 22に対応 した開口部 32aを設けることにより、半導体電極形成マスク 30aを形成する。そして、 半導体電極形成マスク 30aを基板 20上に積層し、熱圧着した後、スクリーン印刷機、 ロール塗工機などの塗布装置に搬送する。基板 20と半導体電極形成マスク 30aとの 位置合わせは、位置合わせ孔ゃァライメントマークを用いて行うことができる。  The formation of the semiconductor electrode 34 on the substrate 20 can be performed in the same manner as the formation of the electrode pattern 22. That is, the film-like laminate 10 is also fed with a force such as a roll to form alignment hole alignment marks on both side edges and to provide an opening 32a corresponding to the electrode pattern 22, thereby providing a semiconductor electrode forming mask 30a. Form. Then, the semiconductor electrode forming mask 30a is laminated on the substrate 20, and after thermocompression bonding, it is conveyed to a coating apparatus such as a screen printing machine or a roll coating machine. The alignment between the substrate 20 and the semiconductor electrode forming mask 30a can be performed using alignment holes and alignment marks.
[0051] そして、塗布装置において半導体電極材料及び色素液が基板 20上に順次塗布さ れた後、基板 20は、乾燥装置へ搬送されて、加熱乾燥が行われる。これにより、基板 20への半導体電極 34の形成が完了する。この後、粘着ロールの粘着力により半導 体電極形成マスク 30aが剥離され、半導体電極 34が残留する。  [0051] Then, after the semiconductor electrode material and the dye solution are sequentially applied onto the substrate 20 in the coating apparatus, the substrate 20 is transported to a drying apparatus and subjected to heat drying. Thereby, the formation of the semiconductor electrode 34 on the substrate 20 is completed. Thereafter, the semiconductor electrode forming mask 30a is peeled off by the adhesive force of the adhesive roll, and the semiconductor electrode 34 remains.
[0052] このように、本実施形態の半導体電極の形成方法によれば、光電変換効率の高 、 半導体電極を、連続的に効率よく形成することができる。  As described above, according to the method for forming a semiconductor electrode of the present embodiment, a semiconductor electrode having high photoelectric conversion efficiency can be formed continuously and efficiently.
3.バック電極フィルムの形成  3. Formation of back electrode film
バック電極フィルムは、上述したフロント電極フィルム 30の場合と同様の手順で基 板上に主電極パターンを形成することにより、製造することができる。バック電極フィ ルムの主電極パターンに用いられる材料としては、 ITO (インジウム錫酸化物)、 FTO (フッ素ドープ酸ィ匕錫)、 ATO (アンチモンド一プ酸ィ匕錫)などの透明性材料の他、金 、銀、銅、白金、クロムなどの金属材料を例示することができ、これらの 2種以上を積 層して主電極パターンを形成してもよい。例えば、主電極形成マスクの開口部を介し て基板上に ITO膜を蒸着した後、更にこの開口部を介して白金膜を蒸着することに より、ノ ック電極フィルムの主電極パターンを形成することができる。また、基板上に 金属など力もなる主電極パターンを形成する前に、基板上にアンダーコート膜を塗布 し、乾燥させることにより、図 5に示すように、基板 82上にアンダーコート層 81を介し て電極パターン 83が形成されたバック電極フィルム 80を形成することも可能であり、 これによつて、電極パターン 83の密着性を高めることができる。 The back electrode film can be manufactured by forming a main electrode pattern on the substrate in the same procedure as in the case of the front electrode film 30 described above. As the material used for the main electrode pattern of the back electrode film, transparent materials such as ITO (Indium Tin Oxide), FTO (Fluorine-doped Oxidized Tin) and ATO (Antimony Monopoxide) are used. Other examples include metal materials such as gold, silver, copper, platinum, and chromium, and two or more of these may be stacked to form the main electrode pattern. For example, after depositing an ITO film on the substrate through the opening of the main electrode formation mask, further depositing a platinum film through this opening. Thus, the main electrode pattern of the knock electrode film can be formed. Further, before forming a main electrode pattern having a strong force such as metal on the substrate, an undercoat film is applied on the substrate and dried, so that an undercoat layer 81 is interposed on the substrate 82 as shown in FIG. Thus, it is possible to form the back electrode film 80 on which the electrode pattern 83 is formed, whereby the adhesion of the electrode pattern 83 can be enhanced.
[0053] また、ノ ック電極フィルムは、ホットメルト層及び被覆層が粘着剤層を介して積層さ れた主電極形成マスクを用いて形成することもできる。すなわち、図 10 (a)に示すよう に、ホットメルト層 8に粘着剤層 2を介して被覆層 4を貼り合わせた後、図 10 (b)に示 すように、型抜き加工を施して開口部 12aを形成することにより、主電極形成マスク 1 OOaを得ることができる。尚、図 10において、図 1に示す構成と同様の部分に同一の 符号を付している。 [0053] The knock electrode film can also be formed using a main electrode formation mask in which a hot melt layer and a coating layer are laminated via an adhesive layer. That is, as shown in FIG. 10 (a), after the coating layer 4 is bonded to the hot melt layer 8 via the adhesive layer 2, a die cutting process is performed as shown in FIG. 10 (b). By forming the opening 12a, the main electrode formation mask 1OOa can be obtained. In FIG. 10, the same parts as those shown in FIG.
[0054] この後は、図 1 (d)から (f)に示す工程と同様の手順で、主電極形成マスクを基板上 に接着した後、導電性材料の物理的蒸着を行い、ホットメルト層と基板との間で主電 極形成マスクを剥離することにより、基板上に主電極パターンを形成することができる  [0054] Thereafter, the main electrode forming mask is adhered onto the substrate in the same procedure as shown in FIGS. 1 (d) to (f), and then the conductive material is physically vapor-deposited to form a hot melt layer. The main electrode pattern can be formed on the substrate by peeling the main electrode forming mask between the substrate and the substrate.
[0055] 図 10 (c)に示すように、主電極形成マスク 100aを接着する基板 20の表面には、予 めアンダーコート材料を塗布して乾燥させることによりアンダーコート層 81を形成して もよい。また、ホットメルト層 8と被覆層 4との張り合わせは、粘着剤層 2を介して行う代 わりに、ホットメルト層 8を被覆層 4に熱融着して強固に接着させて行うことも可能であ り、図 11に示すように、主電極形成マスク 10 laを、被覆層 4にホットメルト層 8が直接 接着された構成にすることができる。 [0055] As shown in FIG. 10 (c), an undercoat layer 81 may be formed on the surface of the substrate 20 to which the main electrode forming mask 100a is adhered by applying an undercoat material and drying it in advance. Good. Also, the hot melt layer 8 and the covering layer 4 can be bonded together by heat-bonding the hot melt layer 8 to the covering layer 4 and firmly adhering them instead of the adhesive layer 2. As shown in FIG. 11, the main electrode forming mask 10 la can be configured such that the hot melt layer 8 is directly bonded to the coating layer 4.
4.配線部の形成  4. Wiring formation
次に、上述したフロント電極フィルム 30とバック電極フィルム 80との間で導通を取る ための配線部を形成する方法を説明する。  Next, a method for forming a wiring portion for establishing conduction between the above-described front electrode film 30 and back electrode film 80 will be described.
[0056] まず、図 6 (a)に示すように、一方面に粘着剤層 62が形成された基材フィルム 64を 用意し、粘着剤層 62にホットメルト層 66を貼り合わせて、図 6 (b)に示すように、積層 体 68を構成する。 First, as shown in FIG. 6 (a), a base film 64 having an adhesive layer 62 formed on one side is prepared, and a hot-melt layer 66 is bonded to the adhesive layer 62, so that FIG. As shown in (b), a laminate 68 is formed.
[0057] 粘着剤層 62は、ホットメルト層 66に対して易剥離性を有するものであり、例えば、ァ クリル樹脂からなる耐熱性の微粘着剤を使用することができる。粘着剤層 62の厚み は、後述する電解質層の厚みを考慮して設定すればよぐ例えば、 1〜40 /ζ πιである [0057] The pressure-sensitive adhesive layer 62 is easily peelable from the hot-melt layer 66. A heat-resistant slight pressure-sensitive adhesive made of a krill resin can be used. The thickness of the pressure-sensitive adhesive layer 62 may be set in consideration of the thickness of the electrolyte layer described later, for example, 1 to 40 / ζ πι.
[0058] 基材フィルム 64は、ポリプロピレン、ポリエチレンテレフタレート(PET)、ポリエチレ ンナフタレート(PEN)、ナイロン、フッ素榭脂など力 形成された硬質フィルム力 な り、厚みは、 20〜: LOO m程度が好ましい。 [0058] The base film 64 is a hard film force formed of polypropylene, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), nylon, fluorine resin, etc., and has a thickness of about 20 to about LOO m. preferable.
[0059] ホットメルト層 66は、例えば、ポリエステル系榭脂、ポリアミド系榭脂、 EVA系榭脂、 ポリオレフイン系榭脂などに、ロジン系やテルペン系などの粘着付与剤などが添加さ れた公知のものを用いることができる。  [0059] The hot melt layer 66 is, for example, a publicly known material in which a rosin-based or terpene-based tackifier is added to a polyester-based resin, a polyamide-based resin, an EVA-based resin, a polyolefin-based resin, or the like. Can be used.
[0060] 次に、図 6 (c)に示すように、ホットメルト層 66のみを切除(半抜き)して、電解液収 容部 68aを形成すると共に、積層体全体を貫通する配線部形成孔 68bを形成し、貼 り合わせ用マスク 69を作成する。このとき、電解液収容部 68aに電解液を供給するた めの電解液流路も、ホットメルト層 66のみを除去する半抜きにより形成しておく。  [0060] Next, as shown in FIG. 6 (c), only the hot melt layer 66 is cut (half removed) to form an electrolyte solution storage portion 68a and a wiring portion that penetrates the entire laminate. A hole 68b is formed, and a bonding mask 69 is created. At this time, the electrolytic solution flow path for supplying the electrolytic solution to the electrolytic solution storage portion 68a is also formed by half-cutting to remove only the hot melt layer 66.
[0061] そして、図 6 (d)に示すように、この貼り合わせ用マスク 69を、配線部形成孔 68bと 電極パターン 83との位置合わせが行われるように、バック電極フィルム 80の基板 82 上に配置し、熱圧着ローラなどを用いてホットメルト層 66を基板 82に熱圧着する。こ の熱圧着は、ホットメルト層 66を十分溶融させて、基板 82との間で強固に密着させる ことが好ましい。具体的には、ホットメルト層 66と基板 82との間の接着強度は、 2NZ cm以上であることが好ましい。一方、粘着剤層 62とホットメルト層 66との間は、上述 したように容易に剥離可能であることが好ましぐホットメルト層 66と基板 82との間の 接着強度よりも接着強度が小さいことが好ましい。具体的には、粘着剤層 62とホットメ ルト層 66との間の接着強度は、 0. 01-0. 2NZcmであることが好ましい。  [0061] Then, as shown in FIG. 6 (d), the bonding mask 69 is placed on the substrate 82 of the back electrode film 80 so that the wiring portion forming hole 68b and the electrode pattern 83 are aligned. The hot melt layer 66 is thermocompression bonded to the substrate 82 using a thermocompression roller or the like. In this thermocompression bonding, it is preferable that the hot melt layer 66 is sufficiently melted and firmly adhered to the substrate 82. Specifically, the adhesive strength between the hot melt layer 66 and the substrate 82 is preferably 2 NZcm or more. On the other hand, the adhesive strength between the adhesive layer 62 and the hot melt layer 66 is smaller than the adhesive strength between the hot melt layer 66 and the substrate 82, which is preferably easily peelable as described above. It is preferable. Specifically, the adhesive strength between the pressure-sensitive adhesive layer 62 and the hot melt layer 66 is preferably 0.01 to 0.2 NZcm.
[0062] ここまでの工程は、フィルム状の積層体 68をロールなど力も繰り出して、両側縁部 に位置合わせ孔ゃァライメントマークを形成すると共に、電解液収容部 68a及び配線 部形成孔 68bを形成することにより、貼り合わせ用マスク 69を形成した後、基板 82上 に配置して熱圧着することにより、連続的に行うことができる。  [0062] In the process up to this point, the film-like laminate 68 is also fed with a force such as a roll to form alignment holes and alignment marks on both side edges, and to provide an electrolyte solution containing portion 68a and a wiring portion forming hole 68b. After forming the bonding mask 69 by forming, it can be continuously performed by placing on the substrate 82 and thermocompression bonding.
[0063] この後、上述した配線部形成用の導電性ペーストを、貼り合わせ用マスク 69上にス キージ塗布することにより、図 7 (a)に示すように、配線部形成孔 68bに導電性ペース ト 61aを充填する。そして、貼り合わせ用マスク 69を、粘着剤層 62とホットメルト層 66 との間で剥離ローラなどにより剥離し、図 7 (b)に示すように、基材フィルム 64は除去 する一方、ホットメルト層 66は残存させる。 [0063] After that, the conductive paste for forming the wiring portion described above is squeezed onto the bonding mask 69, whereby a conductive material is formed in the wiring portion forming hole 68b as shown in FIG. 7 (a). pace Fill with 61a. Then, the bonding mask 69 is peeled between the pressure-sensitive adhesive layer 62 and the hot melt layer 66 by a peeling roller or the like, and the base film 64 is removed while the hot melt layer is removed as shown in FIG. Layer 66 remains.
[0064] 導電性ペースト 61aは、半田合金粉末を榭脂溶液に撹拌混合することにより形成さ れたものである。半田合金は、 SnZBi、 Sn/Bi/Pb, Sn/Bi/Zn, Bi/Pb, Sn Zln、 Sn/Bi/Pb, Sn/Bi/ln, SnZBiZPbZlnなど低融点の半田合金粉末を 好ましく例示することができ、組成比を適宜調整する等して所望の融点を得ることが できる。半田合金粉末の平均粒径は、 0. 01〜50 m程度を例示することができる。  [0064] The conductive paste 61a is formed by stirring and mixing a solder alloy powder into a resin solution. The solder alloy should preferably be exemplified by a low melting point solder alloy powder such as SnZBi, Sn / Bi / Pb, Sn / Bi / Zn, Bi / Pb, Sn Zln, Sn / Bi / Pb, Sn / Bi / ln, SnZBiZPbZln. The desired melting point can be obtained by appropriately adjusting the composition ratio. The average particle size of the solder alloy powder can be exemplified by about 0.01 to 50 m.
[0065] より詳細には、半田合金粉末の液相線温度が、基板 20の耐熱限界温度よりも低い ことが好ましぐ最高でも 150°C以下であることがより好ましい。ここで、「耐熱限界温 度」とは、材料の変質、劣化を防止できる最高温度をいい、例えば、 PET:約 130°C、 メチルメタタリレート系アクリル榭脂:約 70°C、シリコーン榭脂:約 180°Cである。一方、 屋外での高温使用時などを考慮すると、半田合金粉末の液相線温度は、 60°C以上 であることが好ましぐ 70°C以上であることがより好ましい。組成比と固相線温度及び 液相線温度との関係を、表 1に例示する。  [0065] More specifically, it is more preferable that the liquidus temperature of the solder alloy powder is lower than the heat-resistant limit temperature of the substrate 20 and is 150 ° C or less at the maximum. Here, the “heat-resistant limit temperature” refers to the maximum temperature at which material deterioration and deterioration can be prevented. For example, PET: about 130 ° C, methylmethacrylate acrylic resin: about 70 ° C, silicone Fat: About 180 ° C. On the other hand, considering the use at high temperatures outdoors, the liquidus temperature of the solder alloy powder is preferably 60 ° C or higher, more preferably 70 ° C or higher. Table 1 shows the relationship between the composition ratio and the solidus temperature and liquidus temperature.
[0066] [表 1]  [0066] [Table 1]
Figure imgf000017_0001
[0067] 榭脂溶液は、各種有機溶媒、水、或 、はこれらの 2種以上の混合液力 なる溶媒に 、アクリル榭脂、アクリルウレタン榭脂、ウレタン榭脂、ポリエステル榭脂、フエノール榭 脂などの可撓性および密着性が良好な熱硬化性榭脂を溶解させたものを、好ましく 用いることができる。溶解される榭脂は、半田合金粉末の加熱溶融時において熱分 解が生じな 、程度の耐熱性を有することが好ま 、。
Figure imgf000017_0001
[0067] The resin solution is made of various organic solvents, water, or a solvent that is a mixture of two or more of these, acrylic resin, acrylic urethane resin, urethane resin, polyester resin, phenol resin. What melt | dissolved thermosetting resin with favorable flexibility and adhesiveness, such as these, can be used preferably. It is preferable that the resin to be dissolved has a degree of heat resistance that does not cause thermal decomposition when the solder alloy powder is heated and melted.
[0068] 榭脂溶液の体積に占める半田合金粉末の体積の割合 (体積分率)は、大きすぎる と基板への密着性が確保しに《なる一方、小さすぎると良好な導電性を確保しに《 なること力ら、 50〜90%であることが好ましぐ 70〜85%がより好ましい。  [0068] If the volume ratio (volume fraction) of the solder alloy powder in the volume of the resin solution is too large, adhesion to the substrate will be ensured, whereas if it is too small, good electrical conductivity will be ensured. Furthermore, it is preferable that the power is 50 to 90%, more preferably 70 to 85%.
[0069] 次に、ホットメルト層 8付きのフロント電極フィルム 30 (図 12 (f)参照)を、図 7 (c)に 示すように、基板 20上の電極パターン 22が導電性ペースト 61aに接続されると共に 、電極パターン 22上の半導体電極 34が電解液収容部 68aに収容されるように位置 合わせを行い、ホットメルト層 8, 66同士を貼り合わせる。この後、熱圧着ローラなどを 用いてホットメルト層 8, 66を加熱溶融させ、フロント電極フィルム 30とバック電極フィ ルム 80とを強固に密着させる。  [0069] Next, the front electrode film 30 with the hot melt layer 8 (see FIG. 12 (f)) is connected to the conductive paste 61a with the electrode pattern 22 on the substrate 20 as shown in FIG. 7 (c). At the same time, alignment is performed so that the semiconductor electrode 34 on the electrode pattern 22 is accommodated in the electrolyte accommodating portion 68a, and the hot melt layers 8 and 66 are bonded together. Thereafter, the hot melt layers 8 and 66 are heated and melted using a thermocompression roller or the like, and the front electrode film 30 and the back electrode film 80 are firmly adhered.
[0070] 実際の製造においては、図 8に示すように、電極パターン 22, 83間に半導体電極 34を有する光電池セルを複数形成し、隣接する半導体電極 34, 34が、電極パター ン 22, 83及び導電性ペースト 6 laを介して直列(又は並列)に電気的に接続されるよ うに構成することが好ましい。ホットメルト層 66の加熱により、配線部形成孔 68bに充 填された導電性ペースト 6 laは、榭脂が溶融してフロント電極フィルム 30及びバック 電極フィルム 80にそれぞれ密着すると共に、半田合金粉末が溶融して電極パターン 22, 83との接続部が導通可能となる結果、フロント電極フィルム 30とバック電極フィ ルム 80との間で確実な導通を得ることができる。ホットメルト層 66の加熱温度及びカロ 熱時間は、ホットメルト層 66や導電性ペースト 61aの材料などを考慮して適宜設定す ればよいが、例えば、約 120〜150°C、約 10〜15分である。  In actual manufacturing, as shown in FIG. 8, a plurality of photovoltaic cells having the semiconductor electrode 34 are formed between the electrode patterns 22 and 83, and the adjacent semiconductor electrodes 34 and 34 are connected to the electrode patterns 22 and 83, respectively. In addition, it is preferable to be configured to be electrically connected in series (or in parallel) via the conductive paste 6 la. The conductive paste 6 la filled in the wiring portion forming hole 68b by heating the hot melt layer 66 melts the resin and adheres to the front electrode film 30 and the back electrode film 80, respectively. As a result of melting and enabling connection between the electrode patterns 22 and 83, reliable conduction between the front electrode film 30 and the back electrode film 80 can be obtained. The heating temperature and calorie heating time of the hot melt layer 66 may be appropriately set in consideration of the material of the hot melt layer 66 and the conductive paste 61a, for example, about 120 to 150 ° C, about 10 to 15 Minutes.
[0071] このように、本実施形態の配線部の形成方法によれば、フロント電極フィルム 30と ノ ック電極フィルム 80とを貼り合わせる工程において、配線部の形成を同時に行うこ とにより、製造効率を高めることができる。  [0071] Thus, according to the method for forming a wiring portion of the present embodiment, in the step of bonding the front electrode film 30 and the knock electrode film 80, the wiring portion is formed at the same time. Efficiency can be increased.
[0072] 本実施形態にぉ 、ては、基材フィルム 64として榭脂フィルムを用いて 、るが、例え ば金属フィルムなど他の材質のフィルムを用いることもできる。また、基材フィルム 64 とホットメルト層 66との間に介在させた粘着剤層 62は必ずしも必要ではなく、ホットメ ルト層 66から基材フィルム 64を容易に剥離できる場合には、ホットメルト層 66に基材 フィルム 64を直接貼り合わせてもよ 、。 [0072] In the present embodiment, a resin film is used as the base film 64. For example, For example, a film made of another material such as a metal film can be used. In addition, the adhesive layer 62 interposed between the base film 64 and the hot melt layer 66 is not necessarily required. If the base film 64 can be easily peeled from the hot melt layer 66, the hot melt layer 66 is not necessary. The base film 64 can be directly bonded to the substrate.
[0073] 以上の説明は、フロント電極フィルム 30とバック電極フィルム 80との間で立体的な 導通を取るための一例であるが、フロント電極フィルム 30又はバック電極フィルム 80 において、電極パターン 22, 83を構成する各電極部を直列又は並列に接続したり、 電極パターン 22, 83への電気的な接続部を形成するために、フロント電極フィルム 3 0又はバック電極フィルム 80の基板 20, 82上に、上述した導電性ペーストからなる配 線部を形成することも可能である。この場合、配線部は、所定形状の開口部を有する 配線部形成マスクを介して、基板上に導電性ペーストをスキージなどで塗布すること により、形成される。 The above description is an example for achieving three-dimensional conduction between the front electrode film 30 and the back electrode film 80. In the front electrode film 30 or the back electrode film 80, the electrode patterns 22, 83 are used. On the substrate 20, 82 of the front electrode film 30 or the back electrode film 80 in order to connect each electrode part constituting the electrode in series or in parallel, or to form an electrical connection part to the electrode pattern 22, 83. It is also possible to form a wiring portion made of the conductive paste described above. In this case, the wiring part is formed by applying a conductive paste on the substrate with a squeegee or the like through a wiring part forming mask having an opening of a predetermined shape.
[0074] 配線部形成マスクは、上述した主電極形成マスク 10aと同様に、 PETなどカゝらなる 基材フィルムの一方面に、強粘着剤からなる粘着剤層 2を介してホットメルト層が形成 された構成を例示することができ、熱圧着ロールなどによりホットメルト層を半溶融状 態で熱圧着することにより、剥離可能に仮接着することができる。基材フィルムの表面 は、必要に応じて耐熱フィルムで被覆されていてもよい。配線部形成マスクとしては、 この他に、基材フィルムの一方面に粘着強度が調整された弱粘着層付きの構成にす ることも可能であり、圧着ロールにより基板に圧着することができる。更に、このような 弱粘着層付き配線部形成マスクに、上述したホットメルト層付きの配線部形成マスク を積層した構成にすることもできる。  [0074] Similar to the above-described main electrode forming mask 10a, the wiring portion forming mask has a hot melt layer on one side of a base film made of PET or the like via an adhesive layer 2 made of a strong adhesive. The formed configuration can be exemplified, and the hot melt layer can be temporarily bonded in a peelable manner by thermocompression bonding in a semi-molten state with a thermocompression-bonding roll or the like. The surface of the base film may be coated with a heat resistant film as necessary. In addition to this, the wiring portion formation mask can be configured to have a weak adhesive layer with adjusted adhesive strength on one surface of the base film, and can be crimped to the substrate by a crimping roll. Furthermore, the above-described wiring part forming mask with a hot melt layer may be laminated on such a wiring part forming mask with a weak adhesive layer.
[0075] このような配線部の形成方法によれば、密着性及び導電性が良好な配線部を効率 よく製造することができる。  [0075] According to such a method for forming a wiring portion, a wiring portion having good adhesion and conductivity can be efficiently manufactured.
5.電解質層の形成  5. Formation of electrolyte layer
次に、フロント電極フィルム 30とバック電極フィルム 80との間に電解質層を形成する 。基板 82上に残存したホットメルト層 66には、電解液流路が形成されており、これら は電解液収容部 68aを外部と連通する。  Next, an electrolyte layer is formed between the front electrode film 30 and the back electrode film 80. In the hot melt layer 66 remaining on the substrate 82, an electrolyte solution flow path is formed, which communicates the electrolyte container 68a with the outside.
[0076] 図 9 (a)に示すように、電解液流路の OUT側において吸引することにより、電解液 流路の IN側カゝら電解液が供給され、電解液収容部 68aに電解液が注入されて、電 解質層 90が形成される。電解液としては、例えば、ヨウ素 Zヨウ化物、臭素 Z臭化物 、遷移金属錯体などの電解質が、ァセトニトリルやエチレンカーボネートなどの溶媒 やイミダゾリゥム塩などのイオン性液体に溶解してなるものが挙げられる。尚、図 9 (a) における電解液の流れは模式的に示したものであり、実際には図面を貫通する方向 に電解液が流れる。 [0076] As shown in FIG. 9 (a), the electrolyte solution is sucked on the OUT side of the electrolyte channel. The electrolyte solution is supplied from the IN side of the flow path, and the electrolyte solution is injected into the electrolyte storage portion 68a, so that the electrolyte layer 90 is formed. Examples of the electrolytic solution include those obtained by dissolving an electrolyte such as iodine Z iodide, bromine Z bromide, or a transition metal complex in a solvent such as acetonitrile or ethylene carbonate or an ionic liquid such as an imidazolium salt. Note that the flow of the electrolytic solution in FIG. 9 (a) is shown schematically, and actually the electrolytic solution flows in a direction penetrating the drawing.
[0077] 電解質層は、上述した電解液を注入する以外に、ゲル電解質、溶融塩電解質、固 体電解質などをフロント電極フィルム 30又はバック電極フィルム 80に予め塗布してか ら、フロント電極フィルム 30及びバック電極フィルム 80を貼り合わせて形成することも できる。  [0077] In addition to injecting the above-described electrolyte solution, the electrolyte layer is pre-coated with a gel electrolyte, a molten salt electrolyte, a solid electrolyte, or the like on the front electrode film 30 or the back electrode film 80, and then the front electrode film 30 Also, the back electrode film 80 can be bonded together.
6.超音波溶着  6.Ultrasonic welding
電解質層 90の形成後は、図 9 (b)に示すように、電解液収容部 68aの全体を取り囲 むようにフロント電極フィルム 30及びバック電極フィルム 80を超音波溶着することによ り封止部 91が形成され、電解質層 90の電解液が封止される。そして、封止部 91の 外側を除去することにより、図 9 (c)に示すように、電極パターン上に光電変換層及び 対向電極が順次積層された光電池モジュールが完成する。この光電池モジュールか らの出力は、隅部 2力所に形成された接続端子孔 92, 92から取り出すことができる。  After the formation of the electrolyte layer 90, as shown in FIG. 9 (b), the front electrode film 30 and the back electrode film 80 are ultrasonically welded so as to surround the entire electrolyte container 68a. 91 is formed, and the electrolyte solution of the electrolyte layer 90 is sealed. Then, by removing the outside of the sealing portion 91, as shown in FIG. 9C, a photovoltaic module in which the photoelectric conversion layer and the counter electrode are sequentially stacked on the electrode pattern is completed. The output from the photovoltaic module can be taken out from connection terminal holes 92 and 92 formed at two corners.
[0078] 超音波溶着は、振動子から振動エネルギーが伝達されるホーンと、被溶着物が載 置される台座とを備える超音波溶着装置を用いて行うことができる。台座の上面には 、振動エネルギーを集中するための突起部(エネルギーダイレクタ)が設けられており 、フロント電極フィルム 30及びバック電極フィルム 80をホーンと台座との間に加圧挟 持し、ホーン力 超音波振動を付与することにより摩擦熱が生じて榭脂が溶融し、両 者が結合される。超音波溶着により電解質層 90を確実に封止するためには、フロント 電極フィルム 30及びバック電極フィルム 80の基板 20, 82と、ホットメルト層 66とが同 等の材質力もなることが好ましい。ここで、「同等の材質」とは、材質が全く同一である 場合の他、溶融温度や熱膨張係数などの物性値がほぼ等しいものをいう。具体的な 材質としては、ポリエチレンテレフタレート (PET)、シリコン系榭脂、フッ素系榭脂、ァ クリル系榭脂から選ばれる少なくとも 1種が好ましぐ特にポリエチレンテレフタレート が好適である。 [0078] Ultrasonic welding can be performed using an ultrasonic welding apparatus including a horn to which vibration energy is transmitted from a vibrator and a pedestal on which an object to be welded is placed. The upper surface of the pedestal is provided with a protrusion (energy director) for concentrating vibration energy. The front electrode film 30 and the back electrode film 80 are pressed between the horn and the pedestal, and the horn force By applying ultrasonic vibration, frictional heat is generated, the resin melts, and the two are joined. In order to reliably seal the electrolyte layer 90 by ultrasonic welding, it is preferable that the substrates 20, 82 of the front electrode film 30 and the back electrode film 80 and the hot melt layer 66 have the same material strength. Here, the “equivalent material” means a material having substantially the same physical property values such as a melting temperature and a thermal expansion coefficient in addition to the case where the materials are completely the same. The specific material is preferably at least one selected from polyethylene terephthalate (PET), silicon-based resin, fluorine-based resin, and acryl-based resin, especially polyethylene terephthalate. Is preferred.

Claims

請求の範囲 The scope of the claims
[1] ホットメルト層が金属材料からなる被覆層により覆われ、表裏面を貫通する主電極 形成用開口部を有する主電極形成マスクを用いて、基板上に電極パターンを形成す る方法であって、  [1] A method in which an electrode pattern is formed on a substrate using a main electrode formation mask in which a hot melt layer is covered with a coating layer made of a metal material and has openings for forming a main electrode penetrating the front and back surfaces. And
前記主電極形成マスクを、前記ホットメルト層を介して基板の表面に熱圧着するェ 程と、  Thermally bonding the main electrode formation mask to the surface of the substrate through the hot melt layer;
前記主電極形成用開口部を介して導電性蒸着材料の物理的蒸着を行うことにより 、前記基板上に主電極パターンを形成する工程と、  Forming a main electrode pattern on the substrate by performing physical vapor deposition of a conductive vapor deposition material through the opening for forming the main electrode; and
前記主電極形成マスクを剥離する工程とを備える電極パターンの形成方法。  And a step of peeling the main electrode formation mask.
[2] 前記主電極形成マスクは、基材フィルムの一方面に粘着剤層を介して前記ホットメ ルト層が積層され、前記基材フィルムの他方面に前記被覆層が積層されて形成され て 、る請求項 1に記載の電極パターンの形成方法。  [2] The main electrode formation mask is formed by laminating the hot melt layer on one side of a base film via an adhesive layer and laminating the coating layer on the other side of the base film. The method for forming an electrode pattern according to claim 1.
[3] 前記主電極形成マスクを剥離する工程の後、 [3] After the step of peeling the main electrode formation mask,
ホットメルト層が金属材料からなる被覆層により覆われ、表裏面を貫通する補助電 極形成用開口部を有する補助電極形成マスクを、前記ホットメルト層を介して前記基 板の表面に熱圧着する工程と、  A hot electrode layer is covered with a coating layer made of a metal material, and an auxiliary electrode forming mask having an auxiliary electrode forming opening penetrating the front and back surfaces is thermocompression bonded to the surface of the substrate through the hot melt layer. Process,
前記補助電極形成用開口部を介して導電性蒸着材料の物理的蒸着を行うことによ り、前記主電極パターンに沿って補助電極パターンを形成する工程と、  Forming an auxiliary electrode pattern along the main electrode pattern by performing physical vapor deposition of a conductive vapor deposition material through the auxiliary electrode forming opening;
前記ホットメルト層と前記基板との間で前記補助電極形成マスクを剥離する工程と を備え、  Peeling the auxiliary electrode forming mask between the hot melt layer and the substrate,
前記補助電極パターンは、前記主電極パターンよりも表面抵抗値力 S小さくなるよう に形成される請求項 1または 2に記載の電極パターンの形成方法。  3. The electrode pattern forming method according to claim 1, wherein the auxiliary electrode pattern is formed to have a surface resistance value force S smaller than that of the main electrode pattern.
[4] 前記主電極形成マスクを基板の表面に熱圧着する工程の前に、 [4] Before the step of thermocompression bonding the main electrode formation mask to the surface of the substrate,
ホットメルト層が金属材料からなる被覆層により覆われ、表裏面を貫通する補助電 極形成用開口部を有する補助電極形成マスクを、前記ホットメルト層を介して前記基 板の表面に熱圧着する工程と、  A hot electrode layer is covered with a coating layer made of a metal material, and an auxiliary electrode forming mask having an auxiliary electrode forming opening penetrating the front and back surfaces is thermocompression bonded to the surface of the substrate through the hot melt layer. Process,
前記補助電極形成用開口部を介して導電性蒸着材料の物理的蒸着を行うことによ り、補助電極パターンを形成する工程と、 前記ホットメルト層と前記基板との間で前記補助電極形成マスクを剥離する工程と を備え、 Forming an auxiliary electrode pattern by performing physical vapor deposition of the conductive vapor deposition material through the opening for forming the auxiliary electrode; Peeling the auxiliary electrode forming mask between the hot melt layer and the substrate,
前記補助電極パターンは、前記主電極パターンよりも表面抵抗値力 S小さくなるよう に形成される請求項 1または 2に記載の電極パターンの形成方法。  3. The electrode pattern forming method according to claim 1, wherein the auxiliary electrode pattern is formed to have a surface resistance value force S smaller than that of the main electrode pattern.
[5] 請求項 1から 4のいずれかに記載の電極パターンの形成方法により基板上に形成 された主電極パターンに、光電変換層及び対向電極が順次積層された光電池モジ ユーノレ o [5] A photovoltaic cell module in which a photoelectric conversion layer and a counter electrode are sequentially stacked on the main electrode pattern formed on the substrate by the electrode pattern forming method according to any one of claims 1 to 4.
[6] 絶縁層を介して配置された一対の電極パターン間を電気的に接続する方法であつ て、  [6] A method of electrically connecting a pair of electrode patterns arranged via an insulating layer,
ホットメルト層に基材フィルムが張り合わされた積層体に表裏面を貫通する配線部 形成孔が形成された貼り合わせ用マスクを、第 1の電極パターンが表面に形成された 第 1の基板に対し、前記配線部形成孔と第 1の電極パターンとの位置合わせが行わ れるように熱圧着する工程と、  A laminate mask in which a base film is bonded to a hot-melt layer is used to attach a mask for bonding in which holes for forming wiring parts that penetrate the front and back surfaces are formed on the first substrate on which the first electrode pattern is formed. Thermocompression bonding so that the wiring portion forming hole and the first electrode pattern are aligned, and
前記配線部形成孔に導電性ペーストを充填する工程と、  Filling the wiring part forming hole with a conductive paste;
前記基材フィルムを前記ホットメルト層から剥離する工程と、  Peeling the base film from the hot melt layer;
露出した前記ホットメルト層に対し、第 2の電極パターンが表面に形成された第 2の 基板を、前記第 2の電極パターンと配線部形成孔との位置合わせが行われるように 熱圧着する工程とを備える電極パターン間の接続方法。  A process of thermocompression bonding the second substrate on which the second electrode pattern is formed on the exposed hot-melt layer so that the second electrode pattern and the wiring part formation hole are aligned. A connection method between electrode patterns.
[7] 前記貼り合わせ用マスクは、前記基材フィルムが前記ホットメルト層に易剥離性の 粘着剤層を介して積層されている請求項 6に記載の電極パターン間の接続方法。 [7] The connection method between electrode patterns according to [6], wherein the base material film is laminated on the hot-melt layer via an easily peelable pressure-sensitive adhesive layer.
[8] 前記導電性ペーストは、半田合金粉末を含んでおり、 [8] The conductive paste contains a solder alloy powder,
前記半田合金粉末の液相線温度は、 60°C以上で、且つ、前記第 1の基板及び第 2 の基板の耐熱限界温度よりも低い請求項 6又は 7に記載の電極パターン間の接続方 法。  The method of connecting between electrode patterns according to claim 6 or 7, wherein a liquidus temperature of the solder alloy powder is 60 ° C or higher and lower than a heat resistance limit temperature of the first substrate and the second substrate. Law.
[9] 前記導電性ペーストは、榭脂溶液に半田合金粉末が混合されており、榭脂溶液に 対する半田合金粉末の体積分率が 50〜90%である請求項 6から 8のいずれかに記 載の電極パターン間の接続方法。  [9] The conductive paste according to any one of claims 6 to 8, wherein a solder alloy powder is mixed with a resin solution, and a volume fraction of the solder alloy powder with respect to the resin solution is 50 to 90%. Connection method between described electrode patterns.
[10] 第 1の電極パターンと第 2の電極パターンとの間に光電変換層を有する光電池セル を複数備える光電池モジュールであって、 [10] A photovoltaic cell having a photoelectric conversion layer between the first electrode pattern and the second electrode pattern A plurality of photovoltaic cell modules,
一の前記光電池セルにおける第 1の電極パターンと、他の前記光電池セルにおけ る第 2の電極パターンと力 請求項 6から 9の!、ずれかに記載の電極パターン間の接 続方法により接続されて ヽる光電池モジュール。  The first electrode pattern in one of the photovoltaic cells and the second electrode pattern and force in the other photovoltaic cell are connected by the connection method between the electrode patterns according to any one of claims 6 to 9! Photovoltaic module that is being revived.
[11] 電極パターン上に色素増感半導体電極を形成する方法であって、 [11] A method of forming a dye-sensitized semiconductor electrode on an electrode pattern,
ホットメルト層が金属材料からなる被覆層により覆われ、表裏面を貫通する開口部を 有する半導体電極形成マスクを、電極パターンが表面に形成された基板に対し、前 記開口部と電極パターンとの位置合わせが行われるように熱圧着する工程と、 前記開口部に半導体電極材料を充填する工程と、  A semiconductor electrode forming mask in which the hot melt layer is covered with a coating layer made of a metal material and has openings that penetrate the front and back surfaces is formed on a substrate on which the electrode pattern is formed on the surface. A step of thermocompression bonding so that alignment is performed, a step of filling the opening with a semiconductor electrode material,
前記開口部に充填された半導体電極材料に光増感色素を担持させる工程と、 前記半導体電極形成マスクを剥離する工程とを備える色素増感半導体電極の形 成方法。  A method of forming a dye-sensitized semiconductor electrode, comprising: supporting a photosensitizing dye on the semiconductor electrode material filled in the opening; and peeling the semiconductor electrode forming mask.
[12] 前記半導体電極形成マスクは、基材フィルムの一方面に粘着剤層を介して前記ホ ットメルト層が積層され、前記基材フィルムの他方面に前記被覆層が積層されて形成 されて ヽる請求項 11に記載の色素増感半導体電極の形成方法。  [12] The semiconductor electrode formation mask is formed by laminating the hot melt layer on one side of a base film with an adhesive layer interposed therebetween, and laminating the coating layer on the other side of the base film. The method for forming a dye-sensitized semiconductor electrode according to claim 11.
[13] 前記開口部に半導体電極材料を充填する工程は、  [13] The step of filling the opening with a semiconductor electrode material includes:
前記電極パターン上に半導体電極材料力もなる第 1の半導体層を物理的蒸着によ り形成する工程と、  Forming a first semiconductor layer having a semiconductor electrode material force on the electrode pattern by physical vapor deposition;
前記第 1の半導体層上に半導体電極材料を塗布することにより第 2の半導体層を 形成する工程とを備える請求項 11又は 12に記載の色素増感半導体電極の形成方 法。  The method for forming a dye-sensitized semiconductor electrode according to claim 11 or 12, further comprising a step of forming a second semiconductor layer by applying a semiconductor electrode material on the first semiconductor layer.
[14] 請求項 11から 13のいずれかに記載の色素増感半導体電極の形成方法により形成 された半導体電極に、対向電極が積層された光電池モジュール。  14. A photovoltaic module in which a counter electrode is laminated on a semiconductor electrode formed by the method for forming a dye-sensitized semiconductor electrode according to any one of claims 11 to 13.
PCT/JP2006/316562 2005-08-26 2006-08-24 Method for forming electrode pattern, method for connecting electrode patterns, method for forming dye sensitized semiconductor electrode and photoelectric cell module WO2007023881A1 (en)

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