WO2006070446A1 - Electron emitting element, electron emitting device, display and light source - Google Patents

Electron emitting element, electron emitting device, display and light source Download PDF

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Publication number
WO2006070446A1
WO2006070446A1 PCT/JP2004/019588 JP2004019588W WO2006070446A1 WO 2006070446 A1 WO2006070446 A1 WO 2006070446A1 JP 2004019588 W JP2004019588 W JP 2004019588W WO 2006070446 A1 WO2006070446 A1 WO 2006070446A1
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WIPO (PCT)
Prior art keywords
electron
electrode
emitter
emitting device
voltage
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PCT/JP2004/019588
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French (fr)
Japanese (ja)
Inventor
Yukihisa Takeuchi
Tsutomu Nanataki
Iwao Ohwada
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Ngk Insulators, Ltd.
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Application filed by Ngk Insulators, Ltd. filed Critical Ngk Insulators, Ltd.
Priority to CNA2004800234691A priority Critical patent/CN1871683A/en
Priority to PCT/JP2004/019588 priority patent/WO2006070446A1/en
Publication of WO2006070446A1 publication Critical patent/WO2006070446A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J29/00Details of cathode-ray tubes or of electron-beam tubes of the types covered by group H01J31/00
    • H01J29/46Arrangements of electrodes and associated parts for generating or controlling the ray or beam, e.g. electron-optical arrangement
    • H01J29/48Electron guns
    • H01J29/481Electron guns using field-emission, photo-emission, or secondary-emission electron source
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J1/00Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
    • H01J1/02Main electrodes
    • H01J1/30Cold cathodes, e.g. field-emissive cathode
    • H01J1/312Cold cathodes, e.g. field-emissive cathode having an electric field perpendicular to the surface, e.g. tunnel-effect cathodes of metal-insulator-metal [MIM] type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J63/00Cathode-ray or electron-stream lamps
    • H01J63/02Details, e.g. electrode, gas filling, shape of vessel
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2329/00Electron emission display panels, e.g. field emission display panels

Definitions

  • Electron emitter electron emitter, display and light source
  • the present invention relates to an electron-emitting device formed on a glass substrate, an electron-emitting device having a plurality of the electron-emitting devices, a display using the electron-emitting device, and a light source using the electron-emitting device. About.
  • an electron-emitting device has a force sword electrode and an anode electrode, and is applied to various abrasions such as a field emission display (FED) and a backlight.
  • FED field emission display
  • a plurality of electron-emitting devices are two-dimensionally arranged, and a plurality of phosphors for these electron-emitting devices are arranged with a predetermined interval.
  • Patent Document 15 As a conventional example of this electron-emitting device, for example, there is Patent Document 15, but since neither of them uses a dielectric in the emitter part, forming processing or fine processing is required between the counter electrodes. In addition, a high voltage must be applied for electron emission, and the panel manufacturing process is complicated and the manufacturing cost increases.
  • the emitter portion is made of a dielectric, and various theories are described in the following Non-Patent Document 13 regarding electron emission from the dielectric. 1-31 1 533
  • Patent Document 2 Japanese Patent Application Laid-Open No. 7-1 47 1 31
  • Patent Document 3 Japanese Patent Laid-Open No. 2000-285801
  • Patent Document 4 Japanese Patent Publication No. 46-20944
  • Patent Document 5 Japanese Patent Publication No. 44-261 25
  • Non-Patent Document 1 Yasuoka, Ishii, "Pulsed electron source using a ferroelectric cathode” Applied Physics Vol. 68, No. 5, p 546 550 (1 999)
  • Non-Patent Document 2 VF Puchkarev, GA Mesyats, On the mechanism of emission from the ferroelectric ceramic cathode, J. Appl. Phys., Vol. 78, No. 9, 1 November, 1995, p. 5633-5637
  • Non-Patent Document 3 H. Riege, Electron emission ferroelectrics-a review, Nuc, Inst and Meth. A340, p. 80-89 (1994)
  • the upper electrode 204 and the lower electrode 206 are formed on the emitter section 202, the upper electrode 204 is in close contact with the emitter section 202 in particular. Will be formed.
  • the electric field concentration point is the triple point of the upper electrode 204Z emitter 202Z vacuum. In this case, the peripheral portion of the upper electrode 204 corresponds.
  • the present invention has been made in consideration of such a problem, and can easily generate a high electric field concentration, and can increase the number of electron emission locations.
  • An object of the present invention is to provide an electron-emitting device and an electron-emitting device that can achieve high efficiency, can be driven at a low voltage, and are advantageous in increasing the size and reducing the product cost.
  • Another object of the present invention is to achieve high output and high efficiency with respect to electron emission, and can be driven at a low voltage, and is advantageous in increasing the plate size and reducing the product cost.
  • An object of the present invention is to provide a high-luminance and low-cost display and light source using a simple electron emission device.
  • An electron-emitting device includes a first electrode formed on a glass substrate, An emitter section made of a dielectric film formed on the first electrode; and a second electrode formed on the emitter section.
  • the driving voltage for electron emission is Applied between the second electrode and the second electrode, wherein at least the second electrode has a plurality of through portions from which the emitter portion is exposed, and of the second electrode, the peripheral portion of the through portion The surface facing the emitter part in is separated from the emitter part.
  • an electron emission device is an electron emission device having a plurality of electron emission elements formed on a glass substrate, wherein the electron emission elements are formed on the glass substrate.
  • a first electrode, an emitter portion made of a dielectric film formed on the first electrode, and a second electrode formed on the emitter portion, and a drive voltage for electron emission Is applied between the first electrode and the second electrode, and at least the second electrode has a plurality of penetrating portions from which the emitter portion is exposed, and among the second electrodes, A surface of the peripheral portion of the penetrating portion facing the emitter portion is separated from the emitter portion.
  • a display according to the present invention includes: the above-described electron emission device; a transparent plate disposed on a surface of the glass substrate facing an emitter portion of the electron emission device; Among them, an electrode for forming an electric field with the electron-emitting device in the electron-emitting device and a phosphor formed on the electrode on a surface facing the emitter section, The emitted electrons collide with the phosphor to excite the phosphor to emit light.
  • the light source according to the present invention includes the above-described electron emission device, a transparent plate disposed opposite to a surface of the glass substrate on which the emitter portion is formed, and the transparent substrate.
  • a drive voltage is applied between the first electrode and the second electrode. This drive voltage rapidly increases from a voltage level higher or lower than a reference voltage (for example, OV) to a voltage level lower or higher than the reference voltage with time, such as a pulse voltage or an AC voltage. Is defined as the voltage that changes to.
  • a triple junction is formed at a contact point between the surface of the emitter section where the second electrode is formed, the second electrode, and a medium (for example, vacuum) around the electron-emitting device.
  • the triple junction is defined as an electric field concentration portion formed by contact between the second electrode, the emitter portion, and the vacuum.
  • the triple junction includes a triple point where the second electrode, the emitter part, and the vacuum exist as one point.
  • the ripple junction is formed in the peripheral portion of the plurality of through portions and the peripheral portion of the second electrode. Therefore, when the drive voltage as described above is applied between the first electrode and the second electrode, electric field concentration occurs in the triple junction described above.
  • a voltage higher or lower than the reference voltage is applied between the first electrode and the second electrode, and electric field concentration in one direction occurs in the triple junction described above, for example.
  • electrons are emitted from the second electrode toward the emitter.
  • electrons are emitted from the emitter to the portion corresponding to the penetrating portion of the second electrode or the vicinity of the peripheral portion of the second electrode. Accumulated. That is, the emitter section is charged.
  • the second electrode functions as an electron supply source.
  • first in the first output period, preparation for electron emission (for example, polarization in one direction of a substance serving as an emitter) is performed.
  • preparation for electron emission for example, polarization in one direction of a substance serving as an emitter
  • electric field concentration occurs at the triple junction described above, and primary electrons are emitted from the second electrode by this electric field concentration, Of the substance that becomes the emitter, it will collide with the part exposed from the penetrating part and the vicinity of the outer periphery of the second electrode.
  • secondary electrons including reflected electrons of primary electrons
  • secondary electrons are emitted from the part where the primary electrons collide. That is, in the initial stage of the second output period, secondary electrons are emitted from the vicinity of the penetrating portion and the outer peripheral portion of the second electrode.
  • the present invention is a shape in which a gap is formed between the surface of the second electrode facing the emitter portion in the peripheral portion of the penetrating portion and the emitter portion.
  • a driving voltage When a driving voltage is applied, electric field concentration is likely to occur in the gap portion. This leads to higher efficiency of electron emission, and lower drive voltage (electron emission at a lower voltage level) can be realized.
  • a gap is formed between the surface of the second electrode facing the emitter portion in the peripheral portion of the penetrating portion and the emitter portion. Since the peripheral portion of the penetrating portion in the second electrode has a hook shape (flange shape), the electric field concentration in the gap portion increases, and the hook portion (the periphery of the penetrating portion). Part) easily emits electrons. This leads to higher output and higher efficiency of electron emission, and lower drive voltage. it can. As a result, for example, a display or a light source having a large number of electron-emitting devices arranged side by side can be increased in brightness.
  • the method of emitting electrons accumulated in a substance serving as an emitter or the method of emitting secondary electrons by colliding primary electrons from the second electrode with a substance serving as an emitter. Since the periphery of the penetrating portion of the second electrode functions as a gate electrode (control electrode, focus electron lens, etc.), the straightness of the emitted electrons can be improved. This is advantageous in reducing crosstalk when configured as a display electron source.
  • high electric field concentration can be easily generated, moreover, the number of electron emission locations can be increased, and high output and high efficiency can be achieved for electron emission.
  • Low voltage driving low power consumption
  • glass substrates are used, product costs can be reduced.
  • Crystallized glass may be used as the glass substrate.
  • the processing temperature can be in the range of 60 0 80 0 ° C, unlike general glass, and the degree of freedom in material selection can be expanded.
  • the transparent plate forming the tube wall and spacer, or phosphor, made of glass it is possible to obtain a large plate corresponding to the backlight of a large screen display or large screen liquid crystal display at a low price.
  • the transparent plate forming the tube wall and spacer, or phosphor, made of glass it is possible to make the transparent plate forming the tube wall and spacer, or phosphor, made of glass, and to adhere the glass substrate on which the electron-emitting device is formed, to the glass substrate. If the element is formed on a substrate other than glass, the coefficient of thermal expansion does not match that of other glass members and frits, making it difficult to manufacture the tube.
  • the first electrode in the emitter portion, at least a surface on which the second electrode is formed has irregularities due to dielectric grain boundaries, and the first electrode includes the dielectric
  • the through portion may be formed in a portion corresponding to the concave portion in the grain boundary.
  • the first electrode includes a substance having a scaly shape.
  • a conductive substance or a collection of substances having a plurality of scale-like shapes may be used.
  • the surface of the peripheral portion of the penetrating portion facing the emitter portion is separated from the emitter portion, that is, the peripheral portion of the penetrating portion A configuration in which a gap is formed between the surface facing the emitter portion and the emitter portion can be easily realized.
  • FIG. 1 is a cross-sectional view showing a partially omitted electron-emitting device according to the first embodiment.
  • FIG. 2 is an enlarged cross-sectional view showing a partially omitted electron-emitting device according to the first embodiment.
  • FIG. 3 is a cross-sectional view showing an enlarged main part of the electron-emitting device according to the first embodiment.
  • FIG. 4 is a plan view showing an example of the shape of a through-hole formed in the upper electrode.
  • FIG. 5A is a cross-sectional view showing another example of the upper electrode
  • FIG. 5B is a cross-sectional view showing an enlarged main part.
  • FIG. 6A is a cross-sectional view showing still another example of the upper electrode
  • FIG. 6B is a cross-sectional view showing an enlarged main part.
  • FIG. 7 is a diagram showing a voltage waveform of a drive voltage in the first electron emission method.
  • FIG. 8 shows electron emission in the second output period (second stage) of the first electron emission method. It is explanatory drawing which shows a mode of going out.
  • FIG. 9 is a diagram showing a voltage waveform of a drive voltage in the second electron emission method.
  • FIG. 10 is an explanatory view showing the state of electron emission in the second output period (second stage) of the second electron emission method.
  • FIG. 11 is a diagram showing an example of a cross-sectional shape of a collar portion of the upper electrode.
  • FIG. 12 is a diagram showing another example of the cross-sectional shape of the collar portion of the upper electrode.
  • FIG. 13 is a diagram showing still another example of the cross-sectional shape of the collar portion of the upper electrode.
  • FIG. 14 is an equivalent circuit diagram showing a connection state of various capacitors connected between the upper electrode and the lower electrode.
  • FIG. 15 is a diagram for explaining the capacitance calculation of various capacitors connected between the upper electrode and the lower electrode.
  • FIG. 16 is a plan view showing a part of the first modification of the electron-emitting device according to the first embodiment with a part thereof omitted.
  • FIG. 17 is a plan view showing a second variation of the electron-emitting device according to the first embodiment with a part thereof omitted.
  • FIG. 18 is a plan view showing the third modification of the electron-emitting device according to the first embodiment with a part thereof omitted.
  • FIG. 19 is a diagram showing voltage-charge amount characteristics (voltage-polarization amount characteristics) of the electron-emitting device according to the first embodiment.
  • FIG. 20 is an explanatory diagram showing the state at point p 1 in FIG. 19, and FIG. 20 is an explanatory diagram showing the state at point p 2 in FIG. C is an explanatory diagram showing a state from point p 2 to point p 3 in FIG.
  • FIG. 21A is an explanatory diagram showing the state from point p3 to point p4 in Fig. 19.
  • Fig. 21B shows the state immediately before reaching point p4 in Fig. 19.
  • FIG. 21C is an explanatory diagram illustrating a state from point p4 to point p6 in FIG.
  • FIG. 22 is configured using the electron-emitting device according to the first embodiment. It is a block diagram which shows light emission display parts, such as a display, and a drive circuit.
  • FIGS. 2 3 A 2 3 C are waveform diagrams showing the amplitude modulation of the pulse signal by the amplitude modulation circuit.
  • FIG. 24 is a block diagram showing a signal supply circuit according to a modification.
  • FIG. 25 is a waveform diagram showing pulse width modulation of the pulse signal by the pulse width modulation circuit.
  • Fig. 26 A shows a hysteresis curve when voltage V s I is applied in Fig. 23 A or Fig. 25 A
  • Fig. 26 B shows Fig. 23 B or Fig. 25
  • Fig. 26 is a diagram showing a hysteresis curve when voltage V sm is applied at B
  • Fig. 26 C is a diagram showing a hysteresis curve when voltage V sh in Fig. 23C or Fig. 25C is applied. It is.
  • FIG. 27 is a configuration diagram showing one arrangement example of the collector electrode, the phosphor, and the transparent plate on the upper electrode.
  • FIG. 28 is a block diagram showing another arrangement example of the collector electrode, the phosphor and the transparent plate on the upper electrode.
  • Fig. 29 A is a diagram showing the waveforms of the write pulse and the lighting pulse used in the first experimental example (experiment of the electron emission state of the electron-emitting device).
  • FIG. 6 is a diagram showing the state of electron emission from the electron-emitting device in the experimental example in FIG.
  • FIG. 30 is a diagram showing waveforms of an address pulse and a lighting pulse used in the second and fourth experimental examples.
  • FIG. 31 is a characteristic diagram showing the results of a second experimental example (an experiment in which the amount of electrons emitted from the electron-emitting device varies depending on the amplitude of the write pulse).
  • FIG. 32 is a characteristic diagram showing the results of a third experimental example (an experiment in which the amount of electrons emitted from the electron-emitting device varies depending on the amplitude of the lighting pulse).
  • Figure 33 shows the fourth experimental example (the amount of electrons emitted from the electron-emitting device is the collector
  • FIG. 6 is a characteristic diagram showing the results of an experiment) that shows how the pressure changes depending on the pressure level.
  • FIG. 34 is a timing chart showing an example of a driving method for a display or the like.
  • FIG. 35 is a table showing the relationship between applied voltages in the driving method shown in FIG. 34.
  • FIG. 36 is a cross-sectional view showing the electron-emitting device according to the second embodiment with a part thereof omitted.
  • FIG. 37 is a cross-sectional view showing a part of the first modification of the electron-emitting device according to the second embodiment with a part thereof omitted.
  • FIG. 38 is a cross-sectional view showing a part of the second modification of the electron-emitting device according to the second embodiment with a part thereof omitted.
  • FIG. 39 is a cross-sectional view showing a third modification of the electron-emitting device according to the second embodiment with a part thereof omitted.
  • FIG. 40 is a cross-sectional view showing a partially omitted electron-emitting device according to a conventional example.
  • Electron-emitting device 1 2 Emitter part 1 4 ... Upper electrode
  • the electron emission device according to the present embodiment can be applied not only as a display but also to an electron beam irradiation device, a light source, an alternative use of an LED, an electronic component manufacturing device, and an electronic circuit component.
  • the electron beam in the electron beam irradiation apparatus has high energy and excellent absorption performance as compared with the ultraviolet light in the currently widely used ultraviolet irradiation apparatus.
  • Examples of applications include the use of semiconductor devices to solidify insulation films when stacking wafers, the use of printing inks to cure evenly when printing is dried, and the use of sterilizing medical equipment in packages. is there.
  • Applications as a light source include a planar light source such as a backlight for a liquid crystal display and a light source application for a projector that uses a high-intensity, high-efficiency specification such as an ultra-high pressure mercury lamp.
  • a planar light source such as a backlight for a liquid crystal display
  • a light source application for a projector that uses a high-intensity, high-efficiency specification such as an ultra-high pressure mercury lamp.
  • the electron-emitting device according to this embodiment is applied to a light source, it has features such as downsizing, long life, high-speed lighting, and reduction of environmental load due to mercury-free.
  • LED alternatives include surface light source applications such as indoor lighting, automotive lamps, and traffic lights, and backlights for small liquid crystal displays for chip light sources, traffic lights, and mobile phones.
  • Applications of the electronic component manufacturing apparatus include an electron beam source for a film forming apparatus such as an electron beam evaporation apparatus, a plasma generation (for activation of gas, etc.) in a plasma CVD apparatus, an electron source, and an electron for gas decomposition application.
  • a film forming apparatus such as an electron beam evaporation apparatus, a plasma generation (for activation of gas, etc.) in a plasma CVD apparatus, an electron source, and an electron for gas decomposition application.
  • sources There are also vacuum microdevice applications such as tera-Hz-driven high-speed switching elements and high-current output elements.
  • printer component that is, a light-emitting device that exposes a photosensitive drum in combination with a phosphor, and an electron source for charging a dielectric.
  • Applications include digital devices such as switches, relays, and diodes, and analog devices such as operational amplifiers.
  • an electron-emitting device 1 OA is formed on a glass substrate 11 and is a plate-like emitter made of a dielectric.
  • Part 1 2 first electrode (eg lower electrode) 16 formed on the first surface (eg lower surface) of the emitter part 1 2, and second surface (eg upper surface) of the emitter part 1 2
  • a formed second electrode (for example, an upper electrode) 14 and a pulse generation source 18 for applying a driving voltage Va between the upper electrode 14 and the lower electrode 16 are provided.
  • the upper electrode 14 has a plurality of through portions 20 through which the emitter portion 12 is exposed.
  • the surface of the emitter portion 12 is formed with irregularities 22 due to dielectric grain boundaries, and the through portions 20 of the upper electrode 14 are portions corresponding to the concave portions 24 in the dielectric grain boundaries. Is formed.
  • the example of FIG. 2 shows the case where one through portion 20 is formed corresponding to one concave portion 24, but one through portion 20 is formed corresponding to a plurality of concave portions 24. Sometimes it is done.
  • the particle size of the dielectric constituting the emitter section 12 is preferably 0.1 m 10 m, and more preferably 2 m 7 m. In the example of Fig. 2, the particle size of the dielectric is 3 m.
  • a surface 26 6 a facing the emitter portion 12 in the peripheral portion 26 of the penetrating portion 20 is included in the upper electrode 14.
  • the peripheral portion 26 of the penetrating portion 20 is formed in a bowl shape (flange shape). Therefore, in the following description, “the peripheral portion 2 6 of the through portion 20 of the upper electrode 14” is referred to as “the upper portion 2 6 of the upper electrode 14”.
  • the cross section of the convex portion 30 of the grain boundary irregularities 22 is typically shown in a semicircular shape, but is not limited to this shape.
  • the thickness t of the upper electrode 14 is set to 0.01 m ⁇ t ⁇ 10 m, and the upper surface of the emitter section 12, that is, the grain boundary of the dielectric
  • the maximum angle 0 between the surface of the convex part 3 0 (which is also the inner wall surface of the concave part 2 4) and the bottom face 2 6 of the upper electrode 1 4 2 6 a is 1 ° ⁇ 0 ⁇ 6 0 °
  • the distance d is set to 0 m ⁇ d ⁇ 1 0 m.
  • the shape of the penetrating portion 20, in particular, as shown in FIG. 4, is the shape of the hole 32, for example, a circular shape or an elliptical shape. Some include curved parts such as tracks, and some polygons such as squares and triangles. In the example of FIG. 4, the hole 32 has a circular shape.
  • the average diameter of the holes 32 is set to 0.1 m or more and 10 m or less. This average diameter indicates the average length of a plurality of different line segments passing through the center of the hole 32.
  • dielectric composing the emitter section 12 a dielectric having a relatively high relative dielectric constant, for example, 1 000 or more can be used.
  • dielectrics include barium titanate, lead zirconate, lead magnesium niobate, lead nickel niobate, lead zinc niobate, lead manganese niobate, lead magnesium tantalate, lead nickel tantalate, antimony Ceramics containing lead stannate, lead titanate, lead magnesium tandastate, lead cobalt niobate, etc., or any combination thereof, those containing 50% by weight or more of these compounds as the main component, Furthermore, lanthanum, calcium, strontium, molybdenum, tungsten, barium, niobium, zinc, nickel, mangan and other oxides, or any combination thereof, or other compounds are appropriately applied to the ceramics. The added one can be mentioned.
  • the relative dielectric constant at PMN: PT: PZ 0.5: 0.35: 0.125 4500, which is particularly preferable.
  • piezoelectric Z electrostrictive layer an antiferroelectric layer, or the like can be used as the emitter section 12, but when a piezoelectric Z electrostrictive layer is used as the emitter section 12, Piezoelectric Z electrostrictive layers include, for example, lead zirconate, lead magnesium niobate, lead nickel niobate, lead zinc niobate, lead manganese niobate, lead magnesium tantalate, lead nickel tantalate, lead antimony stannate, titanium Examples thereof include ceramics containing lead oxide, barium titanate, lead magnesium tungstate, lead cobalt niobate, or any combination thereof.
  • the main component may contain 50% by weight or more of these compounds.
  • a ceramic containing lead zirconate is most frequently used as a constituent material of the piezoelectric Z electrostrictive layer constituting the emitter portion 12.
  • the ceramics may further include oxides such as lanthanum, calcium, strontium, molybdenum, tanda stainless, barium, niobium, zinc, nickel, manganese, and the like. It May be any combination of these, or a ceramic to which other compounds are appropriately added.
  • oxides such as lanthanum, calcium, strontium, molybdenum, tanda stainless, barium, niobium, zinc, nickel, manganese, and the like. It May be any combination of these, or a ceramic to which other compounds are appropriately added.
  • the piezoelectric Z electrostrictive layer may be dense or porous, and in the case of being porous, the porosity is preferably 40% or less.
  • the anti-ferroelectric layer is mainly composed of lead zirconate and a component composed of lead zirconate and lead stannate.
  • lead lanthanum oxide to lead zirconate
  • lead zirconate and lead niobate added to components composed of lead zirconate and lead stannate.
  • the antiferroelectric layer may be porous.
  • the porosity is preferably 30% or less.
  • the material with low reversal fatigue is a layered ferroelectric compound, (B i O) 2+ (ABO
  • the metal B ions are T i 4+ , T a 5+ , N b 5+, etc.
  • semiconductors can be added to semiconductors by adding additives to barium titanate, lead zirconate, and PZT piezoelectric ceramics.
  • the electric field concentration can be performed in the vicinity of the interface with the upper electrode 14 that contributes to electron emission by providing a non-uniform electric field distribution in the emitter section 12.
  • lead borosilicate glass on piezoelectric Z electrostrictive Z antiferroelectric ceramics By mixing a glass component such as soot and other low melting point compounds (for example, bismuth oxide), the firing temperature can be lowered.
  • a glass component such as soot and other low melting point compounds (for example, bismuth oxide).
  • the shape thereof is a sheet-like molded body, a sheet-like laminated body, or a laminate or adhesive of these on another supporting substrate. It may be.
  • the electron or ion collision is less likely to be damaged.
  • various thick film forming methods such as a screen printing method, a dating method, a coating method, an electrophoresis method, an aerosol deposition method, Various thin film forming methods such as ion beam method, sputtering method, vacuum vapor deposition method, ion plating method, chemical vapor deposition method (CVD) and plating can be used.
  • the thick film forming method by screen printing method, dating method, coating method, electrophoresis method or the like is a piezoelectric ceramic having an average particle size of 0.015 m, preferably 0.053 m. It can be formed using a paste soot, slurry, suspension, emulsification, sol or the like mainly composed of the above-mentioned particles, and good piezoelectric operation characteristics can be obtained.
  • the electrophoretic method is capable of forming a film with high density and high shape accuracy, and includes "electrochemistry and industrial physical chemistry V o 5 3, N o. 1 (1 9 8 5), p 6 3-6 8 by Kazuo Ansai ”or“ The 1st Electrophoresis Method for High-Order Forming of Ceramics Proceedings (1 9 9 8), p 5-6, p 2 3 2 4 ”and the like as described in technical literature. In this way, it is advisable to select and use a method as appropriate in consideration of the required accuracy and reliability.
  • a powdered piezoelectric Z electrostrictive material is formed as an emitter portion 12 and impregnated with glass sol particles having a low melting point.
  • a powdered piezoelectric Z electrostrictive material is formed as an emitter portion 12 and impregnated with glass sol particles having a low melting point.
  • film formation at a low temperature of 700 ° C or below 600 ° C can be achieved. Therefore, it is suitable when the emitter section 12 is formed on the glass substrate 11 as in the first embodiment.
  • the aerosol deposition method is also a method capable of forming a film at a low temperature.
  • the upper electrode 14 is made of an organometallic paste that can provide a thin film after firing.
  • a material such as platinum resinate paste is preferably used. Also
  • Oxide electrodes that suppress polarization reversal fatigue for example, ruthenium oxide (RuO)
  • Iridium oxide IrO
  • strontium ruthenate SrRuO
  • La Ca MnO e.g.
  • an aggregate 17 of substances 15 for example, graphite
  • an aggregate 21 of conductive substances 19 including a substance 15 having a scale-like shape is also preferably used.
  • the aggregate 17 or the aggregate 21 does not completely cover the surface of the emitter portion 1 2, but a plurality of through portions 20 where the emitter portion 1 2 is exposed are provided.
  • the part facing the penetrating part 20 is defined as an electron emission region.
  • the upper electrode 14 is made of the above materials using various thick film forming methods such as screen printing, spraying, coating, dubbing, coating, electrophoresis, sputtering, ion beam method, vacuum deposition. , Ion plating, chemical vapor deposition (CVD), plating, and other conventional thin film formation methods, preferably the former thick film formation method. Good.
  • the lower electrode 16 is made of a conductive material, for example, metal, and is made of white gold, molybdenum, tungsten, or the like. It is also possible to use conductors that are resistant to high-temperature oxidizing atmospheres, such as simple metals, alloys, mixtures of insulating ceramics and simple metals, and mixtures of insulating ceramics and alloys.
  • a high melting point precious metal such as platinum, iridium, palladium, rhodium, and molybdenum, or an alloy such as silver-palladium, silver-platinum, or platinum-palladium, or platinum and a ceramic material. It is composed of cermet materials. More preferably, it is made of a material mainly composed of platinum or a platinum-based alloy.
  • the lower electrode 16 carbon or a graph eyelid material may be used.
  • the ratio of the ceramic material added to the electrode material is preferably about 5 30 volume%.
  • the same material as that of the upper electrode described above may be used.
  • the lower electrode 16 is preferably formed by the thick film forming method.
  • the thickness of the lower electrode 16 is preferably 20 m or less, and preferably 5 m or less.
  • a firing treatment of the electron-emitting device 10A As a firing treatment of the electron-emitting device 10A, a material that becomes the lower electrode 16, a material that becomes the emitter portion 12, and a material that becomes the upper electrode 14 are sequentially laminated on the glass substrate 11. It may be fired as an integral structure from each other, or heat treatment (firing process) is performed each time the lower electrode 16, the emitter part 12, and the upper electrode 14 are formed to form an integral structure with the glass substrate 11. You may do it. Depending on the formation method of the upper electrode 14 and the lower electrode 16, heat treatment (firing treatment) for integration may not be required.
  • the glass softening point of the glass substrate 1 1 is In view of this, the range is 5 0 0 1 0 0 0 ° C, preferably 6 0 0 8 0 0 ° C. Further, when the film-like emitter part 12 is heat-treated, it is preferable to perform the baking treatment while controlling the atmosphere together with the evaporation source of the emitter part 12 so that the composition of the emitter part 12 does not become unstable at high temperatures. Good.
  • a process and a material that have a temperature lower than the softening point of the glass substrate 11 1 are selected, and the lower electrode 16 on the glass substrate 11 1,
  • the emitter portion 1 2 and the upper electrode 14 are sequentially formed.
  • the lower electrode 16 a silver-paste pad or the like that can be fired at low temperature is formed by screen printing, and after firing, the emitter section 12 is formed by the above-described aero deposition method or a glass having a low melting point.
  • the sol particles are formed by impregnating a powder of piezoelectric Z electrostrictive material, etc., and the upper electrode 14 is formed by screen printing or the like with a material that enables low temperature firing, and then fired. It is a method of doing.
  • a sheet in which the emitter portion 12 is formed at a temperature equal to or higher than the softening point of the glass substrate 11 can be bonded to the glass substrate 11.
  • This method has an advantage that the characteristics necessary for electron emission can be easily obtained because the firing temperature of the emitter section 12 is not limited.
  • the film to be the upper electrode 14 shrinks from, for example, a thickness of 10 ⁇ m to a thickness of 0.1 m, and at the same time, a plurality of holes and the like are formed, and as a result, As shown in FIG. 2, a plurality of through portions 20 are formed in the upper electrode 14, and a peripheral portion 26 of the through portion 20 is formed in a bowl shape.
  • the film to be the upper electrode 14 may be subjected to patterning by etching (wet etching, dry etching), lift-off, or the like in advance (before firing) and then firing. In this case, as will be described later, a notch shape or a slit shape can be easily formed as the through portion 20.
  • the drive voltage Va is applied between the upper electrode 14 and the lower electrode 16.
  • This drive voltage Va is a voltage level that is higher or lower than a reference voltage (for example, OV) over time, such as a pulse voltage or an AC voltage. Is defined as a voltage that changes rapidly.
  • a triple junction is formed at the contact point between the upper surface of the emitter portion 12 and the upper electrode 14 and the medium (for example, vacuum) around the electron emitter 1OA. Is formed.
  • the triple junction is defined as an electric field concentration portion formed by contact between the upper electrode 14, the emitter portion 1 2, and the vacuum.
  • the triple junction also includes a triple point where the upper electrode 14, the emitter portion 1 2, and the vacuum exist as one Boyne rod.
  • the degree of vacuum in the atmosphere is preferably 1 0 2 1 0 — 6 Pa , more preferably 1 0 — 3 1 0 — 5 Pa .
  • the triple junction is a ridge of the upper electrode 14
  • the first electron emission method will be described with reference to FIG. 7 and FIG.
  • a voltage V 2 lower than the reference voltage in this case, OV
  • the lower electrode 16 is lower than the reference voltage.
  • High voltage V 1 is applied.
  • electric field concentration occurs in the triple junction described above, and electrons are emitted from the upper electrode 14 toward the emitter portion 1 2.
  • the upper portion of the emitter portion 1 2 Electrons are accumulated in a portion exposed from the through portion 20 of the electrode 14 and a portion in the vicinity of the peripheral portion of the upper electrode 14. That is, the emitter section 12 is charged.
  • the upper electrode 14 functions as an electron supply source.
  • the voltage level of the drive voltage V a changes rapidly, that is, the voltage V 1 higher than the reference voltage is applied to the upper electrode 14.
  • a voltage V 2 lower than the reference voltage is applied to the lower electrode 16 this time, the portion corresponding to the through portion 20 of the upper electrode 14 and the vicinity of the peripheral edge of the upper electrode 14 are charged.
  • the emitted electrons are expelled from the emitter 12 by the dipole of the emitter 12 whose polarity is reversed in the opposite direction (a negative polarity appears on the surface of the emitter 12), as shown in FIG.
  • electrons are emitted from the portion where the electrons are accumulated through the penetrating portion 20.
  • the voltage level of the drive voltage V a changes suddenly, that is, a voltage V 4 lower than the reference voltage is applied to the upper electrode 14.
  • a voltage V 3 higher than the reference voltage is applied to the electrode 16
  • electric field concentration occurs at the triple junction described above, and primary electrons are emitted from the upper electrode 14 due to this electric field concentration,
  • the portion exposed from the through portion 20 and the vicinity of the outer peripheral portion of the upper electrode 14 will collide.
  • secondary electrons including reflected electrons of the primary electrons
  • secondary electrons are emitted from the portion where the primary electrons collide. That is, in the initial stage of the second output period T 2, secondary electrons are emitted from the penetration portion 20 and the vicinity of the outer periphery of the upper electrode 14.
  • each of the through portions 20 and the upper electrode 1 are formed. Electrons are evenly emitted from the vicinity of the outer periphery of 4, reducing variations in the overall electron emission characteristics, facilitating control of electron emission, and increasing electron emission efficiency.
  • the gap 28 is formed between the flange 26 of the upper electrode 14 and the emitter 12, so that the drive voltage Va is applied.
  • electric field concentration is likely to occur in the gap 28 portion. This leads to higher efficiency of electron emission, and lower drive voltage (electron emission at a low voltage level) can be realized.
  • the upper electrode 14 has the flange portion 26 formed in the peripheral portion of the through portion 20 so that the gap portion 28 described above Combined with the fact that the electric field concentration is increased, Electrons are easily emitted. This leads to a high output and high efficiency of electron emission, and a reduction in the drive voltage Va can be realized. As a result, for example, it is possible to increase the brightness of, for example, a display or a light source configured by arranging a large number of electron emitting elements.
  • the first electron emission method method of emitting electrons accumulated in the emitter portion 1 2) described above or the second electron emission method (primary electrons from the upper electrode 14 are caused to collide with the emitter portion 1 2.
  • the eaves 26 of the upper electrode 14 functions as a gate electrode (control electrode, focus electron lens, etc.), improving the straightness of the emitted electrons. It can be made. This is advantageous in reducing crosstalk when configured as a display electron source.
  • the electron-emitting device 1 OA As described above, in the electron-emitting device 1 OA according to the first embodiment, high electric field concentration can be easily generated, and the number of electron emission locations can be increased. High output and high efficiency can be achieved for emission, and low voltage drive (low power consumption) is also possible.
  • the upper surface of the emitter portion 12 is formed with irregularities 22 due to dielectric grain boundaries, and the upper electrode 14 is a concave portion at the dielectric grain boundaries. Since the through portion 20 is formed in the portion corresponding to 24, the flange portion 26 of the upper electrode 14 can be easily realized.
  • the upper surface of the emitter portion 12 that is, the surface of the convex portion 30 at the dielectric grain boundary (the inner wall surface of the concave portion 2 4), and the lower surface 2 6 a of the flange portion 2 6 of the upper electrode 14
  • the maximum angle 0 is 1 ° ⁇ 0 ⁇ 60 °
  • the surface of the convex part 30 at the grain boundary of the dielectric of the emitter part 1 2 (inner wall surface of the concave part 2 4) and the upper electrode 1 Since the maximum distance d along the vertical direction between the lower surface 2 6 a of the flange 2 6 of 4 is set to 0 m ⁇ d ⁇ 1 0 m, the electric field in the gap 28 is The degree of concentration can be further increased, and high output and high efficiency for electron emission and low drive voltage can be efficiently achieved.
  • the penetrating portion 20 has the shape of the hole 32.
  • the upper electrode 1 4 and the lower electrode 1 6 of the emitter section 1 2 See Fig. 2
  • the part where the polarization is inverted or changed according to the drive voltage V a applied between is the part immediately below where the upper electrode 14 is formed (first part) 4 0 and the through part
  • the portion corresponding to the region from the inner circumference of 20 toward the inner portion of the penetration portion 20 (second portion) 4 2, in particular, the second portion 4 2 is the level of the driving voltage V a and the electric field concentration. It will change depending on the degree. Therefore, in the first embodiment, the average diameter of the holes 32 is set to 0.1 m or more and 10 m or less. Within this range, there is almost no variation in the electron emission distribution emitted through the through-hole 20, and electrons can be emitted efficiently.
  • the average diameter of the holes 32 is less than 0.1 m, the region for accumulating electrons is narrowed and the amount of electrons emitted is reduced. Of course, it is conceivable to provide a large number of holes 32, but there is a concern that the manufacturing cost will increase with difficulty.
  • the average diameter of the hole 3 2 exceeds 10 m, the ratio of the portion (second portion) 4 2 that contributes to electron emission in the portion exposed from the penetrating portion 20 of the emitter portion 1 2 (occupancy rate) ) Is small, the electron emission efficiency decreases.
  • the cross-sectional shape of the flange portion 26 of the upper electrode 14 may be a shape that extends horizontally on both the upper surface and the lower surface as shown in FIG. 3, or as shown in FIG.
  • the lower surface 2 6 a of 6 may be substantially horizontal, and the upper end portion of the flange portion 26 may be raised upward.
  • the lower surface 2 6 a of the flange 2 6 may be gradually inclined upward toward the center of the penetrating part 20, or as shown in FIG.
  • the lower surface 2 6 a of the flange portion 26 may be gradually inclined downward toward the center of the penetrating portion 20.
  • the example in Fig. 11 can enhance the function as a gate electrode.
  • the gap 28 is narrowed, so that electric field concentration is more likely to occur. High output and high efficiency of emission can be improved.
  • the capacitor C 1 by the emitter section 1 2 is interposed between the upper electrode 14 and the lower electrode 16. And an aggregate of a plurality of capacitors Ca with each gap 28 formed. That is, multiple capacitors C with each gap 28 a is configured as a single capacitor C 2 connected in parallel with each other. In terms of an equivalent circuit, a capacitor C 1 formed by an emitter 12 is connected in series to a capacitor C 2 formed from an aggregate.
  • the capacitor C1 due to the emitter portion 12 is not directly connected in series to the capacitor C2 due to the aggregate, and the number of through-holes 20 formed in the upper electrode 14 and the overall formation area, etc.
  • the capacitor component connected in series changes in response to.
  • the relative dielectric constant is 1.
  • the maximum gap d of the gap 28 is 0.1 m
  • the number of the gaps 28 is 10,000.
  • the dielectric constant of the emitter part 1 2 is 2 000
  • the thickness of the emitter part 1 2 is 20 m
  • the opposing area of the upper electrode 14 and the lower electrode 16 is 20 OZ mX 200 m
  • the capacitance value of 2 is 0.885 p F
  • the capacitance value of capacitor C 1 by the emitter section 1 2 is 35.4 p F.
  • the capacitance value (condenser by the aggregate) in the portion connected in series is 0.805 pF, and the remaining capacitance value is 26.6 pF.
  • the overall capacitance value is 27.5 p F. This capacitance value is 78% of the capacitance value 35.4 p F of the capacitor C 1 by the emitter section 12. That is, the overall capacitance value is smaller than the capacitance value of the capacitor C 1 by the emitter unit 12.
  • the aggregate of the capacitors Ca by the plurality of gaps 28 has a relatively small capacitance value of the capacitor Ca by the gaps 28, and is separated from the capacitor C 1 by the emitter section 12. Pressure, applied voltage Va In most cases, it is applied to the gap 28, and in each gap 28, high output of electron emission is realized.
  • the capacitor C 2 by the aggregate has a structure connected in series to the capacitor C 1 by the emitter section 12. Therefore, the overall capacitance value is based on the capacitance value of the capacitor C 1 by the emitter section 12. Becomes smaller. From this, it is possible to obtain desirable characteristics that electron emission is high output and overall power consumption is small.
  • the glass substrate 11 since the glass substrate 11 is used, it is easy to increase the size and reduce the cost of the product. Can be planned. In addition, it is possible to promote a reduction in processing temperature related to the production of the electron-emitting device 1 O A and to reduce the cost of the equipment. Crystallized glass may be used as the glass substrate 11. In this case, unlike general glass, the processing temperature can be in the range of 60 ° C. and 80 ° C., and the degree of freedom in material selection can be expanded.
  • the electron-emitting device 10 A a has a shape of the penetrating portion 20, in particular, a shape viewed from the upper surface, and is a shape of a notch 44. It is different in that.
  • a shape of the notch 4 4 a comb-like notch 4 6 in which a large number of notches 4 4 are continuously formed as shown in FIG. 16 is preferable. In this case, it is advantageous to reduce the variation in the emission distribution of the electrons emitted through the through-hole 20 and to efficiently emit electrons.
  • the average width of the notches 44 is preferably 0.1 m or more and 10 m or less. This average width is the average of the lengths of different line segments orthogonal to the center line of the notches 44.
  • the electron-emitting device 10 A b according to the second modified example is different in that the shape of the penetrating portion 20, particularly the shape seen from the upper surface, is a slit 48, as shown in FIG. .
  • the slit 48 is a slit whose length in the major axis direction (longitudinal direction) is not less than 10 times the length in the minor axis direction (short direction). Therefore, long axis direction (longitudinal direction ) Is less than 10 times the length in the short axis direction (short direction) can be defined as the shape of the hole 3 2 (see Fig. 4).
  • the slits 48 include those in which a plurality of holes 32 are connected and connected.
  • the average width of the slit 48 is preferably 0.1 m or more and 10 m or less. This is because variations in the emission distribution of electrons emitted through the through-hole 20 are reduced, which is advantageous in efficiently emitting electrons.
  • This average width indicates the average length of a plurality of different line segments perpendicular to the center line of the slit 48.
  • the electron-emitting device 10 Ac according to the third modification has a portion corresponding to the penetrating portion 20, for example, a dielectric, on the upper surface of the emitter portion 12.
  • the floating electrode 50 exists in the recess 24 of the grain boundary.
  • the floating electrode 50 also serves as an electron supply source, a large number of electrons can be emitted to the outside through the through-hole 20 in the electron emission stage (second stage).
  • the electron emission from the floating electrode 50 may be due to electric field concentration at the ripple junction of the floating electrode 5 O Z dielectric Z vacuum.
  • the electron-emitting device 1 O A according to the first embodiment is shown in FIG.
  • the amount of positive charge and the amount of negative charge are in equilibrium, and as the negative voltage level is increased in the negative direction, the amount of accumulated electrons further increases, and the amount of negative charge increases accordingly.
  • the state becomes larger than the amount of charge.
  • the electron is saturated.
  • the amount of negative charge here is the sum of the amount of electrons remaining as accumulated and the amount of negative charge of the dipole whose emitter 12 is inverted.
  • V 3 is the voltage at which electrons are accumulated and saturated
  • V4 is the voltage at which electron emission starts
  • FIG. 19 the characteristics of FIG. 19 will be described in terms of voltage-polarization characteristics.
  • the explanation is based on the assumption that the emitter section 12 is polarized in the negative direction, for example, the negative pole of the dipole faces the upper surface of the emitter section 12 (see Fig. 2 OA). To do.
  • the dipole negative electrode is connected to the emitter section 1 as shown in FIG. 2 is directed to the upper surface of 2, so that almost no electrons are accumulated on the upper surface of the emitter portion 1 2.
  • electrons are emitted (internal emission) from the upper electrode 14 toward a portion of the emitter portion 12 exposed from the through portion 20 of the upper electrode 14. Then, at point p 3 in Fig. 19, the accumulated state of electrons is saturated.
  • Characteristic portions of the characteristics of the electron-emitting device 1 OA are as follows.
  • V 1 the rate of change in polarization when a positive coercive voltage V 2 is applied, ⁇ q 2 ⁇
  • V 3 is the voltage at which electrons are accumulated and saturated
  • V 4 is the voltage at which electron emission starts
  • the electron-emitting device 1OA includes a plurality of electron-emitting devices 1OA arranged according to a plurality of pixels. Each electron-emitting device 1 can be easily applied to a light source that emits a phosphor by emitting electrons from OA and a display that displays an image.
  • a display and a light source (hereinafter referred to as a display 100 or the like) configured using the electron-emitting device 1 OA according to the first embodiment will be described.
  • the unit element of the display is referred to as “pixel”, and the unit element of the light source is referred to as “light emitting element”.
  • This display or the like 100 has a large number of electron-emitting devices as shown in FIG.
  • one electron-emitting device 1 OA may be assigned per pixel (light-emitting device), or a plurality of electron-emitting devices 1 OA may be assigned per pixel (light-emitting device).
  • one electron-emitting device 1 OA is assigned per pixel (light emitting device)
  • a driving circuit 10 4 for driving for driving.
  • one electron-emitting device 1 OA may be assigned per pixel (light-emitting device), or a plurality of electron-emitting devices 1 OA may be assigned per pixel (light-emitting device).
  • a case where one electron-emitting device 1 OA is assigned per pixel (light emitting device) will be described.
  • This drive circuit 1 0 4 is provided with a plurality of row selection lines 1 0 6 for selecting a row for the light emitting display section 1 0 2 and data for the light emitting display section 1 0 2 as well.
  • a plurality of signal lines 1 0 8 for supplying the signal S d are wired.
  • the drive circuit 10 04 selectively supplies a selection signal S s to the row selection lines 1 0 6 to sequentially select the electron-emitting devices 1 OA in units of one row 1 1 0 and a signal supply circuit 1 1 which outputs a data signal S d in parallel to the signal line 1 0 8 and supplies the data signal S d to the row selected by the row selection circuit 1 1 0 (selected row). 2 and a signal control circuit 1 1 4 for controlling the row selection circuit 1 1 0 and the signal supply circuit 1 1 2 based on the input video signal SV and synchronization signal Sc.
  • the row selection circuit 1 1 0 and the signal supply circuit 1 1 2 are connected to the power supply circuit 1 1 6 (for example, 5 0 and 0), in particular, between the row selection circuit 1 1 0 and the power supply circuit 1 1 6
  • a pulse power supply 1 1 8 is connected between the negative electrode line and GND (ground).
  • the pulse power supply 1 1 8 outputs a pulsed voltage waveform having a reference voltage (for example, O V) in a charge accumulation period Td, which will be described later, and a voltage (for example, ⁇ 400 V) in the light emission period Th.
  • the row selection circuit 1 1 0 outputs the selection signal S s to the selected row and the non-selection signal Sn to the non-selected row during the charge accumulation period T d.
  • the power supply voltage from the power supply circuit 1 1 6 for example, 5 0 V
  • the voltage from the pulse power supply 1 1 8 for example, ⁇ 4 0 0 V
  • Outputs a constant voltage for example, -3 5 0 V).
  • the signal supply circuit 1 1 2 has a pulse generation circuit 1 2 0 and an amplitude modulation circuit 1 2 2.
  • the pulse generation circuit 1 2 0 has a constant pulse during the charge accumulation period Td.
  • a pulse signal Sp having a constant amplitude (for example, 50 V) is generated and output, and a reference voltage (for example, OV) is output during the light emission period Th.
  • the amplitude modulation circuit 1 2 2 modulates the amplitude of the pulse signal Sp from the pulse generation circuit 1 2 0 according to the luminance level of the pixel (light emitting element) in the selected row during the charge accumulation period T d, Each is output as a data signal S d of a pixel (light emitting element) relating to the selected row, and the reference voltage from the pulse generation circuit 120 is output as it is during the light emission period Th.
  • the timing control and the supply of the luminance level of a plurality of selected pixels (light emitting elements) to the amplitude modulation circuit 12 2 are performed through the signal control circuit 1 14.
  • the amplitude of the pulse signal Sp is set to the low level V s I (see Fig. 2 3 A) and the luminance
  • the amplitude of the pulse signal S p is set to the medium level V sm (see Fig. 23 B).
  • the amplitude of the pulse signal S p is set to the high level V sh ( (See Figure 2 3C).
  • the pulse signal S p is, for example, 1 2 8 steps depending on the luminance level of the pixel (light emitting element)
  • the amplitude is modulated in steps of 2 and 5 6.
  • the signal supply circuit 1 1 2 a includes a pulse generation circuit 1 2 4 and a pulse width modulation circuit 1 2 6.
  • the pulse generation circuit 1 2 4 in the voltage waveform applied to the electron-emitting device 1 OA during the charge accumulation period T d (shown by the solid line in Fig. 25). Generates and outputs a pulse signal Spa whose level changes (indicated by a broken line in Fig. 25A and Fig. 25C), and outputs a reference voltage during the light emission period Th.
  • the pulse width modulation circuit 1 2 6 selects the pulse width W p of the pulse signal Spa from the pulse generation circuit 1 2 4 (see FIG. 25 A and FIG. 25 C) during the charge accumulation period T d.
  • the luminance level of the pixel (light emitting element) related to the row And output as a data signal S d of the pixel (light emitting element) for each selected row.
  • the reference voltage from the pulse generation circuit 1 2 4 is output as it is. Also in this case, the timing control and the supply of the luminance level of the selected pixels (light emitting elements) to the pulse width modulation circuit 1 26 are performed through the signal control circuit 1 14.
  • the pulse width W p of the pulse signal Spa is shortened, and the substantial amplitude is reduced to the low level V. s I (see Fig. 25 A).
  • the pulse width W p of the pulse signal Spa is set to the medium length, and the substantial amplitude is set to the medium level V sm (
  • the pulse signal Spa is, for example, 1 2 8 steps or 2 5 according to the luminance level of the pixel (light emitting element). Pulse width modulated in 6 steps.
  • the change in the characteristic diagram when the level of the negative voltage related to the above-described electron accumulation is changed is represented by three amplitude modulations for the pulse signal S p shown in FIGS. 2 3 A and 23 C.
  • the amount of electrons stored in the electron-emitting device 1 OA is small.
  • the amount of accumulated electrons is medium
  • Fig. 2 3 C and Fig. 2 5 At the negative voltage level V sh shown in C, as shown in Fig. 26 C, the amount of accumulated electrons is large and almost saturated.
  • the electron-emitting device 1 OA according to the first embodiment is used as a pixel (light emitting device) of a display or the like 100, as shown in FIG.
  • a transparent plate made of, for example, glass or acrylic is disposed above, and a collector electrode made of, for example, a transparent electrode on the back surface (the surface facing the upper electrode 14) of the transparent plate 1 30.
  • a bias voltage source 1 3 6 (collector voltage V c) is connected to the collector electrode 1 3 2 via a resistor.
  • the electron-emitting device 10 A is naturally disposed in the vacuum space.
  • the degree of vacuum in the atmosphere is preferably 1 0 2 1 0 — 6 Pa , more preferably 1 0 — 3 1 0 — 5 Pa .
  • the collector electrode 1 3 2 is formed on the back surface of the transparent plate 1 3 0, and the phosphor 1 3 is formed on the surface of the collector electrode 1 3 2 (surface facing the upper electrode 1 4).
  • the phosphor 1 3 4 is formed on the back surface of the transparent plate 1 30 and the collector electrode 1 3 is covered so as to cover the phosphor 1 3 4 2 may be formed.
  • the collector electrode 1 3 2 functions as a metal back.
  • the electrons emitted from the emitter section 1 2 penetrate the collector electrode 1 3 2 and enter the phosphor 1 3 4 to excite the phosphor 1 3 4.
  • the collector electrode 1 3 2 is thick enough to allow electrons to pass through, and is preferably 100 ⁇ m or less. The greater the kinetic energy of the electron, the greater the collector electrode 1 3 The thickness of 2 can be increased.
  • the collector electrode 1 32 reflects the light emitted from the phosphor 1 34, and the light emitted from the phosphor 1 34 can be efficiently emitted to the transparent plate 1 30 side (light emitting surface side).
  • the electron emission state of the electron-emitting device 10A is observed. That is, as shown in FIG. 29A, a write pulse Pw having a voltage of ⁇ 7 OV is applied to the electron-emitting device 1 OA to accumulate electrons in the electron-emitting device 1 OA, and then 28 OV A lighting pulse P h having a voltage was applied to emit electrons.
  • the electron emission state was measured by detecting the light emission of phosphor 1 34 with a light receiving element (photodiode). The detected waveform is shown in Fig. 29B.
  • the duty ratio of the write pulse Pw and the lighting pulse Ph was 50%.
  • the second experimental example shows how the amount of electrons emitted from the electron-emitting device 1 OA varies depending on the amplitude of the write pulse Pw shown in FIG.
  • the change in the amount of emitted electrons was measured by detecting the light emission of the phosphor 134 with a light receiving element (photodiode), as in the first experimental example.
  • the experimental results are shown in Fig. 31.
  • the solid line A shows the characteristics when the amplitude of the lighting pulse P h is 200 V and the amplitude of the write pulse Pw is changed from -1 OV to -8 OV.
  • the solid line B shows the characteristics when the amplitude of the lighting pulse Ph is 35 OV and the amplitude of the write pulse Pw is changed from -1 OV to -8 OV.
  • the third experimental example shows how the amount of electrons emitted from the electron-emitting device 1OA changes with the amplitude of the lighting pulse Ph shown in Fig. 30.
  • the change in the amount of emitted electrons was measured by detecting the light emission of phosphor 1 34 with a light receiving element (photodiode), as in the first experimental example.
  • the experimental results are shown in Figure 32.
  • the solid line C shows the characteristics when the amplitude of the write pulse P w is set to -4 OV and the amplitude of the lighting pulse P h is changed from 5 OV to 40 OV. Shows the characteristics when the amplitude of the write pulse P w is ⁇ 7 OV and the amplitude of the lighting pulse P h is changed from 50 V to 400 V.
  • the fourth experimental example shows how the amount of electrons emitted from the electron-emitting device 1 OA varies depending on the level of the collector voltage Vc shown in Fig. 27 or Fig. 28.
  • the change in the amount of emitted electrons was measured by detecting the emission of phosphor 1 34 with a light receiving element (photodiode), as in the first experimental example.
  • the experimental results are shown in Figure 33.
  • the solid line E shows the characteristics when the level of the collector voltage V c is 3 kV and the amplitude of the lighting pulse Ph is changed from 8 OV to 50 OV.
  • FIG. FIG. 34 typically shows the operation of a pixel (light emitting element) in one row and one column, two rows and one column, and n rows and one column.
  • the electron-emitting device 1 OA used here has a coercive voltage V 1 at point p 2 in FIG. 19 of ⁇ 2 OV, for example, coercive voltage V 2 at point p 5 is +7 OV, and voltage at point p 3 V 3 has a characteristic of -50 V and voltage V 4 at point p 4 has a characteristic of +5 OV.
  • one charge accumulation period Td and one light emission period Th are included in the one frame.
  • one charge accumulation period Td includes n selection periods T s. Since each selection period T s becomes the selection period T s of the corresponding row, n ⁇ 1 rows that do not correspond become the non-selection period T n. [0154] Then, in this driving method, all the electron-emitting devices 1 0 in the charge accumulation period T d
  • a selection signal S of, for example, 50 V is applied to the row selection line 1 0 6 of the first row.
  • a non-selection signal 5 of 0 is supplied to the row selection lines 1 0 6 of the other rows.
  • the voltage of the data signal S d supplied to the signal line 10 8 of the pixel (light emitting element) to be turned on (light emitting element) is OV or more and 3 OV or less.
  • the voltage is in the range and according to the luminance level of the corresponding pixel (light emitting element). OV when the brightness level is maximum.
  • the modulation according to the luminance level of the data signal Sd is performed through the amplitude modulation circuit 12 2 shown in FIG. 22 and the pulse width modulation circuit 1 26 shown in FIG.
  • the electron emitter 1 corresponding to each pixel (light emitting element) to be turned ON in the first row 1 OA has a space between the upper electrode 14 and the lower electrode 16 according to the luminance level.
  • -A voltage of 5 OV or more and-2 OV or less is applied.
  • each electron-emitting device 1 OA described above accumulates electrons according to the applied voltage.
  • the electron emission element corresponding to the pixel (light emitting element) in the first row and the first column is, for example, at the maximum luminance level, and thus is in the state of the point p 3 in the characteristic of FIG. The maximum amount of electrons is accumulated in the portion exposed from the through portion 20 of the upper electrode 14.
  • the voltage of the data signal S d supplied to the OA is, for example, 50 V.
  • 0 is applied to the electron-emitting device 10 corresponding to the OFF target pixel (light-emitting device).
  • the state of the characteristic point p 1 in Fig. 19 is entered, and no electrons are accumulated.
  • the selection signal Ss of 5 OV is applied to the row selection line 106 of the second row in the selection period Ts of the second row. Then, the non-selection signal Sn of 0 V is supplied to the row selection line 106 of the other row.
  • the upper electrode 14 and the lower electrode 16 of the electron-emitting device 1 OA corresponding to the pixel (light-emitting device) that should be turned on (light-emitting) is -5 OV or more depending on the luminance level. A voltage of 2 OV or less is applied.
  • a voltage of OV or more and 5 OV or less is applied between the upper electrode 14 and the lower electrode 16 of the electron emission device 1 OA corresponding to the pixel (light emitting device) in the non-selected state, for example, the first row.
  • this voltage is a voltage that does not reach point 4 in the characteristics of Fig. 19, the electron emission corresponding to the pixel (light emitting element) that should be turned ON (light emitting) in the first row Element 1 Electrons are not emitted from the OA. That is, the pixel (light emitting element) in the first row in the non-selected state is not affected by the data signal S d supplied to the pixel (light emitting element) in the second row in the selected state.
  • the 50 V selection signal S s is supplied to the row selection line 106 of the n-th row, and 0 is supplied to the row selection line 106 of the other rows.
  • V non-selection signal Sn is supplied.
  • the electron-emitting device 1 corresponding to each pixel (light-emitting device) in one row (n-1) in the non-selected state 1 OV is between OV and 5 OV between the upper electrode 14 and the lower electrode 16 of the OA Electrons are emitted from the electron-emitting device 1 OA corresponding to the pixel (light-emitting device) that should be turned on (light-emitting device) among these non-selected pixels (light-emitting devices). There is no.
  • the light emission period T h is entered.
  • This light emission In the period T h a reference voltage (for example, OV) is applied to the upper electrode 14 of the all electron-emitting device 1 OA through the signal supply circuit 1 1 2, and the lower electrode 16 of the all-electron emitting device 1 OA is -350 V voltage (pulse power supply 1 1 8-400 V + row selection circuit 1 1 0 power supply voltage 50 V) is applied.
  • a high voltage (+350 V) is applied between the upper electrode 14 and the lower electrode 16 of the all-electron emission element 1 OA.
  • All the electron-emitting devices 1 OA are in the state of the point p 6 in the characteristic of FIG. 19 respectively, and as shown in FIG. 21C, from the part where the electrons are accumulated in the emitter section 12, Electrons are emitted through the penetration 20. Of course, electrons are also emitted from the vicinity of the outer periphery of the upper electrode 14.
  • an electron-emitting device corresponding to a pixel (light-emitting device) to be turned on (light-emitting device)
  • Electrons are emitted from 1 OA, and the emitted electrons are guided to the collector electrode 1 32 corresponding to these electron-emitting devices 1 OA to excite the corresponding phosphor 1 34 and emit light. As a result, an image is displayed from the surface of the transparent plate 130.
  • the electron-emitting device has a plurality of electron-emitting devices 1 OA arranged in accordance with a plurality of pixels (light-emitting devices), and each electron-emitting device Element 1 It becomes easy to apply to a display or the like that displays an image by emitting electrons from OA.
  • the relationship between the voltage V 3 at which electrons are accumulated and saturated and the voltage V 4 at which the emission of electrons starts is 1 ⁇
  • the electron-emitting devices 1 OA are arranged in a matrix, the electron-emitting devices 1 OA are selected in units of one row in synchronization with the horizontal scanning period, and the electron-emitting devices 1 in the selected state are selected.
  • the data signal S d corresponding to the luminance level of each pixel (light emitting element) is supplied to OA, the data signal S d is also supplied to the non-selected pixel (light emitting element).
  • the voltage level of the data signal S d supplied to the selected electron-emitting device 1 OA is changed from the reference voltage to the voltage V 3. Even if the voltage relationship is set so that, for example, a signal having a polarity opposite to that of the data signal Sd is supplied to the non-selected electron-emitting device 1 OA, the non-selected state This pixel (light emitting element) is not affected by the data signal S d to the pixel (light emitting element) in the selected state.
  • the amount of electrons accumulated in each pixel (light emitting element) accumulated in the selection period T s of each pixel (light emitting element) (the amount of charge of the emitter section 1 2 in each electron emitting element 1 OA) is the next light emitting period.
  • the memory effect in each pixel (light emitting element) can be realized, and high luminance and high contrast can be achieved.
  • the period T h during which the voltage for electron emission (emission voltage) is applied to all the electron-emitting devices 1 OA is naturally shorter than one frame, and FIG. 29A and FIG.
  • the period during which the emission voltage is applied can be shortened, compared with the case where charge accumulation and light emission are performed during scanning of the pixel (light-emitting element). Power consumption can be greatly reduced.
  • the electron emission element 1 corresponding to the (light emitting element) 1 OA is separated from the period T h during which electrons are emitted, so that the circuit for applying a voltage corresponding to the luminance level to each electron emission element 1 OA is designed to be driven at a low voltage. be able to.
  • the data signal corresponding to the image and the selection signal SsZ non-selection signal Sn in the charge accumulation period Td need to be driven for each row or column, as seen in the above-described embodiment.
  • the driving voltage may be several tens of ports, an inexpensive multi-output driver used in a fluorescent display tube or the like can be used.
  • light emission period T In h the voltage that sufficiently discharges electrons may be higher than the drive voltage.
  • a circuit component with multiple outputs Do not need. For example, it is only necessary to have a drive circuit with only one output composed of high breakdown voltage discrete components, which is advantageous in terms of cost and cost.
  • the drive voltage and discharge voltage can be reduced by reducing the thickness of the emitter section 12. Therefore, for example, the driving voltage can be set to several ports by setting the film thickness.
  • the second stage of electron emission not based on row scanning is performed at the same time for all pixels (light emitting elements) separately from the first stage based on row scanning. It is easy to secure the light emission time regardless of the screen size, and the brightness can be increased. In addition, since images are displayed on the screen all at once, it is possible to display moving images without false contours or image blurring.
  • the electron-emitting device 1OB according to the second embodiment has substantially the same configuration as the electron-emitting device 1OA according to the first embodiment described above, as shown in FIG.
  • the upper electrode 14 is made of the same material as the lower electrode 16, the upper electrode 14 is thicker than 10 m, and the through-hole 20 is etched (wet etching, dry It is characterized in that it is artificially formed using etching), lift-off, and laser.
  • the shape of the penetrating portion 20 the shape of the hole 32, the shape of the notch 44, and the shape of the slit 48 can be adopted as in the first embodiment described above.
  • the lower surface 26 6 a of the peripheral portion 26 of the through portion 20 in the upper electrode 14 is gradually inclined upward toward the center of the through portion 20.
  • This shape can be easily formed by using, for example, lift-off.
  • Electron-emitting device As with OA, high electric field concentration is easily achieved In addition, the number of electron emission locations can be increased, high output and high efficiency can be achieved for electron emission, and low voltage drive (low power consumption) is also possible. Also in this case, since the glass substrate 11 is used, it is possible to easily increase the size of the plate and to reduce the product cost.
  • the floating electrode 50 is provided on the upper surface of the emitter section 12 corresponding to the through-hole 20. May be present.
  • an electrode having a substantially T-shaped cross section is formed as the upper electrode 14. May be.
  • the shape of the upper electrode 14, particularly, the peripheral portion 2 of the through portion 20 of the upper electrode 14 6 may be raised.
  • the film material to be the upper electrode 14 may include a material that is gasified during the firing process. Thereby, in the firing process, the material is gasified, and as a result, a large number of through portions 20 are formed in the upper electrode 14, and the peripheral portion 26 of the through portion 20 is lifted. Become.
  • the electron-emitting device according to the present invention is not limited to the above-described embodiment, and can of course have various configurations without departing from the gist of the present invention.

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Abstract

An electron emitting element (10A) is provided with a lower electrode (16) formed on a glass substrate (11); an emitter part (12) composed of a dielectric film formed on the lower electrode (16); and an upper electrode (14) formed on the emitter part (12). A driving voltage (Va) for electron emission is applied between the upper electrode (14) and the lower electrode (16). At least the upper electrode (14) is provided with a plurality of penetrating parts (20) from which the emitter part (12) is exposed. In the upper electrode (14), a plane (26a) facing the emitter part (12) at a circumference part (26) of the penetrating part is separated from the emitter part (12).

Description

明 細 書  Specification
電子放出素子、 電子放出装置、 ディスプレイ及び光源  Electron emitter, electron emitter, display and light source
技術分野  Technical field
[0001] 本発明は、 ガラス基板上に形成された電子放出素子と、 該電子放出素子を 複数有する電子放出装置と、 該電子放出装置を使用したディスプレイと、 前 記電子放出装置を使用した光源に関する。  [0001] The present invention relates to an electron-emitting device formed on a glass substrate, an electron-emitting device having a plurality of the electron-emitting devices, a display using the electron-emitting device, and a light source using the electron-emitting device. About.
背景技術  Background art
[0002] 近時、 電子放出素子は、 力ソード電極及びァノ一ド電極を有し、 フィール ドエミッションディスプレイ (FED) やバックライトのような種々のアブ リケーシヨンに適用されている。 FEDに適用する場合、 複数の電子放出素 子を二次元的に配列し、 これら電子放出素子に対する複数の蛍光体を、 所定 の間隔をもってそれぞれ配置するようにしている。  [0002] Recently, an electron-emitting device has a force sword electrode and an anode electrode, and is applied to various abrasions such as a field emission display (FED) and a backlight. When applied to FED, a plurality of electron-emitting devices are two-dimensionally arranged, and a plurality of phosphors for these electron-emitting devices are arranged with a predetermined interval.
[0003] この電子放出素子の従来例としては、 例えば特許文献 1 5があるが、 い ずれもェミッタ部に誘電体を用いていないため、 対向電極間にフォーミング 加工もしくは微細加工が必要となったリ、 電子放出のために高電圧を印加し なければならず、 また、 パネル製作工程が複雑で製造コストが高くなるとい う問題がある。  [0003] As a conventional example of this electron-emitting device, for example, there is Patent Document 15, but since neither of them uses a dielectric in the emitter part, forming processing or fine processing is required between the counter electrodes. In addition, a high voltage must be applied for electron emission, and the panel manufacturing process is complicated and the manufacturing cost increases.
[0004] そこで、 ェミッタ部を誘電体で構成することが考えられており、 誘電体か らの電子放出に関して、 以下の非特許文献 1 3にて諸説が述べられている 特許文献 1 :特開平 1-31 1 533号公報  [0004] Therefore, it is considered that the emitter portion is made of a dielectric, and various theories are described in the following Non-Patent Document 13 regarding electron emission from the dielectric. 1-31 1 533
特許文献 2:特開平 7-1 47 1 31号公報  Patent Document 2: Japanese Patent Application Laid-Open No. 7-1 47 1 31
特許文献 3:特開 2000-285801号公報  Patent Document 3: Japanese Patent Laid-Open No. 2000-285801
特許文献 4:特公昭 46-20944号公報  Patent Document 4: Japanese Patent Publication No. 46-20944
特許文献 5:特公昭 44-261 25号公報  Patent Document 5: Japanese Patent Publication No. 44-261 25
非特許文献 1 :安岡、 石井著 「強誘電体陰極を用いたパルス電子源」 応用物理 第 68巻第 5号、 p 546 550 (1 999) 非特許文献 2: V. F. Puchkarev, G. A. Mesyats, On the mechanism of emission from the ferroelectric ceramic cathode, J. Appl. Phys. , vol. 78, No. 9, 1 November, 1995, p. 5633-5637 Non-Patent Document 1: Yasuoka, Ishii, "Pulsed electron source using a ferroelectric cathode" Applied Physics Vol. 68, No. 5, p 546 550 (1 999) Non-Patent Document 2: VF Puchkarev, GA Mesyats, On the mechanism of emission from the ferroelectric ceramic cathode, J. Appl. Phys., Vol. 78, No. 9, 1 November, 1995, p. 5633-5637
非特許文献 3: H. Riege, Electron emission ferroelectr ics - a review, Nucに Inst and Meth. A340, p. 80-89 (1994)  Non-Patent Document 3: H. Riege, Electron emission ferroelectrics-a review, Nuc, Inst and Meth. A340, p. 80-89 (1994)
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0005] ところで、 従来の電子放出素子 200においては、 図 40に示すように、 ェミッタ部 202に上部電極 204及び下部電極 206を形成する場合、 特 に、 ェミッタ部 202上に上部電極 204が密着して形成されることになる 。 電界集中ポイントは、 上部電極 204Zェミッタ部 202Z真空の 3重点 であるが、 この場合、 上部電極 204の周縁部分が該当する。  Incidentally, in the conventional electron-emitting device 200, as shown in FIG. 40, when the upper electrode 204 and the lower electrode 206 are formed on the emitter section 202, the upper electrode 204 is in close contact with the emitter section 202 in particular. Will be formed. The electric field concentration point is the triple point of the upper electrode 204Z emitter 202Z vacuum. In this case, the peripheral portion of the upper electrode 204 corresponds.
[0006] しかしながら、 上部電極 204の周縁部分がェミッタ部 202上に密着さ れていることから、 電界集中の度合いが小さく、 電子を放出するに必要なェ ネルギ一が小さいという問題がある。 また、 電子放出箇所も上部電極 204 の周縁部分に限られることから、 全体の電子放出特性にばらつきが生じ、 電 子放出の制御が困難になると共に、 電子放出効率が低いという問題もある。  [0006] However, since the peripheral portion of the upper electrode 204 is in close contact with the emitter portion 202, there is a problem that the degree of electric field concentration is small and the energy required to emit electrons is small. In addition, since the electron emission location is limited to the peripheral portion of the upper electrode 204, there are variations in the overall electron emission characteristics, which makes it difficult to control the electron emission and has a problem of low electron emission efficiency.
[0007] 本発明はこのような課題を考慮してなされたものであり、 高い電界集中を 容易に発生させることができ、 しかも、 電子放出箇所を多くすることができ 、 電子放出について高出力、 高効率を図ることができ、 低電圧駆動も可能で 、 且つ、 大板化と、 製品コストを低廉化する上で有利な電子放出素子及び電 子放出装置を提供することを目的とする。  [0007] The present invention has been made in consideration of such a problem, and can easily generate a high electric field concentration, and can increase the number of electron emission locations. An object of the present invention is to provide an electron-emitting device and an electron-emitting device that can achieve high efficiency, can be driven at a low voltage, and are advantageous in increasing the size and reducing the product cost.
[0008] また、 本発明の他の目的は、 電子放出について高出力、 高効率を図ること ができ、 低電圧駆動も可能で、 且つ、 大板化と、 製品コストを低廉化する上 で有利な電子放出装置を利用した高輝度及び低コス卜のディスプレイ及び光 源を提供することを目的とする。  [0008] Further, another object of the present invention is to achieve high output and high efficiency with respect to electron emission, and can be driven at a low voltage, and is advantageous in increasing the plate size and reducing the product cost. An object of the present invention is to provide a high-luminance and low-cost display and light source using a simple electron emission device.
課題を解決するための手段  Means for solving the problem
[0009] 本発明に係る電子放出素子は、 ガラス基板上に形成された第 1の電極と、 前記第 1の電極上に形成された誘電体膜からなるェミッタ部と、 前記エミッ タ部上に形成された第 2の電極とを有し、 電子放出のための駆動電圧は、 前 記第 1の電極と前記第 2の電極間に印加され、 少なくとも前記第 2の電極は 、 前記ェミッタ部が露出される複数の貫通部を有し、 前記第 2の電極のうち 、 前記貫通部の周部における前記ェミッタ部と対向する面が、 前記ェミッタ 部から離間していることを特徴とする。 [0009] An electron-emitting device according to the present invention includes a first electrode formed on a glass substrate, An emitter section made of a dielectric film formed on the first electrode; and a second electrode formed on the emitter section. The driving voltage for electron emission is Applied between the second electrode and the second electrode, wherein at least the second electrode has a plurality of through portions from which the emitter portion is exposed, and of the second electrode, the peripheral portion of the through portion The surface facing the emitter part in is separated from the emitter part.
[0010] また、 本発明に係る電子放出装置は、 ガラス基板上に形成された複数の電 子放出素子を有する電子放出装置であって、 前記電子放出素子は、 前記ガラ ス基板上に形成された第 1の電極と、 前記第 1の電極上に形成された誘電体 膜からなるェミッタ部と、 前記ェミッタ部上に形成された第 2の電極とを有 し、 電子放出のための駆動電圧は、 前記第 1の電極と前記第 2の電極間に印 加され、 少なくとも前記第 2の電極は、 前記ェミッタ部が露出される複数の 貫通部を有し、 前記第 2の電極のうち、 前記貫通部の周部における前記エミ ッタ部と対向する面が、 前記ェミッタ部から離間していることを特徴とする [0010] Further, an electron emission device according to the present invention is an electron emission device having a plurality of electron emission elements formed on a glass substrate, wherein the electron emission elements are formed on the glass substrate. A first electrode, an emitter portion made of a dielectric film formed on the first electrode, and a second electrode formed on the emitter portion, and a drive voltage for electron emission Is applied between the first electrode and the second electrode, and at least the second electrode has a plurality of penetrating portions from which the emitter portion is exposed, and among the second electrodes, A surface of the peripheral portion of the penetrating portion facing the emitter portion is separated from the emitter portion.
[0011 ] また、 本発明に係るディスプレイは、 上記電子放出装置と、 ガラス基板の うち、 前記電子放出装置におけるェミッタ部が形成された面と対向して配置 された透明板と、 前記透明板のうち、 前記ェミッタ部と対向する面に、 前記 電子放出装置における電子放出素子との間で電界を形成するための電極と、 前記電極に形成された蛍光体とを有し、 前記電子放出素子から放出される電 子を前記蛍光体に衝突させて前記蛍光体を励起し、 発光させることを特徴と する。 [0011] In addition, a display according to the present invention includes: the above-described electron emission device; a transparent plate disposed on a surface of the glass substrate facing an emitter portion of the electron emission device; Among them, an electrode for forming an electric field with the electron-emitting device in the electron-emitting device and a phosphor formed on the electrode on a surface facing the emitter section, The emitted electrons collide with the phosphor to excite the phosphor to emit light.
[0012] また、 本発明に係る光源は、 上記電子放出装置と、 ガラス基板のうち、 前 記電子放出装置におけるェミッタ部が形成された面と対向して配置された透 明板と、 前記透明板のうち、 前記ェミッタ部と対向する面に、 前記電子放出 装置における電子放出素子との間で電界を形成するための電極と、 前記電極 に形成された蛍光体とを有し、 前記電子放出素子から放出される電子を前記 蛍光体に衝突させて前記蛍光体を励起し、 発光させることを特徴とする。 [0013] 先ず、 第 1の電極と第 2の電極との間に駆動電圧が印加される。 この駆動 電圧は、 例えば、 パルス電圧あるいは交流電圧のように、 時間の経過に伴つ て、 基準電圧 (例えば O V) よりも高い又は低い電圧レベルから基準電圧よ リも低い又は高い電圧レベルに急激に変化する電圧として定義される。 [0012] Further, the light source according to the present invention includes the above-described electron emission device, a transparent plate disposed opposite to a surface of the glass substrate on which the emitter portion is formed, and the transparent substrate. An electrode for forming an electric field with the electron-emitting device in the electron-emitting device and a phosphor formed on the electrode on a surface of the plate facing the emitter section, and the electron-emitting device Electrons emitted from an element collide with the phosphor to excite the phosphor to emit light. [0013] First, a drive voltage is applied between the first electrode and the second electrode. This drive voltage rapidly increases from a voltage level higher or lower than a reference voltage (for example, OV) to a voltage level lower or higher than the reference voltage with time, such as a pulse voltage or an AC voltage. Is defined as the voltage that changes to.
[0014] また、 ェミッタ部の第 2の電極が形成されている面と第 2の電極と該電子 放出素子の周囲の媒質 (例えば、 真空) との接触箇所においてトリプルジャ ンクシヨンが形成されている。 ここで、 トリプルジャンクションとは、 第 2 の電極とェミッタ部と真空との接触により形成される電界集中部として定義 される。 なお、 前記トリプルジャンクションには、 第 2の電極とェミッタ部 と真空が 1つのポイントとして存在する 3重点も含まれる。 本発明では、 卜 リプルジャンクションは、 複数の貫通部の周部や第 2の電極の周縁部に形成 されることになる。 従って、 第 1の電極と第 2の電極との間に上述のような 駆動電圧が印加されると、 上記したトリプルジャンクションにおいて電界集 中が発生する。  [0014] In addition, a triple junction is formed at a contact point between the surface of the emitter section where the second electrode is formed, the second electrode, and a medium (for example, vacuum) around the electron-emitting device. . Here, the triple junction is defined as an electric field concentration portion formed by contact between the second electrode, the emitter portion, and the vacuum. The triple junction includes a triple point where the second electrode, the emitter part, and the vacuum exist as one point. In the present invention, the ripple junction is formed in the peripheral portion of the plurality of through portions and the peripheral portion of the second electrode. Therefore, when the drive voltage as described above is applied between the first electrode and the second electrode, electric field concentration occurs in the triple junction described above.
[0015] そして、 第 1段階において、 基準電圧よリも高い又は低い電圧が第 1の電 極と第 2の電極間に印加され、 上記したトリプルジャンクションにおいて例 えば一方向への電界集中が発生し、 第 2の電極からェミッタ部に向けて電子 放出が行われ、 例えばェミッタ部のうち、 第 2の電極の貫通部に対応した部 分や第 2の電極の周縁部近傍の部分に電子が蓄積される。 すなわち、 ェミツ タ部が帯電することになる。 このとき、 第 2の電極が電子供給源として機能 する。  [0015] In the first stage, a voltage higher or lower than the reference voltage is applied between the first electrode and the second electrode, and electric field concentration in one direction occurs in the triple junction described above, for example. Then, electrons are emitted from the second electrode toward the emitter. For example, electrons are emitted from the emitter to the portion corresponding to the penetrating portion of the second electrode or the vicinity of the peripheral portion of the second electrode. Accumulated. That is, the emitter section is charged. At this time, the second electrode functions as an electron supply source.
[0016] 次の第 2段階において、 駆動電圧の電圧レベルが急減に変化して、 基準電 圧よりも低い又は高い電圧が第 1の電極と第 2の電極間に印加されると、 今 度は、 第 2の電極の貫通部に対応した部分や第 2の電極の周縁部近傍に帯電 した電子は、 逆方向へ分極反転したェミッタ部の双極子 (ェミッタ部の表面 に負極性が現れる) により、 ェミッタ部から追い出され、 ェミッタ部のうち 、 前記電子が蓄積されていた部分から、 貫通部を通じて電子が放出される。 もちろん、 第 2の電極の外周部近傍からも電子が放出される。 このとき、 前 記第 1段階における前記ェミッタ部の帯電量に応じた電子が、 前記第 2段階 に前記ェミッタ部から放出される。 また、 前記第 1段階における前記エミッ タ部の帯電量が、 前記第 2段階での電子放出が行われるまで維持される。 [0016] In the next second stage, when the voltage level of the driving voltage changes suddenly and a voltage lower or higher than the reference voltage is applied between the first electrode and the second electrode, The electron charged in the part corresponding to the penetrating part of the second electrode or in the vicinity of the peripheral part of the second electrode is the dipole of the emitter part whose polarity is reversed in the reverse direction (negative polarity appears on the surface of the emitter part) As a result, the electrons are expelled from the emitter portion, and electrons are emitted from the portion of the emitter portion where the electrons are accumulated through the penetrating portion. Of course, electrons are also emitted from the vicinity of the outer periphery of the second electrode. At this time, before Electrons corresponding to the charge amount of the emitter in the first stage are emitted from the emitter in the second stage. Further, the charge amount of the emitter section in the first stage is maintained until the electron emission in the second stage is performed.
[0017] また、 別の電子放出方式においては、 先ず、 第 1の出力期間において、 電 子放出のための準備 (例えばェミッタとなる物質の一方向への分極等) が行 われる。 次の第 2の出力期間において、 駆動電圧の電圧レベルが急減に変化 すると、 今度は、 上記したトリプルジャンクションにおいて電界集中が発生 し、 この電界集中によって第 2の電極から 1次電子が放出され、 ェミッタと なる物質のうち、 貫通部から露出する部分並びに第 2の電極の外周部近傍に 衝突することとなる。 これによつて、 1次電子が衝突した部分から 2次電子 ( 1次電子の反射電子を含む) が放出される。 すなわち、 第 2の出力期間の 初期段階において、 前記貫通部並びに第 2の電極の外周部近傍から 2次電子 が放出されることとなる。  In another electron emission method, first, in the first output period, preparation for electron emission (for example, polarization in one direction of a substance serving as an emitter) is performed. In the next second output period, when the voltage level of the drive voltage changes suddenly, electric field concentration occurs at the triple junction described above, and primary electrons are emitted from the second electrode by this electric field concentration, Of the substance that becomes the emitter, it will collide with the part exposed from the penetrating part and the vicinity of the outer periphery of the second electrode. As a result, secondary electrons (including reflected electrons of primary electrons) are emitted from the part where the primary electrons collide. That is, in the initial stage of the second output period, secondary electrons are emitted from the vicinity of the penetrating portion and the outer peripheral portion of the second electrode.
[0018] そして、 この電子放出素子においては、 先ず、 第 2の電極に複数の貫通部 を形成したことから、 各貫通部並びに第 2の電極の外周部近傍から均等に電 子が放出され、 全体の電子放出特性のばらつきが低減し、 電子放出の制御が 容易になると共に、 電子放出効率が高くなる。  [0018] In this electron-emitting device, first, since the plurality of through portions are formed in the second electrode, electrons are evenly emitted from the vicinity of each through portion and the outer peripheral portion of the second electrode, Variations in the overall electron emission characteristics are reduced, making it easier to control electron emission and increasing electron emission efficiency.
[0019] また、 本発明は、 前記第 2の電極のうち、 前記貫通部の周部における前記 ェミッタ部と対向する面と前記ェミッタ部との間にギャップが形成された形 となることから、 駆動電圧を印加した際に、 該ギャップの部分において電界 集中が発生し易くなる。 これは、 電子放出の高効率化につながり、 駆動電圧 の低電圧化 (低い電圧レベルでの電子放出) を実現させることができる。  [0019] In addition, the present invention is a shape in which a gap is formed between the surface of the second electrode facing the emitter portion in the peripheral portion of the penetrating portion and the emitter portion. When a driving voltage is applied, electric field concentration is likely to occur in the gap portion. This leads to higher efficiency of electron emission, and lower drive voltage (electron emission at a lower voltage level) can be realized.
[0020] 上述したように、 本発明は、 前記第 2の電極のうち、 前記貫通部の周部に おける前記ェミッタ部と対向する面と前記ェミッタ部との間にギャップが形 成されて、 第 2の電極における貫通部の周部が庇状 (フランジ状) となるこ とから、 ギャップの部分での電界集中が大きくなることとも相俟って、 前記 庇状の部分 (貫通部の周部) から電子が放出され易くなる。 これは、 電子放 出の高出力、 高効率化につながり、 駆動電圧の低電圧化を実現させることが できる。 これにより、 例えば電子放出素子を多数並べて構成された例えばデ イスプレイや光源の高輝度化を図ることができる。 また、 ェミッタとなる物 質に蓄積された電子を放出させる方式や第 2の電極からの 1次電子をェミツ タとなる物質に衝突させて 2次電子を放出させる方式のいずれにしても、 第 2の電極における貫通部の周部がゲート電極 (制御電極、 フォーカス電子レ ンズ等) として機能するので、 放出電子の直進性を向上させることができる 。 これは、 ディスプレイの電子源として構成した場合に、 クロストークを低 減する上で有利となる。 [0020] As described above, in the present invention, a gap is formed between the surface of the second electrode facing the emitter portion in the peripheral portion of the penetrating portion and the emitter portion. Since the peripheral portion of the penetrating portion in the second electrode has a hook shape (flange shape), the electric field concentration in the gap portion increases, and the hook portion (the periphery of the penetrating portion). Part) easily emits electrons. This leads to higher output and higher efficiency of electron emission, and lower drive voltage. it can. As a result, for example, a display or a light source having a large number of electron-emitting devices arranged side by side can be increased in brightness. In addition, either the method of emitting electrons accumulated in a substance serving as an emitter or the method of emitting secondary electrons by colliding primary electrons from the second electrode with a substance serving as an emitter. Since the periphery of the penetrating portion of the second electrode functions as a gate electrode (control electrode, focus electron lens, etc.), the straightness of the emitted electrons can be improved. This is advantageous in reducing crosstalk when configured as a display electron source.
[0021] このように、 本発明においては、 高い電界集中を容易に発生させることが でき、 しかも、 電子放出箇所を多くすることができ、 電子放出について高出 力、 高効率を図ることができ、 低電圧駆動 (低消費電力) も可能となる。 特 に、 ガラス基板を用いるようにしたので、 製品コストの低廉化を図ることが できる。 また、 電子放出素子の製造に係る処理温度の低温化を促進させるこ とができ、 設備の低コスト化も図ることができる。 ガラス基板として結晶化 ガラスを用いるようにしてもよい。 この場合、 処理温度として、 一般のガラ スと異なり、 6 0 0 8 0 0°Cの範囲を使用することができ、 材料選定の自 由度を広げることができる。 ガラス基板を用いることにより、 大画面ディス プレイもしくは大画面液晶ディスプレイのバックライ卜に対応した大板を安 価に得ることが可能である.また、 電子放出素子を真空封止する管を作製する 場合、 管壁及びスぺーサ、 もしくは蛍光体を形成する透明板をガラス製とし 、 これらと電子放出素子を形成したガラス基板をフリツ卜接着することが可 能となる.逆に言えば、 電子放出素子の形成をガラス以外の基板に行うと、 他 のガラス製部材及びフリツ卜との熱膨張係数が合わないため、 管作製が難し くなる。  As described above, in the present invention, high electric field concentration can be easily generated, moreover, the number of electron emission locations can be increased, and high output and high efficiency can be achieved for electron emission. Low voltage driving (low power consumption) is also possible. In particular, since glass substrates are used, product costs can be reduced. In addition, it is possible to promote a reduction in the processing temperature for manufacturing the electron-emitting device, and to reduce the cost of the equipment. Crystallized glass may be used as the glass substrate. In this case, the processing temperature can be in the range of 60 0 80 0 ° C, unlike general glass, and the degree of freedom in material selection can be expanded. By using a glass substrate, it is possible to obtain a large plate corresponding to the backlight of a large screen display or large screen liquid crystal display at a low price. In addition, it is possible to make the transparent plate forming the tube wall and spacer, or phosphor, made of glass, and to adhere the glass substrate on which the electron-emitting device is formed, to the glass substrate. If the element is formed on a substrate other than glass, the coefficient of thermal expansion does not match that of other glass members and frits, making it difficult to manufacture the tube.
[0022] また、 本発明において、 前記ェミッタ部のうち、 少なくとも前記第 2の電 極が形成される面は、 誘電体の粒界による凹凸が形成され、 前記第 1の電極 は、 前記誘電体の粒界における凹部に対応した部分に前記貫通部が形成され ていてもよい。 なお、 前記第 1の電極は、 鱗片状の形状を有する物質を含ん だ導電性物質、 又は、 複数の鱗片状の形状を有する物質の集合体にしてもよ い。 [0022] In the present invention, in the emitter portion, at least a surface on which the second electrode is formed has irregularities due to dielectric grain boundaries, and the first electrode includes the dielectric The through portion may be formed in a portion corresponding to the concave portion in the grain boundary. The first electrode includes a substance having a scaly shape. Alternatively, a conductive substance or a collection of substances having a plurality of scale-like shapes may be used.
[0023] これにより、 前記第 1の電極のうち、 前記貫通部の周部における前記エミ ッタ部と対向する面が、 前記ェミッタ部から離間した構成、 すなわち、 前記 貫通部の周部における前記ェミッタ部と対向する面と前記ェミッタ部との間 にギャップが形成された構成を簡単に実現させることができる。  [0023] With this, in the first electrode, the surface of the peripheral portion of the penetrating portion facing the emitter portion is separated from the emitter portion, that is, the peripheral portion of the penetrating portion A configuration in which a gap is formed between the surface facing the emitter portion and the emitter portion can be easily realized.
[0024] 以上説明したように、 本発明に係る電子放出素子及び電子放出装置によれ ば、 高い電界集中を容易に発生させることができ、 しかも、 電子放出箇所を 多くすることができ、 電子放出について高出力、 高効率を図ることができ、 低電圧駆動 (低消費電力) も可能で、 且つ、 大板化と、 製品コストを低廉化 する上で有利となる。  [0024] As described above, according to the electron-emitting device and the electron-emitting device according to the present invention, high electric field concentration can be easily generated, and more electron emission points can be provided. High output and high efficiency can be achieved, low voltage drive (low power consumption) is possible, and it is advantageous for increasing the plate size and reducing the product cost.
[0025] また、 本発明に係るディスプレイ及び光源によれば、 大画面もしくは大面 積で、 高輝度及び低コストとすることができる。  [0025] Further, according to the display and the light source according to the present invention, a large screen or a large area, high luminance, and low cost can be achieved.
図面の簡単な説明  Brief Description of Drawings
[0026] [図 1 ]図 1は、 第 1の実施の形態に係る電子放出素子を一部省略して示す断面 図である。  FIG. 1 is a cross-sectional view showing a partially omitted electron-emitting device according to the first embodiment.
[図 2]図 2は、 第 1の実施の形態に係る電子放出素子を一部省略して示す拡大 断面図である。  FIG. 2 is an enlarged cross-sectional view showing a partially omitted electron-emitting device according to the first embodiment.
[図 3]図 3は、 第 1の実施の形態に係る電子放出素子の要部を拡大して示す断 面図である。  FIG. 3 is a cross-sectional view showing an enlarged main part of the electron-emitting device according to the first embodiment.
[図 4]図 4は、 上部電極に形成された貫通部の形状の一例を示す平面図である  FIG. 4 is a plan view showing an example of the shape of a through-hole formed in the upper electrode.
[図 5]図 5 Aは上部電極の他の例を示す断面図であり、 図 5 Bは要部を拡大し て示す断面図である。 FIG. 5A is a cross-sectional view showing another example of the upper electrode, and FIG. 5B is a cross-sectional view showing an enlarged main part.
[図 6]図 6 Aは上部電極のさらに他の例を示す断面図であり、 図 6 Bは要部を 拡大して示す断面図である。  FIG. 6A is a cross-sectional view showing still another example of the upper electrode, and FIG. 6B is a cross-sectional view showing an enlarged main part.
[図 7]図 7は、 第 1の電子放出方式での駆動電圧の電圧波形を示す図である。  FIG. 7 is a diagram showing a voltage waveform of a drive voltage in the first electron emission method.
[図 8]図 8は、 第 1の電子放出方式の第 2の出力期間 (第 2段階) での電子放 出の様子を示す説明図である。 [FIG. 8] FIG. 8 shows electron emission in the second output period (second stage) of the first electron emission method. It is explanatory drawing which shows a mode of going out.
[図 9]図 9は、 第 2の電子放出方式での駆動電圧の電圧波形を示す図である。  FIG. 9 is a diagram showing a voltage waveform of a drive voltage in the second electron emission method.
[図 10]図 1 0は、 第 2の電子放出方式の第 2の出力期間 (第 2段階) での電 子放出の様子を示す説明図である。 FIG. 10 is an explanatory view showing the state of electron emission in the second output period (second stage) of the second electron emission method.
[図 11 ]図 1 1は、 上部電極の庇部の断面形状の一例を示す図である。  [FIG. 11] FIG. 11 is a diagram showing an example of a cross-sectional shape of a collar portion of the upper electrode.
[図 12]図 1 2は、 上部電極の庇部の断面形状の他の例を示す図である。  FIG. 12 is a diagram showing another example of the cross-sectional shape of the collar portion of the upper electrode.
[図 13]図 1 3は、 上部電極の庇部の断面形状のさらに他の例を示す図である  FIG. 13 is a diagram showing still another example of the cross-sectional shape of the collar portion of the upper electrode.
[図 14]図 1 4は、 上部電極と下部電極間に接続された各種コンデンサの接続 状態を示す等価回路図である。 FIG. 14 is an equivalent circuit diagram showing a connection state of various capacitors connected between the upper electrode and the lower electrode.
[図 15]図 1 5は、 上部電極と下部電極間に接続された各種コンデンサの容量 計算を説明するための図である。  [FIG. 15] FIG. 15 is a diagram for explaining the capacitance calculation of various capacitors connected between the upper electrode and the lower electrode.
[図 16]図 1 6は、 第 1の実施の形態に係る電子放出素子の第 1の変形例を一 部省略して示す平面図である。  FIG. 16 is a plan view showing a part of the first modification of the electron-emitting device according to the first embodiment with a part thereof omitted.
[図 17]図 1 7は、 第 1の実施の形態に係る電子放出素子の第 2の変形例を一 部省略して示す平面図である。  FIG. 17 is a plan view showing a second variation of the electron-emitting device according to the first embodiment with a part thereof omitted.
[図 18]図 1 8は、 第 1の実施の形態に係る電子放出素子の第 3の変形例を一 部省略して示す平面図である。  FIG. 18 is a plan view showing the third modification of the electron-emitting device according to the first embodiment with a part thereof omitted.
[図 19]図 1 9は、 第 1の実施の形態に係る電子放出素子の電圧-電荷量特性 ( 電圧-分極量特性) を示す図である。  FIG. 19 is a diagram showing voltage-charge amount characteristics (voltage-polarization amount characteristics) of the electron-emitting device according to the first embodiment.
[図 20]図 2 O Aは図 1 9のポイント p 1での状態を示す説明図であり、 図 2 0 8は図1 9のポイント p 2での状態を示す説明図であり、 図 2 0 Cは図 1 9のポイント p 2からポイント p 3に至るまでの状態を示す説明図である。  20 is an explanatory diagram showing the state at point p 1 in FIG. 19, and FIG. 20 is an explanatory diagram showing the state at point p 2 in FIG. C is an explanatory diagram showing a state from point p 2 to point p 3 in FIG.
[図 21 ]図 2 1 Aは図 1 9のポイント p 3からポイント p 4に至るまでの状態 を示す説明図であり、 図 2 1 Bは図 1 9のポイント p 4に至る直前の状態を 示す説明図であり、 図 2 1 Cは図 1 9のポイント p 4からポイント p 6に至 るまでの状態を示す説明図である。 [Fig. 21] Fig. 21A is an explanatory diagram showing the state from point p3 to point p4 in Fig. 19. Fig. 21B shows the state immediately before reaching point p4 in Fig. 19. FIG. 21C is an explanatory diagram illustrating a state from point p4 to point p6 in FIG.
[図 22]図 2 2は、 第 1の実施の形態に係る電子放出素子を使用して構成した ディスプレイ等の発光表示部と駆動回路を示すブロック図である。 [FIG. 22] FIG. 22 is configured using the electron-emitting device according to the first embodiment. It is a block diagram which shows light emission display parts, such as a display, and a drive circuit.
[図 23]図 2 3 A 2 3 Cは、 振幅変調回路によるパルス信号の振幅変調を示 す波形図である。  [FIG. 23] FIGS. 2 3 A 2 3 C are waveform diagrams showing the amplitude modulation of the pulse signal by the amplitude modulation circuit.
[図 24]図 2 4は、 変形例に係る信号供給回路を示すブロック図である。  FIG. 24 is a block diagram showing a signal supply circuit according to a modification.
[図 25]図 2 5 A 2 5 Cは、 パルス幅変調回路によるパルス信号のパルス幅 変調を示す波形図である。  FIG. 25 is a waveform diagram showing pulse width modulation of the pulse signal by the pulse width modulation circuit.
[図 26]図 2 6 Aは図 2 3 A又は図 2 5 Aにおける電圧 V s Iが印加されたと きのヒステリシス曲線を示す図であり、 図 2 6 Bは図 2 3 B又は図 2 5 Bに おける電圧 V s mが印加されたときのヒステリシス曲線を示す図であり、 図 2 6 Cは図 2 3 C又は図 2 5 Cにおける電圧 V s hが印加されたときのヒス テリシス曲線を示す図である。  [Fig.26] Fig. 26 A shows a hysteresis curve when voltage V s I is applied in Fig. 23 A or Fig. 25 A, and Fig. 26 B shows Fig. 23 B or Fig. 25 Fig. 26 is a diagram showing a hysteresis curve when voltage V sm is applied at B. Fig. 26 C is a diagram showing a hysteresis curve when voltage V sh in Fig. 23C or Fig. 25C is applied. It is.
[図 27]図 2 7は、 上部電極上へのコレクタ電極、 蛍光体及び透明板の 1つの 配置例を示す構成図である。  [FIG. 27] FIG. 27 is a configuration diagram showing one arrangement example of the collector electrode, the phosphor, and the transparent plate on the upper electrode.
[図 28]図 2 8は、 上部電極上へのコレクタ電極、 蛍光体及び透明板の他の配 置例を示す構成図である。  FIG. 28 is a block diagram showing another arrangement example of the collector electrode, the phosphor and the transparent plate on the upper electrode.
[図 29]図 2 9 Aは第 1の実験例 (電子放出素子の電子の放出状態をみた実験 ) において使用した書込みパルスと点灯パルスの波形を示す図であり、 図 2 9 Bは第 1の実験例において、 電子放出素子からの電子放出の状態を受光素 子の検出電圧波形で示す図である。  [Fig.29] Fig. 29 A is a diagram showing the waveforms of the write pulse and the lighting pulse used in the first experimental example (experiment of the electron emission state of the electron-emitting device). FIG. 6 is a diagram showing the state of electron emission from the electron-emitting device in the experimental example in FIG.
[図 30]図 3 0は、 第 2 第 4の実験例で使用した書込みパルスと点灯パルス の波形を示す図である。  FIG. 30 is a diagram showing waveforms of an address pulse and a lighting pulse used in the second and fourth experimental examples.
[図 31 ]図 3 1は、 第 2の実験例 (電子放出素子の電子の放出量が書込みパル スの振幅によってどのように変化するかをみた実験) の結果を示す特性図で ある。  [FIG. 31] FIG. 31 is a characteristic diagram showing the results of a second experimental example (an experiment in which the amount of electrons emitted from the electron-emitting device varies depending on the amplitude of the write pulse).
[図 32]図 3 2は、 第 3の実験例 (電子放出素子の電子の放出量が点灯パルス の振幅によってどのように変化するかをみた実験) の結果を示す特性図であ る。  [FIG. 32] FIG. 32 is a characteristic diagram showing the results of a third experimental example (an experiment in which the amount of electrons emitted from the electron-emitting device varies depending on the amplitude of the lighting pulse).
[図 33]図 3 3は、 第 4の実験例 (電子放出素子の電子の放出量がコレクタ電 圧のレベルによってどのように変化するかをみた実験) の結果を示す特性図 である。 [Figure 33] Figure 33 shows the fourth experimental example (the amount of electrons emitted from the electron-emitting device is the collector FIG. 6 is a characteristic diagram showing the results of an experiment) that shows how the pressure changes depending on the pressure level.
[図 34]図 3 4は、 ディスプレイ等の駆動方法の一例を示すタイミングチヤ一 卜である。  FIG. 34 is a timing chart showing an example of a driving method for a display or the like.
[図 35]図 3 5は、 図 3 4に示す駆動方法での印加電圧関係を示す表図である  FIG. 35 is a table showing the relationship between applied voltages in the driving method shown in FIG. 34.
[図 36]図 3 6は、 第 2の実施の形態に係る電子放出素子を一部省略して示す 断面図である。 FIG. 36 is a cross-sectional view showing the electron-emitting device according to the second embodiment with a part thereof omitted.
[図 37]図 3 7は、 第 2の実施の形態に係る電子放出素子の第 1の変形例を一 部省略して示す断面図である。  FIG. 37 is a cross-sectional view showing a part of the first modification of the electron-emitting device according to the second embodiment with a part thereof omitted.
[図 38]図 3 8は、 第 2の実施の形態に係る電子放出素子の第 2の変形例を一 部省略して示す断面図である。  FIG. 38 is a cross-sectional view showing a part of the second modification of the electron-emitting device according to the second embodiment with a part thereof omitted.
[図 39]図 3 9は、 第 2の実施の形態に係る電子放出素子の第 3の変形例を一 部省略して示す断面図である。  FIG. 39 is a cross-sectional view showing a third modification of the electron-emitting device according to the second embodiment with a part thereof omitted.
[図 40]図 4 0は、 従来例に係る電子放出素子を一部省略して示す断面図であ る。  FIG. 40 is a cross-sectional view showing a partially omitted electron-emitting device according to a conventional example.
符号の説明 Explanation of symbols
1 O A . 1 0 A a、 1 0 A c、 1 0 B . 1 0 B a 1 0 B c…電子放出素子 1 2…ェミッタ部 1 4…上部電極 1 O A. 1 0 A a, 1 0 A c, 1 0 B. 1 0 B a 1 0 B c: Electron-emitting device 1 2: Emitter part 1 4 ... Upper electrode
1 6…下部電極 2 0…貫通部  1 6… Lower electrode 2 0… Penetration part
2 2…凹凸 2 4…凹部 2 2… Uneven 2 4… Recess
2 6…庇部 2 8…ギャップ  2 6 ... Buttocks 2 8 ... Gap
3 0…凸部 3 2…孔  3 0 ... Projection 3 2 ... Hole
4 4、 4 6…切欠き 4 8…スリッ卜  4 4, 4 6 ... Notches 4 8 ... Slippers
5 0…フローティング電極 1 0 0…ディスプレイ等 5 0… Floating electrode 1 0 0… Display etc.
発明を実施するための最良の形態 BEST MODE FOR CARRYING OUT THE INVENTION
以下、 本発明に係る電子放出素子の実施の形態例を、 図 1 図 4 1を参照 しながら説明する。 [0029] 先ず、 本実施の形態に係る電子放出装置は、 ディスプレイとしての用途の ほか、 電子線照射装置、 光源、 L E Dの代替用途、 電子部品製造装置、 電子 回路部品に適用することができる。 Embodiments of the electron-emitting device according to the present invention will be described below with reference to FIGS. [0029] First, the electron emission device according to the present embodiment can be applied not only as a display but also to an electron beam irradiation device, a light source, an alternative use of an LED, an electronic component manufacturing device, and an electronic circuit component.
[0030] 電子線照射装置における電子線は、 現在普及している紫外線照射装置にお ける紫外線に比べ、 高エネルギーで吸収性能に優れる。 適用例としては、 半 導体装置では、 ウェハーを重ねる際における絶縁膜を固化する用途、 印刷の 乾燥では、 印刷インキをむらなく硬化する用途や、 医療機器をパッケージに 入れたまま殺菌する用途等がある。  [0030] The electron beam in the electron beam irradiation apparatus has high energy and excellent absorption performance as compared with the ultraviolet light in the currently widely used ultraviolet irradiation apparatus. Examples of applications include the use of semiconductor devices to solidify insulation films when stacking wafers, the use of printing inks to cure evenly when printing is dried, and the use of sterilizing medical equipment in packages. is there.
[0031 ] 光源としての用途は、 液晶ディスプレイ用バックライ卜のような平面光源 と、 高輝度、 高効率仕様向けであって、 例えば超高圧水銀ランプ等が使用さ れるプロジェクタの光源用途等がある。 本実施の形態に係る電子放出装置を 光源に適用した場合、 小型化、 長寿命、 高速点灯、 水銀フリーによる環境負 荷低減という特徴を有する。  [0031] Applications as a light source include a planar light source such as a backlight for a liquid crystal display and a light source application for a projector that uses a high-intensity, high-efficiency specification such as an ultra-high pressure mercury lamp. When the electron-emitting device according to this embodiment is applied to a light source, it has features such as downsizing, long life, high-speed lighting, and reduction of environmental load due to mercury-free.
[0032] L E Dの代替用途としては、 屋内照明、 自動車用ランプ、 信号機等の面光 源用途や、 チップ光源、 信号機、 携帯電話向けの小型液晶ディスプレイのバ ックライ卜等がある。  [0032] Alternative uses of LED include surface light source applications such as indoor lighting, automotive lamps, and traffic lights, and backlights for small liquid crystal displays for chip light sources, traffic lights, and mobile phones.
[0033] 電子部品製造装置の用途としては、 電子ビーム蒸着装置等の成膜装置の電 子ビーム源、 プラズマ C V D装置におけるプラズマ生成用 (ガス等の活性化 用) 電子源、 ガス分解用途の電子源等がある。 また、 テラ H z駆動の高速ス イッチング素子、 大電流出力素子といった真空マイクロデバイス用途もある 。 その他、 プリンタ用部品、 つまり、 蛍光体との組合せにより感光ドラムを 感光させる発光デバイスや、 誘電体を帯電させるための電子源としても好ま しく用いられる。  [0033] Applications of the electronic component manufacturing apparatus include an electron beam source for a film forming apparatus such as an electron beam evaporation apparatus, a plasma generation (for activation of gas, etc.) in a plasma CVD apparatus, an electron source, and an electron for gas decomposition application. There are sources. There are also vacuum microdevice applications such as tera-Hz-driven high-speed switching elements and high-current output elements. In addition, it is also preferably used as a printer component, that is, a light-emitting device that exposes a photosensitive drum in combination with a phosphor, and an electron source for charging a dielectric.
[0034] 電子回路部品としては、 大電流出力化、 高増幅率化が可能であることから [0034] As an electronic circuit component, a large current output and a high amplification factor are possible.
、 スィッチ、 リレー、 ダイオード等のデジタル素子、 オペアンプ等のアナ口 グ素子への用途がある。 Applications include digital devices such as switches, relays, and diodes, and analog devices such as operational amplifiers.
[0035] 先ず、 第 1の実施の形態に係る電子放出素子 1 O Aは、 図 1に示すように 、 ガラス基板 1 1上に形成され、 且つ、 誘電体で構成された板状のェミッタ 部 1 2と、 該ェミッタ部 1 2の第 1の面 (例えば下面) に形成された第 1の 電極 (例えば下部電極) 1 6と、 ェミッタ部 1 2の第 2の面 (例えば上面) に形成された第 2の電極 (例えば上部電極) 1 4と、 上部電極 1 4と下部電 極 1 6との間に、 駆動電圧 V aを印加するパルス発生源 1 8とを有する。 First, as shown in FIG. 1, an electron-emitting device 1 OA according to the first embodiment is formed on a glass substrate 11 and is a plate-like emitter made of a dielectric. Part 1 2, first electrode (eg lower electrode) 16 formed on the first surface (eg lower surface) of the emitter part 1 2, and second surface (eg upper surface) of the emitter part 1 2 A formed second electrode (for example, an upper electrode) 14, and a pulse generation source 18 for applying a driving voltage Va between the upper electrode 14 and the lower electrode 16 are provided.
[0036] 上部電極 1 4は、 図 2に示すように、 ェミッタ部 1 2が露出される複数の 貫通部 2 0を有する。 特に、 ェミッタ部 1 2の表面は、 誘電体の粒界による 凹凸 2 2が形成されており、 上部電極 1 4の貫通部 2 0は、 前記誘電体の粒 界における凹部 2 4に対応した部分に形成されている。 図 2の例では、 1つ の凹部 2 4に対応して 1つの貫通部 2 0が形成される場合を示しているが、 複数の凹部 2 4に対応して 1つの貫通部 2 0が形成される場合もある。 エミ ッタ部 1 2を構成する誘電体の粒径は、 0 . 1 m 1 0 mが好ましく、 さらに好ましくは 2 m 7 mである。 図 2の例では、 誘電体の粒径を 3 mとしてし、る。 As shown in FIG. 2, the upper electrode 14 has a plurality of through portions 20 through which the emitter portion 12 is exposed. In particular, the surface of the emitter portion 12 is formed with irregularities 22 due to dielectric grain boundaries, and the through portions 20 of the upper electrode 14 are portions corresponding to the concave portions 24 in the dielectric grain boundaries. Is formed. The example of FIG. 2 shows the case where one through portion 20 is formed corresponding to one concave portion 24, but one through portion 20 is formed corresponding to a plurality of concave portions 24. Sometimes it is done. The particle size of the dielectric constituting the emitter section 12 is preferably 0.1 m 10 m, and more preferably 2 m 7 m. In the example of Fig. 2, the particle size of the dielectric is 3 m.
[0037] さらに、 この第 1の実施の形態では、 図 3に示すように、 上部電極 1 4の うち、 貫通部 2 0の周部 2 6におけるェミッタ部 1 2と対向する面 2 6 aが 、 ェミッタ部 1 2から離間している。 つまり、 上部電極 1 4のうち、 貫通部 2 0の周部 2 6におけるェミッタ部 1 2と対向する面 2 6 aとェミッタ部 1 2との間にギャップ 2 8が形成され、 上部電極 1 4における貫通部 2 0の周 部 2 6が庇状 (フランジ状) に形成された形となっている。 従って、 以下の 説明では、 「上部電極 1 4の貫通部 2 0の周部 2 6」 を 「上部電極 1 4の庇 部 2 6」 と記す。 なお、 図 1、 図 2、 図 3、 図 5 A、 図 5 B、 図 6 A、 図 6 B、 図 8、 図 1 0、 図 1 1 図 1 3、 図 1 8の例では、 誘電体の粒界の凹凸 2 2の凸部 3 0の断面を代表的に半円状で示してあるが、 この形状に限るも のではない。  Furthermore, in the first embodiment, as shown in FIG. 3, a surface 26 6 a facing the emitter portion 12 in the peripheral portion 26 of the penetrating portion 20 is included in the upper electrode 14. , Away from the emitter 1 2. That is, in the upper electrode 14, a gap 28 is formed between the surface 26 6 a facing the emitter portion 12 in the peripheral portion 26 of the penetrating portion 20 and the emitter portion 12, and the upper electrode 14 The peripheral portion 26 of the penetrating portion 20 is formed in a bowl shape (flange shape). Therefore, in the following description, “the peripheral portion 2 6 of the through portion 20 of the upper electrode 14” is referred to as “the upper portion 2 6 of the upper electrode 14”. In addition, in the examples of Fig. 1, Fig. 2, Fig. 3, Fig. 5 A, Fig. 5 B, Fig. 6 A, Fig. 6 B, Fig. 8, Fig. 10, 0, Fig. 1 1 Fig. 13 and Fig. 18, the dielectric The cross section of the convex portion 30 of the grain boundary irregularities 22 is typically shown in a semicircular shape, but is not limited to this shape.
[0038] また、 この第 1の実施の形態では、 上部電極 1 4の厚み tを、 0 . 0 1 m≤ t≤ 1 0 mとし、 ェミッタ部 1 2の上面、 すなわち、 誘電体の粒界に おける凸部 3 0の表面 (凹部 2 4の内壁面でもある) と、 上部電極 1 4の庇 部 2 6の下面 2 6 aとのなす角の最大角度 0を、 1 ° ≤0≤6 0 ° としてい る。 また、 ェミッタ部 1 2の誘電体の粒界における凸部 30の表面 (凹部 2 4の内壁面) と、 上部電極 1 4の庇部 26の下面 26 aとの間の鉛直方向に 沿った最大間隔 dを、 0 m<d≤ 1 0 mとしている。 [0038] In the first embodiment, the thickness t of the upper electrode 14 is set to 0.01 m ≤ t ≤ 10 m, and the upper surface of the emitter section 12, that is, the grain boundary of the dielectric The maximum angle 0 between the surface of the convex part 3 0 (which is also the inner wall surface of the concave part 2 4) and the bottom face 2 6 of the upper electrode 1 4 2 6 a is 1 ° ≤0≤6 0 ° The In addition, the maximum along the vertical direction between the surface of the convex portion 30 (inner wall surface of the concave portion 24) at the dielectric grain boundary of the emitter portion 12 and the lower surface 26a of the flange portion 26 of the upper electrode 14 The distance d is set to 0 m <d≤ 1 0 m.
[0039] さらに、 この第 1の実施の形態では、 貫通部 20の形状、 特に、 図 4に示 すように、 上面から見た形状は孔 32の形状であって、 例えば円形状、 楕円 形状、 トラック状のように、 曲線部分を含むものや、 四角形や三角形のよう に多角形状のものがある。 図 4の例では、 孔 32の形状として円形状の場合 を示している。 [0039] Furthermore, in the first embodiment, the shape of the penetrating portion 20, in particular, as shown in FIG. 4, is the shape of the hole 32, for example, a circular shape or an elliptical shape. Some include curved parts such as tracks, and some polygons such as squares and triangles. In the example of FIG. 4, the hole 32 has a circular shape.
[0040] この場合、 孔 32の平均径は、 0. 1 m以上、 1 0 m以下としている 。 この平均径は、 孔 32の中心を通るそれぞれ異なる複数の線分の長さの平 均を示す。  [0040] In this case, the average diameter of the holes 32 is set to 0.1 m or more and 10 m or less. This average diameter indicates the average length of a plurality of different line segments passing through the center of the hole 32.
[0041] ここで、 各構成部材の材料等について説明する。 ェミッタ部 1 2を構成す る誘電体は、 好適には、 比誘電率が比較的高い、 例えば 1 000以上の誘電 体を採用することができる。 このような誘電体としては、 チタン酸バリウム のほかに、 ジルコン酸鉛、 マグネシウムニオブ酸鉛、 ニッケルニオブ酸鉛、 亜鉛ニオブ酸鉛、 マンガンニオブ酸鉛、 マグネシウムタンタル酸鉛、 ニッケ ルタンタル酸鉛、 アンチモンスズ酸鉛、 チタン酸鉛、 マグネシウムタンダス テン酸鉛、 コバルトニオブ酸鉛等、 又はこれらの任意の組み合わせを含有す るセラミックスや、 主成分がこれらの化合物を 50重量%以上含有するもの や、 前記セラミックスに対して、 さらにランタン、 カルシウム、 ストロンチ ゥム、 モリブデン、 タングステン、 バリウム、 ニオブ、 亜鉛、 ニッケル、 マ ンガン等の酸化物、 もしくはこれらのいずれかの組み合わせ、 又は他の化合 物を適切に添加したもの等を挙げることができる。  [0041] Here, materials and the like of each component will be described. As the dielectric composing the emitter section 12, a dielectric having a relatively high relative dielectric constant, for example, 1 000 or more can be used. Such dielectrics include barium titanate, lead zirconate, lead magnesium niobate, lead nickel niobate, lead zinc niobate, lead manganese niobate, lead magnesium tantalate, lead nickel tantalate, antimony Ceramics containing lead stannate, lead titanate, lead magnesium tandastate, lead cobalt niobate, etc., or any combination thereof, those containing 50% by weight or more of these compounds as the main component, Furthermore, lanthanum, calcium, strontium, molybdenum, tungsten, barium, niobium, zinc, nickel, mangan and other oxides, or any combination thereof, or other compounds are appropriately applied to the ceramics. The added one can be mentioned.
[0042] 例えば、 マグネシウムニオブ酸鉛 (PMN) とチタン酸鉛 (PT) の 2成 分系 n PMN-mPT (n、 mをモル数比とする) においては、 PMNのモル 数比を大きくすると、 キュリー点が下げられて、 室温での比誘電率を大きく することができる。  [0042] For example, in a two-component system of PMN-PMT (PMN) with lead magnesium niobate (PMN) and lead titanate (PT) (where n and m are mole ratios), the PMN mole ratio is increased. The Curie point is lowered, and the relative dielectric constant at room temperature can be increased.
[0043] 特に、 n = 0. 85-1. 0、 m= 1. 0_nでは比誘電率 3000以上と なり好ましい。 例えば、 n = 0. 91、 m=0. 09では室温の比誘電率 1 5000が得られ、 n = 0. 95、 m=0. 05では室温の比誘電率 200 00が得られる。 [0043] Especially, when n = 0. 85-1. 0 and m = 1.0_n, the relative dielectric constant is 3000 or more. It is preferable. For example, when n = 0.91 and m = 0.09, a room temperature relative dielectric constant of 15000 is obtained, and when n = 0.95 and m = 0.05, a room temperature relative dielectric constant of 20000 is obtained.
[0044] 次に、 マグネシウムニオブ酸鉛 (PMN) 、 チタン酸鉛 (PT) 、 ジルコ ン酸鉛 (PZ) の 3成分系では、 PMNのモル数比を大きくするほかに、 正 方晶と擬立方晶又は正方晶と菱面体晶のモルフォトロピック相境界 (MPB : Morphotropic Phase Boundary) 付近の組成とすることが比誘電率を大きく するのに好ましい。 例えば、 PMN : PT : PZ = 0. 375 : 0. 375 : 0. 25にて比誘電率 5500、 PMN : PT : PZ = 0. 5 : 0. 37 5 : 0. 1 25にて比誘電率 4500となり、 特に好ましい。 さらに、 絶縁 性が確保できる範囲内でこれらの誘電体に白金のような金属を混入して、 誘 電率を向上させるのが好ましい。 この場合、 例えば、 誘電体に白金を重量比 で 20%混入させるとよい。  [0044] Next, in the ternary system of lead magnesium niobate (PMN), lead titanate (PT), and lead zirconate (PZ), in addition to increasing the molar ratio of PMN, A composition near the morphotropic phase boundary (MPB) of cubic or tetragonal and rhombohedral is preferable for increasing the relative dielectric constant. For example, the relative dielectric constant is 5500 at PMN: PT: PZ = 0.375: 0.375: 0.25, the relative dielectric constant at PMN: PT: PZ = 0.5: 0.35: 0.125 4500, which is particularly preferable. Further, it is preferable to improve the dielectric constant by mixing a metal such as platinum in these dielectrics within a range where the insulating property can be ensured. In this case, for example, 20% by weight of platinum may be mixed in the dielectric.
[0045] また、 ェミッタ部 12は、 上述したように、 圧電 Z電歪層や反強誘電体層 等を用いることができるが、 ェミッタ部 1 2として圧電 Z電歪層を用いる場 合、 該圧電 Z電歪層としては、 例えば、 ジルコン酸鉛、 マグネシウムニオブ 酸鉛、 ニッケルニオブ酸鉛、 亜鉛ニオブ酸鉛、 マンガンニオブ酸鉛、 マグネ シゥムタンタル酸鉛、 ニッケルタンタル酸鉛、 アンチモンスズ酸鉛、 チタン 酸鉛、 チタン酸バリウム、 マグネシウムタングステン酸鉛、 コバルトニオブ 酸鉛等、 又はこれらのいずれかの組み合わせを含有するセラミックスが挙げ られる。  In addition, as described above, a piezoelectric Z electrostrictive layer, an antiferroelectric layer, or the like can be used as the emitter section 12, but when a piezoelectric Z electrostrictive layer is used as the emitter section 12, Piezoelectric Z electrostrictive layers include, for example, lead zirconate, lead magnesium niobate, lead nickel niobate, lead zinc niobate, lead manganese niobate, lead magnesium tantalate, lead nickel tantalate, lead antimony stannate, titanium Examples thereof include ceramics containing lead oxide, barium titanate, lead magnesium tungstate, lead cobalt niobate, or any combination thereof.
[0046] 主成分がこれらの化合物を 50重量%以上含有するものであってもよいこ とはいうまでもない。 また、 前記セラミックスのうち、 ジルコン酸鉛を含有 するセラミックスは、 ェミッタ部 1 2を構成する圧電 Z電歪層の構成材料と して最も使用頻度が高い。  [0046] Needless to say, the main component may contain 50% by weight or more of these compounds. Among the ceramics, a ceramic containing lead zirconate is most frequently used as a constituent material of the piezoelectric Z electrostrictive layer constituting the emitter portion 12.
[0047] また、 圧電 Z電歪層をセラミックスにて構成する場合、 前記セラミックス に、 さらに、 ランタン、 カルシウム、 ストロンチウム、 モリブデン、 タンダ ステン、 バリウム、 ニオブ、 亜鉛、 ニッケル、 マンガン等の酸化物、 もしく はこれらのいずれかの組み合わせ、 又は他の化合物を、 適宜、 添加したセラ ミックスを用いてもよい。 また、 前記セラミックスに S i O C e O b [0047] Further, when the piezoelectric Z electrostrictive layer is formed of ceramics, the ceramics may further include oxides such as lanthanum, calcium, strontium, molybdenum, tanda stainless, barium, niobium, zinc, nickel, manganese, and the like. It May be any combination of these, or a ceramic to which other compounds are appropriately added. In addition, S i OC e O b
2、 2、 P  2, 2, P
5 Five
G e O もしくはこれらのいずれかの組み合わせを添加したセラミックスを用 Use ceramics with G e O or any combination of these
3 11  3 11
いてもよい。 具体的には、 P T-P Z-PMN系圧電材料に S i Oを 0. 2w  May be. Specifically, P T-P Z-PMN type piezoelectric material with S i O 0.2w
2  2
t %、 もしくは C e Oを 0. 1 w t %、 もしくは P b G e O を 1 2 w t  t%, or C e O is 0.1 w t%, or P b G e O is 1 2 w t
2 5 3 11  2 5 3 11
%添加した材料が好ましい。  % Added material is preferred.
[0048] 例えば、 マグネシゥムニォブ酸鉛とジルコン酸鉛及びチタン酸鉛とからな る成分を主成分とし、 さらにランタンゃス卜口ンチウムを含有するセラミッ クスを用いることが好ましい。  [0048] For example, it is preferable to use a ceramic containing, as a main component, a component consisting of lead magnesium niobate, lead zirconate and lead titanate, and further containing lanthanum niobium tantalum.
[0049] 圧電 Z電歪層は、 緻密であっても、 多孔質であってもよく、 多孔質の場合 、 その気孔率は 40%以下であることが好ましい。  [0049] The piezoelectric Z electrostrictive layer may be dense or porous, and in the case of being porous, the porosity is preferably 40% or less.
[0050] ェミッタ部 1 2として反強誘電体層を用いる場合、 該反強誘電体層として は、 ジルコン酸鉛を主成分とするもの、 ジルコン酸鉛とスズ酸鉛とからなる 成分を主成分とするもの、 さらにはジルコン酸鉛に酸化ランタンを添加した もの、 ジルコン酸鉛とスズ酸鉛とからなる成分に対してジルコン酸鉛ゃニォ ブ酸鉛を添加したものが望ましい。  [0050] When an anti-ferroelectric layer is used as the emitter section 12, the anti-ferroelectric layer is mainly composed of lead zirconate and a component composed of lead zirconate and lead stannate. In addition, it is desirable to add lead lanthanum oxide to lead zirconate, and to lead zirconate and lead niobate added to components composed of lead zirconate and lead stannate.
[0051] また、 この反強誘電体層は、 多孔質であってもよく、 多孔質の場合、 その 気孔率は 30%以下であることが望ましい。  [0051] The antiferroelectric layer may be porous. In the case of being porous, the porosity is preferably 30% or less.
[0052] さらに、 ェミッタ部 1 2にタンタル酸ビスマス酸ストロンチウム (S r B i T a O ) を用いた場合、 分極反転疲労が小さく好ましい。 このような分極 [0052] Further, when strontium bismuthate tantalate (SrBiTaO) is used for the emitter portion 12, polarization inversion fatigue is small and preferable. Such polarization
2 2 9 2 2 9
反転疲労が小さい材料は、 層状強誘電体化合物で、 (B i O ) 2+ (A B O
Figure imgf000017_0001
The material with low reversal fatigue is a layered ferroelectric compound, (B i O) 2+ (ABO
Figure imgf000017_0001
B a2 P b2 B i 3+、 L a3+等であり、 金属 Bのイオンは、 T i 4+、 T a5+、 N b5+等である。 さらに、 チタン酸バリウム系、 ジルコン酸鉛系、 P Z T系の 圧電セラミックスに添加剤を加えて半導体化させることも可能である。 この 場合、 ェミッタ部 1 2内で不均一な電界分布をもたせて、 電子放出に寄与す る上部電極 1 4との界面近傍に電界集中を行うことが可能となる。 B a 2 P b 2 B i 3+ , L a 3+, etc., and the metal B ions are T i 4+ , T a 5+ , N b 5+, etc. It is also possible to add semiconductors to semiconductors by adding additives to barium titanate, lead zirconate, and PZT piezoelectric ceramics. In this case, the electric field concentration can be performed in the vicinity of the interface with the upper electrode 14 that contributes to electron emission by providing a non-uniform electric field distribution in the emitter section 12.
[0053] また、 圧電 Z電歪 Z反強誘電体セラミックスに、 例えば鉛ホウゲイ酸ガラ ス等のガラス成分や、 他の低融点化合物 (例えば酸化ビスマス等) を混ぜる ことによって、 焼成温度を下げることができる。 [0053] Further, for example, lead borosilicate glass on piezoelectric Z electrostrictive Z antiferroelectric ceramics. By mixing a glass component such as soot and other low melting point compounds (for example, bismuth oxide), the firing temperature can be lowered.
[0054] また、 圧電 Z電歪 Z反強誘電体セラミックスで構成する場合、 その形状は シート状の成形体、 シート状の積層体、 あるいは、 これらを他の支持用基板 に積層又は接着したものであってもよい。  [0054] When the piezoelectric Z electrostrictive Z antiferroelectric ceramics is used, the shape thereof is a sheet-like molded body, a sheet-like laminated body, or a laminate or adhesive of these on another supporting substrate. It may be.
[0055] また、 ェミッタ部 1 2に非鉛系の材料を使用する等により、 ェミッタ部 1 2を融点もしくは蒸散温度の高い材料とすることで、 電子もしくはイオンの 衝突に対し損傷しにくくなる。  [0055] Further, by using a lead-free material for the emitter portion 12 or the like, and making the emitter portion 12 a material having a high melting point or transpiration temperature, the electron or ion collision is less likely to be damaged.
[0056] そして、 ガラス基板 1 1上にェミッタ部 1 2を形成する方法としては、 ス クリーン印刷法、 デイツビング法、 塗布法、 電気泳動法、 エアロゾルデポジ シヨン法等の各種厚膜形成法や、 イオンビーム法、 スパッタリング法、 真空 蒸着法、 イオンプレーティング法、 化学気相成長法 (C V D) 、 めっき等の 各種薄膜形成法を用いることができる。  [0056] And, as a method for forming the emitter portion 12 on the glass substrate 11 1, various thick film forming methods such as a screen printing method, a dating method, a coating method, an electrophoresis method, an aerosol deposition method, Various thin film forming methods such as ion beam method, sputtering method, vacuum vapor deposition method, ion plating method, chemical vapor deposition method (CVD) and plating can be used.
[0057] この中で、 スクリーン印刷法ゃデイツビング法、 塗布法、 電気泳動法等に よる厚膜形成法は、 平均粒径 0. 0 1 5 m、 好ましくは 0. 0 5 3 mの圧電セラミックスの粒子を主成分とするペース卜やスラリー、 又はサス ペンション、 ェマルジヨン、 ゾル等を用いて形成することができ、 良好な圧 電作動特性が得られる。  Among these, the thick film forming method by screen printing method, dating method, coating method, electrophoresis method or the like is a piezoelectric ceramic having an average particle size of 0.015 m, preferably 0.053 m. It can be formed using a paste soot, slurry, suspension, emulsification, sol or the like mainly composed of the above-mentioned particles, and good piezoelectric operation characteristics can be obtained.
[0058] 特に、 電気泳動法は、 膜を高い密度で、 かつ、 高い形状精度で形成するこ とができることをはじめ、 「電気化学および工業物理化学 V o に 5 3, N o . 1 ( 1 9 8 5 ) , p 6 3 - 6 8 安斎和夫著」 あるいは 「第 1回電気 泳動法によるセラミックスの高次成形法 研究討論会 予稿集 (1 9 9 8 ) , p 5 - 6 , p 2 3 2 4」 等の技術文献に記載されるような特徴を有する 。 このように、 要求精度や信頼性等を考慮して、 適宜、 方法を選択して用い るとよい。  [0058] In particular, the electrophoretic method is capable of forming a film with high density and high shape accuracy, and includes "electrochemistry and industrial physical chemistry V o 5 3, N o. 1 (1 9 8 5), p 6 3-6 8 by Kazuo Ansai ”or“ The 1st Electrophoresis Method for High-Order Forming of Ceramics Proceedings (1 9 9 8), p 5-6, p 2 3 2 4 ”and the like as described in technical literature. In this way, it is advisable to select and use a method as appropriate in consideration of the required accuracy and reliability.
[0059] また、 圧電 Z電歪材料の粉末化したものを、 ェミッタ部 1 2として形成し 、 これに低融点のガラスゃゾル粒子を含浸する方法をとることが好ましい。 この手法により、 7 0 0°Cあるいは 6 0 0°C以下といった低温での膜形成が 可能となるため、 この第 1の実施の形態のように、 ガラス基板 1 1上にエミ ッタ部 1 2を形成する場合に好適である。 また、 前記エアロゾルデポジショ ン法も低温での膜形成が可能な手法である。 [0059] Further, it is preferable to use a method in which a powdered piezoelectric Z electrostrictive material is formed as an emitter portion 12 and impregnated with glass sol particles having a low melting point. By this method, film formation at a low temperature of 700 ° C or below 600 ° C can be achieved. Therefore, it is suitable when the emitter section 12 is formed on the glass substrate 11 as in the first embodiment. The aerosol deposition method is also a method capable of forming a film at a low temperature.
[0060] 上部電極 1 4は、 焼成後に薄い膜が得られる有機金属ペース卜が用いられ る。 例えば白金レジネートペースト等の材料を用いることが好ましい。 また [0060] The upper electrode 14 is made of an organometallic paste that can provide a thin film after firing. For example, a material such as platinum resinate paste is preferably used. Also
、 分極反転疲労を抑制する酸化物電極、 例えば、 酸化ルテニウム (RuO ) , Oxide electrodes that suppress polarization reversal fatigue, for example, ruthenium oxide (RuO)
2 2
、 酸化イリジウム ( I r O ) 、 ルテニウム酸ストロンチウム (S r RuO ) , Iridium oxide (IrO), strontium ruthenate (SrRuO)
2 3 twenty three
、 La S r CoO (例えば x = 0. 3や 0. 5) 、 La Ca MnO (例 , La S r CoO (e.g. x = 0.3 or 0.5), La Ca MnO (e.g.
1-x x 3 1-x x 3 えば x = 0. 2) 、 La Ca Mn Co O (例えば x = 0. 2、 y = 0.  1-x x 3 1-x x 3 e.g. x = 0.2), La Ca Mn Co O (e.g. x = 0.2, y = 0.
1-x x 1-y y 3  1-x x 1-y y 3
05) 、 もしくはこれらを例えば白金レジネートペーストに混ぜたものが好 ましい。  05) Or, these are preferably mixed with platinum resinate paste, for example.
[0061] また、 上部電極 1 4として、 図 5 A及び図 5 Bに示すように、 複数の鱗片 状の形状を有する物質 1 5 (例えば黒鉛) の集合体 1 7や、 図 6 A及び図 6 Bに示すように、 鱗片状の形状を有する物質 1 5を含んだ導電性の物質 1 9 の集合体 21も好ましく用いられる。 この場合、 前記集合体 1 7や集合体 2 1でェミッタ部 1 2の表面を完全に覆うのではなく、 ェミッタ部 1 2がー部 露出する貫通部 20を複数設けて、 ェミッタ部 1 2のうち、 貫通部 20を臨 む部分を電子放出領域とする。  Further, as the upper electrode 14, as shown in FIGS. 5A and 5B, an aggregate 17 of substances 15 (for example, graphite) having a plurality of scale-like shapes, FIG. 6A and FIG. As shown in 6 B, an aggregate 21 of conductive substances 19 including a substance 15 having a scale-like shape is also preferably used. In this case, the aggregate 17 or the aggregate 21 does not completely cover the surface of the emitter portion 1 2, but a plurality of through portions 20 where the emitter portion 1 2 is exposed are provided. Of these, the part facing the penetrating part 20 is defined as an electron emission region.
[0062] 上部電極 1 4は、 上記材料を用いて、 スクリーン印刷、 スプレー、 コーテ イング、 デイツビング、 塗布、 電気泳動法等の各種の厚膜形成法や、 スパッ タリング法、 イオンビーム法、 真空蒸着法、 イオンプレーティング法、 化学 気相成長法 (CVD) 、 めっき等の各種の薄膜形成法による通常の膜形成法 に従って形成することができ、 好適には、 前者の厚膜形成法によって形成す るとよい。  [0062] The upper electrode 14 is made of the above materials using various thick film forming methods such as screen printing, spraying, coating, dubbing, coating, electrophoresis, sputtering, ion beam method, vacuum deposition. , Ion plating, chemical vapor deposition (CVD), plating, and other conventional thin film formation methods, preferably the former thick film formation method. Good.
[0063] 一方、 下部電極 1 6は、 導電性を有する物質、 例えば金属が用いられ、 白 金、 モリブデン、 タングステン等によって構成される。 また、 高温酸化雰囲 気に対して耐性を有する導体、 例えば金属単体、 合金、 絶縁性セラミックス と金属単体との混合物、 絶縁性セラミックスと合金との混合物等によつて構 成され、 好適には、 白金、 イリジウム、 パラジウム、 ロジウム、 モリブデン 等の高融点貴金属や、 銀-パラジウム、 銀-白金、 白金-パラジウム等の合金を 主成分とするものや、 白金とセラミック材料とのサーメッ卜材料によって構 成される。 さらに好適には、 白金のみ又は白金系の合金を主成分とする材料 によって構成される。 On the other hand, the lower electrode 16 is made of a conductive material, for example, metal, and is made of white gold, molybdenum, tungsten, or the like. It is also possible to use conductors that are resistant to high-temperature oxidizing atmospheres, such as simple metals, alloys, mixtures of insulating ceramics and simple metals, and mixtures of insulating ceramics and alloys. Preferably, a high melting point precious metal such as platinum, iridium, palladium, rhodium, and molybdenum, or an alloy such as silver-palladium, silver-platinum, or platinum-palladium, or platinum and a ceramic material. It is composed of cermet materials. More preferably, it is made of a material mainly composed of platinum or a platinum-based alloy.
[0064] また、 下部電極 1 6として、 カーボン、 グラフアイ卜系の材料を用いても よい。 なお、 電極材料中に添加されるセラミック材料の割合は、 5 3 0体 積%程度が好適である。 もちろん、 上述した上部電極と同様の材料を用いる ようにしてもよい。  In addition, as the lower electrode 16, carbon or a graph eyelid material may be used. The ratio of the ceramic material added to the electrode material is preferably about 5 30 volume%. Of course, the same material as that of the upper electrode described above may be used.
[0065] 下部電極 1 6は、 好適には上記厚膜形成法によって形成する。 下部電極 1 6の厚さは、 2 0 m以下であるとよく、 好適には 5 m以下であるとよい  The lower electrode 16 is preferably formed by the thick film forming method. The thickness of the lower electrode 16 is preferably 20 m or less, and preferably 5 m or less.
[0066] 電子放出素子 1 0 Aの焼成処理としては、 ガラス基板 1 1上に下部電極 1 6となる材料、 ェミッタ部 1 2となる材料及び上部電極 1 4となる材料を順 次積層してから一体構造として焼成するようにしてもよいし、 下部電極 1 6 、 ェミッタ部 1 2、 上部電極 1 4をそれぞれ形成するたびに熱処理 (焼成処 理) してガラス基板 1 1と一体構造にするようにしてもよい。 なお、 上部電 極 1 4及び下部電極 1 6の形成方法によっては、 一体化のための熱処理 (焼 成処理) を必要としない場合もある。 [0066] As a firing treatment of the electron-emitting device 10A, a material that becomes the lower electrode 16, a material that becomes the emitter portion 12, and a material that becomes the upper electrode 14 are sequentially laminated on the glass substrate 11. It may be fired as an integral structure from each other, or heat treatment (firing process) is performed each time the lower electrode 16, the emitter part 12, and the upper electrode 14 are formed to form an integral structure with the glass substrate 11. You may do it. Depending on the formation method of the upper electrode 14 and the lower electrode 16, heat treatment (firing treatment) for integration may not be required.
[0067] ガラス基板 1 1上に形成されたェミッタ部 1 2、 上部電極 1 4及び下部電 極 1 6を一体化させるための焼成処理に係る温度としては、 ガラス基板 1 1 のガラス軟化点を考慮し、 5 0 0 1 0 0 0 °Cの範囲、 好適には、 6 0 0 8 0 0 °Cの範囲とするとよい。 さらに、 膜状のェミッタ部 1 2を熱処理する 場合、 高温時にェミッタ部 1 2の組成が不安定にならないように、 ェミッタ 部 1 2の蒸発源と共に雰囲気制御を行いながら焼成処理を行うことが好まし い。  [0067] As the temperature related to the baking treatment for integrating the emitter portion 1 2 formed on the glass substrate 1 1, the upper electrode 1 4 and the lower electrode 1 6, the glass softening point of the glass substrate 1 1 is In view of this, the range is 5 0 0 1 0 0 0 ° C, preferably 6 0 0 8 0 0 ° C. Further, when the film-like emitter part 12 is heat-treated, it is preferable to perform the baking treatment while controlling the atmosphere together with the evaporation source of the emitter part 12 so that the composition of the emitter part 12 does not become unstable at high temperatures. Good.
[0068] ガラス基板 1 1への膜形成方法としては、 ガラス基板 1 1の軟化点以下の 温度となるプロセス、 材料を選定して、 ガラス基板 1 1上に下部電極 1 6、 ェミッタ部 1 2及び上部電極 1 4を順次形成する。 具体的には、 下部電極 1 6としては、 低温焼成が可能な銀ペース卜等をスクリーン印刷にて形成し、 焼成した後、 ェミッタ部 1 2を前述したエアロデポジション法や、 低融点の ガラスゃゾル粒子に圧電 Z電歪材料の粉末化したものを含浸する方法等で形 成し、 その上に、 上部電極 1 4を低温焼成を可能とする材料にてスクリーン 印刷等で形成し、 焼成するという方法である。 [0068] As a method of forming a film on the glass substrate 11, a process and a material that have a temperature lower than the softening point of the glass substrate 11 1 are selected, and the lower electrode 16 on the glass substrate 11 1, The emitter portion 1 2 and the upper electrode 14 are sequentially formed. Specifically, as the lower electrode 16, a silver-paste pad or the like that can be fired at low temperature is formed by screen printing, and after firing, the emitter section 12 is formed by the above-described aero deposition method or a glass having a low melting point. The sol particles are formed by impregnating a powder of piezoelectric Z electrostrictive material, etc., and the upper electrode 14 is formed by screen printing or the like with a material that enables low temperature firing, and then fired. It is a method of doing.
[0069] また、 別の手法としては、 ェミッタ部 1 2をガラス基板 1 1の軟化点以上 の温度で形成したシートを、 ガラス基板 1 1に貼り合わせることも可能であ る。 この手法では、 ェミッタ部 1 2の焼成温度に制約がないため、 電子放出 に必要な特性を得易いという利点を有する。  [0069] As another method, a sheet in which the emitter portion 12 is formed at a temperature equal to or higher than the softening point of the glass substrate 11 can be bonded to the glass substrate 11. This method has an advantage that the characteristics necessary for electron emission can be easily obtained because the firing temperature of the emitter section 12 is not limited.
[0070] 焼成処理を行うことで、 特に、 上部電極 1 4となる膜が例えば厚み 1 0 μ mから厚み 0 . 1 mに収縮すると同時に複数の孔等が形成されていき、 結 果的に、 図 2に示すように、 上部電極 1 4に複数の貫通部 2 0が形成され、 貫通部 2 0の周部 2 6が庇状に形成された構成となる。 もちろん、 上部電極 1 4となる膜に対して事前 (焼成前) にエッチング (ウエットエッチング、 ドライエッチング) やリフトオフ等によってパターンニングを施した後、 焼 成するようにしてもよい。 この場合、 後述するように、 貫通部 2 0として切 欠き形状ゃスリット形状を容易に形成することができる。  [0070] By performing the firing treatment, in particular, the film to be the upper electrode 14 shrinks from, for example, a thickness of 10 μm to a thickness of 0.1 m, and at the same time, a plurality of holes and the like are formed, and as a result, As shown in FIG. 2, a plurality of through portions 20 are formed in the upper electrode 14, and a peripheral portion 26 of the through portion 20 is formed in a bowl shape. Of course, the film to be the upper electrode 14 may be subjected to patterning by etching (wet etching, dry etching), lift-off, or the like in advance (before firing) and then firing. In this case, as will be described later, a notch shape or a slit shape can be easily formed as the through portion 20.
[0071 ] なお、 ェミッタ部 1 2を適切な部材によって被覆し、 該ェミッタ部 1 2の 表面が焼成雰囲気に直接露出しないようにして焼成する方法を採用してもよ い。  [0071] It should be noted that a method may be employed in which the emitter portion 12 is covered with an appropriate member and fired so that the surface of the emitter portion 12 is not directly exposed to the firing atmosphere.
[0072] 次に、 電子放出素子 1 O Aの電子放出原理について説明する。 先ず、 上部 電極 1 4と下部電極 1 6との間に駆動電圧 V aが印加される。 この駆動電圧 V aは、 例えば、 パルス電圧あるいは交流電圧のように、 時間の経過に伴つ て、 基準電圧 (例えば O V ) よりも高い又は低い電圧レベルから基準電圧よ リも低い又は高い電圧レベルに急激に変化する電圧として定義される。  Next, the principle of electron emission of the electron-emitting device 1 O A will be described. First, the drive voltage Va is applied between the upper electrode 14 and the lower electrode 16. This drive voltage Va is a voltage level that is higher or lower than a reference voltage (for example, OV) over time, such as a pulse voltage or an AC voltage. Is defined as a voltage that changes rapidly.
[0073] また、 ェミッタ部 1 2の上面と上部電極 1 4と該電子放出素子 1 O Aの周 囲の媒質 (例えば、 真空) との接触箇所においてトリプルジャンクションが 形成されている。 ここで、 トリプルジャンクションとは、 上部電極 1 4とェ ミッタ部 1 2と真空との接触によリ形成される電界集中部として定義される[0073] In addition, a triple junction is formed at the contact point between the upper surface of the emitter portion 12 and the upper electrode 14 and the medium (for example, vacuum) around the electron emitter 1OA. Is formed. Here, the triple junction is defined as an electric field concentration portion formed by contact between the upper electrode 14, the emitter portion 1 2, and the vacuum.
。 なお、 前記トリプルジャンクションには、 上部電極 1 4とェミッタ部 1 2 と真空が 1つのボイン卜として存在する 3重点も含まれる。 雰囲気中の真空 度は、 1 02 1 0_6 P aが好ましく、 より好ましくは 1 0_3 1 0_5 P aであ る。 . The triple junction also includes a triple point where the upper electrode 14, the emitter portion 1 2, and the vacuum exist as one Boyne rod. The degree of vacuum in the atmosphere is preferably 1 0 2 1 0 — 6 Pa , more preferably 1 0 — 3 1 0 — 5 Pa .
[0074] 第 1の実施の形態では、 トリプルジャンクションは、 上部電極 1 4の庇部  [0074] In the first embodiment, the triple junction is a ridge of the upper electrode 14
2 6や上部電極 1 4の周縁部に形成されることになる。 従って、 上部電極 1 4と下部電極 1 6との間に上述のような駆動電圧 V aが印加されると、 上記 した卜リプルジャンクションにおいて電界集中が発生する。  It is formed at the peripheral edge of 2 6 and the upper electrode 14. Therefore, when the drive voltage Va as described above is applied between the upper electrode 14 and the lower electrode 16, electric field concentration occurs at the above-described ripple junction.
[0075] 先ず、 第 1の電子放出方式について、 図 7及び図 8を参照しながら説明す る。 図 7の第 1の出力期間 T 1 (第 1段階) において、 上部電極 1 4に基準 電圧 (この場合、 O V) よりも低い電圧 V 2が印加され、 下部電極 1 6に基 準電圧よりも高い電圧 V 1が印加される。 この第 1の出力期間 T 1では、 上 記したトリプルジャンクションにおいて電界集中が発生し、 上部電極 1 4か らェミッタ部 1 2に向けて電子放出が行われ、 例えばェミッタ部 1 2のうち 、 上部電極 1 4の貫通部 2 0から露出する部分や上部電極 1 4の周縁部近傍 の部分に電子が蓄積される。 すなわち、 ェミッタ部 1 2が帯電することにな る。 このとき、 上部電極 1 4が電子供給源として機能する。  First, the first electron emission method will be described with reference to FIG. 7 and FIG. In the first output period T 1 (first stage) in FIG. 7, a voltage V 2 lower than the reference voltage (in this case, OV) is applied to the upper electrode 14, and the lower electrode 16 is lower than the reference voltage. High voltage V 1 is applied. In the first output period T 1, electric field concentration occurs in the triple junction described above, and electrons are emitted from the upper electrode 14 toward the emitter portion 1 2. For example, the upper portion of the emitter portion 1 2 Electrons are accumulated in a portion exposed from the through portion 20 of the electrode 14 and a portion in the vicinity of the peripheral portion of the upper electrode 14. That is, the emitter section 12 is charged. At this time, the upper electrode 14 functions as an electron supply source.
[0076] 次の第 2の出力期間 T 2 (第 2段階) において、 駆動電圧 V aの電圧レべ ルが急減に変化、 すなわち、 上部電極 1 4に基準電圧よりも高い電圧 V 1が 印加され、 下部電極 1 6に基準電圧よりも低い電圧 V 2が印加されると、 今 度は、 上部電極 1 4の貫通部 2 0に対応した部分や上部電極 1 4の周縁部近 傍に帯電した電子は、 逆方向へ分極反転したェミッタ部 1 2の双極子 (エミ ッタ部 1 2の表面に負極性が現れる) により、 ェミッタ部 1 2から追い出さ れ、 図 8に示すように、 ェミッタ部 1 2のうち、 前記電子の蓄積されていた 部分から、 貫通部 2 0を通じて電子が放出される。 もちろん、 上部電極 1 4 の外周部近傍からも電子が放出される。 [0077] 次に、 第 2の電子放出方式について説明する。 先ず、 図 9の第 1の出力期 間 T 1 (第 1段階) において、 上部電極 1 4に基準電圧よりも高い電圧 V 3 が印加され、 下部電極 1 6に基準電圧よりも低い電圧 V 4が印加される。 こ の第 1の出力期間 T 1では、 電子放出のための準備 (例えばェミッタ部 1 2 の一方向への分極等) が行われる。 次の第 2の出力期間 T 2 (第 2段階) に おいて、 駆動電圧 V aの電圧レベルが急減に変化、 すなわち、 上部電極 1 4 に基準電圧よりも低い電圧 V 4が印加され、 下部電極 1 6に基準電圧よりも 高い電圧 V 3が印加されると、 今度は、 上記したトリプルジャンクションに おいて電界集中が発生し、 この電界集中によって上部電極 1 4から 1次電子 が放出され、 ェミッタ部 1 2のうち、 貫通部 2 0から露出する部分並びに上 部電極 1 4の外周部近傍に衝突することとなる。 これによつて、 図 1 0に示 すように、 1次電子が衝突した部分から 2次電子 (1次電子の反射電子を含 む) が放出される。 すなわち、 第 2の出力期間 T 2の初期段階において、 前 記貫通部 2 0並びに上部電極 1 4の外周部近傍から 2次電子が放出されるこ ととなる。 [0076] In the next second output period T 2 (second stage), the voltage level of the drive voltage V a changes rapidly, that is, the voltage V 1 higher than the reference voltage is applied to the upper electrode 14. When a voltage V 2 lower than the reference voltage is applied to the lower electrode 16, this time, the portion corresponding to the through portion 20 of the upper electrode 14 and the vicinity of the peripheral edge of the upper electrode 14 are charged. The emitted electrons are expelled from the emitter 12 by the dipole of the emitter 12 whose polarity is reversed in the opposite direction (a negative polarity appears on the surface of the emitter 12), as shown in FIG. In the portion 12, electrons are emitted from the portion where the electrons are accumulated through the penetrating portion 20. Of course, electrons are also emitted from the vicinity of the outer periphery of the upper electrode 14. Next, the second electron emission method will be described. First, in the first output period T 1 (first stage) in FIG. 9, a voltage V 3 higher than the reference voltage is applied to the upper electrode 14, and a voltage V 4 lower than the reference voltage is applied to the lower electrode 16. Is applied. In the first output period T 1, preparation for electron emission (for example, polarization of the emitter section 12 in one direction) is performed. In the next second output period T 2 (second stage), the voltage level of the drive voltage V a changes suddenly, that is, a voltage V 4 lower than the reference voltage is applied to the upper electrode 14, When a voltage V 3 higher than the reference voltage is applied to the electrode 16, this time, electric field concentration occurs at the triple junction described above, and primary electrons are emitted from the upper electrode 14 due to this electric field concentration, Of the emitter portion 12, the portion exposed from the through portion 20 and the vicinity of the outer peripheral portion of the upper electrode 14 will collide. As a result, as shown in FIG. 10, secondary electrons (including reflected electrons of the primary electrons) are emitted from the portion where the primary electrons collide. That is, in the initial stage of the second output period T 2, secondary electrons are emitted from the penetration portion 20 and the vicinity of the outer periphery of the upper electrode 14.
[0078] そして、 この第 1の実施の形態に係る電子放出素子 1 O Aにおいては、 上 部電極 1 4に複数の貫通部 2 0を形成したことから、 各貫通部 2 0並びに上 部電極 1 4の外周部近傍から均等に電子が放出され、 全体の電子放出特性の ばらつきが低減し、 電子放出の制御が容易になると共に、 電子放出効率が高 くなる。  In the electron-emitting device 1 OA according to the first embodiment, since the plurality of through portions 20 are formed in the upper electrode 14, each of the through portions 20 and the upper electrode 1 are formed. Electrons are evenly emitted from the vicinity of the outer periphery of 4, reducing variations in the overall electron emission characteristics, facilitating control of electron emission, and increasing electron emission efficiency.
[0079] また、 第 1の実施の形態では、 上部電極 1 4の庇部 2 6とェミッタ部 1 2 との間にギャップ 2 8が形成された形となることから、 駆動電圧 V aを印加 した際に、 該ギャップ 2 8の部分において電界集中が発生し易くなる。 これ は、 電子放出の高効率化につながり、 駆動電圧の低電圧化 (低い電圧レベル での電子放出) を実現させることができる。  [0079] In the first embodiment, the gap 28 is formed between the flange 26 of the upper electrode 14 and the emitter 12, so that the drive voltage Va is applied. In this case, electric field concentration is likely to occur in the gap 28 portion. This leads to higher efficiency of electron emission, and lower drive voltage (electron emission at a low voltage level) can be realized.
[0080] 上述したように、 第 1の実施の形態では、 上部電極 1 4は、 貫通部 2 0の 周部において庇部 2 6が形成されることから、 上述したギャップ 2 8の部分 での電界集中が大きくなることとも相俟って、 上部電極 1 4の庇部 2 6から 電子が放出され易くなる。 これは、 電子放出の高出力、 高効率化につながり 、 駆動電圧 V aの低電圧化を実現させることができる。 これにより、 例えば 電子放出素子を多数並べて構成された例えばディスプレイや光源の高輝度化 を図ることができる。 また、 上述した第 1の電子放出方式 (ェミッタ部 1 2 に蓄積された電子を放出させる方式) や第 2の電子放出方式 (上部電極 1 4 からの 1次電子をェミッタ部 1 2に衝突させて 2次電子を放出させる方式) のいずれにしても、 上部電極 1 4の庇部 2 6がゲート電極 (制御電極、 フォ 一カス電子レンズ等) として機能するため、 放出電子の直進性を向上させる ことができる。 これは、 ディスプレイの電子源として構成した場合に、 クロ ストークを低減する上で有利となる。 [0080] As described above, in the first embodiment, the upper electrode 14 has the flange portion 26 formed in the peripheral portion of the through portion 20 so that the gap portion 28 described above Combined with the fact that the electric field concentration is increased, Electrons are easily emitted. This leads to a high output and high efficiency of electron emission, and a reduction in the drive voltage Va can be realized. As a result, for example, it is possible to increase the brightness of, for example, a display or a light source configured by arranging a large number of electron emitting elements. In addition, the first electron emission method (method of emitting electrons accumulated in the emitter portion 1 2) described above or the second electron emission method (primary electrons from the upper electrode 14 are caused to collide with the emitter portion 1 2. In any case, the eaves 26 of the upper electrode 14 functions as a gate electrode (control electrode, focus electron lens, etc.), improving the straightness of the emitted electrons. It can be made. This is advantageous in reducing crosstalk when configured as a display electron source.
[0081 ] このように、 第 1の実施の形態に係る電子放出素子 1 O Aにおいては、 高 い電界集中を容易に発生させることができ、 しかも、 電子放出箇所を多くす ることができ、 電子放出について高出力、 高効率を図ることができ、 低電圧 駆動 (低消費電力) も可能となる。  As described above, in the electron-emitting device 1 OA according to the first embodiment, high electric field concentration can be easily generated, and the number of electron emission locations can be increased. High output and high efficiency can be achieved for emission, and low voltage drive (low power consumption) is also possible.
[0082] 特に、 第 1の実施の形態では、 ェミッタ部 1 2の少なくとも上面は、 誘電 体の粒界による凹凸 2 2が形成され、 上部電極 1 4は、 誘電体の粒界におけ る凹部 2 4に対応した部分に貫通部 2 0が形成されるようにしたので、 上部 電極 1 4の庇部 2 6を簡単に実現させることができる。  [0082] In particular, in the first embodiment, at least the upper surface of the emitter portion 12 is formed with irregularities 22 due to dielectric grain boundaries, and the upper electrode 14 is a concave portion at the dielectric grain boundaries. Since the through portion 20 is formed in the portion corresponding to 24, the flange portion 26 of the upper electrode 14 can be easily realized.
[0083] また、 ェミッタ部 1 2の上面、 すなわち、 誘電体の粒界における凸部 3 0 の表面 (凹部 2 4の内壁面) と、 上部電極 1 4の庇部 2 6の下面 2 6 aとの なす角の最大角度 0を、 1 ° ≤0≤6 0 ° とし、 ェミッタ部 1 2の誘電体の 粒界における凸部 3 0の表面 (凹部 2 4の内壁面) と、 上部電極 1 4の庇部 2 6の下面 2 6 aとの間の鉛直方向に沿った最大間隔 dを、 0 m < d≤ 1 0 mとしたので、 これらの構成により、 ギャップ 2 8の部分での電界集中 の度合いをより大きくすることができ、 電子放出についての高出力、 高効率 、 並びに駆動電圧の低電圧化を効率よく図ることができる。  [0083] Further, the upper surface of the emitter portion 12, that is, the surface of the convex portion 30 at the dielectric grain boundary (the inner wall surface of the concave portion 2 4), and the lower surface 2 6 a of the flange portion 2 6 of the upper electrode 14 The maximum angle 0 is 1 ° ≤0≤60 °, and the surface of the convex part 30 at the grain boundary of the dielectric of the emitter part 1 2 (inner wall surface of the concave part 2 4) and the upper electrode 1 Since the maximum distance d along the vertical direction between the lower surface 2 6 a of the flange 2 6 of 4 is set to 0 m <d ≤ 1 0 m, the electric field in the gap 28 is The degree of concentration can be further increased, and high output and high efficiency for electron emission and low drive voltage can be efficiently achieved.
[0084] また、 この第 1の実施の形態では、 貫通部 2 0を孔 3 2の形状としている 。 図 3に示すように、 ェミッタ部 1 2のうち、 上部電極 1 4と下部電極 1 6 (図 2参照) 間に印加される駆動電圧 V aに応じて分極が反転あるいは変化 する部分は、 上部電極 1 4が形成されている直下の部分 (第 1の部分) 4 0 と、 貫通部 2 0の内周から貫通部 2 0の内方に向かう領域に対応した部分 ( 第 2の部分) 4 2であり、 特に、 第 2の部分 4 2は、 駆動電圧 V aのレベル や電界集中の度合いによって変化することになる。 従って、 この第 1の実施 の形態では、 孔 3 2の平均径を、 0 . 1 m以上、 1 0 m以下としている 。 この範囲であれば、 貫通部 2 0を通じて放出される電子の放出分布にばら つきがほとんどなくなリ、 効率よく電子を放出することができる。 Further, in the first embodiment, the penetrating portion 20 has the shape of the hole 32. As shown in Fig. 3, the upper electrode 1 4 and the lower electrode 1 6 of the emitter section 1 2 (See Fig. 2) The part where the polarization is inverted or changed according to the drive voltage V a applied between is the part immediately below where the upper electrode 14 is formed (first part) 4 0 and the through part The portion corresponding to the region from the inner circumference of 20 toward the inner portion of the penetration portion 20 (second portion) 4 2, in particular, the second portion 4 2 is the level of the driving voltage V a and the electric field concentration. It will change depending on the degree. Therefore, in the first embodiment, the average diameter of the holes 32 is set to 0.1 m or more and 10 m or less. Within this range, there is almost no variation in the electron emission distribution emitted through the through-hole 20, and electrons can be emitted efficiently.
[0085] なお、 孔 3 2の平均径が 0 . 1 m未満の場合、 電子を蓄積する領域が狭 くなリ、 放出される電子の量が少なくなる。 もちろん、 孔 3 2を多数設ける ことも考えられるが、 困難性を伴い、 製造コストが高くなるという懸念があ る。 孔 3 2の平均径が 1 0 mを超えると、 ェミッタ部 1 2の前記貫通部 2 0から露出した部分のうち、 電子放出に寄与する部分 (第 2の部分) 4 2の 割合 (占有率) が小さくなリ、 電子の放出効率が低下する。  [0085] When the average diameter of the holes 32 is less than 0.1 m, the region for accumulating electrons is narrowed and the amount of electrons emitted is reduced. Of course, it is conceivable to provide a large number of holes 32, but there is a concern that the manufacturing cost will increase with difficulty. When the average diameter of the hole 3 2 exceeds 10 m, the ratio of the portion (second portion) 4 2 that contributes to electron emission in the portion exposed from the penetrating portion 20 of the emitter portion 1 2 (occupancy rate) ) Is small, the electron emission efficiency decreases.
[0086] 上部電極 1 4の庇部 2 6の断面形状としては、 図 3に示すように、 上面及 び下面とも水平に延びる形状としてもよいし、 図 1 1に示すように、 庇部 2 6の下面 2 6 aがほぼ水平であって、 庇部 2 6の上端部が上方に盛り上がつ ていてもよい。 また、 図 1 2に示すように、 庇部 2 6の下面 2 6 aが、 貫通 部 2 0の中心に向かうに従って徐々に上方に傾斜していてもよいし、 図 1 3 に示すように、 庇部 2 6の下面 2 6 aが、 貫通部 2 0の中心に向かうに従つ て徐々に下方に傾斜していてもよい。 図 1 1の例は、 ゲート電極としての機 能を高めることが可能であり、 図 1 3の例では、 ギャップ 2 8の部分が狭く なることから、 より電界集中を発生し易くなリ、 電子放出の高出力、 高効率 を向上させることができる。  [0086] The cross-sectional shape of the flange portion 26 of the upper electrode 14 may be a shape that extends horizontally on both the upper surface and the lower surface as shown in FIG. 3, or as shown in FIG. The lower surface 2 6 a of 6 may be substantially horizontal, and the upper end portion of the flange portion 26 may be raised upward. Further, as shown in FIG. 12, the lower surface 2 6 a of the flange 2 6 may be gradually inclined upward toward the center of the penetrating part 20, or as shown in FIG. The lower surface 2 6 a of the flange portion 26 may be gradually inclined downward toward the center of the penetrating portion 20. The example in Fig. 11 can enhance the function as a gate electrode. In the example in Fig. 13, the gap 28 is narrowed, so that electric field concentration is more likely to occur. High output and high efficiency of emission can be improved.
[0087] また、 この第 1の実施の形態においては、 図 1 4に示すように、 電気的な 動作において、 上部電極 1 4と下部電極 1 6間に、 ェミッタ部 1 2によるコ ンデンサ C 1と、 各ギャップ 2 8による複数のコンデンサ C aの集合体とが 形成された形となる。 すなわち、 各ギャップ 2 8による複数のコンデンサ C aは、 互いに並列に接続された 1つのコンデンサ C 2として構成され、 等価 回路的には、 集合体によるコンデンサ C2にェミッタ部 1 2によるコンデン サ C 1が直列接続された形となる。 In the first embodiment, as shown in FIG. 14, in the electrical operation, the capacitor C 1 by the emitter section 1 2 is interposed between the upper electrode 14 and the lower electrode 16. And an aggregate of a plurality of capacitors Ca with each gap 28 formed. That is, multiple capacitors C with each gap 28 a is configured as a single capacitor C 2 connected in parallel with each other. In terms of an equivalent circuit, a capacitor C 1 formed by an emitter 12 is connected in series to a capacitor C 2 formed from an aggregate.
[0088] 実際には、 集合体によるコンデンサ C2にェミッタ部 1 2によるコンデン サ C 1がそのまま直列接続されることはなく、 上部電極 1 4への貫通部 20 の形成個数や全体の形成面積等に応じて、 直列接続されるコンデンサ成分が 変化する。 [0088] Actually, the capacitor C1 due to the emitter portion 12 is not directly connected in series to the capacitor C2 due to the aggregate, and the number of through-holes 20 formed in the upper electrode 14 and the overall formation area, etc. The capacitor component connected in series changes in response to.
[0089] ここで、 図 1 5に示すように、 例えばェミッタ部 1 2によるコンデンサ C  Here, for example, as shown in FIG.
1のうち、 その 25%が集合体によるコンデンサ C 2と直列接続された場合 を想定して、 容量計算を行ってみる。 先ず、 ギャップ 28の部分は真空であ ることから比誘電率は 1となる。 そして、 ギャップ 28の最大間隔 dを 0. 1 m、 1つのギャップ 28の部分の面積 S= 1 mX 1 mとし、 ギヤッ プ 28の数を 1 0, 000個とする。 また、 ェミッタ部 1 2の比誘電率を 2 000、 ェミッタ部 1 2の厚みを 20 m、 上部電極 1 4と下部電極 1 6の 対向面積を 20 O Z mX 200 mとすると、 集合体によるコンデンサ C 2 の容量値は 0. 885 p F、 ェミッタ部 1 2によるコンデンサ C 1の容量値 は 35. 4 p Fとなる。 そして、 ェミッタ部 1 2によるコンデンサ C 1のう ち、 集合体によるコンデンサ C 2と直列接続されている部分を全体の 25% としたとき、 該直列接続された部分における容量値 (集合体によるコンデン サ C 2の容量値を含めた容量値) は 0. 805 p Fであり、 残りの容量値は 26. 6 p Fとなる。  Assuming that 25% of 1 is connected in series with a capacitor C2 by an aggregate, calculate the capacity. First, since the gap 28 is vacuum, the relative dielectric constant is 1. The maximum gap d of the gap 28 is 0.1 m, the area S of one gap 28 is S = 1 mX 1 m, and the number of the gaps 28 is 10,000. When the dielectric constant of the emitter part 1 2 is 2 000, the thickness of the emitter part 1 2 is 20 m, and the opposing area of the upper electrode 14 and the lower electrode 16 is 20 OZ mX 200 m, the capacitor C by the aggregate C The capacitance value of 2 is 0.885 p F, and the capacitance value of capacitor C 1 by the emitter section 1 2 is 35.4 p F. Then, when the portion connected in series with the capacitor C 2 by the aggregate in the capacitor C 1 by the emitter section 12 is 25% of the total, the capacitance value (condenser by the aggregate) in the portion connected in series The capacitance value including the capacitance value of C2 is 0.805 pF, and the remaining capacitance value is 26.6 pF.
[0090] これら直列接続された部分と残りの部分は並列接続されているから、 全体 の容量値は、 27. 5 p Fとなる。 この容量値は、 ェミッタ部 1 2によるコ ンデンサ C 1の容量値 35. 4 p Fの 78%である。 つまり、 全体の容量値 は、 ェミッタ部 1 2によるコンデンサ C 1の容量値よりも小さくなる。  [0090] Since the series-connected part and the remaining part are connected in parallel, the overall capacitance value is 27.5 p F. This capacitance value is 78% of the capacitance value 35.4 p F of the capacitor C 1 by the emitter section 12. That is, the overall capacitance value is smaller than the capacitance value of the capacitor C 1 by the emitter unit 12.
[0091] このように、 複数のギャップ 28によるコンデンサ Caの集合体について は、 ギャップ 28によるコンデンサ C aの容量値が相対的に小さいものとな リ、 ェミッタ部 1 2によるコンデンサ C 1との分圧から、 印加電圧 Vaのほ とんどはギャップ 2 8に印加されることになリ、 各ギャップ 2 8において、 電子放出の高出力化が実現される。 [0091] As described above, the aggregate of the capacitors Ca by the plurality of gaps 28 has a relatively small capacitance value of the capacitor Ca by the gaps 28, and is separated from the capacitor C 1 by the emitter section 12. Pressure, applied voltage Va In most cases, it is applied to the gap 28, and in each gap 28, high output of electron emission is realized.
[0092] また、 集合体によるコンデンサ C 2は、 ェミッタ部 1 2によるコンデンサ C 1に直列接続された構造となることから、 全体の容量値は、 ェミッタ部 1 2によるコンデンサ C 1の容量値よりも小さくなる。 このことから、 電子放 出は高出力であり、 全体の消費電力は小さくなるという好ましい特性を得る ことができる。  [0092] Further, the capacitor C 2 by the aggregate has a structure connected in series to the capacitor C 1 by the emitter section 12. Therefore, the overall capacitance value is based on the capacitance value of the capacitor C 1 by the emitter section 12. Becomes smaller. From this, it is possible to obtain desirable characteristics that electron emission is high output and overall power consumption is small.
[0093] さらに、 この第 1の実施の形態に係る電子放出素子 1 O Aにおいては、 ガ ラス基板 1 1を用いるようにしたので、 大板化を容易にし、 且つ、 製品コス 卜の低廉化を図ることができる。 また、 電子放出素子 1 O Aの製造に係る処 理温度の低温化を促進させることができ、 設備の低コスト化も図ることがで きる。 ガラス基板 1 1として結晶化ガラスを用いるようにしてもよい。 この 場合、 処理温度として、 一般のガラスと異なり、 6 0 0 8 0 0 °Cの範囲を 使用することができ、 材料選定の自由度を広げることができる。  [0093] Further, in the electron-emitting device 1OA according to the first embodiment, since the glass substrate 11 is used, it is easy to increase the size and reduce the cost of the product. Can be planned. In addition, it is possible to promote a reduction in processing temperature related to the production of the electron-emitting device 1 O A and to reduce the cost of the equipment. Crystallized glass may be used as the glass substrate 11. In this case, unlike general glass, the processing temperature can be in the range of 60 ° C. and 80 ° C., and the degree of freedom in material selection can be expanded.
[0094] 次に、 上述した第 1の実施の形態に係る電子放出素子 1 O Aの 3つの変形 例について図 1 6 図 1 8を参照しながら説明する。  Next, three modified examples of the electron-emitting device 1 O A according to the first embodiment will be described with reference to FIGS.
[0095] 先ず、 第 1の変形例に係る電子放出素子 1 0 A aは、 図 1 6に示すように 、 貫通部 2 0の形状、 特に、 上面から見た形状が切欠き 4 4の形状である点 で異なる。 切欠き 4 4の形状としては、 図 1 6に示すように、 多数の切欠き 4 4が連続して形成されたくし歯状の切欠き 4 6が好ましい。 この場合、 貫 通部 2 0を通じて放出される電子の放出分布のばらつきを低減し、 効率よく 電子を放出する上で有利となる。 特に、 切欠き 4 4の平均幅を、 0 . 1 m 以上、 1 0 m以下とすることが好ましい。 この平均幅は、 切欠き 4 4の中 心線を直交するそれぞれ異なる複数の線分の長さの平均を示す。  First, as shown in FIG. 16, the electron-emitting device 10 A a according to the first modified example has a shape of the penetrating portion 20, in particular, a shape viewed from the upper surface, and is a shape of a notch 44. It is different in that. As the shape of the notch 4 4, a comb-like notch 4 6 in which a large number of notches 4 4 are continuously formed as shown in FIG. 16 is preferable. In this case, it is advantageous to reduce the variation in the emission distribution of the electrons emitted through the through-hole 20 and to efficiently emit electrons. In particular, the average width of the notches 44 is preferably 0.1 m or more and 10 m or less. This average width is the average of the lengths of different line segments orthogonal to the center line of the notches 44.
[0096] 第 2の変形例に係る電子放出素子 1 0 A bは、 図 1 7に示すように、 貫通 部 2 0の形状、 特に、 上面から見た形状がスリット 4 8である点で異なる。 ここで、 スリット 4 8とは、 長軸方向 (長手方向) の長さが短軸方向 (短手 方向) の長さの 1 0倍以上であるものをいう。 従って、 長軸方向 (長手方向 ) の長さが短軸方向 (短手方向) の長さの 1 0倍未満のものは孔 3 2 (図 4 参照) の形状として定義することができる。 また、 スリット 4 8としては、 複数の孔 3 2が連通してつながつたものも含まれる。 この場合、 スリット 4 8の平均幅は、 0 . 1 m以上、 1 0 m以下とすることが好ましい。 貫通 部 2 0を通じて放出される電子の放出分布のばらつきを低減し、 効率よく電 子を放出する上で有利になるからである。 この平均幅は、 スリット 4 8の中 心線を直交するそれぞれ異なる複数の線分の長さの平均を示す。 The electron-emitting device 10 A b according to the second modified example is different in that the shape of the penetrating portion 20, particularly the shape seen from the upper surface, is a slit 48, as shown in FIG. . Here, the slit 48 is a slit whose length in the major axis direction (longitudinal direction) is not less than 10 times the length in the minor axis direction (short direction). Therefore, long axis direction (longitudinal direction ) Is less than 10 times the length in the short axis direction (short direction) can be defined as the shape of the hole 3 2 (see Fig. 4). In addition, the slits 48 include those in which a plurality of holes 32 are connected and connected. In this case, the average width of the slit 48 is preferably 0.1 m or more and 10 m or less. This is because variations in the emission distribution of electrons emitted through the through-hole 20 are reduced, which is advantageous in efficiently emitting electrons. This average width indicates the average length of a plurality of different line segments perpendicular to the center line of the slit 48.
[0097] 第 3の変形例に係る電子放出素子 1 0 A cは、 図 1 8に示すように、 エミ ッタ部 1 2の上面のうち、 貫通部 2 0と対応する部分、 例えば誘電体の粒界 の凹部 2 4にフローティング電極 5 0が存在している点で異なる。 この場合 、 フローティング電極 5 0も電子供給源となることから、 電子の放出段階 ( 第 2段階) において、 多数の電子を貫通部 2 0を通じて外部に放出させるこ とができる。 この場合、 フローティング電極 5 0からの電子放出は、 フロー ティング電極 5 O Z誘電体 Z真空の卜リプルジャンクションにおける電界集 中によるものが考えられる。  As shown in FIG. 18, the electron-emitting device 10 Ac according to the third modification has a portion corresponding to the penetrating portion 20, for example, a dielectric, on the upper surface of the emitter portion 12. The difference is that the floating electrode 50 exists in the recess 24 of the grain boundary. In this case, since the floating electrode 50 also serves as an electron supply source, a large number of electrons can be emitted to the outside through the through-hole 20 in the electron emission stage (second stage). In this case, the electron emission from the floating electrode 50 may be due to electric field concentration at the ripple junction of the floating electrode 5 O Z dielectric Z vacuum.
[0098] ここで、 第 1の実施の形態に係る電子放出素子 1 O Aの特性、 特に、 電圧- 電荷量特性 (電圧-分極量特性) について説明する。  Here, characteristics of the electron-emitting device 1 O A according to the first embodiment, in particular, voltage-charge amount characteristics (voltage-polarization amount characteristics) will be described.
[0099] この第 1の実施の形態に係る電子放出素子 1 O Aは、 真空中において、 図  The electron-emitting device 1 O A according to the first embodiment is shown in FIG.
1 9の特性に示すように、 基準電圧 = 0 ( V) を基準とした非対称のヒステ リシス曲線を描く。  19 As shown in the characteristics of 9, draw an asymmetric hysteresis curve with reference voltage = 0 (V).
[0100] この特性について説明すると、 先ず、 ェミッタ部 1 2のうち、 電子が放出 される部分を電子放出部と定義したとき、 基準電圧が印加されるポイント p 1 (初期状態) では、 前記電子放出部に電子がほとんど蓄積されていない状 態となつている。 その後、 負電圧を印加すると、 前記電子放出部において、 ェミッタ部 1 2が分極反転した双極子の正電荷の量が増し、 それに伴って、 第 1段階における上部電極 1 4から電子放出部へ向けた電子放出が起きて、 電子が蓄積されていくこととなる。 負電圧のレベルを負方向に大きくしてい くと、 前記電子放出部への電子の蓄積に伴って、 ある負電圧のポイント p 2 において正電荷の量と負電荷の量が平衡な状態となり、 負電圧のレベルを負 方向に大きくしていくと、 さらに電子の蓄積量が増加し、 これに伴って、 負 電荷の量が正電荷の量よりも多い状態となる。 ポイント p 3において電子の 蓄積飽和状態となる。 ここでの負電荷の量は、 蓄積したまま残っている電子 の量と、 ェミッタ部 1 2が分極反転した双極子の負電荷の量の合計である。 [0100] This characteristic will be described. First, when a portion of the emitter section 12 where electrons are emitted is defined as an electron emission section, at the point p 1 (initial state) where a reference voltage is applied, the electrons are emitted. It is in a state where almost no electrons are accumulated in the emission part. After that, when a negative voltage is applied, the amount of positive charges of the dipole whose polarization is inverted in the electron emitter 12 increases in the electron emitter, and accordingly, from the upper electrode 14 in the first stage toward the electron emitter. Electron emission occurs and electrons are accumulated. When the level of the negative voltage is increased in the negative direction, a certain negative voltage point p 2 is generated as electrons accumulate in the electron emission portion. The amount of positive charge and the amount of negative charge are in equilibrium, and as the negative voltage level is increased in the negative direction, the amount of accumulated electrons further increases, and the amount of negative charge increases accordingly. The state becomes larger than the amount of charge. At point p3, the electron is saturated. The amount of negative charge here is the sum of the amount of electrons remaining as accumulated and the amount of negative charge of the dipole whose emitter 12 is inverted.
[0101] その後、 負電圧のレベルを小さくしていき、 さらに、 基準電圧を超えて正 電圧を印加していくと、 ポイント p 4において、 第 2段階における電子の放 出が開始される。 この正電圧を正方向に大きくすれば、 電子の放出量が増加 し、 ポイント p 5では、 正電荷の量と負電荷の量が平衡な状態となる。 そし て、 ポイント p 6では、 蓄積されていた電子がほとんど放出され、 正電荷の 量と負電荷の量の差が初期状態とほぼ同じになる。 すなわち、 電子の蓄積は ほとんどなくなり、 ェミッタ部 1 2が分極した双極子の負電荷のみが電子放 出部に現れている状態である。  [0101] After that, when the level of the negative voltage is decreased, and when a positive voltage is applied exceeding the reference voltage, the emission of electrons in the second stage starts at point p4. If this positive voltage is increased in the positive direction, the amount of emitted electrons increases, and at point p5, the amount of positive charge and the amount of negative charge are balanced. And at point p6, most of the accumulated electrons are emitted, and the difference between the amount of positive charge and the amount of negative charge becomes almost the same as the initial state. In other words, there is almost no accumulation of electrons, and only the negative charge of the dipole whose emitter 12 is polarized appears in the electron emitter.
[0102] そして、 この特性の特徴ある部分は、 以下の点である。 [0102] The characteristic parts of this characteristic are as follows.
[0103] ( 1 ) 正電荷の量と負電荷の量が平衡な状態であるポイント p 2における負 電圧を V 1、 ポイント p 5における正電圧を V 2としたとき、 [0103] (1) When the negative voltage at point p2 where the amount of positive charge and the amount of negative charge are in equilibrium is V1, and the positive voltage at point p5 is V2,
I V 1 | ぐ | V2 |  I V 1 | G | V2 |
である。  It is.
[0104] (2) より詳しくは、 1. 5 X | V 1 | < | V2 |である。  [0104] (2) More specifically, 1.5 X | V 1 | <| V2 |.
[0105] (3) ポイント p 2における正電荷の量と負電荷の量の変化の割合を AQ 1 [0105] (3) The rate of change of the amount of positive charge and the amount of negative charge at point p 2 is expressed as AQ 1
V 1、 ポイント p 5における正電荷の量と負電荷の量の変化の割合を厶 Q 2ZA V 2としたとき、  When the rate of change in the amount of positive charge and the amount of negative charge at V 1 and point p 5 is 厶 Q 2ZA V 2,
(△Q 1ZAV 1 ) > (AQ2ZAV2)  (△ Q 1ZAV 1)> (AQ2ZAV2)
である。  It is.
[0106] (4) 電子が蓄積飽和状態となる電圧を V 3、 電子の放出が開始される電圧 を V4としたとき、  [0106] (4) When V 3 is the voltage at which electrons are accumulated and saturated, and V4 is the voltage at which electron emission starts,
1≤ | V4 レ | V3 | ≤ 1. 5  1≤ | V4 | V3 | ≤ 1.5
である。 [0107] 次に、 図 1 9の特性を電圧-分極量特性の立場で説明する。 初期状態におい て、 ェミッタ部 1 2がー方向に分極されて、 例えば双極子の負極がェミッタ 部 1 2の上面に向いた状態 (図 2 O A参照) となっている場合を想定して説 明する。 It is. Next, the characteristics of FIG. 19 will be described in terms of voltage-polarization characteristics. In the initial state, the explanation is based on the assumption that the emitter section 12 is polarized in the negative direction, for example, the negative pole of the dipole faces the upper surface of the emitter section 12 (see Fig. 2 OA). To do.
[0108] 先ず、 図 1 9に示すように、 基準電圧 (例えば O V ) が印加されるポイン 卜 p 1 (初期状態) では、 図 2 0 Aに示すように、 双極子の負極がェミッタ 部 1 2の上面に向いた状態となっていることから、 ェミッタ部 1 2の上面に は電子がほとんど蓄積されていない状態となっている。  First, as shown in FIG. 19, at a point で は p 1 (initial state) to which a reference voltage (for example, OV) is applied, the dipole negative electrode is connected to the emitter section 1 as shown in FIG. 2 is directed to the upper surface of 2, so that almost no electrons are accumulated on the upper surface of the emitter portion 1 2.
[0109] その後、 負電圧を印加し、 該負電圧のレベルを負方向に大きくしていくと 、 負の抗電圧を超えたあたり (図 1 9のポイント p 2参照) から分極が反転 しはじめ、 図 1 9のポイント p 3にて全ての分極が反転することになる (図 2 0 B参照) 。 この分極反転によって、 上記したトリプルジャンクションに おいて電界集中が発生し、 第 1段階における上部電極 1 4からェミッタ部 1 2に向けた電子放出が起こり、 例えばェミッタ部 1 2のうち、 上部電極 1 4 の貫通部 2 0から露出する部分や上部電極 1 4の周縁部近傍の部分に電子が 蓄積される (図 2 0 C参照) 。 特に、 上部電極 1 4から、 ェミッタ部 1 2の うち、 上部電極 1 4の貫通部 2 0から露出する部分に向けて電子が放出 (内 部放出) されることになる。 そして、 図 1 9のポイント p 3において電子の 蓄積飽和状態となる。  [0109] After that, when a negative voltage is applied and the level of the negative voltage is increased in the negative direction, the polarization starts to reverse from around the point where the negative coercive voltage is exceeded (see point p 2 in Fig. 9). All polarizations are reversed at point p3 in Fig. 19 (see Fig. 20B). Due to this polarization inversion, electric field concentration occurs at the triple junction described above, and electron emission from the upper electrode 14 to the emitter section 1 2 occurs in the first stage. For example, the upper electrode 1 of the emitter section 1 2 Electrons are accumulated in a portion exposed from the through portion 20 of 4 and a portion near the peripheral portion of the upper electrode 14 (see FIG. 20C). In particular, electrons are emitted (internal emission) from the upper electrode 14 toward a portion of the emitter portion 12 exposed from the through portion 20 of the upper electrode 14. Then, at point p 3 in Fig. 19, the accumulated state of electrons is saturated.
[01 10] その後、 負電圧のレベルを小さくしていき、 さらに、 基準電圧を超えて正 電圧を印加していくと、 ある電圧レベルまでは、 ェミッタ部 1 2の上面の帯 電状態が維持される (図 2 1 A参照) 。 正電圧のレベルをさらに大きくいく と、 図 1 9のポイント p 4の直前において、 双極子の負極がェミッタ部 1 2 の上面に向き始める領域が発生し (図 2 1 B参照) 、 さらに、 レベルを上げ て図 1 9のポイント p 4以降において、 双極子の負極によるクーロン反発力 により、 電子の放出が開始される (図 2 1 C参照) 。 この正電圧を正方向に 大きくすれば、 電子の放出量が増加し、 正の抗電圧を超えたあたり (ポイン 卜 p 5 ) から分極が再び反転する領域が拡大して、 ポイント p 6では、 蓄積 されていた電子がほとんど放出され、 このときの分極量は初期状態の分極量 とほぼ同じになる。 [01 10] After that, if the level of the negative voltage is decreased, and if a positive voltage is applied exceeding the reference voltage, the charged state on the upper surface of the emitter section 12 is maintained until a certain voltage level is reached. (See Fig. 21 A). When the level of the positive voltage is further increased, a region where the negative pole of the dipole starts to face the upper surface of the emitter section 1 2 occurs just before point p4 in Fig. 19 (see Fig. 21B). After point p 4 in Fig. 19, emission of electrons begins due to the Coulomb repulsive force due to the negative pole of the dipole (see Fig. 21C). If this positive voltage is increased in the positive direction, the amount of emitted electrons increases, and the region where the polarization reverses again from around the point where the positive coercive voltage is exceeded (point 卜 p 5) expands. Accumulation Most of the electrons that have been released are emitted, and the amount of polarization at this time is almost the same as the amount of polarization in the initial state.
[0111] そして、 この電子放出素子 1 OAの特性の特徴ある部分は、 以下の点とな る。  [0111] Characteristic portions of the characteristics of the electron-emitting device 1 OA are as follows.
[0112] (A) 負の抗電圧を v 1、 正の抗電圧を V 2としたとき、  [0112] (A) When negative coercive voltage is v 1 and positive coercive voltage is V 2,
I V 1 | < | V 2 |  I V 1 | <| V 2 |
である。  It is.
[0113] (B) より詳しくは、 1. 5 X | V 1 |く | v 2 |である。  [0113] (B) More specifically, 1.5 X | V 1 |
[0114] (C) 負の抗電圧 V 1を印加した際における分極の変化の割合を Δ q 1 Z厶  [0114] (C) The rate of change of polarization when negative coercive voltage V 1 is applied is expressed as Δ q 1 Z 厶
V 1、 正の抗電圧 V 2を印加した際における分極の変化の割合を Δ q 2 厶 V 1, the rate of change in polarization when a positive coercive voltage V 2 is applied, Δ q 2 を
V 2としたとき、 When V 2
(Δ q 1 V 1 ) > (Aq 2ZA v 2)  (Δ q 1 V 1)> (Aq 2ZA v 2)
である。  It is.
[0115] (D) 電子が蓄積飽和状態となる電圧を V 3、 電子の放出が開始される電圧 を V 4としたとき、  [0115] (D) When V 3 is the voltage at which electrons are accumulated and saturated, and V 4 is the voltage at which electron emission starts,
1≤ | v 4 レ | v 3 | ≤ 1. 5  1≤ | v 4 les | v 3 | ≤ 1.5
である。  It is.
[0116] 第 1の実施の形態に係る電子放出素子 1 OAは、 上述のような特性を有す ることから、 複数の画素に応じて配列された複数の電子放出素子 1 OAを有 し、 各電子放出素子 1 OAからの電子放出によって蛍光体を発光させる光源 や画像表示を行うディスプレイに簡単に適用させることができる。  [0116] Since the electron-emitting device 1OA according to the first embodiment has the above-described characteristics, the electron-emitting device 1OA includes a plurality of electron-emitting devices 1OA arranged according to a plurality of pixels. Each electron-emitting device 1 can be easily applied to a light source that emits a phosphor by emitting electrons from OA and a display that displays an image.
[0117] 次に、 第 1の実施の形態に係る電子放出素子 1 OAを使用した構成された ディスプレイや光源 (以下、 ディスプレイ等 1 00と記す) について説明す る。 また、 以下の説明では、 ディスプレイの単位素子については 「画素」 と 記し、 光源の単位素子については 「発光素子」 と記す。  Next, a display and a light source (hereinafter referred to as a display 100 or the like) configured using the electron-emitting device 1 OA according to the first embodiment will be described. In the following description, the unit element of the display is referred to as “pixel”, and the unit element of the light source is referred to as “light emitting element”.
[0118] このディスプレイ等 1 00は、 図 22に示すように、 多数の電子放出素子  [0118] This display or the like 100 has a large number of electron-emitting devices as shown in FIG.
1 OAが画素に対応してマトリックス状あるいは千鳥状に配列された本実施 の形態に係る電子放出装置 (発光表示部) 1 02と、 該発光表示部 1 02を 駆動するための駆動回路 1 0 4とを有する。 この場合、 1画素 (発光素子) 当たり 1つの電子放出素子 1 O Aを割り当ててもよいし、 1画素 (発光素子 ) 当たり複数の電子放出素子 1 O Aを割り当てるようにしてもよい。 この実 施の形態では、 説明を簡単にするために、 1画素 (発光素子) 当たり 1つの 電子放出素子 1 O Aを割り当てた場合を想定して説明する。 1 OA is arranged in a matrix or staggered manner corresponding to pixels, and an electron emission device (light emission display unit) 102 according to the present embodiment and the light emission display unit 102 And a driving circuit 10 4 for driving. In this case, one electron-emitting device 1 OA may be assigned per pixel (light-emitting device), or a plurality of electron-emitting devices 1 OA may be assigned per pixel (light-emitting device). In this embodiment, in order to simplify the description, a case where one electron-emitting device 1 OA is assigned per pixel (light emitting device) will be described.
[0119] この駆動回路 1 0 4は、 発光表示部 1 0 2に対して行を選択するための複 数の行選択線 1 0 6が配線され、 同じく発光表示部 1 0 2に対してデータ信 号 S dを供給するための複数の信号線 1 0 8が配線されている。  [0119] This drive circuit 1 0 4 is provided with a plurality of row selection lines 1 0 6 for selecting a row for the light emitting display section 1 0 2 and data for the light emitting display section 1 0 2 as well. A plurality of signal lines 1 0 8 for supplying the signal S d are wired.
[0120] さらに、 この駆動回路 1 0 4は、 行選択線 1 0 6に選択的に選択信号 S s を供給して、 1行単位に電子放出素子 1 O Aを順次選択する行選択回路 1 1 0と、 信号線 1 0 8にパラレルにデータ信号 S dを出力して、 行選択回路 1 1 0にて選択された行 (選択行) にそれぞれデータ信号 S dを供給する信号 供給回路 1 1 2と、 入力される映像信号 S V及び同期信号 S cに基づいて行 選択回路 1 1 0及び信号供給回路 1 1 2を制御する信号制御回路 1 1 4とを 有する。  [0120] Further, the drive circuit 10 04 selectively supplies a selection signal S s to the row selection lines 1 0 6 to sequentially select the electron-emitting devices 1 OA in units of one row 1 1 0 and a signal supply circuit 1 1 which outputs a data signal S d in parallel to the signal line 1 0 8 and supplies the data signal S d to the row selected by the row selection circuit 1 1 0 (selected row). 2 and a signal control circuit 1 1 4 for controlling the row selection circuit 1 1 0 and the signal supply circuit 1 1 2 based on the input video signal SV and synchronization signal Sc.
[0121 ] 行選択回路 1 1 0及び信号供給回路 1 1 2には電源回路 1 1 6 (例えば 5 0 及び0 ) が接続され、 特に、 行選択回路 1 1 0と電源回路 1 1 6間の 負極ラインと G N D (グランド) 間にパルス電源 1 1 8が接続されている。 パルス電源 1 1 8は、 後述する電荷蓄積期間 T dに基準電圧 (例えば O V) 、 発光期間 T hに電圧 (例えば- 4 0 0 V) とされたパルス状の電圧波形を出 力する。  [0121] The row selection circuit 1 1 0 and the signal supply circuit 1 1 2 are connected to the power supply circuit 1 1 6 (for example, 5 0 and 0), in particular, between the row selection circuit 1 1 0 and the power supply circuit 1 1 6 A pulse power supply 1 1 8 is connected between the negative electrode line and GND (ground). The pulse power supply 1 1 8 outputs a pulsed voltage waveform having a reference voltage (for example, O V) in a charge accumulation period Td, which will be described later, and a voltage (for example, −400 V) in the light emission period Th.
[0122] 行選択回路 1 1 0は、 電荷蓄積期間 T dに、 選択行に対して選択信号 S s を出力し、 非選択行に対して非選択信号 S nを出力する。 また、 行選択回路 1 1 0は、 発光期間 T hに電源回路 1 1 6からの電源電圧 (例えば 5 0 V) とパルス電源 1 1 8からの電圧 (例えば- 4 0 0 V) が加わった一定電圧 (例 えば- 3 5 0 V) を出力する。  [0122] The row selection circuit 1 1 0 outputs the selection signal S s to the selected row and the non-selection signal Sn to the non-selected row during the charge accumulation period T d. In the row selection circuit 1 1 0, the power supply voltage from the power supply circuit 1 1 6 (for example, 5 0 V) and the voltage from the pulse power supply 1 1 8 (for example, −4 0 0 V) are added to the light emission period Th. Outputs a constant voltage (for example, -3 5 0 V).
[0123] 信号供給回路 1 1 2は、 パルス生成回路 1 2 0と振幅変調回路 1 2 2とを 有する。 パルス生成回路 1 2 0は、 電荷蓄積期間 T dにおいて、 一定のパル ス周期で一定の振幅 (例えば 5 0 V) を有するパルス信号 S pを生成、 出力 し、 発光期間 T hにおいて、 基準電圧 (例えば O V) を出力する。 The signal supply circuit 1 1 2 has a pulse generation circuit 1 2 0 and an amplitude modulation circuit 1 2 2. The pulse generation circuit 1 2 0 has a constant pulse during the charge accumulation period Td. A pulse signal Sp having a constant amplitude (for example, 50 V) is generated and output, and a reference voltage (for example, OV) is output during the light emission period Th.
[0124] 振幅変調回路 1 2 2は、 電荷蓄積期間 T dにおいて、 パルス生成回路 1 2 0からのパルス信号 S pをそれぞれ選択行に関する画素 (発光素子) の輝度 レベルに応じて振幅変調し、 それぞれ選択行に関する画素 (発光素子) のデ ータ信号 S dとして出力し、 発光期間 T hにおいて、 パルス生成回路 1 2 0 からの基準電圧をそのまま出力する。 これらのタイミング制御並びに選択さ れた複数の画素 (発光素子) の輝度レベルの振幅変調回路 1 2 2への供給は 、 信号制御回路 1 1 4を通じて行われる。  [0124] The amplitude modulation circuit 1 2 2 modulates the amplitude of the pulse signal Sp from the pulse generation circuit 1 2 0 according to the luminance level of the pixel (light emitting element) in the selected row during the charge accumulation period T d, Each is output as a data signal S d of a pixel (light emitting element) relating to the selected row, and the reference voltage from the pulse generation circuit 120 is output as it is during the light emission period Th. The timing control and the supply of the luminance level of a plurality of selected pixels (light emitting elements) to the amplitude modulation circuit 12 2 are performed through the signal control circuit 1 14.
[0125] 例えば図 2 3 A 図 2 3 Cにおいて 3つの例を示すように、 輝度レベルが 低い場合は、 パルス信号 S pの振幅を低レベル V s Iとし (図 2 3 A参照) 、 輝度レベルが中位の場合は、 パルス信号 S pの振幅を中レベル V s mとし (図 2 3 B参照) 、 輝度レベルが高い場合は、 パルス信号 S pの振幅を高レ ベル V s hとする (図 2 3 C参照) 。 この例では、 3つに分けた例を示した が、 ディスプレイ等 1 0 0に適用する場合には、 パルス信号 S pを、 画素 ( 発光素子) の輝度レベルに応じて、 例えば 1 2 8段階や 2 5 6段階に振幅変 調される。  [0125] For example, as shown in three examples in Fig. 2 3 A and Fig. 2 3 C, when the luminance level is low, the amplitude of the pulse signal Sp is set to the low level V s I (see Fig. 2 3 A) and the luminance When the level is medium, the amplitude of the pulse signal S p is set to the medium level V sm (see Fig. 23 B). When the luminance level is high, the amplitude of the pulse signal S p is set to the high level V sh ( (See Figure 2 3C). In this example, an example divided into three is shown, but when applied to a display or the like 1 0 0, the pulse signal S p is, for example, 1 2 8 steps depending on the luminance level of the pixel (light emitting element) The amplitude is modulated in steps of 2 and 5 6.
[0126] ここで、 信号供給回路 1 1 2の変形例について図 2 4 2 5 Cを参照しな がら説明する。  Here, a modified example of the signal supply circuit 1 1 2 will be described with reference to FIG. 2 4 25 C.
[0127] 変形例に係る信号供給回路 1 1 2 aは、 図 2 4に示すように、 パルス生成 回路 1 2 4とパルス幅変調回路 1 2 6とを有する。 パルス生成回路 1 2 4は 、 電荷蓄積期間 T dにおいて、 電子放出素子 1 O Aに印加される電圧波形 ( 図 2 5 A 図 2 5 Cにおいて実線で示す) において、 立ち上がり部分の波形 が連続的にレベルが変化するパルス信号 S p a (図 2 5 A 図 2 5 Cにおい て破線で示す) を生成、 出力し、 発光期間 T hにおいて、 基準電圧を出力す る。 そして、 パルス幅変調回路 1 2 6は、 電荷蓄積期間 T dにおいて、 パル ス生成回路 1 2 4からのパルス信号 S p aのパルス幅 W p (図 2 5 A 図 2 5 C参照) をそれぞれ選択行に関する画素 (発光素子) の輝度レベルに応じ て変調し、 それぞれ選択行に関する画素 (発光素子) のデータ信号 S dとし て出力する。 発光期間 T hにおいてはパルス生成回路 1 2 4からの基準電圧 をそのまま出力する。 この場合も、 これらのタイミング制御並びに選択され た複数の画素 (発光素子) の輝度レベルのパルス幅変調回路 1 2 6への供給 は、 信号制御回路 1 1 4を通じて行われる。 As shown in FIG. 24, the signal supply circuit 1 1 2 a according to the modification includes a pulse generation circuit 1 2 4 and a pulse width modulation circuit 1 2 6. In the pulse generation circuit 1 2 4, in the voltage waveform applied to the electron-emitting device 1 OA during the charge accumulation period T d (shown by the solid line in Fig. 25). Generates and outputs a pulse signal Spa whose level changes (indicated by a broken line in Fig. 25A and Fig. 25C), and outputs a reference voltage during the light emission period Th. The pulse width modulation circuit 1 2 6 selects the pulse width W p of the pulse signal Spa from the pulse generation circuit 1 2 4 (see FIG. 25 A and FIG. 25 C) during the charge accumulation period T d. According to the luminance level of the pixel (light emitting element) related to the row And output as a data signal S d of the pixel (light emitting element) for each selected row. During the light emission period Th, the reference voltage from the pulse generation circuit 1 2 4 is output as it is. Also in this case, the timing control and the supply of the luminance level of the selected pixels (light emitting elements) to the pulse width modulation circuit 1 26 are performed through the signal control circuit 1 14.
[0128] 例えば図 2 5 A 図 2 5 Cにおいて 3つの例を示すように、 輝度レベルが 低い場合は、 パルス信号 S p aのパルス幅 W pを短くして、 実質的な振幅を 低レベル V s Iとし (図 2 5 A参照) 、 輝度レベルが中位の場合は、 パルス 信号 S p aのパルス幅 W pを中位の長さにして、 実質的な振幅を中位レベル V s mとし (図 2 5 B参照) 、 輝度レベルが高い場合は、 パルス信号 S p a のパルス幅 W pを長くして、 実質的な振幅を高レベル V s hとする (図 2 5 C参照) 。 ここでは、 3つの例を示したが、 ディスプレイ等 1 0 0に適用す る場合には、 パルス信号 S p aを、 画素 (発光素子) の輝度レベルに応じて 、 例えば 1 2 8段階や 2 5 6段階にパルス幅変調される。  [0128] For example, as shown in three examples in Figure 25 A and Figure 25 C, when the brightness level is low, the pulse width W p of the pulse signal Spa is shortened, and the substantial amplitude is reduced to the low level V. s I (see Fig. 25 A). When the brightness level is medium, the pulse width W p of the pulse signal Spa is set to the medium length, and the substantial amplitude is set to the medium level V sm ( When the luminance level is high, increase the pulse width W p of the pulse signal Spa to make the actual amplitude high V sh (see Figure 25 C). Here, three examples are shown, but when applied to a display or the like 100 0, the pulse signal Spa is, for example, 1 2 8 steps or 2 5 according to the luminance level of the pixel (light emitting element). Pulse width modulated in 6 steps.
[0129] ここで、 上述した電子の蓄積に係る負電圧のレベルを変化させた場合の特 性図の変化を、 図 2 3 A 図 2 3 Cに示すパルス信号 S pに対する 3つの振 幅変調の例と、 図 2 5 A 図 2 5 Cに示すパルス信号 S p aに対する 3つの パルス幅変調の例との関連でみると、 図 2 3 A及び図 2 5 Aに示す負電圧の レベル V s Iでは、 図 2 6 Aに示すように、 電子放出素子 1 O Aに蓄積され る電子の量が少ない。 図 2 3 B及び図 2 5 Bに示す負電圧のレベル V s で は、 図 2 6 Bに示すように、 蓄積される電子の量が中位であり、 図 2 3 C及 び図 2 5 Cに示す負電圧のレベル V s hでは、 図 2 6 Cに示すように、 蓄積 される電子の量が多く、 ほぼ飽和状態となっている。  Here, the change in the characteristic diagram when the level of the negative voltage related to the above-described electron accumulation is changed is represented by three amplitude modulations for the pulse signal S p shown in FIGS. 2 3 A and 23 C. And the negative voltage level V s shown in Fig. 2 3 A and Fig. 25 A in relation to the three pulse width modulation examples for the pulse signal Spa shown in Fig. 2 5 A and Fig. 2 5 C. In I, as shown in FIG. 26 A, the amount of electrons stored in the electron-emitting device 1 OA is small. At the negative voltage level V s shown in Fig. 2 3 B and Fig. 2 5 B, as shown in Fig. 2 6 B, the amount of accumulated electrons is medium, and Fig. 2 3 C and Fig. 2 5 At the negative voltage level V sh shown in C, as shown in Fig. 26 C, the amount of accumulated electrons is large and almost saturated.
[0130] しかし、 これら図 2 6 A 2 6 Cに示すように、 電子の放出が開始される ポイント p 4の電圧レベルはほとんど同じになっている。 すなわち、 電子を 蓄積した後、 ポイント p 4に示す電圧レベルまで印加電圧が変化したとして も、 電子の蓄積量にほとんど変化はなく、 メモリ効果が発揮されることがわ かる。 [0131 ] また、 第 1の実施の形態に係る電子放出素子 1 O Aをディスプレイ等 1 0 0の画素 (発光素子) として利用する場合は、 図 2 7に示すように、 上部電 極 1 4の上方に、 例えばガラスやアクリル製の透明板 1 3 0が配置され、 該 透明板 1 3 0の裏面 (上部電極 1 4と対向する面) に例えば透明電極にて構 成されたコレクタ電極 1 3 2が配置され、 該コレクタ電極 1 3 2には蛍光体 1 3 4が塗布される。 なお、 コレクタ電極 1 3 2にはバイアス電圧源 1 3 6 (コレクタ電圧 V c ) が抵抗を介して接続される。 また、 電子放出素子 1 0 Aは、 当然のことながら、 真空空間内に配置される。 雰囲気中の真空度は、 1 02 1 0_6 P aが好ましく、 より好ましくは 1 0_3 1 0_5 P aである。 [0130] However, as shown in these Fig. 2 6 A 2 6 C, the voltage level at the point p 4 where electron emission starts is almost the same. That is, even after the electrons are accumulated, even if the applied voltage changes up to the voltage level shown at point p4, the amount of accumulated electrons is almost unchanged and the memory effect is exhibited. [0131] Further, when the electron-emitting device 1 OA according to the first embodiment is used as a pixel (light emitting device) of a display or the like 100, as shown in FIG. A transparent plate made of, for example, glass or acrylic is disposed above, and a collector electrode made of, for example, a transparent electrode on the back surface (the surface facing the upper electrode 14) of the transparent plate 1 30. 2 is arranged, and phosphor 1 3 4 is applied to the collector electrode 1 3 2. A bias voltage source 1 3 6 (collector voltage V c) is connected to the collector electrode 1 3 2 via a resistor. In addition, the electron-emitting device 10 A is naturally disposed in the vacuum space. The degree of vacuum in the atmosphere is preferably 1 0 2 1 0 — 6 Pa , more preferably 1 0 — 3 1 0 — 5 Pa .
[0132] このような範囲を選んだ理由は、 低真空では、 (1 ) 空間内に気体分子が 多いため、 プラズマを生成し易く、 プラズマが多量に発生され過ぎると、 そ の正イオンが多量に上部電極 1 4に衝突して損傷を進めるおそれや、 (2 ) 放出電子がコレクタ電極 1 3 2に到達する前に気体分子に衝突してしまい、 コレクタ電圧 V cで十分に加速した電子による蛍光体 1 3 4の励起が十分に 行われなくなるおそれがあるからである。  [0132] The reason for choosing such a range is that, in low vacuum, (1) because there are many gas molecules in the space, it is easy to generate plasma, and if too much plasma is generated, there will be a lot of positive ions. (2) The emitted electrons collide with gas molecules before they reach the collector electrode 1 3 2 and are sufficiently accelerated by the collector voltage V c This is because the phosphor 1 3 4 may not be sufficiently excited.
[0133] 一方、 高真空では、 電界が集中するポイントから電子を放出し易いものの 、 構造体の支持、 及び真空のシール部が大きくなリ、 小型化に不利になると いう問題があるからである。  [0133] On the other hand, in a high vacuum, electrons are likely to be emitted from the point where the electric field concentrates, but there is a problem that the structure support and the vacuum seal part are large, which is disadvantageous for miniaturization. .
[0134] 図 2 7の例では、 透明板 1 3 0の裏面にコレクタ電極 1 3 2を形成し、 該 コレクタ電極 1 3 2の表面 (上部電極 1 4と対向する面) に蛍光体 1 3 4を 形成するようにしたが、 その他、 図 2 8に示すように、 透明板 1 3 0の裏面 に蛍光体 1 3 4を形成し、 該蛍光体 1 3 4を覆うようにコレクタ電極 1 3 2 を形成するようにしてもよい。  In the example of FIG. 27, the collector electrode 1 3 2 is formed on the back surface of the transparent plate 1 3 0, and the phosphor 1 3 is formed on the surface of the collector electrode 1 3 2 (surface facing the upper electrode 1 4). In addition, as shown in FIG. 28, the phosphor 1 3 4 is formed on the back surface of the transparent plate 1 30 and the collector electrode 1 3 is covered so as to cover the phosphor 1 3 4 2 may be formed.
[0135] これは、 C R T等で用いられる構成であって、 コレクタ電極 1 3 2がメタ ルバックとして機能する。 ェミッタ部 1 2から放出された電子はコレクタ電 極 1 3 2を貫通して蛍光体 1 3 4に進入し、 該蛍光体 1 3 4を励起する。 従 つて、 コレクタ電極 1 3 2は電子が貫通できる程度の厚さであり、 1 0 0 η m以下が好ましい。 電子の運動エネルギーが大きいほど、 コレクタ電極 1 3 2の厚みを厚くすることができる。 This is a configuration used in a CRT or the like, and the collector electrode 1 3 2 functions as a metal back. The electrons emitted from the emitter section 1 2 penetrate the collector electrode 1 3 2 and enter the phosphor 1 3 4 to excite the phosphor 1 3 4. Accordingly, the collector electrode 1 3 2 is thick enough to allow electrons to pass through, and is preferably 100 η m or less. The greater the kinetic energy of the electron, the greater the collector electrode 1 3 The thickness of 2 can be increased.
[0136] このような構成とすることで以下の効果を奏することができる。 [0136] With such a configuration, the following effects can be obtained.
[0137] (a) 蛍光体 1 34が導電性でない場合、 蛍光体 1 34の帯電 (負) を防ぎ 、 電子の加速電界を維持することができる。  (A) When the phosphor 1 34 is not conductive, charging (negative) of the phosphor 1 34 can be prevented and the acceleration electric field of electrons can be maintained.
[0138] (b) コレクタ電極 1 32が蛍光体 1 34の発光を反射して、 蛍光体 1 34 の発光を効率よく透明板 1 30側 (発光面側) に放出することができる。  (B) The collector electrode 1 32 reflects the light emitted from the phosphor 1 34, and the light emitted from the phosphor 1 34 can be efficiently emitted to the transparent plate 1 30 side (light emitting surface side).
[0139] (c) 蛍光体 1 34への過度な電子の衝突を防ぐことができ、 蛍光体 1 34 の劣化や蛍光体 1 34からのガス発生を防止することができる。  (C) Excessive collision of electrons with the phosphor 1 34 can be prevented, and deterioration of the phosphor 1 34 and gas generation from the phosphor 1 34 can be prevented.
[0140] 次に、 この第 1の実施の形態に係る電子放出素子 1 OAについての 4つの 実験例 (第 1 第 4の実験例) を示す。  Next, four experimental examples (first and fourth experimental examples) for the electron-emitting device 1 OA according to the first embodiment are shown.
[0141] 第 1の実験例は、 電子放出素子 1 0 Aの電子の放出状態をみたものである 。 すなわち、 図 29 Aに示すように、 電子放出素子 1 OAに対して- 7 OVの 電圧を有する書込みパルス Pwを印加して、 電子放出素子 1 OAに電子を蓄 積させ、 その後、 28 OVの電圧を有する点灯パルス P hを印加して電子を 放出させた。 電子の放出状態は、 蛍光体 1 34の発光を受光素子 (フォトダ ィオード) にて検出して測定した。 検出波形を図 29 Bに示す。 なお、 書込 みパルス Pwと点灯パルス P hのデューティ比は 50%とした。  [0141] In the first experimental example, the electron emission state of the electron-emitting device 10A is observed. That is, as shown in FIG. 29A, a write pulse Pw having a voltage of −7 OV is applied to the electron-emitting device 1 OA to accumulate electrons in the electron-emitting device 1 OA, and then 28 OV A lighting pulse P h having a voltage was applied to emit electrons. The electron emission state was measured by detecting the light emission of phosphor 1 34 with a light receiving element (photodiode). The detected waveform is shown in Fig. 29B. The duty ratio of the write pulse Pw and the lighting pulse Ph was 50%.
[0142] この第 1の実験例から、 点灯パルス P hの立ち上がり途中から発光が開始 され、 該点灯パルス P hの初期段階で発光が終了していることがわかる。 従 つて、 点灯パルス P hの期間をより短くしても発光には影響はないものと考 えられる。 これは、 高電圧の印加期間の短縮化につながり、 消費電力の低減 化を図る上で有利になる。  [0142] From this first experimental example, it can be seen that light emission started in the middle of the rise of the lighting pulse Ph, and light emission ended at the initial stage of the lighting pulse Ph. Therefore, even if the duration of the lighting pulse Ph is shortened, it is considered that there is no effect on light emission. This leads to a shortening of the high voltage application period, which is advantageous in reducing power consumption.
[0143] 第 2の実験例は、 電子放出素子 1 OAの電子の放出量が、 図 30に示す書 込みパルス Pwの振幅によってどのように変化するかをみたものである。 電 子の放出量の変化は第 1の実験例と同様に、 蛍光体 1 34の発光を受光素子 (フォトダイオード) にて検出して測定した。 実験結果を図 3 1に示す。  [0143] The second experimental example shows how the amount of electrons emitted from the electron-emitting device 1 OA varies depending on the amplitude of the write pulse Pw shown in FIG. The change in the amount of emitted electrons was measured by detecting the light emission of the phosphor 134 with a light receiving element (photodiode), as in the first experimental example. The experimental results are shown in Fig. 31.
[0144] 図 3 1において、 実線 Aは、 点灯パルス P hの振幅を 200 Vとし、 書込 みパルス Pwの振幅を- 1 OVから- 8 OVに変化させた場合の特性を示し、 実線 Bは、 点灯パルス P hの振幅を 3 5 O Vとし、 書込みパルス P wの振幅 を- 1 O Vから- 8 O Vに変化させた場合の特性を示す。 [0144] In Figure 3 1, the solid line A shows the characteristics when the amplitude of the lighting pulse P h is 200 V and the amplitude of the write pulse Pw is changed from -1 OV to -8 OV. The solid line B shows the characteristics when the amplitude of the lighting pulse Ph is 35 OV and the amplitude of the write pulse Pw is changed from -1 OV to -8 OV.
[0145] この図 3 1に示すように、 書込みパルス P wを- 2 0 Vから- 4 0 Vに変化 させた場合、 発光輝度は、 ほとんど直線的に変化していることがわかる。 特 に、 点灯パルス P hの振幅が 3 5 0 Vの場合と 2 0 O Vの場合とで比較する と、 3 5 O Vの場合が書込みパルス P wに対する発光輝度変化のダイナミツ クレンジが広くなつておリ、 画像表示における輝度向上、 コントラストの向 上を図る上で有利であることがわかる。 この傾向は、 点灯パルス P hの振幅 設定に対して発光輝度が飽和するまでの範囲において、 点灯パルス P hの振 幅を上げるほど有利になると思われるが、 信号伝送系の耐圧や消費電力との 関係で、 最適な値に設定することが好ましい。  As shown in FIG. 31, when the write pulse P w is changed from −20 V to −40 V, it can be seen that the emission luminance changes almost linearly. In particular, when the amplitude of the lighting pulse Ph is 3550 V and 20 OV, the dynamic range of the emission luminance change with respect to the write pulse Pw is broad in the case of 35 OV. It can be seen that this is advantageous in improving brightness and improving contrast in image display. This tendency seems to be more advantageous as the amplitude of the lighting pulse Ph is increased in the range until the emission luminance is saturated with respect to the amplitude setting of the lighting pulse Ph. Therefore, it is preferable to set the optimal value.
[0146] 第 3の実験例は、 電子放出素子 1 O Aの電子の放出量が、 図 3 0に示す点 灯パルス P hの振幅によってどのように変化するかをみたものである。 電子 の放出量の変化は第 1の実験例と同様に、 蛍光体 1 3 4の発光を受光素子 ( フォトダイオード) にて検出して測定した。 実験結果を図 3 2に示す。  [0146] The third experimental example shows how the amount of electrons emitted from the electron-emitting device 1OA changes with the amplitude of the lighting pulse Ph shown in Fig. 30. The change in the amount of emitted electrons was measured by detecting the light emission of phosphor 1 34 with a light receiving element (photodiode), as in the first experimental example. The experimental results are shown in Figure 32.
[0147] 図 3 2において、 実線 Cは、 書込みパルス P wの振幅を- 4 O Vとし、 点灯 パルス P hの振幅を 5 O Vから 4 0 O Vに変化させた場合の特性を示し、 実 線 Dは、 書込みパルス P wの振幅を- 7 O Vとし、 点灯パルス P hの振幅を 5 0 Vから 4 0 0 Vに変化させた場合の特性を示す。  [0147] In Figure 3 2, the solid line C shows the characteristics when the amplitude of the write pulse P w is set to -4 OV and the amplitude of the lighting pulse P h is changed from 5 OV to 40 OV. Shows the characteristics when the amplitude of the write pulse P w is −7 OV and the amplitude of the lighting pulse P h is changed from 50 V to 400 V.
[0148] この図 3 2に示すように、 点灯パルス P hを 1 0 0 Vから 3 0 0 Vに変化 させた場合、 発光輝度は、 ほとんど直線的に変化していることがわかる。 特 に、 書込みパルス P wの振幅が- 4 O Vの場合と- 7 O Vの場合とで比較する と、 - 7 0 Vの場合が点灯/《ルス P hに対する発光輝度変化のダイナミックレ ンジが広くなつておリ、 画像表示における輝度向上、 コントラストの向上を 図る上で有利であることがわかる。 この傾向は、 書込みパルス P wの振幅設 定に対して発光輝度が飽和するまでの範囲において、 書込みパルス P wの振 幅 (この場合、 絶対値) を上げるほど有利になると思われるが、 この場合も 、 信号伝送系の耐圧や消費電力との関係で、 最適な値に設定することが好ま しい。 [0148] As shown in Fig. 32, it can be seen that when the lighting pulse Ph is changed from 10 0 V to 3 0 0 V, the emission luminance changes almost linearly. In particular, when the amplitude of the write pulse P w is -4 OV and -7 OV, it is lit when -70 V, and the dynamic range of the emission luminance change with respect to Luth P h is wide. Therefore, it can be seen that it is advantageous for improving the brightness and contrast of the image display. This tendency seems to be more advantageous as the amplitude (in this case, absolute value) of the write pulse P w is increased in the range until the emission luminance is saturated with respect to the amplitude setting of the write pulse P w. Even in this case, it is preferable to set the optimum value in relation to the withstand voltage and power consumption of the signal transmission system. That's right.
[0149] 第 4の実験例は、 電子放出素子 1 OAの電子の放出量が、 図 27又は図 2 8に示すコレクタ電圧 V cのレベルによってどのように変化するかをみたも のである。 電子の放出量の変化は第 1の実験例と同様に、 蛍光体 1 34の発 光を受光素子 (フォトダイオード) にて検出して測定した。 実験結果を図 3 3に示す。  [0149] The fourth experimental example shows how the amount of electrons emitted from the electron-emitting device 1 OA varies depending on the level of the collector voltage Vc shown in Fig. 27 or Fig. 28. The change in the amount of emitted electrons was measured by detecting the emission of phosphor 1 34 with a light receiving element (photodiode), as in the first experimental example. The experimental results are shown in Figure 33.
[0150] 図 33において、 実線 Eは、 コレクタ電圧 V cのレベルを 3 kVとし、 点 灯パルス P hの振幅を 8 OVから 50 OVに変化させた場合の特性を示し、 実線「は、 コレクタ電圧 V cのレベルを 7 kVとし、 点灯パルス P hの振幅 を 8 OVから 50 OVに変化させた場合の特性を示す。  [0150] In Fig. 33, the solid line E shows the characteristics when the level of the collector voltage V c is 3 kV and the amplitude of the lighting pulse Ph is changed from 8 OV to 50 OV. The solid line “ The characteristics when the level of the voltage V c is 7 kV and the amplitude of the lighting pulse Ph is changed from 8 OV to 50 OV are shown.
[0151] この図 33に示すように、 コレクタ電圧 Vcを 7 kVとした方が、 3 kV の場合よリも、 点灯パルス P hに対する発光輝度変化のダイナミックレンジ が広くなつておリ、 画像表示における輝度向上、 コントラストの向上を図る 上で有利であることがわかる。 この傾向は、 コレクタ電圧 V cのレベルを上 げるほど有利になると思われるが、 この場合も、 信号伝送系の耐圧や消費電 力との関係で、 最適な値に設定することが好ましい。  [0151] As shown in Fig. 33, when the collector voltage Vc is set to 7 kV, the dynamic range of the light emission luminance change with respect to the lighting pulse Ph is wider than when 3 kV is used. It can be seen that it is advantageous in improving brightness and contrast in This tendency seems to be more advantageous as the level of the collector voltage V c increases, but in this case as well, it is preferable to set the optimum value in relation to the withstand voltage and power consumption of the signal transmission system.
[0152] ここで、 上述したディスプレイ等 1 00の 1つの駆動方法について図 34 及び図 35を参照しながら説明する。 図 34は、 代表的に 1行 1列、 2行 1 列及び n行 1列の画素 (発光素子) の動作を示す。 なお、 ここで使用する電 子放出素子 1 OAは、 図 1 9のポイント p 2における抗電圧 V 1が例えば- 2 OV、 ポイント p 5における抗電圧 V 2が +7 OV、 ポイント p 3における 電圧 V 3が- 50 V、 ポイント p 4における電圧 V 4が +5 OVの特性を有す る。  Here, one driving method of the above-described display 100 will be described with reference to FIGS. 34 and 35. FIG. FIG. 34 typically shows the operation of a pixel (light emitting element) in one row and one column, two rows and one column, and n rows and one column. The electron-emitting device 1 OA used here has a coercive voltage V 1 at point p 2 in FIG. 19 of −2 OV, for example, coercive voltage V 2 at point p 5 is +7 OV, and voltage at point p 3 V 3 has a characteristic of -50 V and voltage V 4 at point p 4 has a characteristic of +5 OV.
[0153] また、 図 34に示すように、 1枚の画像の表示期間を 1フレームとしたと き、 該 1フレーム内に 1つの電荷蓄積期間 T dと 1つの発光期間 T hが含ま れており、 1つの電荷蓄積期間 Tdには、 n個の選択期間 T sが含まれる。 各選択期間 T sはそれぞれ対応する行の選択期間 T sとなるため、 対応しな い n-1個の行については非選択期間 T nとなる。 [0154] そして、 この駆動方法は、 電荷蓄積期間 T dに、 全ての電子放出素子 1 0Furthermore, as shown in FIG. 34, when the display period of one image is one frame, one charge accumulation period Td and one light emission period Th are included in the one frame. In addition, one charge accumulation period Td includes n selection periods T s. Since each selection period T s becomes the selection period T s of the corresponding row, n−1 rows that do not correspond become the non-selection period T n. [0154] Then, in this driving method, all the electron-emitting devices 1 0 in the charge accumulation period T d
Aを走査して、 O N対象 (発光対象) の画素 (発光素子) に対応した複数の 電子放出素子 1 O Aにそれぞれ対応する画素 (発光素子) の輝度レベルに応 じた電圧を印加することにより、 O N対象の画素 (発光素子) に対応した複 数の電子放出素子 1 O Aにそれぞれ対応する画素 (発光素子) の輝度レベル に応じた量の電荷 (電子) を蓄積させ、 次の発光期間 T hに、 全ての電子放 出素子 1 O Aに一定の電圧を印加して、 O N対象の画素 (発光素子) に対応 した複数の電子放出素子 1 O Aからそれぞれ対応する画素 (発光素子) の輝 度レベルに応じた量の電子を放出させて、 O N対象の画素 (発光素子) を発 光させるというものである。 By scanning A and applying a voltage corresponding to the brightness level of each pixel (light-emitting element) corresponding to each of the plurality of electron-emitting elements 1 OA corresponding to the pixel (light-emitting element) to be turned ON (light-emitting target) A plurality of electron-emitting devices corresponding to the ON target pixel (light-emitting device) 1 Charges (electrons) corresponding to the luminance level of the pixel (light-emitting device) corresponding to each OA are accumulated, and the next light emission period T Apply a constant voltage to all electron-emitting devices 1 OA in h, and the brightness of each pixel (light-emitting device) corresponding to each of the plurality of electron-emitting devices 1 OA corresponding to the ON target pixel (light-emitting device) The amount of electrons is emitted according to the level, and the pixel (light emitting element) to be turned on emits light.
[0155] 具体的に説明すると、 図 3 5にも示すように、 先ず、 1行目の選択期間 T sにおいては、 1行目の行選択線 1 0 6に例えば 5 0 Vの選択信号 S sが供 給され、 その他の行の行選択線 1 0 6に例ぇば0 の非選択信号5 が供給 される。 1列目の画素 (発光素子) のうち、 O N (発光) とすべき画素 (発 光素子) の信号線 1 0 8に供給されるデータ信号 S dの電圧は、 O V以上、 3 O V以下の範囲であって、 かつ、 それぞれ対応する画素 (発光素子) の輝 度レベルに応じた電圧となる。 輝度レベル最大であれば O Vとなる。 このデ ータ信号 S dの輝度レベルに応じた変調は、 図 2 2に示す振幅変調回路 1 2 2や図 2 4に示すパルス幅変調回路 1 2 6を通じて行われる。  More specifically, as shown in FIG. 35, first, in the selection period T s of the first row, a selection signal S of, for example, 50 V is applied to the row selection line 1 0 6 of the first row. For example, a non-selection signal 5 of 0 is supplied to the row selection lines 1 0 6 of the other rows. Among the pixels (light emitting elements) in the first column, the voltage of the data signal S d supplied to the signal line 10 8 of the pixel (light emitting element) to be turned on (light emitting element) is OV or more and 3 OV or less. The voltage is in the range and according to the luminance level of the corresponding pixel (light emitting element). OV when the brightness level is maximum. The modulation according to the luminance level of the data signal Sd is performed through the amplitude modulation circuit 12 2 shown in FIG. 22 and the pulse width modulation circuit 1 26 shown in FIG.
[0156] これにより、 1行目の O Nとすべき各画素 (発光素子) にそれぞれ対応す る電子放出素子 1 O Aの上部電極 1 4と下部電極 1 6間にはそれぞれ輝度レ ベルに応じて- 5 O V以上、 - 2 O V以下の電圧が印加される。 その結果、 上 述した各電子放出素子 1 O Aには、 印加された電圧に応じた電子が蓄積され ることになる。 例えば 1行 1列目の画素 (発光素子) に対応する電子放出素 子は、 例えば最大輝度レベルであることから、 図 1 9の特性のポイント p 3 の状態となり、 ェミッタ部 1 2のうち、 上部電極 1 4の貫通部 2 0から露出 する部分に最大量の電子が蓄積されることになる。  [0156] Thus, the electron emitter 1 corresponding to each pixel (light emitting element) to be turned ON in the first row 1 OA has a space between the upper electrode 14 and the lower electrode 16 according to the luminance level. -A voltage of 5 OV or more and-2 OV or less is applied. As a result, each electron-emitting device 1 OA described above accumulates electrons according to the applied voltage. For example, the electron emission element corresponding to the pixel (light emitting element) in the first row and the first column is, for example, at the maximum luminance level, and thus is in the state of the point p 3 in the characteristic of FIG. The maximum amount of electrons is accumulated in the portion exposed from the through portion 20 of the upper electrode 14.
[0157] なお、 O F F (消光) を示す画素 (発光素子) に対応する電子放出素子 1 OAに供給されるデータ信号 S dの電圧は、 例えば 50 Vであり、 これによ リ、 OF F対象の画素 (発光素子) に対応する電子放出素子 1 0 には0 が印加され、 これは、 図 1 9の特性のポイント p 1の状態となり、 電子の蓄 積は行われない。 [0157] An electron-emitting device 1 corresponding to a pixel (light-emitting device) indicating OFF (quenching) 1 The voltage of the data signal S d supplied to the OA is, for example, 50 V. As a result, 0 is applied to the electron-emitting device 10 corresponding to the OFF target pixel (light-emitting device). The state of the characteristic point p 1 in Fig. 19 is entered, and no electrons are accumulated.
[0158] 1行目へのデータ信号 S dの供給が終了した後、 2行目の選択期間 T sに おいては、 2行目の行選択線 1 06に 5 OVの選択信号 S sが供給され、 そ の他の行の行選択線 1 06に 0 Vの非選択信号 S nが供給される。 この場合 も、 ON (発光) とすべき画素 (発光素子) に対応する電子放出素子 1 OA の上部電極 1 4と下部電極 1 6間にはそれぞれ輝度レベルに応じて- 5 OV以 上、 -2 OV以下の電圧が印加される。 このとき、 非選択状態にある例えば 1 行目の画素 (発光素子) に対応する電子放出素子 1 OAの上部電極 1 4と下 部電極 1 6間には OV以上、 5 OV以下の電圧が印加されるが、 この電圧は 、 図 1 9の特性のポイント 4に達しないレベルの電圧であることから、 1行 目のうち、 ON (発光) とすべき画素 (発光素子) に対応する電子放出素子 1 OAから電子が放出されるということはない。 つまり、 非選択状態の 1行 目の画素 (発光素子) が、 選択状態の 2行目の画素 (発光素子) に供給され るデータ信号 S dの影響を受けるということがない。  [0158] After the supply of the data signal Sd to the first row is completed, the selection signal Ss of 5 OV is applied to the row selection line 106 of the second row in the selection period Ts of the second row. Then, the non-selection signal Sn of 0 V is supplied to the row selection line 106 of the other row. In this case as well, between the upper electrode 14 and the lower electrode 16 of the electron-emitting device 1 OA corresponding to the pixel (light-emitting device) that should be turned on (light-emitting) is -5 OV or more depending on the luminance level. A voltage of 2 OV or less is applied. At this time, a voltage of OV or more and 5 OV or less is applied between the upper electrode 14 and the lower electrode 16 of the electron emission device 1 OA corresponding to the pixel (light emitting device) in the non-selected state, for example, the first row. However, since this voltage is a voltage that does not reach point 4 in the characteristics of Fig. 19, the electron emission corresponding to the pixel (light emitting element) that should be turned ON (light emitting) in the first row Element 1 Electrons are not emitted from the OA. That is, the pixel (light emitting element) in the first row in the non-selected state is not affected by the data signal S d supplied to the pixel (light emitting element) in the second row in the selected state.
[0159] 以下同様に、 n行目の選択期間 T sにおいては、 n行目の行選択線 1 06 に 50 Vの選択信号 S sが供給され、 その他の行の行選択線 1 06に 0 Vの 非選択信号 S nが供給される。 この場合も、 ON (発光) とすべき画素 (発 光素子) に対応する電子放出素子 1 OAの上部電極 1 4と下部電極 1 6間に はそれぞれ輝度レベルに応じて- 5 OV以上、 -2 OV以下の電圧が印加され る。 このとき、 非選択状態にある 1行 (n-1 ) 行の各画素 (発光素子) に 対応する電子放出素子 1 OAの上部電極 1 4と下部電極 1 6間には OV以上 、 5 OV以下の電圧が印加されるが、 これら非選択状態の各画素 (発光素子 ) のうち、 ON (発光) とすべき画素 (発光素子) に対応する電子放出素子 1 OAから電子が放出されるということはない。  [0159] Similarly, in the selection period T s of the n-th row, the 50 V selection signal S s is supplied to the row selection line 106 of the n-th row, and 0 is supplied to the row selection line 106 of the other rows. V non-selection signal Sn is supplied. Also in this case, the electron emission element 1 corresponding to the pixel (light emitting element) to be turned ON (light emitting element) 1 -5 OV or more between the upper electrode 14 and the lower electrode 16 of the OA, depending on the luminance level. A voltage of 2 OV or less is applied. At this time, the electron-emitting device 1 corresponding to each pixel (light-emitting device) in one row (n-1) in the non-selected state 1 OV is between OV and 5 OV between the upper electrode 14 and the lower electrode 16 of the OA Electrons are emitted from the electron-emitting device 1 OA corresponding to the pixel (light-emitting device) that should be turned on (light-emitting device) among these non-selected pixels (light-emitting devices). There is no.
[0160] n行目の選択期間 T sが経過した段階で、 発光期間 T hに入る。 この発光 期間 T hでは、 全電子放出素子 1 OAの上部電極 1 4には、 信号供給回路 1 1 2を通じて基準電圧 (例えば OV) が印加され、 全電子放出素子 1 OAの 下部電極 1 6には、 -350 Vの電圧 (パルス電源 1 1 8の- 400 V+行選 択回路 1 1 0の電源電圧 50 V) が印加される。 これにより、 全電子放出素 子 1 OAの上部電極 1 4と下部電極 1 6間に高電圧 (+350V) が印加さ れる。 全電子放出素子 1 OAは、 それぞれ図 1 9の特性のポイント p 6の状 態となリ、 図 21 Cに示すように、 ェミッタ部 1 2のうち、 前記電子の蓄積 されていた部分から、 貫通部 20を通じて電子が放出される。 もちろん、 上 部電極 1 4の外周部近傍からも電子が放出される。 [0160] When the selection period T s of the n-th row has elapsed, the light emission period T h is entered. This light emission In the period T h, a reference voltage (for example, OV) is applied to the upper electrode 14 of the all electron-emitting device 1 OA through the signal supply circuit 1 1 2, and the lower electrode 16 of the all-electron emitting device 1 OA is -350 V voltage (pulse power supply 1 1 8-400 V + row selection circuit 1 1 0 power supply voltage 50 V) is applied. As a result, a high voltage (+350 V) is applied between the upper electrode 14 and the lower electrode 16 of the all-electron emission element 1 OA. All the electron-emitting devices 1 OA are in the state of the point p 6 in the characteristic of FIG. 19 respectively, and as shown in FIG. 21C, from the part where the electrons are accumulated in the emitter section 12, Electrons are emitted through the penetration 20. Of course, electrons are also emitted from the vicinity of the outer periphery of the upper electrode 14.
[0161] つまり、 ON (発光) とすべき画素 (発光素子) に対応する電子放出素子 [0161] That is, an electron-emitting device corresponding to a pixel (light-emitting device) to be turned on (light-emitting device)
1 OAから電子が放出され、 放出された電子は、 これら電子放出素子 1 OA に対応するコレクタ電極 1 32に導かれて、 対応する蛍光体 1 34を励起し 、 発光する。 これによつて、 透明板 1 30の表面から画像が表示されること になる。  Electrons are emitted from 1 OA, and the emitted electrons are guided to the collector electrode 1 32 corresponding to these electron-emitting devices 1 OA to excite the corresponding phosphor 1 34 and emit light. As a result, an image is displayed from the surface of the transparent plate 130.
[0162] 以後同様に、 フレーム単位に、 電荷蓄積期間 Tdにおいて、 ON (発光) とすべき画素 (発光素子) に対応する電子放出素子 1 OAに電子を蓄積し、 発光期間 T hにおいて、 蓄積されていた電子を放出して蛍光発光させること で、 透明板 1 30の表面から動画像あるいは静止画像が表示されることにな る。  [0162] Similarly, for each frame, in the charge accumulation period Td, electrons are accumulated in the electron emitter 1 OA corresponding to the pixel (light emitting element) to be turned on (light emitting element), and accumulated in the light emitting period Th. By emitting the emitted electrons and causing them to emit fluorescent light, a moving image or a still image is displayed from the surface of the transparent plate 130.
[0163] このように、 第 1の実施の形態に係る電子放出素子においては、 複数の画 素 (発光素子) に応じて配列された複数の電子放出素子 1 OAを有し、 各電 子放出素子 1 OAからの電子放出によって画像表示を行うディスプレイ等 1 00に適用させることが容易になる。  Thus, the electron-emitting device according to the first embodiment has a plurality of electron-emitting devices 1 OA arranged in accordance with a plurality of pixels (light-emitting devices), and each electron-emitting device Element 1 It becomes easy to apply to a display or the like that displays an image by emitting electrons from OA.
[0164] 例えば、 上述したように、 1フレーム内の電荷蓄積期間 Tdに、 全ての電 子放出素子を走査して、 ON対象の画素 (発光素子) に対応した複数の電子 放出素子 1 OAにそれぞれ対応する画素 (発光素子) の輝度レベルに応じた 電圧を印加することにより、 ON対象の画素 (発光素子) に対応した複数の 電子放出素子 1 OAにそれぞれ対応する画素 (発光素子) の輝度レベルに応 じた量の電荷を蓄積させ、 次の発光期間 T hに、 全ての電子放出素子 1 O A に一定の電圧を印加して、 O N対象の画素 (発光素子) に対応した複数の電 子放出素子 1 O Aからそれぞれ対応する画素 (発光素子) の輝度レベルに応 じた量の電子を放出させて、 O N対象の画素 (発光素子) を発光させること が可能となる。 [0164] For example, as described above, during the charge accumulation period Td in one frame, all the electron-emitting devices are scanned, and a plurality of electron-emitting devices 1 OA corresponding to the ON target pixels (light-emitting devices) are obtained. By applying a voltage according to the luminance level of the corresponding pixel (light emitting element), the brightness of the pixel (light emitting element) corresponding to each of the plurality of electron emitting elements 1 OA corresponding to the pixel (light emitting element) to be turned on Depending on the level A plurality of electron emission elements corresponding to the ON target pixel (light emission element) by applying a constant voltage to all the electron emission elements 1 OA in the next light emission period Th. 1 The amount of electrons corresponding to the brightness level of the corresponding pixel (light emitting element) can be emitted from each OA, and the pixel (light emitting element) to be turned on can emit light.
[0165] また、 この第 1の実施の形態においては、 例えば電子が蓄積飽和状態とな る電圧 V 3と、 電子の放出が開始される電圧 V 4との関係が、 1≤ | V 4 | Z | V 3 | ≤ 1 . 5である。  [0165] In the first embodiment, for example, the relationship between the voltage V 3 at which electrons are accumulated and saturated and the voltage V 4 at which the emission of electrons starts is 1≤ | V 4 | Z | V 3 | ≤ 1.5.
[0166] 通常、 例えば、 電子放出素子 1 O Aをマトリックス状に配列して、 水平走 査期間に同期させて 1行単位に電子放出素子 1 O Aを選択し、 選択状態にあ る電子放出素子 1 O Aに対してそれぞれ画素 (発光素子) の輝度レベルに応 じたデータ信号 S dを供給するとき、 非選択状態の画素 (発光素子) にも、 データ信号 S dが供給されることになる。  [0166] Normally, for example, the electron-emitting devices 1 OA are arranged in a matrix, the electron-emitting devices 1 OA are selected in units of one row in synchronization with the horizontal scanning period, and the electron-emitting devices 1 in the selected state are selected. When the data signal S d corresponding to the luminance level of each pixel (light emitting element) is supplied to OA, the data signal S d is also supplied to the non-selected pixel (light emitting element).
[0167] 非選択状態の電子放出素子 1 0 Aがデータ信号 S dの影響を受けて例えば 電子放出してしまうと、 表示画像の画質の劣化ゃコントラス卜の低下を招く という問題がある。  [0167] When the electron-emitting device 10 A in the non-selected state emits, for example, electrons due to the influence of the data signal Sd, there is a problem in that the degradation of the image quality of the display image causes a decrease in contrast.
[0168] しかし、 この第 1の実施の形態では、 上述した特性を有するため、 選択状 態の電子放出素子 1 O Aに供給されるデータ信号 S dの電圧レベルを、 基準 電圧から電圧 V 3までの任意の電圧とし、 非選択状態の電子放出素子 1 O A に対して、 例えばデータ信号 S dの逆極性の信号が供給されるように設定す るという簡単な電圧関係にしても、 非選択状態の画素 (発光素子) が、 選択 状態の画素 (発光素子) へのデータ信号 S dによって影響を受けることがな い。 すなわち、 各画素 (発光素子) の選択期間 T sにおいて蓄積された各画 素 (発光素子) の電子蓄積量 (各電子放出素子 1 O Aにおけるェミッタ部 1 2の帯電量) が、 次の発光期間 T hにおいて電子放出が行われるまで維持さ れることになリ、 その結果、 各画素 (発光素子) でのメモリ効果を実現でき 、 高輝度、 高コントラスト化を図ることができる。  However, since the first embodiment has the characteristics described above, the voltage level of the data signal S d supplied to the selected electron-emitting device 1 OA is changed from the reference voltage to the voltage V 3. Even if the voltage relationship is set so that, for example, a signal having a polarity opposite to that of the data signal Sd is supplied to the non-selected electron-emitting device 1 OA, the non-selected state This pixel (light emitting element) is not affected by the data signal S d to the pixel (light emitting element) in the selected state. That is, the amount of electrons accumulated in each pixel (light emitting element) accumulated in the selection period T s of each pixel (light emitting element) (the amount of charge of the emitter section 1 2 in each electron emitting element 1 OA) is the next light emitting period. As a result, the memory effect in each pixel (light emitting element) can be realized, and high luminance and high contrast can be achieved.
[0169] 一方、 このディスプレイ等 1 0 0においては、 電荷蓄積期間 T dに、 全て の電子放出素子 1 OAに必要な電荷を蓄積し、 その後の発光期間 T hに、 全 ての電子放出素子 1 OAに対して電子放出に必要な電圧を印加して、 ON対 象の画素 (発光素子) に対応した複数の電子放出素子 1 OAから電子を放出 させて、 ON対象の画素 (発光素子) を発光させるようにしている。 [0169] On the other hand, in this display 1 0 0, all charge storage period T d The necessary charge is stored in the electron-emitting device 1 OA, and the voltage required for electron emission is applied to all the electron-emitting devices 1 OA in the subsequent light emission period Th, so that Electrons are emitted from a plurality of electron-emitting devices 1 OA corresponding to (light-emitting devices), and the pixels (light-emitting devices) to be turned on emit light.
[0170] 通常、 電子放出素子 1 OAで画素 (発光素子) を構成した場合、 画素 (発 光素子) を発光させるには、 電子放出素子 1 OAに高電圧を印加する必要が ある。 そのことから、 画素 (発光素子) への走査時に電荷を蓄積してさらに 発光を行わせる場合、 1つの画像を表示させる期間 (例えば 1フレーム) に わたつて高電圧を印加する必要があリ、 消費電力が大きくなるという問題が ある。 また、 各電子放出素子 1 OAを選択し、 データ信号 S dを供給する回 路も高電圧に対応した回路にする必要がある。  [0170] Normally, when a pixel (light emitting element) is composed of the electron emitting element 1 OA, it is necessary to apply a high voltage to the electron emitting element 1 OA in order to cause the pixel (light emitting element) to emit light. Therefore, when accumulating electric charges during scanning to the pixel (light emitting element) and further emitting light, it is necessary to apply a high voltage over a period of displaying one image (for example, one frame). There is a problem that power consumption increases. In addition, the circuit for selecting each electron-emitting device 1 OA and supplying the data signal S d needs to be a circuit corresponding to a high voltage.
[0171] しかし、 この例では、 全ての電子放出素子 1 OAに電荷を蓄積した後に、 全ての電子放出素子 1 OAに電圧を印加して、 ON対象の電子放出素子 1 0 Aに対応する画素 (発光素子) を発光させるというものである。  However, in this example, after the electric charges are accumulated in all the electron-emitting devices 1 OA, a voltage is applied to all the electron-emitting devices 1 OA, and the pixels corresponding to the electron-emitting devices 10 A to be turned on (Light emitting element) is made to emit light.
[0172] 従って、 全ての電子放出素子 1 OAに電子放出のための電圧 (放出電圧) を印加する期間 T hは、 当然に、 1フレームよりも短くなリ、 しかも、 図 2 9 A及び図 29 Bに示す第 1の実験例からもわかるように、 放出電圧の印加 期間を短くすることができることから、 画素 (発光素子) への走査時に電荷 の蓄積と発光とを行わせる場合と比して消費電力を大幅に低減させることが できる。  Therefore, the period T h during which the voltage for electron emission (emission voltage) is applied to all the electron-emitting devices 1 OA is naturally shorter than one frame, and FIG. 29A and FIG. As can be seen from the first experimental example shown in 29 B, the period during which the emission voltage is applied can be shortened, compared with the case where charge accumulation and light emission are performed during scanning of the pixel (light-emitting element). Power consumption can be greatly reduced.
[0173] また、 電子放出素子 1 OAに電荷を蓄積する期間 Tdと、 ON対象の画素  [0173] Further, the electron emission element 1 Td during which charge is accumulated in OA, and the pixel to be turned on
(発光素子) に対応する電子放出素子 1 OAから電子放出させる期間 T hと を分離したため、 各電子放出素子 1 OAにそれぞれ輝度レベルに応じた電圧 を印加するための回路の低電圧駆動を図ることができる。  The electron emission element 1 corresponding to the (light emitting element) 1 OA is separated from the period T h during which electrons are emitted, so that the circuit for applying a voltage corresponding to the luminance level to each electron emission element 1 OA is designed to be driven at a low voltage. be able to.
[0174] また、 画像に応じたデータ信号及び電荷蓄積期間 T dの選択信号 S sZ非 選択信号 S nは、 行又は列毎に駆動する必要があるが、 上述した実施の形態 にみられるように、 駆動電圧は数 1 0ポルトでよいため、 蛍光表示管等で使 用される安価な多出力ドライバを使用することができる。 一方、 発光期間 T hにおいては、 電子を十分に放出させる電圧は、 前記駆動電圧よりも大きく なる可能性があるが、 全て O N対象の画素 (発光素子) を一括して駆動すれ ばよいため、 多出力の回路部品を必要としない。 例えば高耐圧のディスクリ 一卜部品で構成した 1出力だけの駆動回路があればよいため、 コス卜的に安 価で済む上に、 回路規模も小さく済むという利点がある。 上記の駆動電圧及 び放電電圧は、 ェミッタ部 1 2の膜厚を薄くすることで、 低電圧化を図るこ とが可能である。 従って、 膜厚の設定により、 例えば駆動電圧を数ポルトに することも可能となる。 [0174] Further, the data signal corresponding to the image and the selection signal SsZ non-selection signal Sn in the charge accumulation period Td need to be driven for each row or column, as seen in the above-described embodiment. In addition, since the driving voltage may be several tens of ports, an inexpensive multi-output driver used in a fluorescent display tube or the like can be used. Meanwhile, light emission period T In h, the voltage that sufficiently discharges electrons may be higher than the drive voltage. However, since all the pixels to be turned on (light-emitting elements) need to be driven at once, a circuit component with multiple outputs Do not need. For example, it is only necessary to have a drive circuit with only one output composed of high breakdown voltage discrete components, which is advantageous in terms of cost and cost. The drive voltage and discharge voltage can be reduced by reducing the thickness of the emitter section 12. Therefore, for example, the driving voltage can be set to several ports by setting the film thickness.
[0175] さらに、 本駆動方法によれば、 行走査による第 1段階と分離して、 行走査 によらない第 2段階の電子放出が全画素 (発光素子) 一斉に行われることか ら、 解像度、 画面サイズによらず発光時間を確保し易く、 輝度を大きくする ことができる。 また、 画面に映像を一斉に表示させることから、 偽輪郭や画 像ぼやけのない動画像が表示可能である。  [0175] Furthermore, according to this driving method, the second stage of electron emission not based on row scanning is performed at the same time for all pixels (light emitting elements) separately from the first stage based on row scanning. It is easy to secure the light emission time regardless of the screen size, and the brightness can be increased. In addition, since images are displayed on the screen all at once, it is possible to display moving images without false contours or image blurring.
[0176] 次に、 第 2の実施の形態に係る電子放出素子 1 O Bについて図 3 6を参照 しながら説明する。  Next, an electron-emitting device 1 OB according to the second embodiment will be described with reference to FIG.
[0177] この第 2の実施の形態に係る電子放出素子 1 O Bは、 図 3 6に示すように 、 上述した第 1の実施の形態に係る電子放出素子 1 O Aとほぼ同様の構成を 有するが、 上部電極 1 4の構成材料が下部電極 1 6と同じである点と、 上部 電極 1 4の厚み tが 1 0 mよりも厚い点と、 貫通部 2 0をエッチング (ゥ エツ卜エッチング、 ドライエッチング) やリフトオフ、 レーザ等を使用して 人為的に形成している点で特徴を有する。 貫通部 2 0の形状は、 上述した第 1の実施の形態と同様に、 孔 3 2の形状、 切欠き 4 4の形状、 スリット 4 8 の形状を採用することができる。  The electron-emitting device 1OB according to the second embodiment has substantially the same configuration as the electron-emitting device 1OA according to the first embodiment described above, as shown in FIG. The upper electrode 14 is made of the same material as the lower electrode 16, the upper electrode 14 is thicker than 10 m, and the through-hole 20 is etched (wet etching, dry It is characterized in that it is artificially formed using etching), lift-off, and laser. As the shape of the penetrating portion 20, the shape of the hole 32, the shape of the notch 44, and the shape of the slit 48 can be adopted as in the first embodiment described above.
[0178] さらに、 上部電極 1 4における貫通部 2 0の周部 2 6の下面 2 6 aは、 貫 通部 2 0の中心に向かうに従って徐々に上方に傾斜している。 この形状は、 例えばリフトオフを使用することで簡単に形成することができる。  Furthermore, the lower surface 26 6 a of the peripheral portion 26 of the through portion 20 in the upper electrode 14 is gradually inclined upward toward the center of the through portion 20. This shape can be easily formed by using, for example, lift-off.
[0179] この第 2の実施の形態に係る電子放出素子 1 O Bにおいても、 上述した第  [0179] Also in the electron-emitting device 1OB according to the second embodiment, the above-described first
1の実施の形態に係る電子放出素子 1 O Aと同様に、 高い電界集中を容易に 発生させることができ、 しかも、 電子放出箇所を多くすることができ、 電子 放出について高出力、 高効率を図ることができ、 低電圧駆動 (低消費電力) も可能となる。 この場合も、 ガラス基板 1 1を用いているため、 大板化を容 易にし、 且つ、 製品コストの低廉化を図ることができる。 1 Electron-emitting device according to one embodiment 1 As with OA, high electric field concentration is easily achieved In addition, the number of electron emission locations can be increased, high output and high efficiency can be achieved for electron emission, and low voltage drive (low power consumption) is also possible. Also in this case, since the glass substrate 11 is used, it is possible to easily increase the size of the plate and to reduce the product cost.
[0180] また、 図 3 7に示す第 1の変形例に係る電子放出素子 1 O B aのように、 ェミッタ部 1 2の上面のうち、 貫通部 2 0と対応する部分にフローティング 電極 5 0を存在させてもよい。  [0180] Further, like the electron-emitting device 1OBa according to the first modification shown in Fig. 37, the floating electrode 50 is provided on the upper surface of the emitter section 12 corresponding to the through-hole 20. May be present.
[0181 ] また、 図 3 8に示す第 2の変形例に係る電子放出素子 1 O B bのように、 上部電極 1 4として、 断面形状がほぼ T字状とされた電極を形成するように してもよい。 [0181] Further, like the electron-emitting device 1OBb according to the second modification shown in FIG. 38, an electrode having a substantially T-shaped cross section is formed as the upper electrode 14. May be.
[0182] また、 図 3 9に示す第 3の変形例に係る電子放出素子 1 0 B eのように、 上部電極 1 4の形状、 特に、 上部電極 1 4の貫通部 2 0の周部 2 6が浮き上 がった形状としてもよい。 これは、 上部電極 1 4となる膜材料の中に、 焼成 工程中においてガス化する材料を含ませておけばよい。 これにより、 焼成ェ 程において、 前記材料がガス化し、 その跡として、 上部電極 1 4に多数の貫 通部 2 0が形成されると共に、 貫通部 2 0の周部 2 6が浮き上がった形状に なる。  Also, like the electron-emitting device 10 0 Be according to the third modification shown in FIG. 39, the shape of the upper electrode 14, particularly, the peripheral portion 2 of the through portion 20 of the upper electrode 14 6 may be raised. In this case, the film material to be the upper electrode 14 may include a material that is gasified during the firing process. Thereby, in the firing process, the material is gasified, and as a result, a large number of through portions 20 are formed in the upper electrode 14, and the peripheral portion 26 of the through portion 20 is lifted. Become.
[0183] なお、 本発明に係る電子放出素子は、 上述の実施の形態に限らず、 本発明 の要旨を逸脱することなく、 種々の構成を採り得ることはもちろんである。  [0183] It should be noted that the electron-emitting device according to the present invention is not limited to the above-described embodiment, and can of course have various configurations without departing from the gist of the present invention.

Claims

請求の範囲 The scope of the claims
[1] ガラス基板 (1 1 ) 上に形成された第 1の電極 (1 6) と、  [1] a first electrode (1 6) formed on a glass substrate (1 1);
前記第 1の電極 (1 6) 上に形成された誘電体膜からなるェミッタ部 (1 2) と、  An emitter portion (12) made of a dielectric film formed on the first electrode (16);
前記ェミッタ部 (1 2) 上に形成された第 2の電極 (1 4) とを有し、 電子放出のための駆動電圧 (Va) は、 前記第 1の電極 (1 6) と前記第 2の電極 (1 4) 間に印加され、  A second electrode (1 4) formed on the emitter section (1 2), and a drive voltage (Va) for electron emission is the first electrode (16) and the second electrode Applied between the electrodes (1 4)
少なくとも前記第 2の電極 (1 4) は、 前記ェミッタ部 (1 2) が露出さ れる複数の貫通部 (20) を有し、  At least the second electrode (1 4) has a plurality of through portions (20) from which the emitter portion (1 2) is exposed,
前記第 2の電極 (1 4) のうち、 前記貫通部 (20) の周部 (26) にお ける前記ェミッタ部 (1 2) と対向する面 (26 a) が、 前記ェミッタ部 ( 1 2) から離間していることを特徴とする電子放出素子。  Of the second electrode (14), the surface (26a) facing the emitter (12) in the peripheral portion (26) of the penetrating portion (20) is the emitter portion (12). An electron-emitting device characterized in that the electron-emitting device is spaced apart from).
[2] 請求項 1記載の電子放出素子において、 [2] The electron-emitting device according to claim 1,
前記ェミッタ部 (1 2) のうち、 少なくとも前記第 2の電極 (1 4) が形 成される面は、 誘電体の粒界による凹凸 (22) が形成され、  Of the emitter portion (1 2), at least the surface on which the second electrode (1 4) is formed is formed with irregularities (22) due to dielectric grain boundaries,
前記第 2の電極 (1 4) は、 前記誘電体の粒界における凹部 (24) に対 応した部分に前記貫通部 (20) が形成されていることを特徴とする電子放 出素子。  The electron emission element, wherein the second electrode (14) has the penetrating portion (20) formed in a portion corresponding to the concave portion (24) in the grain boundary of the dielectric.
[3] 請求項 1又は 2記載の電子放出素子において、  [3] The electron-emitting device according to claim 1 or 2,
前記第 2の電極 (1 4) は、 複数の鱗片状の形状を有する物質 (1 5) の 集合体 (1 7) 又は鱗片状の形状を有する物質 (1 5) を含んだ導電性物質 ( 1 9) の集合体 (2 1 ) であることを特徴とする電子放出素子。  The second electrode (1 4) is composed of an aggregate (17) of a plurality of scale-like substances (15) or a conductive substance (15) containing a scale-like substance (15). An electron-emitting device characterized by being an assembly (2 1) of 1 9).
[4] 請求項 1 3のいずれか 1項に記載の電子放出素子において、 [4] The electron-emitting device according to any one of claims 1 to 3,
前記第 1の電極 (1 6) 、 前記ェミッタ部 (1 2) 、 前記第 2の電極 (1 4) は、 前記ガラス基板 (1 1 ) の軟化点以下の温度で、 前記ガラス基板 ( 1 1 ) 上に直接膜形成されていることを特徴とする電子放出素子。  The first electrode (1 6), the emitter part (1 2), and the second electrode (1 4) are at a temperature lower than the softening point of the glass substrate (1 1), and the glass substrate (1 1 ) An electron-emitting device characterized in that a film is directly formed thereon.
[5] 請求項 1 3のいずれか 1項に記載の電子放出素子において、 [5] The electron-emitting device according to any one of claims 1 to 3,
前記ェミッタ部 (1 2) は、 前記ガラス基板 (1 1 ) の軟化点以上の温度 で形成したシートを、 前記ガラス基板 (1 1 ) に貼り合わせることによって 構成されることを特徴とする電子放出素子。 The emitter part (1 2) has a temperature higher than the softening point of the glass substrate (1 1). An electron-emitting device comprising: a sheet formed by bonding to the glass substrate (1 1).
ガラス基板 (1 1 ) 上に形成された複数の電子放出素子 (1 OA) を有す る電子放出装置であって、  An electron-emitting device having a plurality of electron-emitting devices (1 OA) formed on a glass substrate (1 1),
前記電子放出素子 (1 OA) は、  The electron-emitting device (1 OA) is
前記ガラス基板 (1 1 ) 上に形成された第 1の電極 (1 6) と、 前記第 1の電極 (1 6) 上に形成された誘電体膜からなるェミッタ部 (1 前記ェミッタ部 (1 2) 上に形成された第 2の電極 (1 4) とを有し、 電子放出のための駆動電圧 (Va) は、 前記第 1の電極 (1 6) と前記第 2の電極 (1 4) 間に印加され、  A first electrode (1 6) formed on the glass substrate (1 1) and an emitter section (1 the emitter section (1) made of a dielectric film formed on the first electrode (1 6) 2) a second electrode (1 4) formed thereon, and a drive voltage (Va) for electron emission is the first electrode (1 6) and the second electrode (1 4) ) Applied between
少なくとも前記第 2の電極 (1 4) は、 前記ェミッタ部 (1 2) が露出さ れる複数の貫通部 (20) を有し、  At least the second electrode (1 4) has a plurality of through portions (20) from which the emitter portion (1 2) is exposed,
前記第 2の電極 (1 4) のうち、 前記貫通部 (20) の周部 (26) にお ける前記ェミッタ部 (1 2) と対向する面 (26 a) が、 前記ェミッタ部 ( 1 2) から離間していることを特徴とする電子放出装置。  Of the second electrode (14), the surface (26a) facing the emitter (12) in the peripheral portion (26) of the penetrating portion (20) is the emitter portion (12). An electron-emitting device characterized in that it is spaced apart from
請求項 6記載の電子放出装置と、  An electron emission device according to claim 6,
ガラス基板 (1 1 ) のうち、 前記電子放出装置におけるェミッタ部 (1 2 ) が形成された面と対向して配置された透明板 (1 30) と、  A transparent plate (1 30) disposed opposite to the surface of the glass substrate (1 1) where the emitter (1 2) is formed in the electron emission device;
前記透明板 (1 30) のうち、 前記ェミッタ部 (1 2) と対向する面に、 前記電子放出装置における電子放出素子 (1 OA) との間で電界を形成する ための電極 (1 32) と、  Electrode (1 32) for forming an electric field between the transparent plate (1 30) and the electron emitter (1 OA) in the electron emission device on a surface facing the emitter (1 2) When,
前記電極 (1 32) に形成された蛍光体 (1 34) とを有し、  A phosphor (1 34) formed on the electrode (1 32),
前記電子放出素子 (1 OA) から放出される電子を前記蛍光体 (1 34) に衝突させて前記蛍光体 (1 34) を励起し、 発光させることを特徴とする ディスプレイ。  A display characterized in that electrons emitted from the electron-emitting device (1 OA) collide with the phosphor (1 34) to excite the phosphor (1 34) to emit light.
請求項 6記載の電子放出装置と、  An electron emission device according to claim 6,
ガラス基板 (1 1 ) のうち、 前記電子放出装置におけるェミッタ部 (1 2 ) が形成された面と対向して配置された透明板 (1 30) と、 Of the glass substrate (1 1), the emitter (1 2) in the electron emission device ) And a transparent plate (1 30) arranged facing the surface on which
前記透明板 (1 30) のうち、 前記ェミッタ部 (1 2) と対向する面に、 前記電子放出装置における電子放出素子 (1 OA) との間で電界を形成する ための電極 (1 32) と、  Electrode (1 32) for forming an electric field between the transparent plate (1 30) and the electron emitter (1 OA) in the electron emission device on a surface facing the emitter (1 2) When,
前記電極 (1 32) に形成された蛍光体 (1 34) とを有し、  A phosphor (1 34) formed on the electrode (1 32),
前記電子放出素子 (1 OA) から放出される電子を前記蛍光体 (1 34) に衝突させて前記蛍光体 (1 34) を励起し、 発光させることを特徴とする 光源。  A light source characterized in that electrons emitted from the electron-emitting device (1 OA) collide with the phosphor (1 34) to excite the phosphor (1 34) to emit light.
PCT/JP2004/019588 2004-12-28 2004-12-28 Electron emitting element, electron emitting device, display and light source WO2006070446A1 (en)

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