WO2006075405A1 - Electron emitting element - Google Patents

Electron emitting element Download PDF

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Publication number
WO2006075405A1
WO2006075405A1 PCT/JP2005/000500 JP2005000500W WO2006075405A1 WO 2006075405 A1 WO2006075405 A1 WO 2006075405A1 JP 2005000500 W JP2005000500 W JP 2005000500W WO 2006075405 A1 WO2006075405 A1 WO 2006075405A1
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WO
WIPO (PCT)
Prior art keywords
electron
emitting device
emitter
voltage
electrode
Prior art date
Application number
PCT/JP2005/000500
Other languages
French (fr)
Japanese (ja)
Inventor
Yukihisa Takeuchi
Tsutomu Nanataki
Iwao Ohwada
Takayoshi Akao
Original Assignee
Ngk Insulators, Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Ngk Insulators, Ltd. filed Critical Ngk Insulators, Ltd.
Priority to CNA2005800007090A priority Critical patent/CN1879184A/en
Priority to PCT/JP2005/000500 priority patent/WO2006075405A1/en
Publication of WO2006075405A1 publication Critical patent/WO2006075405A1/en

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Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J1/00Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
    • H01J1/02Main electrodes
    • H01J1/30Cold cathodes, e.g. field-emissive cathode
    • H01J1/312Cold cathodes, e.g. field-emissive cathode having an electric field perpendicular to the surface, e.g. tunnel-effect cathodes of Metal-Insulator-Metal [MIM] type

Definitions

  • the present invention relates to an electron-emitting device having a first electrode and a second electrode formed in a substance serving as an emitter.
  • an electron-emitting device has a force sword electrode and an anode electrode, and is applied to various applications such as a field emission display (FED) and a backlight.
  • FED field emission display
  • a plurality of electron-emitting devices are two-dimensionally arranged, and a plurality of phosphors for these electron-emitting devices are arranged with a predetermined interval.
  • Patent Documents 1 to 15 all use a dielectric as a substance that serves as an emitter.
  • a dielectric as a substance that serves as an emitter.
  • fine processing is required, a high voltage must be applied for electron emission, and the panel manufacturing process is complicated and the manufacturing cost increases.
  • Patent Document 1 JP-A-1-311533
  • Patent Document 2 JP-A-7-147131
  • Patent Document 3 Japanese Patent Laid-Open No. 2000-285801
  • Patent Document 4 Japanese Patent Publication No. 46-20944
  • Patent Document 5 Japanese Patent Publication No. 44-26125
  • Non-Patent Document 1 Yasuoka, Ishii, "Pulse electron source using a ferroelectric cathode” Applied Physics No. 68 ⁇ No. 5, p546-550 (1999)
  • Non-Patent Literature 2 VFPuchkarev, GAMesyats, On the mechanism of emission from the ferroelectric ceramic cathode, J. Appl. Phys., Vol. 78, No. 9, 1 November, 1995, p. 5633-5637
  • Non-Patent Document 3 H.Riege, Electron emission ferroelectrics-a review, Nucl. Instr. And Meth.A340, p. 80-89 (1994)
  • the upper electrode 204 and the lower electrode 206 are formed on a substance (emitter portion) 202 serving as an emitter, particularly on the emitter portion 202.
  • the upper electrode 204 is formed in close contact with the upper electrode 204.
  • the electric field concentration point is a force that is the triple point of the upper electrode 204Z emitter 202Z vacuum.
  • the peripheral portion of the upper electrode 204 corresponds.
  • the present invention has been made in view of such problems, and can easily generate a high electric field concentration, and can increase the number of electron emission locations.
  • An object of the present invention is to provide an electron-emitting device that can achieve high output and high efficiency and can be driven at a low voltage.
  • Another object of the present invention is simply applied to a display having a plurality of electron-emitting devices arranged in accordance with a plurality of pixels and performing image display by electron emission from each electron-emitting device.
  • An object of the present invention is to provide an electron-emitting device that can be used.
  • An electron-emitting device includes a substance serving as an emitter composed of a dielectric, and a first electrode and a second electrode to which a driving voltage for electron emission is applied,
  • the first electrode is formed on a first surface of the substance serving as the emitter
  • the second electrode is formed on a second surface of the substance serving as the emitter, and at least the first electrode.
  • the material force serving as the emitter Spaced apart It is characterized by.
  • a drive voltage is applied between the first electrode and the second electrode.
  • This drive voltage is, for example, a pulse voltage or an AC voltage, which is higher or lower than the reference voltage (e.g. OV) over time, from a voltage level lower or higher than the reference voltage. It is defined as a voltage that changes rapidly at a level.
  • a triple junction is formed at a contact point between the first surface of the substance serving as an emitter, the first electrode, and a medium (for example, a vacuum) around the electron-emitting device.
  • a triple junction is defined as an electric field concentrator formed by the contact between the first electrode and the substance serving as an emitter and a vacuum.
  • the triple junction also includes the triple point where the first electrode, the substance serving as the emitter, and the vacuum exist as one point.
  • the triple junction is formed in the peripheral portion of the plurality of through portions and the peripheral portion of the first electrode. Therefore, when the driving voltage as described above is applied between the first electrode and the second electrode, electric field concentration occurs in the triple junction described above.
  • an output period having a voltage level higher or lower than the reference voltage is a first output period
  • an output period having a voltage level lower or higher than the reference voltage is a second output period
  • the electric field concentration in one direction occurs, for example, in the triple junction described above.
  • the portion corresponding to the penetrating portion of the first electrode and the peripheral edge of the first electrode Electrons are accumulated in the vicinity of the part. At this time, the first electrode functions as an electron supply source.
  • the present invention provides a shape in which a gap is formed between a surface of the first electrode facing the substance serving as the emitter at a peripheral portion of the penetrating part and the substance serving as the emitter. Therefore, when a drive voltage is applied, electric field concentration is likely to occur in the gap portion. This leads to a high efficiency of electron emission, and a low drive voltage (electron emission at a low voltage level) can be realized.
  • a gap is formed between the surface of the first electrode facing the substance serving as the emitter in the peripheral portion of the penetrating part and the substance serving as the emitter.
  • the peripheral portion of the through-hole in the first electrode has a hook shape (flange shape)
  • the electric field concentration in the gap portion increases, and the hook-like portion (penetration) Electrons are easily generated from the peripheral part of the part. This leads to higher output and higher efficiency of electron emission, and lower drive voltage can be realized.
  • either the method of emitting electrons accumulated in a substance serving as an emitter or the method of emitting secondary electrons by colliding primary electrons from the first electrode with a material serving as an emitter can be realized.
  • the peripheral portion of the through portion of the electrode functions as a gate electrode (control electrode, focus electron lens, etc.), the straightness of the emitted electrons can be improved. This is advantageous in reducing crosstalk when, for example, a large number of electron-emitting devices are arranged as an electron source for display.
  • high electric field concentration can be easily generated.
  • the number of electron emission portions can be increased, and high output and high efficiency can be achieved for electron emission.
  • low voltage drive low power consumption
  • At least the first surface of the substance serving as the emitter is Concavities and convexities are formed by a grain boundary of the dielectric, and the first electrode may have the penetrating portion formed in a portion corresponding to the concave portion in the grain boundary of the dielectric.
  • the surface of the peripheral portion of the through portion that faces the substance serving as the emitter is separated from the material force serving as the emitter, that is, the periphery of the through portion. It is possible to easily realize a configuration in which a gap is formed between the surface of the portion facing the substance serving as the emitter and the substance serving as the emitter.
  • the first surface of the substance serving as the emitter is formed between a surface of the first electrode facing the substance serving as the emitter in the peripheral portion of the penetrating portion.
  • the maximum angle ⁇ is preferably 1 ° ⁇ ⁇ ⁇ 60 °.
  • the maximum spacing along the d force is preferably 0 / zm ⁇ d ⁇ m.
  • a floating electrode may exist in a portion corresponding to the penetrating portion of the first surface of the substance serving as the emitter.
  • the floating electrode also serves as an electron supply source, a large number of electrons can be emitted to the outside through the through portion in the electron emission stage (the second output period described above).
  • the through portion may be a hole.
  • the part where the polarization is reversed or changed in accordance with the drive voltage applied between the first electrode and the second electrode is the part immediately below where the first electrode is formed (the first part).
  • the inner peripheral force of the penetrating part (second part) corresponding to the region facing inward of the penetrating part, especially the second part is the drive voltage level and electric field concentration It will change depending on the degree. Therefore, in the present invention, the average diameter of the holes is preferably 0.1 m or more and 10 ⁇ m or less. Within this range, there is almost no variation in the electron emission distribution emitted through the penetrating portion, and electrons can be emitted efficiently.
  • the average diameter of the holes is less than 0.1 ⁇ m, the region for accumulating electrons is narrowed and the amount of electrons emitted is reduced. Of course, it is possible to provide many holes, but the difficulty Along with this, there is a concern that the manufacturing cost is increased.
  • the average diameter of the holes exceeds 10 m, the ratio (occupancy) of the portion (second portion) contributing to electron emission in the exposed portion of the substance serving as the emitter is reduced. The release efficiency of the is reduced.
  • the through portion may be a notch or a comb-shaped notch.
  • the average width of the notches is preferably 0.1 m or more and 10 ⁇ m or less.
  • the through portion may be a slit having an arbitrary shape.
  • the average width of the slit is preferably 0.1 m or more and 10 ⁇ m or less.
  • an electron-emitting device includes a substance serving as an emitter made of a dielectric, a first electrode formed so as to be in contact with the first surface of the substance serving as the emitter, and A second electrode formed so as to be in contact with the second surface of the substance serving as the emitter, and at least the first electrode has a plurality of through portions through which the substance serving as the emitter is exposed.
  • the first electrode is formed by a capacitor made of a substance serving as the emitter between the first electrode and the second electrode, and the plurality of through portions formed in the first electrode. And an aggregate of a plurality of capacitors formed between the substance serving as the emitter.
  • a gap is formed between a surface of the peripheral portion of the penetrating portion facing the emitter material and the emitter material, and an aggregate of capacitors is formed by the plurality of gaps.
  • the capacitance value of the capacitor due to the gap is relatively small, and most of the applied voltage is applied to the gap due to the partial pressure with the capacitor due to the substance serving as an emitter. High output is realized.
  • the aggregate of these capacitors has a structure in which they are connected in series to a capacitor made of a substance that serves as an emitter. Therefore, the overall capacitance value is smaller than the capacitance value of the capacitor due to the substance serving as the emitter. From this, it is possible to obtain desirable characteristics that electron emission is high output and overall power consumption is small.
  • the electron-emitting device is an electron-emitting device having an electron-emitting portion in a state in which the amount of positive charge and the amount of negative charge due to accumulation of electrons are balanced by applying a negative voltage (first The amount of negative charge is greater than the amount of positive charge as more electrons accumulate.
  • the second state force changes to a state (third state) in which the amount of positive charge and the amount of negative charge associated with electron emission are balanced by applying a positive voltage.
  • the applied voltage for changing to the first state is set to VI and the third state. Mark for change Caro]
  • the display period of one image is one frame
  • all the electron-emitting devices are scanned during a certain period in the one frame to emit a plurality of electrons corresponding to the pixel to be emitted.
  • a storage voltage corresponding to the luminance level of the pixel corresponding to each element an amount of charge corresponding to the luminance level of the pixel corresponding to each of the plurality of electron-emitting elements corresponding to the pixel to be emitted is accumulated.
  • a constant emission voltage is applied to all the electron-emitting devices, and the plurality of electron-emitting device forces corresponding to the pixels to be lit are each in an amount corresponding to the luminance level of the corresponding pixel. Can be emitted, and the pixel to be lit can emit light.
  • the ratio of the change in the amount of positive charge and the amount of electrons in the first state is ⁇ Q1Z ⁇ VI
  • the ratio of the change in the amount of positive charge and the amount of electrons in the third state (A Q1Z AV1)> (A Q2Z AV2)
  • ⁇ Q 2Z AV2 Based on these relationships, when V3 is the voltage at which electrons are accumulated and saturated, and V4 is the voltage at which electrons start to be emitted, the characteristics of 1 ⁇ I V4 I / I V3 I ⁇ 1.5 are obtained. be able to.
  • the electron-emitting devices are arranged in a matrix, and the electron-emitting devices are selected in units of one row in synchronization with the horizontal scanning period, and each of the selected electron-emitting devices is selected.
  • the pixel signal corresponding to the luminance level of the pixel is supplied, the pixel signal is also supplied to the non-selected pixel.
  • the electron-emitting device in the non-selected state for example, emits electrons due to the influence of the pixel signal, there is a problem that the image quality of the display image is deteriorated and the contrast is lowered.
  • the voltage level of the pixel signal supplied to the electron-emitting device in the selected state is an arbitrary voltage from the reference voltage to the voltage V3, and is not selected. Even in a simple voltage relationship where, for example, a signal having a polarity opposite to that of the pixel signal is supplied to the electron-emitting device in the state, the non-selected pixel is detected by the signal to the pixel in the selected state. A memory effect can be achieved at each pixel that is not affected.
  • the electron-emitting device includes a substance serving as an emitter made of a dielectric, and a first electrode and a second electrode to which a driving voltage for electron emission is applied.
  • a driving voltage for electron emission is applied.
  • a state force in which the substance serving as the emitter is polarized in one direction is changed to a state in which polarization is reversed.
  • a voltage as a first coercive voltage vl when the voltage applied to the thus the polarization of the voltage from the state in the other direction is changed in the one direction again and the second coercive voltage v2, VKO or V 2 ° 0 And having the characteristics of I vl I and IV 2 I.
  • 1.5 XI vl I ⁇ I v2 I may be sufficient.
  • the memory effect can be realized in each pixel in which the non-selected pixel is not affected by the signal to the selected pixel, and high brightness and high contrast can be achieved.
  • the display has a plurality of electron-emitting devices arranged in accordance with a plurality of pixels, and displays an image by electron emission of each electron-emitting device force. Easy to apply.
  • FIG. 1 is a cross-sectional view showing a partially omitted electron-emitting device according to the first embodiment.
  • FIG. 2 is an enlarged cross-sectional view showing a main part of the electron-emitting device according to the first embodiment.
  • FIG. 3 is a plan view showing an example of the shape of a through-hole formed in the upper electrode.
  • FIG. 4 is a diagram showing a voltage waveform of a drive voltage in the first electron emission method.
  • FIG. 5 is an explanatory diagram showing the state of electron emission in the second output period of the first electron emission method.
  • FIG. 6 is a diagram showing a voltage waveform of a drive voltage in the second electron emission method.
  • FIG. 7 is an explanatory diagram showing a state of electron emission in the second output period of the second electron emission method.
  • FIG. 8 is a diagram showing an example of a cross-sectional shape of a collar portion of the upper electrode.
  • FIG. 9 is a diagram showing another example of the cross-sectional shape of the collar portion of the upper electrode.
  • FIG. 10 is a diagram showing still another example of the cross-sectional shape of the collar portion of the upper electrode.
  • FIG. 11 is an equivalent circuit diagram showing a connection state of various capacitors connected between the upper electrode and the lower electrode.
  • FIG. 12 is a diagram for explaining the capacitance calculation of various capacitors connected between the upper electrode and the lower electrode.
  • FIG. 13 is a plan view showing a first modification of the electron-emitting device according to the first embodiment with a part thereof omitted.
  • FIG. 14 is a plan view showing a second modification of the electron-emitting device according to the first embodiment with a part thereof omitted.
  • FIG. 15 is a partial omission of a third modification of the electron-emitting device according to the first embodiment.
  • FIG. 16 is a diagram showing the voltage-charge amount characteristic (voltage-polarization amount characteristic) of the electron-emitting device according to the first embodiment.
  • FIG. 17A is an explanatory diagram showing the state at point p 1 in FIG. 16
  • FIG. 17B is an explanatory diagram showing the state at point p 2 in FIG. 16
  • FIG. 17C is from the point p 2 in FIG. It is explanatory drawing which shows the state until it reaches point p3.
  • FIG. 18A is an explanatory diagram showing a state from point p3 to point p4 in FIG. 16
  • FIG. 18B is an explanatory diagram showing a state immediately before reaching point p4 in FIG. 16
  • FIG. FIG. 17 is an explanatory diagram showing a state from point p4 to point p6 in FIG.
  • FIG. 19 is a block diagram showing a display unit and a drive circuit of a display configured using the electron-emitting device according to the first embodiment.
  • FIG. 20A to FIG. 20C are waveform diagrams showing amplitude modulation of a pulse signal by the amplitude modulation circuit.
  • FIG. 21 is a block diagram showing a signal supply circuit according to a modification.
  • FIG. 22A to FIG. 22C are waveform diagrams showing pulse width modulation of a pulse signal by a pulse width modulation circuit.
  • FIG. 23A is a diagram showing a hysteresis curve when the voltage Vsl in FIG. 20A or FIG. 22A is applied
  • FIG. 23B is a hysteresis curve when the voltage Vsm in FIG. 20B or 22B is applied
  • FIG. 23C is a diagram showing a hysteresis curve when the voltage Vsh in FIG. 20C or FIG. 22C is applied.
  • FIG. 24 is a configuration diagram showing one arrangement example of the collector electrode, the phosphor and the transparent plate on the upper electrode.
  • FIG. 25 is a configuration diagram showing another arrangement example of the collector electrode, the phosphor and the transparent plate on the upper electrode.
  • FIG. 26A is a diagram showing the waveforms of the write pulse and the lighting pulse used in the first experimental example (experiment of the electron emission state of the electron-emitting device), and Fig. 26B shows the waveform in the first experimental example.
  • FIG. 6 is a diagram showing a state of electron emission from the electron-emitting device with a detection voltage waveform of the light-receiving device.
  • FIG. 27 is a diagram showing waveforms of an address pulse and a lighting pulse used in the second to fourth experimental examples.
  • FIG. 28 is a characteristic diagram showing the results of a second experimental example (an experiment in which the amount of electrons emitted from the electron-emitting device varies depending on the amplitude of the write pulse).
  • FIG. 29 is a characteristic diagram showing the results of a third experimental example (an experiment in which the amount of electrons emitted from the electron-emitting device varies depending on the amplitude of the lighting pulse).
  • FIG. 30 is a characteristic diagram showing the results of a fourth experimental example (an experiment in which the amount of electrons emitted from the electron-emitting device varies depending on the collector voltage level).
  • FIG. 31 is a timing chart showing an example of a display driving method.
  • FIG. 32 is a table showing a relationship between applied voltages in the driving method shown in FIG.
  • FIG. 33 is a cross-sectional view showing a partially omitted electron-emitting device according to the second embodiment.
  • FIG. 34 is a cross-sectional view showing a first modification of the electron-emitting device according to the second embodiment with a part thereof omitted.
  • FIG. 35 is a cross-sectional view showing a partially omitted second modification of the electron-emitting device according to the second embodiment.
  • FIG. 36 is a cross-sectional view showing a third variation of the electron-emitting device according to the second embodiment with a part thereof omitted.
  • FIG. 37 is a cross-sectional view showing the electron-emitting device according to the third embodiment with a part thereof omitted.
  • FIG. 38 is a cross-sectional view showing a first modification of the electron-emitting device according to the third embodiment with a part thereof omitted.
  • FIG. 39 is a cross-sectional view showing a partially omitted electron-emitting device according to a conventional example.
  • the electron emission device is applied not only as a display, but also to an electron beam irradiation device, a light source, an LED alternative use, an electronic component manufacturing device, and an electronic circuit component. can do.
  • the electron beam in the electron beam irradiation apparatus has high energy and excellent absorption performance as compared with the ultraviolet light in the currently widely used ultraviolet irradiation apparatus.
  • Examples of applications include solidifying insulating films when stacking wafers in semiconductor devices, applications that cure printing inks uniformly when printing is dried, and applications that sterilize medical devices in their packaging. There is.
  • the use as a light source is for high luminance and high efficiency specifications, and includes, for example, a light source application for a projector in which an ultra-high pressure mercury lamp or the like is used.
  • a light source application for a projector in which an ultra-high pressure mercury lamp or the like is used.
  • the electron-emitting device according to this embodiment is applied to a light source, it has features such as downsizing, long life, high-speed lighting, and reduced environmental load due to mercury-free.
  • LED alternative applications there are surface light source applications such as indoor lighting, automotive lamps, traffic lights, etc., chip light sources, traffic lights, backlights for small liquid crystal displays for mobile phones
  • Applications of the electronic component manufacturing apparatus include an electron beam source for a film forming apparatus such as an electron beam evaporation apparatus, an electron source for plasma generation (for active gases such as gas) in a plasma CVD apparatus, and gas decomposition.
  • an electron beam source for a film forming apparatus such as an electron beam evaporation apparatus
  • an electron source for plasma generation for active gases such as gas
  • gas decomposition for gas decomposition
  • electron sources There are also vacuum microdevice applications such as terahertz high-speed switching elements and high-current output elements.
  • printer component that is, a light emitting device for exposing a photosensitive drum by a combination with a phosphor, and an electron source for charging a dielectric.
  • Electronic circuit components can be used for digital devices such as switches, relays, and diodes, and analog devices such as operational amplifiers because they can output a large current and have a high amplification factor.
  • an electron-emitting device 10A includes a plate-like emitter part (substance serving as an emitter) 12 made of a dielectric, and the emitter part 12 A first electrode (for example, an upper electrode) 14 formed on the first surface (for example, the upper surface) of the first electrode and a second electrode (for example, the lower electrode) formed on the second surface (for example, the lower surface) of the emitter 12. 16 and a pulse generation source 18 for applying a driving voltage Va between the upper electrode 14 and the lower electrode 16.
  • a pulse generation source 18 for applying a driving voltage Va between the upper electrode 14 and the lower electrode 16.
  • the upper electrode 14 has a plurality of through portions 20 through which the emitter portion 12 is exposed.
  • Emits Concavities and convexities 22 due to dielectric grain boundaries are formed on the surface of the upper portion 12, and the through-holes 20 of the upper electrode 14 are formed in portions corresponding to the recesses 24 in the grain boundaries of the dielectric.
  • the particle size of the dielectric constituting the emitter portion 12 is preferably 0.1 m-10 m, and more preferably 2 ⁇ -7 ⁇ m. In the example shown in Fig. 1, the particle size of the dielectric is 3 ⁇ m.
  • a surface 26 a of the upper electrode 14 facing the emitter portion 12 in the peripheral portion 26 of the through portion 20 is separated from the emitter portion 12. is doing.
  • a gap 28 is formed between the surface 26 a of the upper electrode 14 facing the emitter 12 in the peripheral portion 26 of the penetrating portion 20 and the emitter portion 12, and the peripheral portion 26 of the penetrating portion 20 in the upper electrode 14.
  • the cross section of the protrusion 30 of the irregularities 22 in the dielectric grain boundaries is typically shown in a semicircular shape. A certain force is not limited to this shape.
  • the thickness t of the upper electrode 14 is set to 0.01 m ⁇ t ⁇ 10 m, and the upper surface of the emitter 12, that is, the convex portion 30 at the grain boundary of the dielectric is 30.
  • the maximum angle ⁇ between the surface of the upper electrode 14 (which is also the inner wall surface of the recess 24) and the lower surface 26a of the flange 26 of the upper electrode 14 is set to 1 ° ⁇ ⁇ ⁇ 60 °.
  • the maximum distance d along the vertical direction between the surface of the convex portion 30 (inner wall surface of the concave portion 24) and the lower surface 26a of the flange portion 26 of the upper electrode 14 at the dielectric grain boundary of the emitter 12 is expressed as follows: 0 m ⁇ d ⁇ 10 m.
  • the shape of the penetrating portion 20, in particular, as shown in FIG. 3, is the shape of the hole 32, for example, a circular shape or an elliptical shape.
  • the hole 32 has a circular shape.
  • the average diameter of the holes 32 is 0.1 m or more and 10 m or less! This average diameter represents the average of the lengths of different line segments passing through the center of the hole 32.
  • the material of each component will be described.
  • a dielectric having a relatively high relative dielectric constant for example, 1000 or more may be employed. it can.
  • such dielectrics include lead zirconate, lead magnesium niobate, lead nickel niobate, lead zinc niobate, manganese manganate lead tantalate, lead nickel tantalate, Ceramics containing lead antimony stannate, lead titanate, lead magnesium tungstate, lead cobalt niobate, etc., or any combination thereof, and those whose main component contains 50% by weight or more of these compounds
  • lanthanum, calcium, strontium, molybdenum, tungsten, norium, niobium, zinc, nickel, manganese and other oxides, combinations of these, or other compounds are appropriately applied to the ceramics. It is possible to list those added to the above.
  • nPMN-mPT (where n and m are mole ratios) of lead magnesium niobate (PMN) and lead titanate (PT)
  • PMN lead magnesium niobate
  • PT lead titanate
  • the relative dielectric constant is preferably 3000 or more.
  • a composition in the vicinity of a morphotropic phase boundary (MPB) between a tetragonal crystal and a rhombohedral crystal is preferable for increasing the relative dielectric constant.
  • PMN: PT: PZ 0.3 75: 0. 375: 0.25
  • PMN: PT: PZ 0.5: 0. 375: 0.125
  • the rate is 4500, which is particularly preferable.
  • it is preferable to improve the dielectric constant by mixing a metal such as platinum into these dielectrics within a range that can ensure insulation. In this case, for example, 20% by weight of platinum may be mixed in the dielectric.
  • the emitter 12 can be a piezoelectric Z electrostrictive layer, an antiferroelectric layer, or the like.
  • the piezoelectric Z electrostrictive layer is used as the emitter 12, the piezoelectric Z Examples of electrostrictive layers include lead zirconate, lead magnesium niobate, lead nickel niobate, lead zinc niobate, lead manganese niobate, lead magnesium tantalate, lead nickel tantalate, antimony stannate, titanium Acid bell, barium titanate, magnesium tungstic acid bell , Cobalt niobate bell, etc., or ceramics containing any combination thereof.
  • the compound may contain 50% by weight or more of these compounds.
  • a ceramic containing lead zirconate is most frequently used as a constituent material of the piezoelectric Z electrostrictive layer constituting the emitter section 12.
  • the ceramics may further include oxides such as lanthanum, calcium, strontium, molybdenum, tungsten, norium, niobium, zinc, nickel, manganese, Alternatively, a ceramic obtained by appropriately adding any combination of these or other compounds may be used. In addition, ceramics with Si O, CeO, Pb Ge O or any combination thereof added to the ceramics.
  • a material containing 0.1 wt% CeO or 1 to 2 wt% Pb Ge 2 O is preferred.
  • a ceramic containing lead magnesium niobate, lead zirconate and lead titanate as main components and further containing lanthanum or strontium.
  • the porosity is preferably 40% or less.
  • the antiferroelectric layer is mainly composed of lead zirconate as a main component, or a component composed of lead zirconate and lead stannate.
  • lead zirconate As a main component, or a component composed of lead zirconate and lead stannate.
  • the antiferroelectric layer may be porous, and in the case of being porous, the porosity is preferably 30% or less.
  • strontium bismuth tantalate (SrBi Ta 2 O 3) was used for the emitter 12.
  • Such a material with low polarization reversal fatigue is a layered ferroelectric compound and is represented by the general formula (BiO 2 ) 2 + (ABO 2 ) 2 . Where gold
  • the ions of genus A are Ca 2+ , Sr 2+ , Ba Pb 2+ , Bi 3+ , La 3+ etc.
  • the ions of metal B are Ti 4+ , Ta 5+ , Nb 5+ etc.
  • a piezoelectric Z electrostrictive Z antiferroelectric ceramic with a glass component such as lead borosilicate glass and other low melting point compounds (for example, bismuth oxide)
  • the firing temperature is reduced. Can be lowered.
  • the shape thereof is a sheet-like molded body, a sheet-like laminated body, or those obtained by laminating or bonding these to another supporting substrate. It may be.
  • the upper electrode 14 is made of an organometallic paste that provides a thin film after firing.
  • a material such as platinum resinate paste is preferably used.
  • oxide electrodes that suppress polarization reversal fatigue such as ruthenium oxide (RuO), iridium oxide (IrO), ruthenium
  • the upper electrode 14 is made of the above-mentioned materials using various thick film forming methods such as screen printing, spraying, coating, dubbing, coating, and electrophoresis, sputtering, ion beam, and vacuum deposition. , Ion plating, chemical vapor deposition (CVD), and various other thin film formation methods such as plating, can be formed according to a normal film formation method, preferably the former thick film formation method .
  • the lower electrode 16 is made of platinum, molybdenum, tungsten, or the like. Further, it is composed of a conductor having resistance to a high-temperature oxidizing atmosphere, such as a simple metal, an alloy, a mixture of an insulating ceramic and a simple metal, a mixture of an insulating ceramic and an alloy, and preferably, platinum, iridium High melting point precious metals such as palladium, rhodium, molybdenum, etc., and those composed mainly of alloys such as silver-palladium, silver-platinum, platinum-palladium, and cermet materials of platinum and ceramic materials. More preferably, it is made of a material mainly composed of platinum or a platinum-based alloy.
  • the lower electrode 16 may be made of carbon or a graphite-based material. Electricity The ratio of the ceramic material added to the pole material is preferably about 5-30% by volume. Of course, you may use the same material as the upper electrode mentioned above.
  • the lower electrode 16 is preferably formed by the thick film forming method.
  • the thickness of the lower electrode 16 is preferably 20 m or less, more preferably 5 m or less.
  • a heat treatment (firing treatment) is performed each time the emitter 12, the upper electrode 14, and the lower electrode 16 are formed, whereby an integrated structure can be obtained.
  • the temperature involved in the firing process for integrating the emitter section 12, the upper electrode 14, and the lower electrode 16 is in the range of 500-1400 ° C, preferably in the range of 1000-1400 ° C. Good. Furthermore, when heat-treating the film-like emitter 12, it is preferable to perform a firing process while controlling the atmosphere together with the evaporation source of the emitter 12 so that the composition of the emitter 12 is not unstable at high temperatures. .
  • the film to be the upper electrode 14 contracts, for example, from a thickness of 10 m to a thickness of 0.0: m, and at the same time, a plurality of holes and the like are formed.
  • FIG. As shown, a plurality of through portions 20 are formed in the upper electrode 14, and a peripheral portion 26 of the through portion 20 is formed in a bowl shape.
  • the film to be the upper electrode 14 may be baked after being patterned (wet etching or dry etching) or lift-off or the like in advance (before baking). In this case, as will be described later, a notch shape or a slit shape can be easily formed as the through portion 20.
  • a drive voltage Va is applied between the upper electrode 14 and the lower electrode 16.
  • This drive voltage Va is higher or lower than the reference voltage (e.g. OV) from the reference voltage (e.g. OV) or lower than the reference voltage over time, such as a Norse voltage or an AC voltage.
  • High ! defined as a voltage that rapidly changes to the voltage level.
  • a triple junction is formed at a contact point between the upper surface of the emitter section 12, the upper electrode 14, and a medium (for example, vacuum) around the electron-emitting device 10A.
  • the triple junction is formed by contacting the upper electrode 14, the emitter 12 and the vacuum. Defined as the electric field concentration part.
  • the triple junction includes a triple point where the upper electrode 14, the emitter 12 and the vacuum exist as one point.
  • the degree of vacuum in the atmosphere is preferably 10 2 ⁇ 10 ⁇ 6 Pa, more preferably 10 3 ⁇ 10 ⁇ 5 Pa.
  • the triple junction is formed at the flange portion 26 of the upper electrode 14 and the peripheral portion of the upper electrode 14. Therefore, when the drive voltage Va as described above is applied between the upper electrode 14 and the lower electrode 16, electric field concentration occurs in the triple junction described above.
  • the first electron emission method will be described with reference to FIG. 4 and FIG.
  • a voltage V2 lower than the reference voltage in this case, OV
  • a voltage VI higher than the reference voltage is applied to the lower electrode 16.
  • electric field concentration occurs in the triple junction described above.
  • the part exposed from the through part 20 of the upper electrode 14 or the part near the peripheral part of the upper electrode 14 is used. Electrons are accumulated. At this time, the upper electrode 14 functions as an electron supply source.
  • the voltage level of the driving voltage Va changes rapidly, that is, a voltage VI higher than the reference voltage is applied to the upper electrode 14, and the reference voltage is applied to the lower electrode 16.
  • a voltage V2 lower than the voltage is applied, the electric field concentration in the reverse direction occurs at the triple junction described above, and the electrons are accumulated in the emitter section 12 as shown in FIG. Electrons are emitted from the exposed portion through the penetrating portion 20. Of course, electrons near the outer periphery of the upper electrode 14 are also emitted.
  • a voltage V3 higher than the reference voltage is applied to the upper electrode 14, and a voltage V4 lower than the reference voltage is applied to the lower electrode 16.
  • preparation for electron emission for example, polarization in one direction of the emitter 12
  • the voltage level of the drive voltage Va changes suddenly, that is, a voltage V4 lower than the reference voltage is applied to the upper electrode 14, and a voltage V3 higher than the reference voltage is applied to the lower electrode 16.
  • each of the through portions 20 and the peripheral force near the outer peripheral portion of the upper electrode 14 are formed. Electrons are emitted evenly, the variation in the overall electron emission characteristics is reduced, the electron emission is easily controlled, and the electron emission efficiency is increased.
  • the gap 28 is formed between the flange portion 26 and the emitter portion 12 of the upper electrode 14, when the drive voltage Va is applied, Electric field concentration is likely to occur in the gap 28 portion. This leads to a high efficiency of electron emission, and a low driving voltage (electron emission at a low voltage level) can be realized.
  • the upper electrode 14 has the flange portion 26 formed in the peripheral portion of the penetrating portion 20, and thus the electric field concentration in the gap 28 portion described above. Combined with the increase in size, electrons are easily emitted from the flange 26 of the upper electrode 14. This leads to higher output and higher efficiency of electron emission, and lowering of the drive voltage Va can be realized.
  • the first electron emission method the method for emitting electrons accumulated in the emitter unit 12
  • the second electron emission method the primary electrons from the upper electrode 14 collide with the emitter unit 12).
  • the flange 26 of the upper electrode 14 functions as a gate electrode (control electrode, focus electron lens, etc.), so that the straightness of the emitted electrons can be improved. Can do. This is advantageous in reducing crosstalk when a large number of electron-emitting devices 10A are arranged to form, for example, an electron source for a display.
  • the electron-emitting device 10A As described above, in the electron-emitting device 10A according to the first embodiment, high electric field concentration can be easily generated, the force can be increased, and the number of electron emission locations can be increased. High output and high efficiency can be achieved, and low voltage drive (low power consumption) is also possible.
  • the upper surface of the emitter section 12 is caused by a dielectric grain boundary.
  • the upper electrode 14 has a through-hole 20 formed in a portion corresponding to the recess 24 in the grain boundary of the dielectric, so that the flange 26 of the upper electrode 14 can be easily realized. Can be made.
  • the upper surface of the emitter 12 that is, the maximum angle formed by the surface of the convex portion 30 (inner wall surface of the concave portion 24) at the grain boundary of the dielectric and the lower surface 26a of the flange portion 26 of the upper electrode 14 0 is set to 1 ° ⁇ ⁇ ⁇ 60 °.
  • the through portion 20 has the shape of the hole 32.
  • the second portion 42 changes depending on the level of the driving voltage Va and the degree of electric field concentration. Therefore, in the first embodiment, the average diameter of the holes 32 is set to 0.1 m or more and 10 ⁇ m or less. Within this range, there is almost no variation in the emission distribution of electrons emitted through the penetrating portion 20, and electrons can be emitted efficiently.
  • the average diameter of the holes 32 is less than 0.1 ⁇ m, the region for accumulating electrons is narrowed, and the amount of electrons emitted is reduced.
  • the average diameter of the holes 32 exceeds 10 m, the ratio (occupancy) of the portion (second portion) 42 contributing to electron emission in the portion exposed from the penetrating portion 20 of the emitter 12 is small. Thus, the electron emission efficiency is reduced.
  • the cross-sectional shape of the flange portion 26 of the upper electrode 14 may be a shape that extends horizontally on both the upper surface and the lower surface, and as shown in FIG. It is almost horizontal, and the upper end of the collar 26 may be raised upward.
  • the lower surface 26a of the flange portion 26 gradually inclines upward toward the center of the penetrating portion 20.
  • the lower surface 26a of the flange portion 26 may be gradually inclined downward toward the center of the penetrating portion 20.
  • FIG. 8 can enhance the function as a gate electrode.
  • the gap 28 is narrowed, so that electric field concentration is more likely to occur, and high output of electron emission, High efficiency can be improved.
  • the capacitor C 1 by the emitter unit 12 and the gaps 28 are interposed between the upper electrode 14 and the lower electrode 16.
  • a plurality of capacitor Ca aggregates are formed. That is, a plurality of capacitors Ca by each gear 28 are configured as one capacitor C2 connected in parallel to each other, and in terms of equivalent circuit, a capacitor C1 by the emitter 12 is connected in series with the capacitor C2 by the aggregate. It becomes a connected form.
  • the capacitor C1 by the emitter 12 is not connected in series to the capacitor C2 by the aggregate, depending on the number of through-holes 20 formed in the upper electrode 14, the overall formation area, etc.
  • the capacitor component connected in series changes.
  • the capacitance calculation is performed assuming that 25% of the capacitor C1 by the emitter 12 is connected in series with the capacitor C2 by the aggregate.
  • the relative dielectric constant is 1.
  • the maximum interval d of the gaps 28 is 0.1 m
  • the number of gaps 28 is 10,000.
  • the capacitance value of the capacitor C2 by the aggregate Is 0.885pF
  • the capacitance value of the capacitor C1 by the emitter section 12 is 35.4pF.
  • the total capacitance value is 27.5 pF. This capacitance value is 78% of the capacitance value 35.4pF of the capacitor C1 by the emitter 12. That is, the total capacitance value is less than the capacitance value of the capacitor C1 by the emitter unit 12 / J.
  • the aggregate of the capacitors Ca by the plurality of gaps 28 has a relatively small capacitance value of the capacitor Ca by the gaps 28. From the partial pressure with the capacitor C1 by the emitter unit 12, Most of the applied voltage Va is applied to the gap 28, and in each gap 28, high output of electron emission is realized.
  • the capacitor C2 by the aggregate has a structure connected in series to the capacitor C1 by the emitter section 12, the overall capacitance value is smaller than the capacitance value of the capacitor C1 by the emitter section 12. For this reason, the electron emission has a high output, and if the overall power consumption becomes small, it is preferable to obtain characteristics.
  • the electron-emitting device lOAa according to the first modification differs as shown in FIG. 13 in that the shape of the penetrating portion 20, particularly the shape in view of the upper surface force, is the shape of the notch 44.
  • the shape of the notch 44 as shown in FIG. 13, a comb-like notch 46 in which a large number of notches 44 are continuously formed is preferable. In this case, the variation in the emission distribution of the electrons emitted through the through-hole 20 is reduced, which is advantageous in efficiently emitting electrons.
  • the average width of the notches 44 is not less than 0 and not more than 10 m. This average width indicates the average of the lengths of a plurality of different line segments orthogonal to the center line of the notch 44.
  • the electron-emitting device lOAb according to the second modification is different in that the shape of the penetrating portion 20, particularly the shape seen from the top surface, is a slit 48.
  • the slit 48 is a slit having a length in the major axis direction (longitudinal direction) of 10 or more times the length in the minor axis direction (short direction). Therefore, a hole having a length in the major axis direction (longitudinal direction) less than 10 times the length in the minor axis direction (short direction) can be defined as the shape of the hole 32 (see FIG. 3).
  • the slit 48 includes one in which a plurality of holes 32 are connected and connected.
  • the average width of the slits 48 is preferably set to 0 .: m or more and 10 m or less. This is because variations in the emission distribution of electrons emitted through the penetrating portion 20 are reduced, and this is advantageous in efficiently emitting electrons.
  • This average width indicates the average length of a plurality of different line segments orthogonal to the center line of the slit 48.
  • the electron-emitting device lOAc according to the third modification is formed on the top of the emitter 12 as shown in FIG.
  • the difference is that the floating electrode 50 exists in a portion of the surface corresponding to the penetrating portion 20, for example, the concave portion 24 of the grain boundary of the dielectric.
  • the floating electrode 50 also serves as an electron supply source, in the electron emission stage (the second output period T2 in the first electron emission method described above (see FIG. 4)), a large number of electrons are passed through the through-hole. It can be released outside through 20.
  • V3 is the voltage at which electrons are accumulated and saturated
  • V4 is the voltage at which electron emission starts
  • FIG. 16 the characteristic of FIG. 16 will be described from the standpoint of the voltage-one-polarization characteristic.
  • the description will be made on the assumption that the emitter section 12 is polarized in the negative direction and the negative pole of the dipole moment is directed to the upper surface of the emitter section 12 (see FIG. 17A).
  • Characteristic portions of the characteristics of the electron-emitting device 10A are as follows.
  • the electron-emitting device 10A since the electron-emitting device 10A according to the first embodiment has the characteristics as described above, the electron-emitting device 10A includes a plurality of electron-emitting devices 10A arranged according to a plurality of pixels, It can be easily applied to a display that displays an image by emitting electrons from the child 10A.
  • the display 100 includes a display unit 102 in which a large number of electron-emitting devices 10A are arranged in a matrix or staggered manner corresponding to pixels, and a drive for driving the display unit 102. And a driving circuit 104.
  • one electron emitting element 10A may be allocated per pixel, or a plurality of electron emitting elements 10A may be allocated per pixel. You may do it.
  • the description will be made on the assumption that one electron-emitting device 10A is assigned per pixel.
  • This drive circuit 104 is provided with a plurality of row selection lines 106 for selecting a row for the display unit 102, and a plurality of signals for supplying the pixel signal Sd to the display unit 102. Wire 108 is wired.
  • the drive circuit 104 selectively supplies a selection signal Ss to the row selection line 106 to sequentially select the electron-emitting devices 10A for each row, and the signal line 108 has a parameter.
  • the pixel signal Sd is output to the real signal
  • the signal supply circuit 112 supplies the pixel signal Sd to each row selected by the row selection circuit 110 (selected row), and the input video signal Sv and the synchronization signal Sc.
  • a signal control circuit 114 for controlling the row selection circuit 110 and the signal supply circuit 112 based on the above.
  • a power supply circuit 116 (for example, 50V and 0V) is connected to the row selection circuit 110 and the signal supply circuit 112, and in particular, a pulse power supply is connected between the negative line between the row selection circuit 110 and the power supply circuit 116 and GND (ground). 118 is connected.
  • the pulse power supply 118 outputs a pulsed voltage waveform having a reference voltage (for example, 0 V) in a charge accumulation period Td, which will be described later, and a voltage (for example, 400 V) in the light emission period Th.
  • the row selection circuit 110 In the charge accumulation period Td, the row selection circuit 110 outputs the selection signal Ss to the selected row and outputs the non-selection signal Sn to the non-selected row. In addition, the row selection circuit 110 outputs a constant voltage (for example, ⁇ 350 V) in which the power supply voltage (for example, 50 V) from the power circuit 116 and the voltage from the pulse power supply 118 (for example, ⁇ 400 V) are added during the light emission period Th. .
  • a constant voltage for example, ⁇ 350 V
  • the power supply voltage for example, 50 V
  • the pulse power supply 118 for example, ⁇ 400 V
  • the signal supply circuit 112 includes a pulse generation circuit 120 and an amplitude modulation circuit 122.
  • the pulse generation circuit 120 generates and outputs a pulse signal Sp having a constant amplitude (eg, 50 V) with a constant pulse period during the charge accumulation period Td, and outputs a reference voltage (eg, 0 V) during the light emission period Th. To do.
  • the amplitude modulation circuit 122 amplitude-modulates the pulse signal Sp from the pulse generation circuit 120 in accordance with the luminance level of the pixel related to the selected row, and each pixel related to the selected row.
  • the pixel signal Sd is output and the reference voltage from the pulse generation circuit 120 is output as it is during the light emission period Th.
  • the amplitude of the pulse signal Sp when the luminance level is low, the amplitude of the pulse signal Sp is set to the low level Vsl (see FIG. 20A), and when the luminance level is medium, The amplitude of the pulse signal Sp is set to the medium level Vsm (see Fig. 20B). If the luminance level is high, the amplitude of the pulse signal Sp is set to the high level Vsh (see Fig. 20C).
  • the pulse signal Sp when applied to the force display 100 shown in the example divided into three, the pulse signal Sp is amplitude-modulated in 128 steps or 256 steps, for example, according to the luminance level of the pixel.
  • the signal supply circuit 112a includes a pulse generation circuit 124 and a pulse width modulation circuit 126.
  • the pulse generation circuit 124 is a pulse whose voltage rises continuously in the voltage waveform applied to the electron emitter 10A (shown by the solid line in FIGS. 22A to 22C) during the charge accumulation period Td. Generates and outputs the signal Spa (indicated by a broken line in FIGS. 22A to 22C), and outputs a reference voltage during the light emission period Th.
  • the pulse width modulation circuit 126 modulates the pulse width Wp (see FIGS.
  • the pulse signal Spa from the pulse generation circuit 124 according to the luminance level of the pixel relating to the selected row. These are output as pixel signals Sd of the pixels related to the selected row.
  • the reference voltage from the pulse generation circuit 124 is output as it is. Also in this case, the timing control and the supply of the luminance levels of the selected pixels to the pulse width modulation circuit 126 are performed through the signal control circuit 114.
  • the pulse width Wp of the pulse signal Spa when the luminance level is low, the pulse width Wp of the pulse signal Spa is shortened and the substantial amplitude is set to the low level Vsl (see FIG. 22A). If the brightness level is medium, the pulse width Wp of the pulse signal Spa is set to the medium length, the actual amplitude is set to the medium level Vsm (see Figure 22B), and the brightness level is high. In this case, the pulse width Wp of the pulse signal Spa is lengthened and the substantial amplitude is set to the high level Vsh (see Fig. 22C).
  • the pulse width of the noise signal Spa is modulated in 128 steps or 256 steps, for example, according to the luminance level of the pixel.
  • FIG. 20A to FIG. 20C changes in the characteristic diagram when the level of the negative voltage related to the above-described electron accumulation is changed are shown in FIG. 20A to FIG. 20C as examples of three amplitude modulations for the pulse signal Sp shown in FIG. 2A—In relation to the three pulse width modulation examples for the pulse signal Spa shown in FIG. 22C, at the negative voltage level Vsl shown in FIG. 20A and FIG. 22A, as shown in FIG. The amount of electrons stored in 10A is small. At the negative voltage level Vsm shown in FIG. 20B and FIG. 22B, the amount of accumulated electrons is medium as shown in FIG. 23B, and at the negative voltage level Vsh shown in FIG. 20C and FIG. As shown, the amount of accumulated electrons is large and almost saturated.
  • the voltage level at the point p4 at which the electron emission starts is almost the same. In other words, even after the electrons are accumulated, even if the applied voltage changes up to the voltage level shown at point p4, it can be seen that a memory effect is exhibited in which there is almost no change in the amount of accumulated electrons.
  • the electron-emitting device 10A When the electron-emitting device 10A according to the first embodiment is used as a pixel of the display 100, as shown in FIG. 24, a transparent material made of glass or attal, for example, is disposed above the upper electrode 14. A plate 130 is disposed, and a collector electrode 132 made of, for example, a transparent electrode is disposed on the back surface (the surface facing the upper electrode 14) of the transparent plate 130, and a phosphor 134 is applied to the collector electrode 132. . A bias voltage source 136 (collector voltage Vc) is connected to the collector electrode 132 via a resistor. Needless to say, the electron-emitting device 10A is disposed in the vacuum space. The degree of vacuum in the atmosphere is preferably 10 2 ⁇ 10 ⁇ 6 Pa, more preferably 10 3 ⁇ 10 ⁇ 5 Pa.
  • the reason for selecting such a range is that, in a low vacuum, (1) because there are many gas molecules in the space, if too much plasma that is easy to generate plasma is generated, the amount of positive ions will be large. There is a possibility of colliding with the upper electrode 14 to promote damage, and (2) phosphors due to electrons accelerated sufficiently by the collector voltage Vc when the emitted electrons collide with gas molecules before reaching the collector electrode 132 ⁇ . This is because 134 may not be sufficiently excited.
  • the collector electrode 132 is formed on the back surface of the transparent plate 130, and the phosphor 134 is formed on the surface of the collector electrode 132 (the surface facing the upper electrode 14).
  • the phosphor 134 may be formed on the back surface of the transparent plate 130, and the collector electrode 132 may be formed so as to cover the phosphor 134!
  • the collector electrode 132 reflects the light emission of the phosphor 134, and the light emission of the phosphor 134 can be efficiently emitted to the transparent plate 130 side (light emission surface side).
  • the electron emission state of the electron-emitting device 10A is observed. That is, as shown in FIG. 26A, a write pulse Pw having a voltage of 70V is applied to the electron-emitting device 10A to accumulate electrons in the electron-emitting device 10A, and then a lighting pulse having a voltage of 280V. Ph was applied to emit electrons. The electron emission state was measured by detecting the light emission of the phosphor 1 34 with a light receiving element (photodiode). The detected waveform is shown in Figure 26B. The duty ratio of the write pulse Pw and the lighting pulse Ph was 50%.
  • the second experiment example shows how the electron emission amount force of the electron-emitting device 10A changes depending on the amplitude of the write pulse Pw shown in FIG.
  • the change in the amount of emitted electrons was measured by detecting the light emission of the phosphor 134 with a light receiving element (photodiode) as in the first experimental example.
  • the experimental results are shown in FIG.
  • the solid line A shows the characteristics when the amplitude of the lighting pulse Ph is 200V and the amplitude of the writing pulse Pw is changed from 10V to 80V
  • the solid line B shows the amplitude of the lighting pulse Ph is 350V. The characteristics when the amplitude of the write pulse Pw is changed from 10V to –80V are shown.
  • the write pulse Pw when the write pulse Pw is changed from 20 V to 40 V, it can be seen that the light emission luminance changes almost linearly.
  • the lighting pulse Ph amplitude is 350 V and 200 V
  • the dynamic range of the emission luminance change with respect to the write pulse Pw is wider in the case of 350 V, which improves the brightness and contrast of the image display. It can be seen that it is advantageous for improvement. This tendency can be seen in the range until the light emission brightness is saturated with respect to the amplitude setting of the lighting pulse Ph. Therefore, it is preferable to set the optimal value.
  • the third experiment example shows how the electron emission amount force of the electron-emitting device 10A changes depending on the amplitude of the lighting pulse Ph shown in Fig. 27.
  • the change in the amount of emitted electrons was measured by detecting the light emission of the phosphor 134 with a light receiving element (photodiode) as in the first experimental example.
  • the experimental results are shown in Fig. 29.
  • the solid line C shows the characteristics when the amplitude of the write pulse Pw is 40V and the amplitude of the lighting pulse Ph is changed from 50V to 400V
  • the solid line D is the amplitude of the write pulse Pw. Shows the characteristics when the lighting pulse Ph amplitude is changed from 50V to 400V.
  • the lighting pulse Ph when the lighting pulse Ph is changed from 100 V to 300 V, it can be seen that the emission luminance changes almost linearly.
  • write pulse Pw oscillation Comparing the width between 40V and 70V the 70V range has a wider dynamic range of the light emission luminance change with respect to the lighting pulse Ph, which is advantageous for improving the brightness and contrast of the image display.
  • This tendency is a force that seems to be more advantageous as the amplitude (in this case, absolute value) of the write pulse Pw is increased over the range until the emission luminance is saturated with respect to the amplitude setting of the write pulse Pw. Even in this case, it is preferable to set the optimum value in relation to the withstand voltage and power consumption of the signal transmission system.
  • the fourth experimental example looks at how the electron emission amount force of the electron-emitting device 10A changes depending on the level of the collector voltage Vc shown in Fig. 24 or Fig. 25.
  • the change in the amount of emitted electrons was measured by detecting the light emission of the phosphor 134 with a light receiving element (photodiode) as in the first experimental example.
  • the experimental results are shown in FIG.
  • the solid line E shows the characteristics when the level of the collector voltage Vc is 3kV and the amplitude of the lighting pulse Ph is changed from 80V to 500V.
  • the solid line F is the level of the collector voltage Vc. The characteristics when the amplitude of the lighting pulse Ph is changed from 80V to 500V are shown.
  • the dynamic range of the emission luminance change with respect to the lighting pulse Ph is wider than when the collector voltage Vc is 7 kV and the force is 3 kV. It can be seen that it is advantageous in improving the above. This tendency is a force that seems to be more advantageous as the level of the collector voltage Vc is increased. In this case as well, it is preferable to set the optimum value in relation to the withstand voltage and power consumption of the signal transmission system.
  • FIG. 31 typically shows the operation of pixels in 1 row, 1 column, 2 rows, 1 column, and n rows, 1 column.
  • the electron-emitting device 10A used here has a coercive voltage vl at point p2 in FIG. 16 of, for example, 20V, a coercive voltage v2 at point p5 of + 70V, a voltage v3 at point p3 of ⁇ 50V, and a voltage at point p4.
  • v4 has the characteristics of + 50V.
  • One charge accumulation period Td includes n selection periods Ts. Since each selection period Ts becomes the selection period Ts of the corresponding row, it does not correspond !, and the nl number of rows becomes the non-selection period Tn. [0161] Then, in this driving method, during the charge accumulation period Td, all the electron-emitting devices 10A are scanned, and pixels corresponding to a plurality of electron-emitting devices 10A corresponding to ON-target (light-emitting target) pixels, respectively.
  • a selection signal Ss of 50 V is supplied to the row selection line 106 of the first row, and the other For example, a non-selection signal Sn of 0 V is supplied to the row selection line 106 of the row.
  • the voltage of the pixel signal Sd supplied to the signal line 108 of the pixel to be turned ON (light emission) is in the range of 0 V or more and 30 V or less, and each of the corresponding pixels The voltage depends on the brightness level. If the luminance level is maximum, it will be 0V.
  • the modulation according to the luminance level of the pixel signal Sd is performed through the amplitude modulation circuit 122 shown in FIG. 19 and the pulse width modulation circuit 126 shown in FIG.
  • the voltage of the pixel signal Sd supplied to the electron-emitting device 10A corresponding to the pixel indicating OFF (quenching) is, for example, 50 V.
  • the electron-emitting device corresponding to the OFF target pixel 0V is applied to 10A, which is the state of point pi in the characteristics of Fig. 16, and no electrons are stored.
  • a voltage of 0 V or more and 50 V or less is applied between the upper electrode 14 and the lower electrode 16 of the electron-emitting device 10A corresponding to the pixel in the first row. Since the voltage does not reach point 4 of the 16 characteristics, electrons are not emitted from the electron-emitting device 10A corresponding to the pixel to be turned ON (light emission) in the first row. That is, the pixel in the first row in the non-selected state is not affected by the pixel signal Sd supplied to the pixel in the second row in the selected state.
  • the 50V selection signal Ss is supplied to the row selection line 106 of the nth row, and the 0V non-selection signal is supplied to the row selection line 106 of the other row. Sn is supplied. Also in this case, a voltage of ⁇ 50 V or more and ⁇ 20 V or less is applied between the upper electrode 14 and the lower electrode 16 of the electron-emitting device 10A corresponding to the pixel to be turned ON (light emission) according to the luminance level. .
  • a voltage of 0 V or more and 50 V or less is applied between the upper electrode 14 and the lower electrode 16 of the electron-emitting device 10A corresponding to each pixel in one row and one (n ⁇ 1) row in the non-selected state.
  • a voltage of 0 V or more and 50 V or less is applied between the upper electrode 14 and the lower electrode 16 of the electron-emitting device 10A corresponding to each pixel in one row and one (n ⁇ 1) row in the non-selected state.
  • the light emission period Th starts when the selection period Ts of the n-th row has elapsed.
  • a reference voltage for example, 0 V
  • a voltage 350 V
  • Pulse power supply 118 -400V + row selection circuit 110 power supply voltage 50V is applied.
  • a high voltage (+350 V) is applied between the upper electrode 14 and the lower electrode 16 of the all-electron emitting device 10A. All the electron-emitting devices 10A are in the state of the characteristic point p6 in FIG.
  • electrons are transmitted from the portion where the electrons are accumulated in the emitter section 12 through the penetrating section 20. Released. Of course, electrons are also emitted from the vicinity of the outer periphery of the upper electrode 14.
  • electrons are emitted from the electron-emitting device 10A corresponding to the pixel to be turned ON (light emission).
  • the emitted electrons are guided to the collector electrode 132 corresponding to these electron-emitting devices 10A to excite the corresponding phosphor 134 and emit light. Thereby, the surface force image of the transparent plate 130 is displayed.
  • the frame unit electrons are accumulated in the electron-emitting device 10A corresponding to the pixel to be turned ON (light emission) in the charge accumulation period Td, and the electrons accumulated in the light emission period Th are By emitting and emitting fluorescent light, the surface force of the transparent plate 130 is also displayed as a moving image or a still image.
  • the electron-emitting device according to the first embodiment has a plurality of electron-emitting devices 10A arranged according to a plurality of pixels, and the electron-emitting devices from each electron-emitting device 10A This makes it easy to apply to the display 100 that displays images.
  • all the electron-emitting devices are scanned during the charge accumulation period Td in one frame, and the luminance of each of the pixels corresponding to the plurality of electron-emitting devices 10A corresponding to the ON target pixels is determined.
  • a voltage according to the level an amount of charge corresponding to the luminance level of the pixel corresponding to each of the plurality of electron-emitting devices 10A corresponding to the ON target pixel is accumulated, and in the next light emission period Th.
  • a constant voltage to all the electron-emitting devices 10A By applying a constant voltage to all the electron-emitting devices 10A, a plurality of electron-emitting devices 10A corresponding to the pixels to be turned on emit electrons corresponding to the luminance level of the corresponding pixels, and turn on.
  • the target pixel can be made to emit light.
  • the relationship between the voltage V3 at which electrons are accumulated and saturated and the voltage V4 at which the emission of electrons starts is 1 ⁇ I V4 I / I V3 I ⁇ 1.5.
  • the electron-emitting devices 10A are arranged in a matrix, synchronized in the horizontal scanning period, and the electron-emitting devices 10A are selected in units of one row, and the selected electron-emitting devices 10A are selected.
  • the pixel signal Sd corresponding to the luminance level of each pixel is supplied, the pixel signal Sd is also supplied to the non-selected pixel.
  • the selected state electrons The voltage level of the pixel signal Sd supplied to the emitting element 10A is set to an arbitrary voltage from the reference voltage to the voltage V3, and a signal having a polarity opposite to that of the pixel signal Sd is supplied to the non-selected electron emitting element 10A, for example. Even in a simple voltage relationship, the memory effect at each pixel can be realized without the pixel in the non-selected state being affected by the pixel signal Sd to the pixel in the selected state. High contrast can be achieved.
  • this display 100 necessary charges are accumulated in all the electron-emitting devices 10A during the charge accumulation period Td, and electrons are emitted from all the electron-emitting devices 10A during the subsequent light-emitting period Th. A voltage necessary for the ON is applied, and electrons are emitted from the plurality of electron-emitting devices 10A corresponding to the ON target pixels so that the ON target pixels emit light.
  • the period Th in which the voltage for emitting electrons (emission voltage) is applied to all the electron-emitting devices 10A is naturally shorter than one frame, and the first period shown in FIGS. 26A and 26B is used.
  • the power consumption can be greatly reduced compared to the case where charge accumulation and light emission are performed during scanning to the pixel because the period of applying the emission voltage can be shortened so that the power of the experimental example 1 can also be achieved. Can be made.
  • each electron-emitting device 10A has a brightness level.
  • the circuit for applying the corresponding voltage can be driven at a low voltage.
  • the pixel signal corresponding to the image and the charge accumulation period Td selection signal SsZ non-selection signal S n is the force that needs to be driven for each row or column.
  • the drive voltage may be several tens of volts. Therefore, an inexpensive multi-output driver used in a fluorescent display tube or the like is used. Can be used.
  • the voltage that sufficiently discharges electrons may be higher than the drive voltage, but since all the pixels to be turned on need to be driven together, No circuit parts are required. For example, it is sufficient to have a drive circuit with only one output composed of high withstand voltage discreet components, which is advantageous in that the cost is low and the circuit scale is small.
  • the electron-emitting device 10B according to the second embodiment has substantially the same configuration as the electron-emitting device 10A according to the first embodiment described above.
  • the constituent material of the electrode 14 is the same as that of the lower electrode 16, the thickness t of the upper electrode 14 is thicker than 10 ⁇ m, and the penetrating part 20 is etched (wet etching, dry etching), liftoff, laser, etc. It is characterized in that it is artificially formed using.
  • the shape of the penetrating portion 20 the shape of the hole 32, the shape of the notch 44, and the shape of the slit 48 can be adopted as in the first embodiment described above.
  • the lower surface 26a of the peripheral portion 26 of the penetrating portion 20 in the upper electrode 14 is gradually inclined upward as it is directed toward the center of the penetrating portion 20.
  • This shape can be easily formed by using, for example, lift-off.
  • the floating electrode 50 may be present in a portion corresponding to the penetrating portion 20 in the upper surface of the emitter portion 12.
  • an electrode having a substantially T-shaped cross section may be formed as the upper electrode 14.
  • the shape of the upper electrode 14, particularly, the shape in which the peripheral portion 26 of the penetrating portion 20 of the upper electrode 14 is raised may be used.
  • the film material to be the upper electrode 14 may include a material that is gasified during the firing process. Thereby, in the firing step, the material is gasified, and as a result, a large number of through portions 20 are formed in the upper electrode 14 and the peripheral portion 26 of the through portion 20 is lifted.
  • the electron-emitting device 10C according to the third embodiment is made of a force having substantially the same configuration as the electron-emitting device 10A according to the first embodiment described above, for example, ceramics.
  • the lower electrode 16 is formed on the substrate 60
  • the emitter 12 is formed on the substrate 60 and covers the lower electrode 16, and the upper electrode is formed.
  • 14 is different in that 14 is formed on the emitter 12.
  • a space 62 for forming a thin portion described later is provided at a position corresponding to a portion where each of the emitter portions 12 is formed.
  • the void 62 has a small diameter provided on the other end surface of the substrate 60 and communicates with the outside through the through hole 64.
  • the portion where the void 62 is formed is thin (hereinafter referred to as the thin portion 66), and the other portions are thick and are fixed to support the thin portion 66. It is designed to function as part 68.
  • the substrate 60 is a laminate of the substrate layer 60A as the lowermost layer, the spacer layer 60B as the intermediate layer, and the thin plate layer 60C as the uppermost layer, and among the spacer layers 60B, the emitter 60 It can be grasped as an integral structure in which a void 62 is formed at a location corresponding to the portion 12.
  • the substrate layer 60A functions not only as a reinforcing substrate but also as a wiring substrate.
  • the substrate 60 may be formed by single firing of the substrate layer 60A, the spacer layer 60B, and the thin plate layer 60C, or may be formed by bonding these layers 60A-60C.
  • the thin-walled portion 66 is preferably a high heat resistant material. The reason is that the thin-walled portion 66 is directly supported by the fixing portion 68 without using the material having poor heat resistance such as an organic adhesive for the emitter portion 12. In the case of a structure to be held, it is preferable that the thin portion 66 is a high heat resistant material so that the thin portion 66 does not change quality at least when the emitter portion 12 is formed.
  • the thin-walled portion 66 includes a wiring that leads to the upper electrode 14 formed on the substrate 60, and the lower electrode 1
  • the material of the thin-walled portion 66 may be a highly heat-resistant metal or a material such as a hollow whose surface is covered with a ceramic material such as glass, but ceramics is most suitable. .
  • Ceramics constituting the thin-walled portion 66 include, for example, stabilized acid zirconium, acid aluminum, magnesium oxide, titanium oxide, spinel, mullite, aluminum nitride, silicon nitride, glass A mixture of these can be used. Of these, aluminum oxide and stabilized acid-zirconium force are preferred from the viewpoint of strength and rigidity. Stabilized zirconium oxide is particularly suitable from the viewpoints of relatively high mechanical strength, relatively high toughness, and relatively small chemical reaction with the upper electrode 14 and the lower electrode 16. is there. Note that stabilized zirconium oxide includes stabilized zirconium oxide and partially stabilized zirconium oxide. Stabilized zirco oxide
  • -UM has a cubic crystal structure, so no phase transition occurs.
  • zirconium oxide has a phase transition between monoclinic and tetragonal crystals at around 1000 ° C, and cracks may occur during such phase transition.
  • Oxide stabilized zirconium two ⁇ beam is calcium oxide, magnesium oxide, yttrium oxide, scandium oxide, acid I spoon ytterbium, cerium oxide, a stabilizer such as rare earth metal Sani ⁇ , 1 one 30 mole 0 / Contains 0 .
  • the stabilizer contains yttrium oxide.
  • yttrium oxide preferably 1. 5-6 mole 0/0, further preferably contains 2-4 mole 0/0, further comprising containing the aluminum oxide 0.5 1 5 mole 0/0 It is preferable.
  • the force that can make the crystal phase a cubic + monoclinic mixed phase, a tetragonal + monoclinic mixed phase, a cubic + tetragonal + monoclinic mixed phase, etc.
  • the main crystal phase is a tetragonal or tetragonal + cubic mixed phase.
  • the substrate 60 also has a ceramic force, a relatively large number of crystal grains constitute the substrate 60.
  • the average grain size of the crystal grains is preferably 0.05-2 m, more preferably 0.1-.
  • the fixing portion 68 preferably has a ceramic force, but may be the same ceramic as the material of the thin-walled portion 66 or may be different.
  • the ceramics constituting the fixed portion 68 for example, as in the material of the thin portion 66, for example, stabilized acid zirconium, acid medium, magnesium oxide, titanium oxide, spinel, mullite.
  • Aluminum nitride, silicon nitride, glass, a mixture thereof, or the like can be used.
  • the substrate 60 used in the electron-emitting device 10C is made of a material mainly composed of acid zirconium, a material mainly composed of acid aluminum, or a material mainly composed of a mixture thereof. Is preferably employed. Among them, a material mainly composed of zirconium oxide is preferred.
  • a clay or the like may be added as a sintering aid, it is necessary to adjust the aid component so as not to include excessively glassy substances such as silicon oxide and boron oxide. This is because these easily vitrified materials are advantageous in bonding the substrate 60 and the emitter 12, but promote the reaction between the substrate 60 and the emitter 12, and the predetermined emitter 12 is formed. This is because it is difficult to maintain the characteristics, and as a result, the device characteristics are deteriorated.
  • the main component means a component present in a ratio of 50% or more by weight.
  • the thickness of the thin portion 66 and the thickness of the emitter portion 12 are preferably the same dimension. This is because when the thickness of the thin portion 66 is extremely thicker than the thickness of the emitter portion 12 (by one digit or more), the thin portion 66 acts to prevent the shrinkage of the emitter portion 12 from firing shrinkage. The stress at the interface between the portion 12 and the substrate 60 becomes large, and it is easy to peel off. On the other hand, if the thickness dimension is approximately the same, the substrate 60 (thin wall portion 66) can easily follow the firing shrinkage of the emitter portion 12, which is preferable for an integrated substrate.
  • the thickness of the thin-walled portion 66 is 1 to 100 m 3 to 50 m force S, more preferably 5 to force S Even more preferred.
  • the thickness of the emitter portion 12 is preferably 5-100 m, more preferably 5-30 ⁇ m, even more preferably 5-30 ⁇ m.
  • various thick film forming methods such as a screen printing method, a dubbing method, a coating method, an electrophoresis method, an ion beam method, a sputtering method, Various thin film formation methods such as vacuum deposition, ion plating, chemical vapor deposition (CVD), and plating can be used.
  • a material that becomes the lower electrode 16, a material that becomes the emitter portion 12, and a material that becomes the upper electrode 14 are sequentially laminated on the substrate 60, and then an integrated structure is formed.
  • the substrate may be fired, or the lower electrode 16, the emitter portion 12, and the upper electrode 14 may be heat-treated (fired) each time they are formed to be integrated with the substrate 60.
  • a heat treatment (firing treatment) for integration is not required! ,In some cases.
  • the temperature related to the baking treatment for integrating the substrate 60, the emitter section 12, the upper electrode 14, and the lower electrode 16 is in the range of 500-1400 ° C, preferably 1000-1400. It should be in the range of ° C. Furthermore, when heat treatment is performed on the film-like emitter 12, the firing process is performed while controlling the atmosphere together with the evaporation source of the emitter 12 so that the yarn formation of the emitter 12 does not become unstable at high temperatures! Preferred to do.
  • the emitter portion 12 is covered with an appropriate member and fired so that the surface of the emitter portion 12 is not directly exposed to the firing atmosphere.
  • the emitter 12 contracts during firing, and the stress generated during the contraction passes through deformation of the void 62 and the like.
  • the emitter 12 can be sufficiently densified.
  • the withstand voltage is improved, and the polarization inversion and the polarization change in the emitter section 12 are efficiently performed, and the characteristics as the electron-emitting device 10C are improved. become.
  • a substrate having a three-layer structure is used as the substrate 60.
  • the lowermost substrate layer 60A is used. Saving You can use the abbreviated two-layer substrate 60a.
  • the electron-emitting device according to the present invention is not limited to the above-described embodiment, but can of course have various configurations without departing from the gist of the present invention.

Abstract

An electron emitting element (10A) is provided with an emitter part (12) composed of a dielectric material, and an upper electrode (14) and a lower electrode (16) whereupon a driving voltage (Va) is applied for electron emission. The upper electrode (14) is formed on an upper plane of the emitter part (12), and the lower electrode (16) is formed on a lower plane of the emitter part (12). The upper electrode (14) is provided with a plurality of penetrating parts (20) from which the emitter part (12) is exposed. In the upper electrode (14), a plane facing the emitter part (12) at a circumference part (26) of the penetrating part (20) is separated from the emitter part (12).

Description

明 細 書  Specification
電子放出素子  Electron emitter
技術分野  Technical field
[0001] 本発明は、ェミッタとなる物質に形成された第 1の電極と第 2の電極とを有する電子 放出素子に関する。  [0001] The present invention relates to an electron-emitting device having a first electrode and a second electrode formed in a substance serving as an emitter.
背景技術  Background art
[0002] 近時、電子放出素子は、力ソード電極及びアノード電極を有し、フィールドエミッショ ンディスプレイ(FED)やバックライトのような種々のアプリケーションに適用されている 。 FEDに適用する場合、複数の電子放出素子を二次元的に配列し、これら電子放 出素子に対する複数の蛍光体を、所定の間隔をもってそれぞれ配置するようにして いる。  [0002] Recently, an electron-emitting device has a force sword electrode and an anode electrode, and is applied to various applications such as a field emission display (FED) and a backlight. When applied to FED, a plurality of electron-emitting devices are two-dimensionally arranged, and a plurality of phosphors for these electron-emitting devices are arranged with a predetermined interval.
[0003] この電子放出素子の従来例としては、例えば特許文献 1一 5がある力 いずれもエミ ッタとなる物質に誘電体を用いて ヽな 、ため、対向電極間にフォーミンダカ卩ェもしく は微細加工が必要となったり、電子放出のために高電圧を印加しなければならず、ま た、パネル製作工程が複雑で製造コストが高くなるという問題がある。  [0003] As a conventional example of this electron-emitting device, for example, Patent Documents 1 to 15 all use a dielectric as a substance that serves as an emitter. However, there is a problem that fine processing is required, a high voltage must be applied for electron emission, and the panel manufacturing process is complicated and the manufacturing cost increases.
[0004] そこで、ェミッタとなる物質を誘電体で構成することが考えられており、誘電体からの 電子放出に関して、以下の非特許文献 1一 3にて諸説が述べられている。  [0004] Consequently, it has been considered that a substance serving as an emitter is composed of a dielectric, and various theories are described in the following Non-Patent Documents 1 to 13 regarding electron emission from the dielectric.
特許文献 1 :特開平 1 - 311533号公報  Patent Document 1: JP-A-1-311533
特許文献 2 :特開平 7 - 147131号公報  Patent Document 2: JP-A-7-147131
特許文献 3:特開 2000— 285801号公報  Patent Document 3: Japanese Patent Laid-Open No. 2000-285801
特許文献 4:特公昭 46— 20944号公報  Patent Document 4: Japanese Patent Publication No. 46-20944
特許文献 5:特公昭 44— 26125号公報  Patent Document 5: Japanese Patent Publication No. 44-26125
非特許文献 1:安岡、石井著「強誘電体陰極を用いたパルス電子源」応用物理第 68 卷第 5号、 p546— 550 (1999)  Non-Patent Document 1: Yasuoka, Ishii, "Pulse electron source using a ferroelectric cathode" Applied Physics No. 68 卷 No. 5, p546-550 (1999)
非特干文献 2 :V.F.Puchkarev, G.A.Mesyats, On the mechanism of emission from the ferroelectric ceramic cathode, J.Appl.Phys., vol. 78, No. 9, 1 November, 1995, p. 5633-5637 非特許文献 3 : H.Riege, Electron emission ferroelectrics - a review, Nucl. Instr. and Meth. A340, p. 80-89 (1994) Non-Patent Literature 2: VFPuchkarev, GAMesyats, On the mechanism of emission from the ferroelectric ceramic cathode, J. Appl. Phys., Vol. 78, No. 9, 1 November, 1995, p. 5633-5637 Non-Patent Document 3: H.Riege, Electron emission ferroelectrics-a review, Nucl. Instr. And Meth.A340, p. 80-89 (1994)
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0005] ところで、従来の電子放出素子 200においては、図 39に示すように、ェミッタとなる 物質 (ェミッタ部) 202に上部電極 204及び下部電極 206を形成する場合、特に、ェ ミッタ部 202上に上部電極 204が密着して形成されることになる。電界集中ポイントは 、上部電極 204Zェミッタ部 202Z真空の 3重点である力 この場合、上部電極 204 の周縁部分が該当する。  Incidentally, in the conventional electron-emitting device 200, as shown in FIG. 39, when the upper electrode 204 and the lower electrode 206 are formed on a substance (emitter portion) 202 serving as an emitter, particularly on the emitter portion 202. Thus, the upper electrode 204 is formed in close contact with the upper electrode 204. The electric field concentration point is a force that is the triple point of the upper electrode 204Z emitter 202Z vacuum. In this case, the peripheral portion of the upper electrode 204 corresponds.
[0006] し力しながら、上部電極 204の周縁部分がェミッタ部 202上に密着されていることか ら、電界集中の度合いが小さぐ電子を放出するに必要なエネルギーが小さいという 問題がある。また、電子放出箇所も上部電極 204の周縁部分に限られることから、全 体の電子放出特性にばらつきが生じ、電子放出の制御が困難になると共に、電子放 出効率が低 、と 、う問題もある。  [0006] However, since the peripheral portion of the upper electrode 204 is in close contact with the emitter portion 202, there is a problem that the energy required for emitting electrons with a small electric field concentration is small. In addition, since the electron emission location is limited to the peripheral portion of the upper electrode 204, the overall electron emission characteristics vary, making it difficult to control the electron emission and lowering the electron emission efficiency. There is also.
[0007] 本発明はこのような課題を考慮してなされたものであり、高い電界集中を容易に発 生させることができ、し力も、電子放出箇所を多くすることができ、電子放出について 高出力、高効率を図ることができ、低電圧駆動も可能な電子放出素子を提供すること を目的とする。  [0007] The present invention has been made in view of such problems, and can easily generate a high electric field concentration, and can increase the number of electron emission locations. An object of the present invention is to provide an electron-emitting device that can achieve high output and high efficiency and can be driven at a low voltage.
[0008] また、本発明の他の目的は、複数の画素に応じて配列された複数の電子放出素子 を有し、各電子放出素子からの電子放出によって画像表示を行うディスプレイに簡単 に適用させることができる電子放出素子を提供することにある。  [0008] Further, another object of the present invention is simply applied to a display having a plurality of electron-emitting devices arranged in accordance with a plurality of pixels and performing image display by electron emission from each electron-emitting device. An object of the present invention is to provide an electron-emitting device that can be used.
課題を解決するための手段  Means for solving the problem
[0009] 本発明に係る電子放出素子は、誘電体で構成されたェミッタとなる物質と、電子放 出のための駆動電圧が印加される第 1の電極及び第 2の電極とを有し、前記第 1の電 極は、前記ェミッタとなる物質の第 1の面に形成され、前記第 2の電極は、前記エミッ タとなる物質の第 2の面に形成され、少なくとも前記第 1の電極は、前記ェミッタとなる 物質が露出される複数の貫通部を有し、前記第 1の電極のうち、前記貫通部の周部 における前記ェミッタとなる物質と対向する面力 前記ェミッタとなる物質力 離間し ていることを特徴とする。 [0009] An electron-emitting device according to the present invention includes a substance serving as an emitter composed of a dielectric, and a first electrode and a second electrode to which a driving voltage for electron emission is applied, The first electrode is formed on a first surface of the substance serving as the emitter, and the second electrode is formed on a second surface of the substance serving as the emitter, and at least the first electrode. Has a plurality of penetrating portions from which the substance serving as the emitter is exposed, and of the first electrode, the surface force facing the substance serving as the emitter in the peripheral portion of the penetrating portion The material force serving as the emitter Spaced apart It is characterized by.
[0010] 先ず、第 1の電極と第 2の電極との間に駆動電圧が印加される。この駆動電圧は、 例えば、パルス電圧あるいは交流電圧のように、時間の経過に伴って、基準電圧 (例 えば OV)よりも高 ヽ又は低 ヽ電圧レベルから基準電圧よりも低 ヽ又は高 ヽ電圧レべ ルに急激に変化する電圧として定義される。  [0010] First, a drive voltage is applied between the first electrode and the second electrode. This drive voltage is, for example, a pulse voltage or an AC voltage, which is higher or lower than the reference voltage (e.g. OV) over time, from a voltage level lower or higher than the reference voltage. It is defined as a voltage that changes rapidly at a level.
[0011] また、ェミッタとなる物質の第 1の面と第 1の電極と該電子放出素子の周囲の媒質( 例えば、真空)との接触箇所においてトリプルジャンクションが形成されている。ここで [0011] Further, a triple junction is formed at a contact point between the first surface of the substance serving as an emitter, the first electrode, and a medium (for example, a vacuum) around the electron-emitting device. here
、トリプルジャンクションとは、第 1の電極とェミッタとなる物質と真空との接触により形 成される電界集中部として定義される。なお、前記トリプルジャンクションには、第 1の 電極とェミッタとなる物質と真空が 1つのポイントとして存在する 3重点も含まれる。本 発明では、トリプルジャンクションは、複数の貫通部の周部や第 1の電極の周縁部に 形成されることになる。従って、第 1の電極と第 2の電極との間に上述のような駆動電 圧が印加されると、上記したトリプルジャンクションにおいて電界集中が発生する。 A triple junction is defined as an electric field concentrator formed by the contact between the first electrode and the substance serving as an emitter and a vacuum. The triple junction also includes the triple point where the first electrode, the substance serving as the emitter, and the vacuum exist as one point. In the present invention, the triple junction is formed in the peripheral portion of the plurality of through portions and the peripheral portion of the first electrode. Therefore, when the driving voltage as described above is applied between the first electrode and the second electrode, electric field concentration occurs in the triple junction described above.
[0012] そして、基準電圧よりも高い又は低い電圧レベルの出力期間を第 1の出力期間、基 準電圧よりも低い又は高い電圧レベルの出力期間を第 2の出力期間としたとき、先ず 、第 1の出力期間においては、上記したトリプルジャンクションにおいて例えば一方向 への電界集中が発生し、例えばェミッタとなる物質のうち、第 1の電極の貫通部に対 応した部分や第 1の電極の周縁部近傍の部分に電子が蓄積される。このとき、第 1の 電極が電子供給源として機能することになる。  [0012] Then, when an output period having a voltage level higher or lower than the reference voltage is a first output period, and an output period having a voltage level lower or higher than the reference voltage is a second output period, first, In the output period of 1, the electric field concentration in one direction occurs, for example, in the triple junction described above. For example, of the substance serving as an emitter, the portion corresponding to the penetrating portion of the first electrode and the peripheral edge of the first electrode Electrons are accumulated in the vicinity of the part. At this time, the first electrode functions as an electron supply source.
[0013] 次の第 2の出力期間において、駆動電圧の電圧レベルが急減に変化すると、今度 は、上記したトリプルジャンクションにおいて逆方向への電界集中が発生し、ェミッタ となる物質のうち、前記電子が蓄積されていた部分から、貫通部を通じて電子が放出 される。もちろん、第 1の電極の外周部近傍からも電子が放出される。  [0013] In the next second output period, when the voltage level of the drive voltage changes suddenly, electric field concentration in the reverse direction occurs at the triple junction, and among the substances serving as the emitter, the electron Electrons are emitted through the penetrating part from the part where the ions were accumulated. Of course, electrons are also emitted from the vicinity of the outer periphery of the first electrode.
[0014] また、別の電子放出方式においては、先ず、第 1の出力期間において、電子放出 のための準備 (例えばェミッタとなる物質の一方向への分極等)が行われる。次の第 2 の出力期間において、駆動電圧の電圧レベルが急減に変化すると、今度は、上記し たトリプルジャンクションにおいて電界集中が発生し、この電界集中によって第 1の電 極から 1次電子が放出され、ェミッタとなる物質のうち、貫通部から露出する部分並び に第 1の電極の外周部近傍に衝突することとなる。これによつて、 1次電子が衝突した 部分から 2次電子(1次電子の反射電子を含む)が放出される。すなわち、第 2の出力 期間の初期段階において、前記貫通部並びに第 1の電極の外周部近傍から 2次電 子が放出されることとなる。 In another electron emission method, first, in the first output period, preparation for electron emission (for example, polarization in one direction of a substance serving as an emitter) is performed. If the voltage level of the drive voltage changes suddenly during the second output period, electric field concentration occurs at the triple junction described above, and primary electrons are emitted from the first electrode due to this electric field concentration. Part of the material that becomes the emitter It will collide with the vicinity of the outer periphery of the first electrode. As a result, secondary electrons (including reflected electrons of the primary electrons) are emitted from the part where the primary electrons collide. That is, in the initial stage of the second output period, secondary electrons are emitted from the vicinity of the through hole and the outer periphery of the first electrode.
[0015] そして、この電子放出素子においては、先ず、第 1の電極に複数の貫通部を形成し たことから、各貫通部並びに第 1の電極の外周部近傍から均等に電子が放出され、 全体の電子放出特性のばらつきが低減し、電子放出の制御が容易になると共に、電 子放出効率が高くなる。 [0015] In this electron-emitting device, first, since the plurality of through portions are formed in the first electrode, electrons are evenly emitted from each through portion and the vicinity of the outer periphery of the first electrode, Variations in the overall electron emission characteristics are reduced, control of electron emission is facilitated, and electron emission efficiency is increased.
[0016] また、本発明は、前記第 1の電極のうち、前記貫通部の周部における前記ェミッタと なる物質と対向する面と前記ェミッタとなる物質との間にギャップが形成された形とな ることから、駆動電圧を印加した際に、該ギャップの部分において電界集中が発生し 易くなる。これは、電子放出の高効率ィ匕につながり、駆動電圧の低電圧化 (低い電圧 レベルでの電子放出)を実現させることができる。  [0016] Further, the present invention provides a shape in which a gap is formed between a surface of the first electrode facing the substance serving as the emitter at a peripheral portion of the penetrating part and the substance serving as the emitter. Therefore, when a drive voltage is applied, electric field concentration is likely to occur in the gap portion. This leads to a high efficiency of electron emission, and a low drive voltage (electron emission at a low voltage level) can be realized.
[0017] 上述したように、本発明は、前記第 1の電極のうち、前記貫通部の周部における前 記ェミッタとなる物質と対向する面と前記ェミッタとなる物質との間にギャップが形成さ れて、第 1の電極における貫通部の周部が庇状 (フランジ状)となることから、ギャップ の部分での電界集中が大きくなることとも相俟って、前記庇状の部分 (貫通部の周部 )から電子がされ易くなる。これは、電子放出の高出力、高効率化につながり、駆動 電圧の低電圧化を実現させることができる。また、ェミッタとなる物質に蓄積された電 子を放出させる方式や第 1の電極からの 1次電子をェミッタとなる物質に衝突させて 2 次電子を放出させる方式のいずれにしても、第 1の電極における貫通部の周部がゲ ート電極 (制御電極、フォーカス電子レンズ等)として機能するので、放出電子の直進 性を向上させることができる。これは、例えば電子放出素子を多数並べて例えばディ スプレイの電子源として構成した場合に、クロストークを低減する上で有利となる。  As described above, according to the present invention, a gap is formed between the surface of the first electrode facing the substance serving as the emitter in the peripheral portion of the penetrating part and the substance serving as the emitter. In addition, since the peripheral portion of the through-hole in the first electrode has a hook shape (flange shape), the electric field concentration in the gap portion increases, and the hook-like portion (penetration) Electrons are easily generated from the peripheral part of the part. This leads to higher output and higher efficiency of electron emission, and lower drive voltage can be realized. In addition, either the method of emitting electrons accumulated in a substance serving as an emitter or the method of emitting secondary electrons by colliding primary electrons from the first electrode with a material serving as an emitter. Since the peripheral portion of the through portion of the electrode functions as a gate electrode (control electrode, focus electron lens, etc.), the straightness of the emitted electrons can be improved. This is advantageous in reducing crosstalk when, for example, a large number of electron-emitting devices are arranged as an electron source for display.
[0018] このように、本発明においては、高い電界集中を容易に発生させることができ、しか も、電子放出箇所を多くすることができ、電子放出について高出力、高効率を図るこ とができ、低電圧駆動 (低消費電力)も可能となる。  As described above, in the present invention, high electric field concentration can be easily generated. However, the number of electron emission portions can be increased, and high output and high efficiency can be achieved for electron emission. In addition, low voltage drive (low power consumption) is also possible.
[0019] そして、前記構成において、前記ェミッタとなる物質の少なくとも前記第 1の面は、 誘電体の粒界による凹凸が形成され、前記第 1の電極は、前記誘電体の粒界におけ る凹部に対応した部分に前記貫通部が形成されるようにしてもよい。 [0019] In the configuration, at least the first surface of the substance serving as the emitter is Concavities and convexities are formed by a grain boundary of the dielectric, and the first electrode may have the penetrating portion formed in a portion corresponding to the concave portion in the grain boundary of the dielectric.
[0020] これにより、前記第 1の電極のうち、前記貫通部の周部における前記ェミッタとなる 物質と対向する面が、前記ェミッタとなる物質力 離間した構成、すなわち、前記貫 通部の周部における前記ェミッタとなる物質と対向する面と前記ェミッタとなる物質と の間にギャップが形成された構成を簡単に実現させることができる。  [0020] Thereby, in the first electrode, the surface of the peripheral portion of the through portion that faces the substance serving as the emitter is separated from the material force serving as the emitter, that is, the periphery of the through portion. It is possible to easily realize a configuration in which a gap is formed between the surface of the portion facing the substance serving as the emitter and the substance serving as the emitter.
[0021] また、前記構成において、前記ェミッタとなる物質の前記第 1の面と、前記第 1の電 極のうち、前記貫通部の周部における前記ェミッタとなる物質と対向する面とのなす 角の最大角度 Θは、 1° ≤ Θ ≤60° であることが好ましい。また、前記構成において 、前記ェミッタとなる物質の前記第 1の面と、前記第 1の電極のうち、前記貫通部の周 部における前記ェミッタとなる物質と対向する面との間の鉛直方向に沿った最大間隔 d力 0 /z m< d≤ mであることが好ましい。これらの構成により、ギャップの部分 での電界集中の度合いをより大きくすることができ、電子放出についての高出力、高 効率、並びに駆動電圧の低電圧化を効率よく図ることができる。  [0021] Further, in the above configuration, the first surface of the substance serving as the emitter is formed between a surface of the first electrode facing the substance serving as the emitter in the peripheral portion of the penetrating portion. The maximum angle Θ is preferably 1 ° ≤ Θ ≤60 °. Further, in the above configuration, in the vertical direction between the first surface of the substance serving as the emitter and the surface of the first electrode facing the substance serving as the emitter in the periphery of the through portion. The maximum spacing along the d force is preferably 0 / zm <d≤m. With these configurations, the degree of electric field concentration in the gap portion can be further increased, and high output and high efficiency with respect to electron emission, and low drive voltage can be efficiently achieved.
[0022] また、前記構成において、前記ェミッタとなる物質の前記第 1の面のうち、前記貫通 部と対応する部分にフローティング電極が存在していてもよい。この場合、フローティ ング電極も電子供給源となることから、電子の放出段階 (上述した第 2の出力期間)に おいて、多数の電子を貫通部を通じて外部に放出させることができる。  [0022] In the above configuration, a floating electrode may exist in a portion corresponding to the penetrating portion of the first surface of the substance serving as the emitter. In this case, since the floating electrode also serves as an electron supply source, a large number of electrons can be emitted to the outside through the through portion in the electron emission stage (the second output period described above).
[0023] また、前記構成において、前記貫通部は、孔であってもよい。ェミッタとなる物質のう ち、第 1の電極と第 2の電極間に印加される駆動電圧に応じて分極が反転あるいは 変化する部分は、第 1の電極が形成されている直下の部分 (第 1の部分)と、貫通部 の内周力 貫通部の内方に向力う領域に対応した部分 (第 2の部分)であり、特に、 第 2の部分は、駆動電圧のレベルや電界集中の度合いによって変化することになる。 従って、本発明では、前記孔の平均径が、 0. 1 m以上、 10 μ m以下であることが 好ましい。この範囲であれば、貫通部を通じて放出される電子の放出分布にばらつき がほとんどなくなり、効率よく電子を放出することができる。  [0023] Further, in the above configuration, the through portion may be a hole. Of the substance serving as an emitter, the part where the polarization is reversed or changed in accordance with the drive voltage applied between the first electrode and the second electrode is the part immediately below where the first electrode is formed (the first part). 1) and the inner peripheral force of the penetrating part (second part) corresponding to the region facing inward of the penetrating part, especially the second part is the drive voltage level and electric field concentration It will change depending on the degree. Therefore, in the present invention, the average diameter of the holes is preferably 0.1 m or more and 10 μm or less. Within this range, there is almost no variation in the electron emission distribution emitted through the penetrating portion, and electrons can be emitted efficiently.
[0024] なお、孔の平均径が 0. 1 μ m未満の場合、電子を蓄積する領域が狭くなり、放出さ れる電子の量が少なくなる。もちろん、孔を多数設けることも考えられるが、困難性を 伴い、製造コストが高くなるという懸念がある。孔の平均径が 10 mを超えると、ェミツ タとなる物質の前記貫通部力 露出した部分のうち、電子放出に寄与する部分 (第 2 の部分)の割合(占有率)が小さくなり、電子の放出効率が低下する。 [0024] When the average diameter of the holes is less than 0.1 μm, the region for accumulating electrons is narrowed and the amount of electrons emitted is reduced. Of course, it is possible to provide many holes, but the difficulty Along with this, there is a concern that the manufacturing cost is increased. When the average diameter of the holes exceeds 10 m, the ratio (occupancy) of the portion (second portion) contributing to electron emission in the exposed portion of the substance serving as the emitter is reduced. The release efficiency of the is reduced.
[0025] また、前記構成において、前記貫通部は、切欠きであってもよぐくし歯状の切欠き であってもよい。この場合、前記切欠きの平均幅は、 0. 1 m以上、 10 μ m以下であ ることが好ましい。 [0025] Further, in the above configuration, the through portion may be a notch or a comb-shaped notch. In this case, the average width of the notches is preferably 0.1 m or more and 10 μm or less.
[0026] また、前記構成において、前記貫通部は、任意の形状のスリットであってもよい。こ の場合、前記スリットの平均幅は、 0. 1 m以上、 10 μ m以下であることが好ましい。  [0026] In the above configuration, the through portion may be a slit having an arbitrary shape. In this case, the average width of the slit is preferably 0.1 m or more and 10 μm or less.
[0027] また、本発明に係る電子放出素子は、誘電体で構成されたェミッタとなる物質と、前 記ェミッタとなる物質の第 1の面に接するように形成された第 1の電極と、前記ェミッタ となる物質の第 2の面に接するように形成された第 2の電極とを有し、少なくとも前記 第 1の電極は、前記ェミッタとなる物質が露出される複数の貫通部を有し、電気的な 動作において、前記第 1の電極と前記第 2の電極間に、前記ェミッタとなる物質による コンデンサと、前記第 1の電極に形成された前記複数の貫通部によって前記第 1の 電極と前記ェミッタとなる物質との間に構成される複数のコンデンサの集合体とが形 成されることを特徴とする。  [0027] In addition, an electron-emitting device according to the present invention includes a substance serving as an emitter made of a dielectric, a first electrode formed so as to be in contact with the first surface of the substance serving as the emitter, and A second electrode formed so as to be in contact with the second surface of the substance serving as the emitter, and at least the first electrode has a plurality of through portions through which the substance serving as the emitter is exposed. In the electrical operation, the first electrode is formed by a capacitor made of a substance serving as the emitter between the first electrode and the second electrode, and the plurality of through portions formed in the first electrode. And an aggregate of a plurality of capacitors formed between the substance serving as the emitter.
[0028] つまり、前記貫通部の周部における前記ェミッタとなる物質と対向する面と前記エミ ッタとなる物質との間にギャップが形成され、これら複数のギャップによるコンデンサ の集合体が形成されることになる。この場合、ギャップによるコンデンサの容量値が相 対的に小さいものとなり、ェミッタとなる物質によるコンデンサとの分圧から、印加電圧 のほとんどはギャップに印加されることになり、各ギャップにおいて、電子放出の高出 力化が実現される。また、これらコンデンサの集合体はェミッタとなる物質によるコン デンサに直列接続された構造となる。従って、全体の容量値は、ェミッタとなる物質に よるコンデンサの容量値よりも小さくなる。このことから、電子放出は高出力であり、全 体の消費電力は小さくなるという好ましい特性を得ることができる。  [0028] That is, a gap is formed between a surface of the peripheral portion of the penetrating portion facing the emitter material and the emitter material, and an aggregate of capacitors is formed by the plurality of gaps. Will be. In this case, the capacitance value of the capacitor due to the gap is relatively small, and most of the applied voltage is applied to the gap due to the partial pressure with the capacitor due to the substance serving as an emitter. High output is realized. In addition, the aggregate of these capacitors has a structure in which they are connected in series to a capacitor made of a substance that serves as an emitter. Therefore, the overall capacitance value is smaller than the capacitance value of the capacitor due to the substance serving as the emitter. From this, it is possible to obtain desirable characteristics that electron emission is high output and overall power consumption is small.
[0029] また、本発明に係る電子放出素子は、電子放出部を有する電子放出素子において 、負電圧の印加によって電子の蓄積に伴う正電荷の量と負電荷の量が平衡な状態( 第 1の状態)に変化し、更なる電子の蓄積に伴って負電荷の量が正電荷の量よりも多 い状態 (第 2の状態)に変化し、前記第 2の状態力 正電圧の印加によって電子の放 出に伴う正電荷の量と負電荷の量が平衡な状態 (第 3の状態)に変化し、更なる電子 の放出に伴って正電荷の量が負電荷の量よりも多い状態に変化する場合に、前記 第 1の状態に変化するための印加電圧を VI、前記第 3の状態に変化するための印 カロ ]£を V2としたとさ、 [0029] In addition, the electron-emitting device according to the present invention is an electron-emitting device having an electron-emitting portion in a state in which the amount of positive charge and the amount of negative charge due to accumulation of electrons are balanced by applying a negative voltage (first The amount of negative charge is greater than the amount of positive charge as more electrons accumulate. The second state force changes to a state (third state) in which the amount of positive charge and the amount of negative charge associated with electron emission are balanced by applying a positive voltage. When the amount of positive charges changes to a state where the amount of positive charges is larger than the amount of negative charges as more electrons are emitted, the applied voltage for changing to the first state is set to VI and the third state. Mark for change Caro]
I VI I < I V2 I  I VI I <I V2 I
の特性を有することを特徴とする。この場合、 1. 5 X I VI I < I V2 Iであってもよ い。  It is characterized by having the following characteristics. In this case, 1.5 X I VI I <I V2 I may be used.
[0030] これにより、複数の画素に応じて配列された複数の電子放出素子を有し、各電子放 出素子からの電子放出によって画像表示を行うディスプレイに適用させることが容易 になる。  [0030] This facilitates application to a display having a plurality of electron-emitting devices arranged in accordance with a plurality of pixels and performing image display by electron emission from each electron-emitting device.
[0031] 例えば、 1枚の画像の表示期間を 1フレームとしたとき、該 1フレーム内のある期間 に、全ての前記電子放出素子を走査して、発光対象の画素に対応した複数の電子 放出素子にそれぞれ対応する画素の輝度レベルに応じた蓄積電圧を印加すること により、前記発光対象の画素に対応した複数の電子放出素子にそれぞれ対応する 画素の輝度レベルに応じた量の電荷を蓄積させ、次の期間に、全ての電子放出素 子に一定の放出電圧を印加して、前記発光対象の画素に対応した前記複数の電子 放出素子力 それぞれ対応する画素の輝度レベルに応じた量の電子を放出させて、 前記発光対象の画素を発光させることが可能となる。  [0031] For example, when the display period of one image is one frame, all the electron-emitting devices are scanned during a certain period in the one frame to emit a plurality of electrons corresponding to the pixel to be emitted. By applying a storage voltage corresponding to the luminance level of the pixel corresponding to each element, an amount of charge corresponding to the luminance level of the pixel corresponding to each of the plurality of electron-emitting elements corresponding to the pixel to be emitted is accumulated. In the next period, a constant emission voltage is applied to all the electron-emitting devices, and the plurality of electron-emitting device forces corresponding to the pixels to be lit are each in an amount corresponding to the luminance level of the corresponding pixel. Can be emitted, and the pixel to be lit can emit light.
[0032] そして、この発明において、第 1の状態における正電荷の量と電子の量の変化の割 合を Δ Q1Z Δ VI、第 3の状態における正電荷の量と電子の量の変化の割合を Δ Q 2Z AV2としたとき、(A Q1Z AV1) > ( A Q2Z AV2)であってもよい。これらの関 係により、電子が蓄積飽和状態となる電圧を V3、電子の放出が開始される電圧を V 4としたとき、 1≤ I V4 I / I V3 I ≤1. 5とする特性を得ることができる。  In this invention, the ratio of the change in the amount of positive charge and the amount of electrons in the first state is Δ Q1Z ΔVI, and the ratio of the change in the amount of positive charge and the amount of electrons in the third state (A Q1Z AV1)> (A Q2Z AV2) where Δ Q 2Z AV2 Based on these relationships, when V3 is the voltage at which electrons are accumulated and saturated, and V4 is the voltage at which electrons start to be emitted, the characteristics of 1≤I V4 I / I V3 I ≤1.5 are obtained. be able to.
[0033] 通常、例えば、電子放出素子をマトリックス状に配列して、水平走査期間に同期さ せて 1行単位に電子放出素子を選択し、選択状態にある電子放出素子に対してそれ ぞれ画素の輝度レベルに応じた画素信号を供給するとき、非選択状態の画素にも、 前記画素信号が供給されることになる。 [0034] 非選択状態の電子放出素子が前記画素信号の影響を受けて例えば電子放出して しまうと、表示画像の画質の劣化やコントラストの低下を招くという問題がある。 [0033] Usually, for example, the electron-emitting devices are arranged in a matrix, and the electron-emitting devices are selected in units of one row in synchronization with the horizontal scanning period, and each of the selected electron-emitting devices is selected. When the pixel signal corresponding to the luminance level of the pixel is supplied, the pixel signal is also supplied to the non-selected pixel. [0034] If the electron-emitting device in the non-selected state, for example, emits electrons due to the influence of the pixel signal, there is a problem that the image quality of the display image is deteriorated and the contrast is lowered.
[0035] しかし、本発明では、上述した特性を有するため、選択状態の電子放出素子に供 給される画素信号の電圧レベルを、基準電圧から前記電圧 V3までの任意の電圧と し、非選択状態の電子放出素子に対して、例えば画素信号の逆極性の信号が供給 されるように設定するという簡単な電圧関係にしても、非選択状態の画素が、選択状 態の画素への信号によって影響を受けることなぐ各画素でのメモリ効果を実現でき However, since the present invention has the characteristics described above, the voltage level of the pixel signal supplied to the electron-emitting device in the selected state is an arbitrary voltage from the reference voltage to the voltage V3, and is not selected. Even in a simple voltage relationship where, for example, a signal having a polarity opposite to that of the pixel signal is supplied to the electron-emitting device in the state, the non-selected pixel is detected by the signal to the pixel in the selected state. A memory effect can be achieved at each pixel that is not affected.
、高輝度、高コントラストイ匕を図ることができる。 High brightness and high contrast can be achieved.
[0036] また、本発明に係る電子放出素子は、誘電体で構成されたェミッタとなる物質と、電 子放出のための駆動電圧が印加される第 1の電極及び第 2の電極とを有する電子放 出素子において、前記第 1の電極と前記第 2の電極間に対する一方向への電圧の印 加によって、前記ェミッタとなる物質が一方向に分極された状態力 分極が反転した 状態に変化する電圧を第 1の抗電圧 vlとし、この状態から他方向への電圧の印加に よって分極が再び前記一方向に変化する電圧を第 2の抗電圧 v2としたとき、 vKO 又は V2く 0であって、 I vl Iく I V2 Iの特性を有することを特徴とする。この場合、 1. 5 X I vl I < I v2 Iであってもよい。 [0036] The electron-emitting device according to the present invention includes a substance serving as an emitter made of a dielectric, and a first electrode and a second electrode to which a driving voltage for electron emission is applied. In the electron-emitting device, by applying a voltage in one direction between the first electrode and the second electrode, a state force in which the substance serving as the emitter is polarized in one direction is changed to a state in which polarization is reversed. a voltage as a first coercive voltage vl, when the voltage applied to the thus the polarization of the voltage from the state in the other direction is changed in the one direction again and the second coercive voltage v2, VKO or V 2 ° 0 And having the characteristics of I vl I and IV 2 I. In this case, 1.5 XI vl I <I v2 I may be sufficient.
[0037] また、前記第 1の抗電圧を印加した際における分極の変化の割合を A qlZ Avl、 前記第 2の抗電圧を印加した際における分極の変化の割合を A q2Z Av2としたとき 、 ( Δ ql/ Δν1) > ( Δ q2/ Δ ν2)であってもよ 、。これらの関係により、電子が蓄積 飽和状態となる電圧を v3、電子の放出が開始される電圧を v4としたとき、 1≤ I v4 I / I v3 I ≤1. 5とする特性を得ることができる。  [0037] When the rate of change in polarization when the first coercive voltage is applied is A qlZ Avl, and the rate of change in polarization when the second coercive voltage is applied is A q2Z Av2, (Δql / Δν1)> (Δq2 / Δν2). From these relationships, when the voltage at which electrons are accumulated and saturated is v3, and the voltage at which electrons start to be emitted is v4, the characteristics of 1≤I v4 I / I v3 I ≤1.5 can be obtained. it can.
[0038] 従って、この発明においても、複数の画素に応じて配列された複数の電子放出素 子を有し、各電子放出素子からの電子放出によって画像表示を行うディスプレイに適 用させることが容易になる。  Therefore, also in the present invention, it is easy to apply to a display having a plurality of electron-emitting devices arranged according to a plurality of pixels and displaying an image by electron emission from each electron-emitting device. become.
[0039] し力も、非選択状態の画素が、選択状態の画素への信号によって影響を受けること なぐ各画素でのメモリ効果を実現でき、高輝度、高コントラストイ匕を図ることができる。  Also, the memory effect can be realized in each pixel in which the non-selected pixel is not affected by the signal to the selected pixel, and high brightness and high contrast can be achieved.
[0040] 以上説明したように、本発明に係る電子放出素子によれば、高い電界集中を容易 に発生させることができ、し力も、電子放出箇所を多くすることができ、電子放出につ いて高出力、高効率を図ることができ、低電圧駆動 (低消費電力)も可能となる。 [0040] As described above, according to the electron-emitting device of the present invention, high electric field concentration can be easily generated, and the force can be increased in the number of electron-emitting locations. Therefore, high output and high efficiency can be achieved, and low voltage driving (low power consumption) is also possible.
[0041] また、本発明に係る電子放出素子によれば、複数の画素に応じて配列された複数 の電子放出素子を有し、各電子放出素子力 の電子放出によって画像表示を行うデ イスプレイに簡単に適用させることができる。  [0041] Further, according to the electron-emitting device according to the present invention, the display has a plurality of electron-emitting devices arranged in accordance with a plurality of pixels, and displays an image by electron emission of each electron-emitting device force. Easy to apply.
図面の簡単な説明  Brief Description of Drawings
[0042] [図 1]図 1は、第 1の実施の形態に係る電子放出素子を一部省略して示す断面図で ある。  FIG. 1 is a cross-sectional view showing a partially omitted electron-emitting device according to the first embodiment.
[図 2]図 2は、第 1の実施の形態に係る電子放出素子の要部を拡大して示す断面図 である。  FIG. 2 is an enlarged cross-sectional view showing a main part of the electron-emitting device according to the first embodiment.
[図 3]図 3は、上部電極に形成された貫通部の形状の一例を示す平面図である。  FIG. 3 is a plan view showing an example of the shape of a through-hole formed in the upper electrode.
[図 4]図 4は、第 1の電子放出方式での駆動電圧の電圧波形を示す図である。  FIG. 4 is a diagram showing a voltage waveform of a drive voltage in the first electron emission method.
[図 5]図 5は、第 1の電子放出方式の第 2の出力期間での電子放出の様子を示す説 明図である。  FIG. 5 is an explanatory diagram showing the state of electron emission in the second output period of the first electron emission method.
[図 6]図 6は、第 2の電子放出方式での駆動電圧の電圧波形を示す図である。  FIG. 6 is a diagram showing a voltage waveform of a drive voltage in the second electron emission method.
[図 7]図 7は、第 2の電子放出方式の第 2の出力期間での電子放出の様子を示す説 明図である。  FIG. 7 is an explanatory diagram showing a state of electron emission in the second output period of the second electron emission method.
[図 8]図 8は、上部電極の庇部の断面形状の一例を示す図である。  FIG. 8 is a diagram showing an example of a cross-sectional shape of a collar portion of the upper electrode.
[図 9]図 9は、上部電極の庇部の断面形状の他の例を示す図である。  FIG. 9 is a diagram showing another example of the cross-sectional shape of the collar portion of the upper electrode.
[図 10]図 10は、上部電極の庇部の断面形状のさらに他の例を示す図である。  FIG. 10 is a diagram showing still another example of the cross-sectional shape of the collar portion of the upper electrode.
[図 11]図 11は、上部電極と下部電極間に接続された各種コンデンサの接続状態を 示す等価回路図である。  FIG. 11 is an equivalent circuit diagram showing a connection state of various capacitors connected between the upper electrode and the lower electrode.
[図 12]図 12は、上部電極と下部電極間に接続された各種コンデンサの容量計算を 説明するための図である。  [FIG. 12] FIG. 12 is a diagram for explaining the capacitance calculation of various capacitors connected between the upper electrode and the lower electrode.
[図 13]図 13は、第 1の実施の形態に係る電子放出素子の第 1の変形例を一部省略し て示す平面図である。  FIG. 13 is a plan view showing a first modification of the electron-emitting device according to the first embodiment with a part thereof omitted.
[図 14]図 14は、第 1の実施の形態に係る電子放出素子の第 2の変形例を一部省略し て示す平面図である。  FIG. 14 is a plan view showing a second modification of the electron-emitting device according to the first embodiment with a part thereof omitted.
[図 15]図 15は、第 1の実施の形態に係る電子放出素子の第 3の変形例を一部省略し て示す平面図である。 FIG. 15 is a partial omission of a third modification of the electron-emitting device according to the first embodiment. FIG.
圆 16]図 16は、第 1の実施の形態に係る電子放出素子の電圧-電荷量特性 (電圧- 分極量特性)を示す図である。 FIG. 16 is a diagram showing the voltage-charge amount characteristic (voltage-polarization amount characteristic) of the electron-emitting device according to the first embodiment.
[図 17]図 17Aは図 16のポイント p 1での状態を示す説明図であり、図 17Bは図 16の ポイント p2での状態を示す説明図であり、図 17Cは図 16のポイント p2からポイント p3 に至るまでの状態を示す説明図である。  FIG. 17A is an explanatory diagram showing the state at point p 1 in FIG. 16, FIG. 17B is an explanatory diagram showing the state at point p 2 in FIG. 16, and FIG. 17C is from the point p 2 in FIG. It is explanatory drawing which shows the state until it reaches point p3.
[図 18]図 18Aは図 16のポイント p3からポイント p4に至るまでの状態を示す説明図で あり、図 18Bは図 16のポイント p4に至る直前の状態を示す説明図であり、図 18Cは 図 16のポイント p4からポイント p6に至るまでの状態を示す説明図である。  [FIG. 18] FIG. 18A is an explanatory diagram showing a state from point p3 to point p4 in FIG. 16, FIG. 18B is an explanatory diagram showing a state immediately before reaching point p4 in FIG. 16, and FIG. FIG. 17 is an explanatory diagram showing a state from point p4 to point p6 in FIG.
圆 19]図 19は、第 1の実施の形態に係る電子放出素子を使用して構成したディスプ レイの表示部と駆動回路を示すブロック図である。 FIG. 19 is a block diagram showing a display unit and a drive circuit of a display configured using the electron-emitting device according to the first embodiment.
[図 20]図 20A—図 20Cは、振幅変調回路によるパルス信号の振幅変調を示す波形 図である。  FIG. 20A to FIG. 20C are waveform diagrams showing amplitude modulation of a pulse signal by the amplitude modulation circuit.
圆 21]図 21は、変形例に係る信号供給回路を示すブロック図である。 FIG. 21 is a block diagram showing a signal supply circuit according to a modification.
[図 22]図 22A—図 22Cは、パルス幅変調回路によるパルス信号のパルス幅変調を 示す波形図である。  FIG. 22A to FIG. 22C are waveform diagrams showing pulse width modulation of a pulse signal by a pulse width modulation circuit.
[図 23]図 23Aは図 20A又は図 22Aにおける電圧 Vslが印加されたときのヒステリシス 曲線を示す図であり、図 23Bは図 20B又は図 22Bにおける電圧 Vsmが印加されたと きのヒステリシス曲線を示す図であり、図 23Cは図 20C又は図 22Cにおける電圧 Vsh が印加されたときのヒステリシス曲線を示す図である。  FIG. 23A is a diagram showing a hysteresis curve when the voltage Vsl in FIG. 20A or FIG. 22A is applied, and FIG. 23B is a hysteresis curve when the voltage Vsm in FIG. 20B or 22B is applied. FIG. 23C is a diagram showing a hysteresis curve when the voltage Vsh in FIG. 20C or FIG. 22C is applied.
[図 24]図 24は、上部電極上へのコレクタ電極、蛍光体及び透明板の 1つの配置例を 示す構成図である。  FIG. 24 is a configuration diagram showing one arrangement example of the collector electrode, the phosphor and the transparent plate on the upper electrode.
[図 25]図 25は、上部電極上へのコレクタ電極、蛍光体及び透明板の他の配置例を 示す構成図である。  FIG. 25 is a configuration diagram showing another arrangement example of the collector electrode, the phosphor and the transparent plate on the upper electrode.
圆 26]図 26Aは第 1の実験例 (電子放出素子の電子の放出状態をみた実験)におい て使用した書込みパルスと点灯パルスの波形を示す図であり、図 26Bは第 1の実験 例において、電子放出素子からの電子放出の状態を受光素子の検出電圧波形で示 す図である。 [図 27]図 27は、第 2—第 4の実験例で使用した書込みパルスと点灯パルスの波形を 示す図である。 圆 26] Fig. 26A is a diagram showing the waveforms of the write pulse and the lighting pulse used in the first experimental example (experiment of the electron emission state of the electron-emitting device), and Fig. 26B shows the waveform in the first experimental example. FIG. 6 is a diagram showing a state of electron emission from the electron-emitting device with a detection voltage waveform of the light-receiving device. [FIG. 27] FIG. 27 is a diagram showing waveforms of an address pulse and a lighting pulse used in the second to fourth experimental examples.
[図 28]図 28は、第 2の実験例 (電子放出素子の電子の放出量が書込みパルスの振 幅によってどのように変化するかをみた実験)の結果を示す特性図である。  FIG. 28 is a characteristic diagram showing the results of a second experimental example (an experiment in which the amount of electrons emitted from the electron-emitting device varies depending on the amplitude of the write pulse).
[図 29]図 29は、第 3の実験例 (電子放出素子の電子の放出量が点灯パルスの振幅 によってどのように変化するかをみた実験)の結果を示す特性図である。  FIG. 29 is a characteristic diagram showing the results of a third experimental example (an experiment in which the amount of electrons emitted from the electron-emitting device varies depending on the amplitude of the lighting pulse).
[図 30]図 30は、第 4の実験例(電子放出素子の電子の放出量がコレクタ電圧のレべ ルによってどのように変化するかをみた実験)の結果を示す特性図である。  FIG. 30 is a characteristic diagram showing the results of a fourth experimental example (an experiment in which the amount of electrons emitted from the electron-emitting device varies depending on the collector voltage level).
[図 31]図 31は、ディスプレイの駆動方法の一例を示すタイミングチャートである。  FIG. 31 is a timing chart showing an example of a display driving method.
[図 32]図 32は、図 31に示す駆動方法での印加電圧関係を示す表図である。  FIG. 32 is a table showing a relationship between applied voltages in the driving method shown in FIG.
[図 33]図 33は、第 2の実施の形態に係る電子放出素子を一部省略して示す断面図 である。  FIG. 33 is a cross-sectional view showing a partially omitted electron-emitting device according to the second embodiment.
[図 34]図 34は、第 2の実施の形態に係る電子放出素子の第 1の変形例を一部省略し て示す断面図である。  FIG. 34 is a cross-sectional view showing a first modification of the electron-emitting device according to the second embodiment with a part thereof omitted.
[図 35]図 35は、第 2の実施の形態に係る電子放出素子の第 2の変形例を一部省略し て示す断面図である。  FIG. 35 is a cross-sectional view showing a partially omitted second modification of the electron-emitting device according to the second embodiment.
[図 36]図 36は、第 2の実施の形態に係る電子放出素子の第 3の変形例を一部省略し て示す断面図である。  FIG. 36 is a cross-sectional view showing a third variation of the electron-emitting device according to the second embodiment with a part thereof omitted.
[図 37]図 37は、第 3の実施の形態に係る電子放出素子を一部省略して示す断面図 である。  FIG. 37 is a cross-sectional view showing the electron-emitting device according to the third embodiment with a part thereof omitted.
[図 38]図 38は、第 3の実施の形態に係る電子放出素子の第 1の変形例を一部省略し て示す断面図である。  FIG. 38 is a cross-sectional view showing a first modification of the electron-emitting device according to the third embodiment with a part thereof omitted.
[図 39]図 39は、従来例に係る電子放出素子を一部省略して示す断面図である。 発明を実施するための最良の形態  FIG. 39 is a cross-sectional view showing a partially omitted electron-emitting device according to a conventional example. BEST MODE FOR CARRYING OUT THE INVENTION
[0043] 以下、本発明に係る電子放出素子の実施の形態例を、図 1一図 38を参照しながら 説明する。 Hereinafter, embodiments of the electron-emitting device according to the present invention will be described with reference to FIGS.
[0044] 先ず、本実施の形態に係る電子放出装置は、ディスプレイとしての用途のほか、電 子線照射装置、光源、 LEDの代替用途、電子部品製造装置、電子回路部品に適用 することができる。 [0044] First, the electron emission device according to the present embodiment is applied not only as a display, but also to an electron beam irradiation device, a light source, an LED alternative use, an electronic component manufacturing device, and an electronic circuit component. can do.
[0045] 電子線照射装置における電子線は、現在普及している紫外線照射装置における 紫外線に比べ、高工ネルギ一で吸収性能に優れる。適用例としては、半導体装置で は、ウェハーを重ねる際における絶縁膜を固化する用途、印刷の乾燥では、印刷ィ ンキをむらなく硬化する用途や、医療機器をパッケージに入れたまま殺菌する用途 等がある。  [0045] The electron beam in the electron beam irradiation apparatus has high energy and excellent absorption performance as compared with the ultraviolet light in the currently widely used ultraviolet irradiation apparatus. Examples of applications include solidifying insulating films when stacking wafers in semiconductor devices, applications that cure printing inks uniformly when printing is dried, and applications that sterilize medical devices in their packaging. There is.
[0046] 光源としての用途は、高輝度、高効率仕様向けであって、例えば超高圧水銀ランプ 等が使用されるプロジェクタの光源用途等がある。本実施の形態に係る電子放出装 置を光源に適用した場合、小型化、長寿命、高速点灯、水銀フリーによる環境負荷 低減という特徴を有する。  [0046] The use as a light source is for high luminance and high efficiency specifications, and includes, for example, a light source application for a projector in which an ultra-high pressure mercury lamp or the like is used. When the electron-emitting device according to this embodiment is applied to a light source, it has features such as downsizing, long life, high-speed lighting, and reduced environmental load due to mercury-free.
[0047] LEDの代替用途としては、屋内照明、自動車用ランプ、信号機等の面光源用途や 、チップ光源、信号機、携帯電話向けの小型液晶ディスプレイのバックライト等がある  [0047] As LED alternative applications, there are surface light source applications such as indoor lighting, automotive lamps, traffic lights, etc., chip light sources, traffic lights, backlights for small liquid crystal displays for mobile phones
[0048] 電子部品製造装置の用途としては、電子ビーム蒸着装置等の成膜装置の電子ビ ーム源、プラズマ CVD装置におけるプラズマ生成用(ガス等の活性ィ匕用)電子源、ガ ス分解用途の電子源等がある。また、テラ Hz駆動の高速スイッチング素子、大電流 出力素子といった真空マイクロデバイス用途もある。その他、プリンタ用部品、つまり、 蛍光体との組合せにより感光ドラムを感光させる発光デバイスや、誘電体を帯電させ るための電子源としても好ましく用いられる。 [0048] Applications of the electronic component manufacturing apparatus include an electron beam source for a film forming apparatus such as an electron beam evaporation apparatus, an electron source for plasma generation (for active gases such as gas) in a plasma CVD apparatus, and gas decomposition. There are applications such as electron sources. There are also vacuum microdevice applications such as terahertz high-speed switching elements and high-current output elements. In addition, it is also preferably used as a printer component, that is, a light emitting device for exposing a photosensitive drum by a combination with a phosphor, and an electron source for charging a dielectric.
[0049] 電子回路部品としては、大電流出力化、高増幅率ィ匕が可能であることから、スイツ チ、リレー、ダイオード等のデジタル素子、オペアンプ等のアナログ素子への用途が ある。  [0049] Electronic circuit components can be used for digital devices such as switches, relays, and diodes, and analog devices such as operational amplifiers because they can output a large current and have a high amplification factor.
[0050] 先ず、第 1の実施の形態に係る電子放出素子 10Aは、図 1に示すように、誘電体で 構成された板状のェミッタ部(ェミッタとなる物質) 12と、該ェミッタ部 12の第 1の面( 例えば上面)に形成された第 1の電極 (例えば上部電極) 14と、ェミッタ部 12の第 2の 面 (例えば下面)に形成された第 2の電極 (例えば下部電極) 16と、上部電極 14と下 部電極 16との間に、駆動電圧 Vaを印加するパルス発生源 18とを有する。  First, as shown in FIG. 1, an electron-emitting device 10A according to the first embodiment includes a plate-like emitter part (substance serving as an emitter) 12 made of a dielectric, and the emitter part 12 A first electrode (for example, an upper electrode) 14 formed on the first surface (for example, the upper surface) of the first electrode and a second electrode (for example, the lower electrode) formed on the second surface (for example, the lower surface) of the emitter 12. 16 and a pulse generation source 18 for applying a driving voltage Va between the upper electrode 14 and the lower electrode 16.
[0051] 上部電極 14は、ェミッタ部 12が露出される複数の貫通部 20を有する。特に、ェミツ タ部 12の表面は、誘電体の粒界による凹凸 22が形成されており、上部電極 14の貫 通部 20は、前記誘電体の粒界における凹部 24に対応した部分に形成されている。 図 1の例では、 1つの凹部 24に対応して 1つの貫通部 20が形成される場合を示して いるが、複数の凹部 24に対応して 1つの貫通部 20が形成される場合もある。ェミッタ 部 12を構成する誘電体の粒径は、 0. 1 m— 10 mが好ましぐさらに好ましくは 2 μ ΐη—7 μ mである。図 1の例では、誘電体の粒径を 3 μ mとしている。 [0051] The upper electrode 14 has a plurality of through portions 20 through which the emitter portion 12 is exposed. In particular, Emits Concavities and convexities 22 due to dielectric grain boundaries are formed on the surface of the upper portion 12, and the through-holes 20 of the upper electrode 14 are formed in portions corresponding to the recesses 24 in the grain boundaries of the dielectric. In the example of FIG. 1, the case where one through portion 20 is formed corresponding to one concave portion 24 is shown, but there may be a case where one through portion 20 is formed corresponding to a plurality of concave portions 24. . The particle size of the dielectric constituting the emitter portion 12 is preferably 0.1 m-10 m, and more preferably 2 μΐη-7 μm. In the example shown in Fig. 1, the particle size of the dielectric is 3 μm.
[0052] さらに、この第 1の実施の形態では、図 2に示すように、上部電極 14のうち、貫通部 20の周部 26におけるェミッタ部 12と対向する面 26aが、ェミッタ部 12から離間してい る。つまり、上部電極 14のうち、貫通部 20の周部 26におけるェミッタ部 12と対向する 面 26aとェミッタ部 12との間にギャップ 28が形成され、上部電極 14における貫通部 2 0の周部 26が庇状 (フランジ状)に形成された形となっている。従って、以下の説明で は、「上部電極 14の貫通部 20の周部 26」を「上部電極 14の庇部 26」と記す。なお、 図 1、図 2、図 5、図 7、図 8—図 10、図 15の例では、誘電体の粒界の凹凸 22の凸部 30の断面を代表的に半円状で示してある力 この形状に限るものではない。  Further, in the first embodiment, as shown in FIG. 2, a surface 26 a of the upper electrode 14 facing the emitter portion 12 in the peripheral portion 26 of the through portion 20 is separated from the emitter portion 12. is doing. In other words, a gap 28 is formed between the surface 26 a of the upper electrode 14 facing the emitter 12 in the peripheral portion 26 of the penetrating portion 20 and the emitter portion 12, and the peripheral portion 26 of the penetrating portion 20 in the upper electrode 14. Is shaped like a bowl (flange). Therefore, in the following description, “the peripheral portion 26 of the through portion 20 of the upper electrode 14” is referred to as “the flange portion 26 of the upper electrode 14”. In the examples of FIGS. 1, 2, 5, 5, 7, 8-10, and 15, the cross section of the protrusion 30 of the irregularities 22 in the dielectric grain boundaries is typically shown in a semicircular shape. A certain force is not limited to this shape.
[0053] また、この第 1の実施の形態では、上部電極 14の厚み tを、 0. 01 m≤t≤ 10 m とし、ェミッタ部 12の上面、すなわち、誘電体の粒界における凸部 30の表面(凹部 2 4の内壁面でもある)と、上部電極 14の庇部 26の下面 26aとのなす角の最大角度 Θ を、 1° ≤ Θ≤60° としている。また、ェミッタ部 12の誘電体の粒界における凸部 30 の表面(凹部 24の内壁面)と、上部電極 14の庇部 26の下面 26aとの間の鉛直方向 に沿った最大間隔 dを、 0 m< d≤ 10 mとして 、る。  Further, in the first embodiment, the thickness t of the upper electrode 14 is set to 0.01 m ≦ t ≦ 10 m, and the upper surface of the emitter 12, that is, the convex portion 30 at the grain boundary of the dielectric is 30. The maximum angle Θ between the surface of the upper electrode 14 (which is also the inner wall surface of the recess 24) and the lower surface 26a of the flange 26 of the upper electrode 14 is set to 1 ° ≤ Θ ≤ 60 °. In addition, the maximum distance d along the vertical direction between the surface of the convex portion 30 (inner wall surface of the concave portion 24) and the lower surface 26a of the flange portion 26 of the upper electrode 14 at the dielectric grain boundary of the emitter 12 is expressed as follows: 0 m <d ≤ 10 m.
[0054] さらに、この第 1の実施の形態では、貫通部 20の形状、特に、図 3に示すように、上 面から見た形状は孔 32の形状であって、例えば円形状、楕円形状、トラック状のよう に、曲線部分を含むものや、四角形や三角形のように多角形状のものがある。図 3の 例では、孔 32の形状として円形状の場合を示している。  [0054] Further, in the first embodiment, the shape of the penetrating portion 20, in particular, as shown in FIG. 3, is the shape of the hole 32, for example, a circular shape or an elliptical shape. There are those that include a curved portion such as a track shape, and polygonal shapes such as a square and a triangle. In the example of FIG. 3, the hole 32 has a circular shape.
[0055] この場合、孔 32の平均径は、 0. 1 m以上、 10 m以下として!/、る。この平均径は 、孔 32の中心を通るそれぞれ異なる複数の線分の長さの平均を示す。  In this case, the average diameter of the holes 32 is 0.1 m or more and 10 m or less! This average diameter represents the average of the lengths of different line segments passing through the center of the hole 32.
[0056] ここで、各構成部材の材料等にっ 、て説明する。ェミッタ部 12を構成する誘電体は 、好適には、比誘電率が比較的高い、例えば 1000以上の誘電体を採用することが できる。このような誘電体としては、チタン酸バリウムのほかに、ジルコン酸鉛、マグネ シゥムニオブ酸鉛、ニッケルニオブ酸鉛、亜鉛ニオブ酸鉛、マンガンニオブ酸 マ グネシゥムタンタル酸鉛、ニッケルタンタル酸鉛、アンチモンスズ酸鉛、チタン酸鉛、 マグネシウムタングステン酸鉛、コバルトニオブ酸鉛等、又はこれらの任意の組み合 わせを含有するセラミックスや、主成分がこれらの化合物を 50重量%以上含有するも のや、前記セラミックスに対して、さらにランタン、カルシウム、ストロンチウム、モリブデ ン、タングステン、ノ リウム、ニオブ、亜鉛、ニッケル、マンガン等の酸化物、もしくはこ れらのいずれかの組み合わせ、又は他の化合物を適切に添加したもの等を挙げるこ とがでさる。 [0056] Here, the material of each component will be described. As the dielectric constituting the emitter section 12, a dielectric having a relatively high relative dielectric constant, for example, 1000 or more may be employed. it can. In addition to barium titanate, such dielectrics include lead zirconate, lead magnesium niobate, lead nickel niobate, lead zinc niobate, manganese manganate lead tantalate, lead nickel tantalate, Ceramics containing lead antimony stannate, lead titanate, lead magnesium tungstate, lead cobalt niobate, etc., or any combination thereof, and those whose main component contains 50% by weight or more of these compounds In addition, lanthanum, calcium, strontium, molybdenum, tungsten, norium, niobium, zinc, nickel, manganese and other oxides, combinations of these, or other compounds are appropriately applied to the ceramics. It is possible to list those added to the above.
[0057] 例えば、マグネシウムニオブ酸鉛(PMN)とチタン酸鉛(PT)の 2成分系 nPMN— m PT(n、 mをモル数比とする)においては、 PMNのモル数比を大きくすると、キュリー 点が下げられて、室温での比誘電率を大きくすることができる。  [0057] For example, in the binary system nPMN-mPT (where n and m are mole ratios) of lead magnesium niobate (PMN) and lead titanate (PT), increasing the mole ratio of PMN, The Curie point is lowered, and the dielectric constant at room temperature can be increased.
[0058] 特に、 n=0. 85-1. 0、 m= l. 0— nでは比誘電率 3000以上となり好ましい。例え ば、、 n=0. 91、 m=0. 09で ίま室温の it誘電率 15000力得られ、 n=0. 95、 m=0 . 05では室温の比誘電率 20000が得られる。  In particular, when n = 0.85-1.0 and m = l.0−n, the relative dielectric constant is preferably 3000 or more. For example, when n = 0.91 and m = 0.09, it is possible to obtain an it permittivity of 15000 at room temperature, and when n = 0.95 and m = 0.05, a relative permittivity of 20000 at room temperature is obtained.
[0059] 次に、マグネシウムニオブ酸鉛(PMN)、チタン酸鉛(PT)、ジルコン酸鉛 (PZ)の 3 成分系では、 PMNのモル数比を大きくするほかに、正方晶と擬立方晶又は正方晶と 菱面体晶のモルフオト口ピック相境界(MPB:Morphotropic Phase Boundary)付近の 組成とすることが比誘電率を大きくするのに好ましい。例えば、 PMN : PT: PZ = 0. 3 75 : 0. 375 : 0. 25【こて it誘電率 5500、 PMN : PT: PZ = 0. 5 : 0. 375 : 0. 125【こ て比誘電率 4500となり、特に好ましい。さらに、絶縁性が確保できる範囲内でこれら の誘電体に白金のような金属を混入して、誘電率を向上させるのが好ましい。この場 合、例えば、誘電体に白金を重量比で 20%混入させるとよい。  [0059] Next, in the three-component system of lead magnesium niobate (PMN), lead titanate (PT), and lead zirconate (PZ), in addition to increasing the molar ratio of PMN, tetragonal and pseudocubic crystals Alternatively, a composition in the vicinity of a morphotropic phase boundary (MPB) between a tetragonal crystal and a rhombohedral crystal is preferable for increasing the relative dielectric constant. For example, PMN: PT: PZ = 0.3 75: 0. 375: 0.25 [trowel it dielectric constant 5500, PMN: PT: PZ = 0.5: 0. 375: 0.125 The rate is 4500, which is particularly preferable. Furthermore, it is preferable to improve the dielectric constant by mixing a metal such as platinum into these dielectrics within a range that can ensure insulation. In this case, for example, 20% by weight of platinum may be mixed in the dielectric.
[0060] また、ェミッタ部 12は、上述したように、圧電 Z電歪層や反強誘電体層等を用いる ことができるが、ェミッタ部 12として圧電 Z電歪層を用いる場合、該圧電 Z電歪層と しては、例えば、ジルコン酸鉛、マグネシウムニオブ酸鉛、ニッケルニオブ酸鉛、亜鉛 ニオブ酸鉛、マンガンニオブ酸鉛、マグネシウムタンタル酸鉛、ニッケルタンタル酸鉛 、アンチモンスズ酸鈴、チタン酸鈴、チタン酸バリウム、マグネシウムタングステン酸鈴 、コバルトニオブ酸鈴等、又はこれらのいずれかの組み合わせを含有するセラミックス が挙げられる。 As described above, the emitter 12 can be a piezoelectric Z electrostrictive layer, an antiferroelectric layer, or the like. When the piezoelectric Z electrostrictive layer is used as the emitter 12, the piezoelectric Z Examples of electrostrictive layers include lead zirconate, lead magnesium niobate, lead nickel niobate, lead zinc niobate, lead manganese niobate, lead magnesium tantalate, lead nickel tantalate, antimony stannate, titanium Acid bell, barium titanate, magnesium tungstic acid bell , Cobalt niobate bell, etc., or ceramics containing any combination thereof.
[0061] 主成分力 Sこれらの化合物を 50重量%以上含有するものであってもよ 、ことは 、うま でもない。また、前記セラミックスのうち、ジルコン酸鉛を含有するセラミックスは、エミ ッタ部 12を構成する圧電 Z電歪層の構成材料として最も使用頻度が高い。  [0061] Principal component strength S The compound may contain 50% by weight or more of these compounds. Among the ceramics, a ceramic containing lead zirconate is most frequently used as a constituent material of the piezoelectric Z electrostrictive layer constituting the emitter section 12.
[0062] また、圧電 Z電歪層をセラミックスにて構成する場合、前記セラミックスに、さらに、ラ ンタン、カルシウム、ストロンチウム、モリブデン、タングステン、ノ リウム、ニオブ、亜鉛 、ニッケル、マンガン等の酸化物、もしくはこれらのいずれかの組み合わせ、又は他 の化合物を、適宜、添加したセラミックスを用いてもよい。また、前記セラミックスに Si O、 CeO、 Pb Ge O もしくはこれらのいずれかの組み合わせを添カ卩したセラミック [0062] When the piezoelectric Z electrostrictive layer is composed of ceramics, the ceramics may further include oxides such as lanthanum, calcium, strontium, molybdenum, tungsten, norium, niobium, zinc, nickel, manganese, Alternatively, a ceramic obtained by appropriately adding any combination of these or other compounds may be used. In addition, ceramics with Si O, CeO, Pb Ge O or any combination thereof added to the ceramics.
2 2 5 3 11 2 2 5 3 11
スを用いてもよい。具体的には、 PT— PZ—PMN系圧電材料に SiOを 0. 2wt%、も  May be used. Specifically, 0.2 wt% of SiO is added to PT-PZ-PMN piezoelectric material.
2  2
しくは CeOを 0. lwt%、もしくは Pb Ge O を 1一 2wt%添カ卩した材料が好ましい。  A material containing 0.1 wt% CeO or 1 to 2 wt% Pb Ge 2 O is preferred.
2 5 3 11  2 5 3 11
[0063] 例えば、マグネシウムニオブ酸鉛とジルコン酸鉛及びチタン酸鉛とからなる成分を 主成分とし、さらにランタンやストロンチウムを含有するセラミックスを用いることが好ま しい。  [0063] For example, it is preferable to use a ceramic containing lead magnesium niobate, lead zirconate and lead titanate as main components and further containing lanthanum or strontium.
[0064] 圧電 Z電歪層は、緻密であっても、多孔質であってもよぐ多孔質の場合、その気 孔率は 40%以下であることが好まし 、。  [0064] When the piezoelectric Z electrostrictive layer is dense or porous, the porosity is preferably 40% or less.
[0065] ェミッタ部 12として反強誘電体層を用いる場合、該反強誘電体層としては、ジルコ ン酸鉛を主成分とするもの、ジルコン酸鉛とスズ酸鉛とからなる成分を主成分とするも の、さらにはジルコン酸鈴に酸ィ匕ランタンを添カ卩したもの、ジルコン酸鈴とスズ酸鈴と 力もなる成分に対してジルコン酸鉛やニオブ酸鉛を添加したものが望ましい。  [0065] When an antiferroelectric layer is used as the emitter section 12, the antiferroelectric layer is mainly composed of lead zirconate as a main component, or a component composed of lead zirconate and lead stannate. However, it is desirable to add a lanthanum acid zirconate to a zirconate bell and add zirconate or lead niobate to a component that has the power of a zirconate bell and a tin stannate.
[0066] また、この反強誘電体層は、多孔質であってもよく、多孔質の場合、その気孔率は 3 0%以下であることが望まし 、。  [0066] Further, the antiferroelectric layer may be porous, and in the case of being porous, the porosity is preferably 30% or less.
[0067] さらに、ェミッタ部 12にタンタル酸ビスマス酸ストロンチウム(SrBi Ta O )を用いた  [0067] Further, strontium bismuth tantalate (SrBi Ta 2 O 3) was used for the emitter 12.
2 2 9 場合、分極反転疲労が小さく好ましい。このような分極反転疲労が小さい材料は、層 状強誘電体化合物で、 (BiO ) 2+ (A B O ) 2という一般式で表される。ここで、金 In the case of 2 2 9, polarization inversion fatigue is small and preferable. Such a material with low polarization reversal fatigue is a layered ferroelectric compound and is represented by the general formula (BiO 2 ) 2 + (ABO 2 ) 2 . Where gold
2 m-1 m 3m+l  2 m-1 m 3m + l
属 Aのイオンは、 Ca2+、 Sr2+、 Ba Pb2+、 Bi3+、 La3+等であり、金属 Bのイオンは、 Ti4+ 、 Ta5+、 Nb5+等である。 [0068] また、圧電 Z電歪 Z反強誘電体セラミックスに、例えば鉛ホウケィ酸ガラス等のガラ ス成分や、他の低融点化合物(例えば酸ィ匕ビスマス等)を混ぜることによって、焼成 温度を下げることができる。 The ions of genus A are Ca 2+ , Sr 2+ , Ba Pb 2+ , Bi 3+ , La 3+ etc., and the ions of metal B are Ti 4+ , Ta 5+ , Nb 5+ etc. . [0068] Further, by mixing a piezoelectric Z electrostrictive Z antiferroelectric ceramic with a glass component such as lead borosilicate glass and other low melting point compounds (for example, bismuth oxide), the firing temperature is reduced. Can be lowered.
[0069] また、圧電 Z電歪 Z反強誘電体セラミックスで構成する場合、その形状はシート状 の成形体、シート状の積層体、あるいは、これらを他の支持用基板に積層又は接着 したものであってもよい。 [0069] Further, in the case of being composed of piezoelectric Z electrostrictive Z antiferroelectric ceramics, the shape thereof is a sheet-like molded body, a sheet-like laminated body, or those obtained by laminating or bonding these to another supporting substrate. It may be.
[0070] また、ェミッタ部 12に非鉛系の材料を使用する等により、ェミッタ部 12を融点もしく は蒸散温度の高い材料とすることで、電子もしくはイオンの衝突に対し損傷しにくくな る。 [0070] In addition, by using a lead-free material for the emitter 12 and making the emitter 12 a material having a high melting point or high evaporation temperature, it becomes difficult to be damaged by the collision of electrons or ions. .
[0071] 上部電極 14は、焼成後に薄い膜が得られる有機金属ペーストが用いられる。例え ば白金レジネートペースト等の材料を用いることが好ましい。また、分極反転疲労を 抑制する酸化物電極、例えば、酸化ルテニウム (RuO )、酸化イリジウム (IrO )、ル  [0071] The upper electrode 14 is made of an organometallic paste that provides a thin film after firing. For example, a material such as platinum resinate paste is preferably used. Also, oxide electrodes that suppress polarization reversal fatigue such as ruthenium oxide (RuO), iridium oxide (IrO), ruthenium
2 2 テニゥム酸ストロンチウム(SrRuO )、 La Sr CoO (例えば χ = 0· 3や 0· 5)、 La  2 2 Strontium teniumate (SrRuO), La Sr CoO (eg χ = 0 · 3 or 0 · 5), La
3 1-χ χ 3 1-χ 3 1-χ χ 3 1-χ
Ca ΜηΟ (f列えば、 χ = 0. 2)、 La Ca Mn Co O (f列えば、 x = 0. 2、 y=0. 05)、も x 3 1-x x 1-y y 3 Ca ΜηΟ (if row f, χ = 0.2), La Ca Mn Co O (row f, row x = 0.2, y = 0.05), x 3 1-x x 1-y y 3
しくはこれらを例えば白金レジネートペーストに混ぜたものが好ま 、。  For example, a mixture of these in platinum resinate paste is preferable.
[0072] 上部電極 14は、上記材料を用いて、スクリーン印刷、スプレー、コーティング、ディ ッビング、塗布、電気泳動法等の各種の厚膜形成法や、スパッタリング法、イオンビ ーム法、真空蒸着法、イオンプレーティング法、化学気相成長法 (CVD)、めっき等 の各種の薄膜形成法による通常の膜形成法に従って形成することができ、好適には 、前者の厚膜形成法によって形成するとよい。 [0072] The upper electrode 14 is made of the above-mentioned materials using various thick film forming methods such as screen printing, spraying, coating, dubbing, coating, and electrophoresis, sputtering, ion beam, and vacuum deposition. , Ion plating, chemical vapor deposition (CVD), and various other thin film formation methods such as plating, can be formed according to a normal film formation method, preferably the former thick film formation method .
[0073] 一方、下部電極 16は、白金、モリブデン、タングステン等によって構成される。また 、高温酸化雰囲気に対して耐性を有する導体、例えば金属単体、合金、絶縁性セラ ミックスと金属単体との混合物、絶縁性セラミックスと合金との混合物等によって構成 され、好適には、白金、イリジウム、パラジウム、ロジウム、モリブデン等の高融点貴金 属ゃ、銀-パラジウム、銀-白金、白金-パラジウム等の合金を主成分とするものや、 白金とセラミック材料とのサーメット材料によって構成される。さらに好適には、白金の み又は白金系の合金を主成分とする材料によって構成される。 On the other hand, the lower electrode 16 is made of platinum, molybdenum, tungsten, or the like. Further, it is composed of a conductor having resistance to a high-temperature oxidizing atmosphere, such as a simple metal, an alloy, a mixture of an insulating ceramic and a simple metal, a mixture of an insulating ceramic and an alloy, and preferably, platinum, iridium High melting point precious metals such as palladium, rhodium, molybdenum, etc., and those composed mainly of alloys such as silver-palladium, silver-platinum, platinum-palladium, and cermet materials of platinum and ceramic materials. More preferably, it is made of a material mainly composed of platinum or a platinum-based alloy.
[0074] また、下部電極 16として、カーボン、グラフアイト系の材料を用いてもよい。なお、電 極材料中に添加されるセラミック材料の割合は、 5— 30体積%程度が好適である。も ちろん、上述した上部電極と同様の材料を用いるようにしてもょ 、。 [0074] Further, the lower electrode 16 may be made of carbon or a graphite-based material. Electricity The ratio of the ceramic material added to the pole material is preferably about 5-30% by volume. Of course, you may use the same material as the upper electrode mentioned above.
[0075] 下部電極 16は、好適には上記厚膜形成法によって形成する。下部電極 16の厚さ は、 20 m以下であるとよぐ好適には 5 m以下であるとよい。  The lower electrode 16 is preferably formed by the thick film forming method. The thickness of the lower electrode 16 is preferably 20 m or less, more preferably 5 m or less.
[0076] ェミッタ部 12、上部電極 14及び下部電極 16をそれぞれ形成するたびに熱処理( 焼成処理)することで、一体構造にすることができる。  [0076] A heat treatment (firing treatment) is performed each time the emitter 12, the upper electrode 14, and the lower electrode 16 are formed, whereby an integrated structure can be obtained.
[0077] ェミッタ部 12、上部電極 14及び下部電極 16を一体化させるための焼成処理に係 る温度としては、 500— 1400°Cの範囲、好適には、 1000— 1400°Cの範囲とすると よい。さらに、膜状のェミッタ部 12を熱処理する場合、高温時にェミッタ部 12の組成 が不安定にならないように、ェミッタ部 12の蒸発源と共に雰囲気制御を行いながら焼 成処理を行うことが好まし 、。  [0077] The temperature involved in the firing process for integrating the emitter section 12, the upper electrode 14, and the lower electrode 16 is in the range of 500-1400 ° C, preferably in the range of 1000-1400 ° C. Good. Furthermore, when heat-treating the film-like emitter 12, it is preferable to perform a firing process while controlling the atmosphere together with the evaporation source of the emitter 12 so that the composition of the emitter 12 is not unstable at high temperatures. .
[0078] 焼成処理を行うことで、特に、上部電極 14となる膜が例えば厚み 10 mから厚み 0 .: mに収縮すると同時に複数の孔等が形成されていき、結果的に、図 1に示すよ うに、上部電極 14に複数の貫通部 20が形成され、貫通部 20の周部 26が庇状に形 成された構成となる。もちろん、上部電極 14となる膜に対して事前 (焼成前)にエッチ ング(ウエットエッチング、ドライエッチング)やリフトオフ等によってパターンユングを施 した後、焼成するようにしてもよい。この場合、後述するように、貫通部 20として切欠き 形状やスリット形状を容易に形成することができる。  By performing the firing treatment, in particular, the film to be the upper electrode 14 contracts, for example, from a thickness of 10 m to a thickness of 0.0: m, and at the same time, a plurality of holes and the like are formed. As a result, FIG. As shown, a plurality of through portions 20 are formed in the upper electrode 14, and a peripheral portion 26 of the through portion 20 is formed in a bowl shape. Of course, the film to be the upper electrode 14 may be baked after being patterned (wet etching or dry etching) or lift-off or the like in advance (before baking). In this case, as will be described later, a notch shape or a slit shape can be easily formed as the through portion 20.
[0079] なお、ェミッタ部 12を適切な部材によって被覆し、該ェミッタ部 12の表面が焼成雰 囲気に直接露出しな 、ようにして焼成する方法を採用してもよ 、。  [0079] Note that a method may be employed in which the emitter portion 12 is covered with an appropriate member and the surface of the emitter portion 12 is not directly exposed to the firing atmosphere.
[0080] 次に、電子放出素子 10Aの電子放出原理について説明する。先ず、上部電極 14 と下部電極 16との間に駆動電圧 Vaが印加される。この駆動電圧 Vaは、例えば、ノ ルス電圧あるいは交流電圧のように、時間の経過に伴って、基準電圧 (例えば OV)よ りも高 ヽ又は低 ヽ電圧レベルから基準電圧よりも低!ヽ又は高!、電圧レベルに急激に 変化する電圧として定義される。  Next, the principle of electron emission of the electron emitter 10A will be described. First, a drive voltage Va is applied between the upper electrode 14 and the lower electrode 16. This drive voltage Va is higher or lower than the reference voltage (e.g. OV) from the reference voltage (e.g. OV) or lower than the reference voltage over time, such as a Norse voltage or an AC voltage. High !, defined as a voltage that rapidly changes to the voltage level.
[0081] また、ェミッタ部 12の上面と上部電極 14と該電子放出素子 10Aの周囲の媒質 (例 えば、真空)との接触箇所においてトリプルジャンクションが形成されている。ここで、 トリプルジャンクションとは、上部電極 14とェミッタ部 12と真空との接触により形成され る電界集中部として定義される。なお、前記トリプルジャンクションには、上部電極 14 とェミッタ部 12と真空が 1つのポイントとして存在する 3重点も含まれる。雰囲気中の 真空度は、 102— 10— 6Paが好ましぐより好ましくは 10— 3— 10— 5Paである。 [0081] Further, a triple junction is formed at a contact point between the upper surface of the emitter section 12, the upper electrode 14, and a medium (for example, vacuum) around the electron-emitting device 10A. Here, the triple junction is formed by contacting the upper electrode 14, the emitter 12 and the vacuum. Defined as the electric field concentration part. The triple junction includes a triple point where the upper electrode 14, the emitter 12 and the vacuum exist as one point. The degree of vacuum in the atmosphere is preferably 10 2 − 10− 6 Pa, more preferably 10 3 − 10− 5 Pa.
[0082] 第 1の実施の形態では、トリプルジャンクションは、上部電極 14の庇部 26や上部電 極 14の周縁部に形成されることになる。従って、上部電極 14と下部電極 16との間に 上述のような駆動電圧 Vaが印加されると、上記したトリプルジャンクションにお 、て電 界集中が発生する。 In the first embodiment, the triple junction is formed at the flange portion 26 of the upper electrode 14 and the peripheral portion of the upper electrode 14. Therefore, when the drive voltage Va as described above is applied between the upper electrode 14 and the lower electrode 16, electric field concentration occurs in the triple junction described above.
[0083] 先ず、第 1の電子放出方式について図 4及び図 5を参照しながら説明する。図 4の 第 1の出力期間 T1において、上部電極 14に基準電圧 (この場合、 OV)よりも低い電 圧 V2が印加され、下部電極 16に基準電圧よりも高い電圧 VIが印加される。この第 1 の出力期間 T1では、上記したトリプルジャンクションにおいて電界集中が発生し、例 えばェミッタ部 12のうち、上部電極 14の貫通部 20から露出する部分や上部電極 14 の周縁部近傍の部分に電子が蓄積される。このとき、上部電極 14が電子供給源とし て機能することになる。  First, the first electron emission method will be described with reference to FIG. 4 and FIG. In the first output period T1 in FIG. 4, a voltage V2 lower than the reference voltage (in this case, OV) is applied to the upper electrode 14, and a voltage VI higher than the reference voltage is applied to the lower electrode 16. In the first output period T1, electric field concentration occurs in the triple junction described above.For example, in the emitter part 12, the part exposed from the through part 20 of the upper electrode 14 or the part near the peripheral part of the upper electrode 14 is used. Electrons are accumulated. At this time, the upper electrode 14 functions as an electron supply source.
[0084] 次の第 2の出力期間 T2において、駆動電圧 Vaの電圧レベルが急減に変化、すな わち、上部電極 14に基準電圧よりも高い電圧 VIが印加され、下部電極 16に基準電 圧よりも低い電圧 V2が印加されると、今度は、上記したトリプルジャンクションにおい て逆方向への電界集中が発生し、図 5に示すように、ェミッタ部 12のうち、前記電子 の蓄積されていた部分から、貫通部 20を通じて電子が放出される。もちろん、上部電 極 14の外周部近傍カゝらも電子が放出される。  [0084] In the next second output period T2, the voltage level of the driving voltage Va changes rapidly, that is, a voltage VI higher than the reference voltage is applied to the upper electrode 14, and the reference voltage is applied to the lower electrode 16. When a voltage V2 lower than the voltage is applied, the electric field concentration in the reverse direction occurs at the triple junction described above, and the electrons are accumulated in the emitter section 12 as shown in FIG. Electrons are emitted from the exposed portion through the penetrating portion 20. Of course, electrons near the outer periphery of the upper electrode 14 are also emitted.
[0085] 次に、第 2の電子放出方式について説明する。先ず、図 6の第 1の出力期間 T1に おいて、上部電極 14に基準電圧よりも高い電圧 V3が印加され、下部電極 16に基準 電圧よりも低い電圧 V4が印加される。この第 1の出力期間 T1では、電子放出のため の準備 (例えばェミッタ部 12の一方向への分極等)が行われる。次の第 2の出力期間 T2において、駆動電圧 Vaの電圧レベルが急減に変化、すなわち、上部電極 14に 基準電圧よりも低い電圧 V4が印加され、下部電極 16に基準電圧よりも高い電圧 V3 が印加されると、今度は、上記したトリプルジャンクションにおいて電界集中が発生し 、この電界集中によって上部電極 14から 1次電子が放出され、ェミッタ部 12のうち、 貫通部 20から露出する部分並びに上部電極 14の外周部近傍に衝突することとなる 。これによつて、図 7に示すように、 1次電子が衝突した部分から 2次電子(1次電子の 反射電子を含む)が放出される。すなわち、第 2の出力期間 T2の初期段階において 、前記貫通部 20並びに上部電極 14の外周部近傍から 2次電子が放出されることとな る。 Next, the second electron emission method will be described. First, in the first output period T1 in FIG. 6, a voltage V3 higher than the reference voltage is applied to the upper electrode 14, and a voltage V4 lower than the reference voltage is applied to the lower electrode 16. In the first output period T1, preparation for electron emission (for example, polarization in one direction of the emitter 12) is performed. In the next second output period T2, the voltage level of the drive voltage Va changes suddenly, that is, a voltage V4 lower than the reference voltage is applied to the upper electrode 14, and a voltage V3 higher than the reference voltage is applied to the lower electrode 16. When applied, this time, an electric field concentration occurs in the above-described triple junction, and the primary electrons are emitted from the upper electrode 14 due to the electric field concentration. It will collide with the part exposed from the penetration part 20, and the outer peripheral part vicinity of the upper electrode 14. FIG. As a result, as shown in FIG. 7, secondary electrons (including reflected electrons of the primary electrons) are emitted from the portion where the primary electrons collide. That is, in the initial stage of the second output period T2, secondary electrons are emitted from the vicinity of the outer peripheral portion of the penetrating portion 20 and the upper electrode 14.
[0086] そして、この第 1の実施の形態に係る電子放出素子 10Aにおいては、上部電極 14 に複数の貫通部 20を形成したことから、各貫通部 20並びに上部電極 14の外周部近 傍力 均等に電子が放出され、全体の電子放出特性のばらつきが低減し、電子放出 の制御が容易になると共に、電子放出効率が高くなる。  Then, in the electron-emitting device 10A according to the first embodiment, since the plurality of through portions 20 are formed in the upper electrode 14, each of the through portions 20 and the peripheral force near the outer peripheral portion of the upper electrode 14 are formed. Electrons are emitted evenly, the variation in the overall electron emission characteristics is reduced, the electron emission is easily controlled, and the electron emission efficiency is increased.
[0087] また、第 1の実施の形態では、上部電極 14の庇部 26とェミッタ部 12との間にギヤッ プ 28が形成された形となることから、駆動電圧 Vaを印加した際に、該ギャップ 28の 部分において電界集中が発生し易くなる。これは、電子放出の高効率ィ匕につながり、 駆動電圧の低電圧化 (低 、電圧レベルでの電子放出)を実現させることができる。  [0087] In the first embodiment, since the gap 28 is formed between the flange portion 26 and the emitter portion 12 of the upper electrode 14, when the drive voltage Va is applied, Electric field concentration is likely to occur in the gap 28 portion. This leads to a high efficiency of electron emission, and a low driving voltage (electron emission at a low voltage level) can be realized.
[0088] 上述したように、第 1の実施の形態では、上部電極 14は、貫通部 20の周部におい て庇部 26が形成されることから、上述したギャップ 28の部分での電界集中が大きくな ることとも相俟って、上部電極 14の庇部 26から電子が放出され易くなる。これは、電 子放出の高出力、高効率化につながり、駆動電圧 Vaの低電圧化を実現させることが できる。また、上述した第 1の電子放出方式 (ェミッタ部 12に蓄積された電子を放出さ せる方式)や第 2の電子放出方式 (上部電極 14からの 1次電子をェミッタ部 12に衝 突させて 2次電子を放出させる方式)の 、ずれにしても、上部電極 14の庇部 26がゲ ート電極 (制御電極、フォーカス電子レンズ等)として機能するため、放出電子の直進 性を向上させることができる。これは、電子放出素子 10Aを多数並べて例えばデイス プレイの電子源として構成した場合に、クロストークを低減する上で有利となる。  [0088] As described above, in the first embodiment, the upper electrode 14 has the flange portion 26 formed in the peripheral portion of the penetrating portion 20, and thus the electric field concentration in the gap 28 portion described above. Combined with the increase in size, electrons are easily emitted from the flange 26 of the upper electrode 14. This leads to higher output and higher efficiency of electron emission, and lowering of the drive voltage Va can be realized. In addition, the first electron emission method (the method for emitting electrons accumulated in the emitter unit 12) and the second electron emission method (the primary electrons from the upper electrode 14 collide with the emitter unit 12). Even if the secondary electron is emitted, the flange 26 of the upper electrode 14 functions as a gate electrode (control electrode, focus electron lens, etc.), so that the straightness of the emitted electrons can be improved. Can do. This is advantageous in reducing crosstalk when a large number of electron-emitting devices 10A are arranged to form, for example, an electron source for a display.
[0089] このように、第 1の実施の形態に係る電子放出素子 10Aにおいては、高い電界集 中を容易に発生させることができ、し力も、電子放出箇所を多くすることができ、電子 放出について高出力、高効率を図ることができ、低電圧駆動 (低消費電力)も可能と なる。  As described above, in the electron-emitting device 10A according to the first embodiment, high electric field concentration can be easily generated, the force can be increased, and the number of electron emission locations can be increased. High output and high efficiency can be achieved, and low voltage drive (low power consumption) is also possible.
[0090] 特に、第 1の実施の形態では、ェミッタ部 12の少なくとも上面は、誘電体の粒界によ る凹凸 22が形成され、上部電極 14は、誘電体の粒界における凹部 24に対応した部 分に貫通部 20が形成されるようにしたので、上部電極 14の庇部 26を簡単に実現さ せることができる。 [0090] In particular, in the first embodiment, at least the upper surface of the emitter section 12 is caused by a dielectric grain boundary. The upper electrode 14 has a through-hole 20 formed in a portion corresponding to the recess 24 in the grain boundary of the dielectric, so that the flange 26 of the upper electrode 14 can be easily realized. Can be made.
[0091] また、ェミッタ部 12の上面、すなわち、誘電体の粒界における凸部 30の表面(凹部 24の内壁面)と、上部電極 14の庇部 26の下面 26aとのなす角の最大角度 0を、 1° ≤ Θ≤60° とし、ェミッタ部 12の誘電体の粒界における凸部 30の表面(凹部 24の 内壁面)と、上部電極 14の庇部 26の下面 26aとの間の鉛直方向に沿った最大間隔 d を、 Ο μ m< d≤ 10 μ mとしたので、これらの構成により、ギャップ 28の部分での電界 集中の度合いをより大きくすることができ、電子放出についての高出力、高効率、並 びに駆動電圧の低電圧化を効率よく図ることができる。  [0091] Further, the upper surface of the emitter 12, that is, the maximum angle formed by the surface of the convex portion 30 (inner wall surface of the concave portion 24) at the grain boundary of the dielectric and the lower surface 26a of the flange portion 26 of the upper electrode 14 0 is set to 1 ° ≤ Θ ≤ 60 °. Between the surface of the convex part 30 (the inner wall surface of the concave part 24) and the lower surface 26a of the flange part 26 of the upper electrode 14 at the grain boundary of the dielectric of the emitter part 12 Since the maximum distance d along the vertical direction is Ο μ m <d ≤ 10 μ m, these configurations can increase the degree of electric field concentration at the gap 28 and High output, high efficiency, and low drive voltage can be efficiently achieved.
[0092] また、この第 1の実施の形態では、貫通部 20を孔 32の形状としている。図 2に示す ように、ェミッタ部 12のうち、上部電極 14と下部電極 16 (図 1参照)間に印加される駆 動電圧 Vaに応じて分極が反転あるいは変化する部分は、上部電極 14が形成されて V、る直下の部分 (第 1の部分) 40と、貫通部 20の内周から貫通部 20の内方に向かう 領域に対応した部分 (第 2の部分) 42であり、特に、第 2の部分 42は、駆動電圧 Vaの レベルや電界集中の度合いによって変化することになる。従って、この第 1の実施の 形態では、孔 32の平均径を、 0. 1 m以上、 10 μ m以下としている。この範囲であ れば、貫通部 20を通じて放出される電子の放出分布にばらつきがほとんどなくなり、 効率よく電子を放出することができる。  Further, in the first embodiment, the through portion 20 has the shape of the hole 32. As shown in FIG. 2, the portion of the emitter 12 where the polarization is reversed or changed according to the driving voltage Va applied between the upper electrode 14 and the lower electrode 16 (see FIG. 1) Formed V, a part immediately below the first part (first part) 40, and a part (second part) 42 corresponding to a region from the inner periphery of the penetrating part 20 toward the inner part of the penetrating part 20, The second portion 42 changes depending on the level of the driving voltage Va and the degree of electric field concentration. Therefore, in the first embodiment, the average diameter of the holes 32 is set to 0.1 m or more and 10 μm or less. Within this range, there is almost no variation in the emission distribution of electrons emitted through the penetrating portion 20, and electrons can be emitted efficiently.
[0093] なお、孔 32の平均径が 0. 1 μ m未満の場合、電子を蓄積する領域が狭くなり、放 出される電子の量が少なくなる。もちろん、孔 32を多数設けることも考えられるが、困 難性を伴い、製造コストが高くなるという懸念がある。孔 32の平均径が 10 mを超え ると、ェミッタ部 12の前記貫通部 20から露出した部分のうち、電子放出に寄与する部 分 (第 2の部分) 42の割合(占有率)が小さくなり、電子の放出効率が低下する。  [0093] When the average diameter of the holes 32 is less than 0.1 µm, the region for accumulating electrons is narrowed, and the amount of electrons emitted is reduced. Of course, it is conceivable to provide a large number of holes 32, but there is a concern that the manufacturing cost will increase due to difficulty. When the average diameter of the holes 32 exceeds 10 m, the ratio (occupancy) of the portion (second portion) 42 contributing to electron emission in the portion exposed from the penetrating portion 20 of the emitter 12 is small. Thus, the electron emission efficiency is reduced.
[0094] 上部電極 14の庇部 26の断面形状としては、図 2に示すように、上面及び下面とも 水平に延びる形状としてもよいし、図 8に示すように、庇部 26の下面 26aがほぼ水平 であって、庇部 26の上端部が上方に盛り上がつていてもよい。また、図 9に示すよう に、庇部 26の下面 26aが、貫通部 20の中心に向かうに従って徐々に上方に傾斜し ていてもよいし、図 10に示すように、庇部 26の下面 26aが、貫通部 20の中心に向か うに従って徐々に下方に傾斜していてもよい。図 8の例は、ゲート電極としての機能を 高めることが可能であり、図 10の例では、ギャップ 28の部分が狭くなることから、より 電界集中を発生し易くなり、電子放出の高出力、高効率を向上させることができる。 As shown in FIG. 2, the cross-sectional shape of the flange portion 26 of the upper electrode 14 may be a shape that extends horizontally on both the upper surface and the lower surface, and as shown in FIG. It is almost horizontal, and the upper end of the collar 26 may be raised upward. Further, as shown in FIG. 9, the lower surface 26a of the flange portion 26 gradually inclines upward toward the center of the penetrating portion 20. Alternatively, as shown in FIG. 10, the lower surface 26a of the flange portion 26 may be gradually inclined downward toward the center of the penetrating portion 20. The example of FIG. 8 can enhance the function as a gate electrode. In the example of FIG. 10, the gap 28 is narrowed, so that electric field concentration is more likely to occur, and high output of electron emission, High efficiency can be improved.
[0095] また、この第 1の実施の形態においては、図 11に示すように、電気的な動作におい て、上部電極 14と下部電極 16間に、ェミッタ部 12によるコンデンサ C1と、各ギャップ 28による複数のコンデンサ Caの集合体とが形成された形となる。すなわち、各ギヤッ プ 28による複数のコンデンサ Caは、互いに並列に接続された 1つのコンデンサ C2と して構成され、等価回路的には、集合体によるコンデンサ C2にェミッタ部 12によるコ ンデンサ C1が直列接続された形となる。  In the first embodiment, as shown in FIG. 11, in the electrical operation, the capacitor C 1 by the emitter unit 12 and the gaps 28 are interposed between the upper electrode 14 and the lower electrode 16. A plurality of capacitor Ca aggregates are formed. That is, a plurality of capacitors Ca by each gear 28 are configured as one capacitor C2 connected in parallel to each other, and in terms of equivalent circuit, a capacitor C1 by the emitter 12 is connected in series with the capacitor C2 by the aggregate. It becomes a connected form.
[0096] 実際には、集合体によるコンデンサ C2にェミッタ部 12によるコンデンサ C1がそのま ま直列接続されることはなぐ上部電極 14への貫通部 20の形成個数や全体の形成 面積等に応じて、直列接続されるコンデンサ成分が変化する。  [0096] Actually, the capacitor C1 by the emitter 12 is not connected in series to the capacitor C2 by the aggregate, depending on the number of through-holes 20 formed in the upper electrode 14, the overall formation area, etc. The capacitor component connected in series changes.
[0097] ここで、図 12に示すように、例えばェミッタ部 12によるコンデンサ C1のうち、その 25 %が集合体によるコンデンサ C2と直列接続された場合を想定して、容量計算を行つ てみる。先ず、ギャップ 28の部分は真空であることから比誘電率は 1となる。そして、 ギャップ 28の最大間隔 dを 0. 1 m、 1つのギャップ 28の部分の面積 S = 1 ^ m X l /z mとし、ギャップ 28の数を 10, 000個とする。また、ェミッタ咅 12の it誘電率を 200 0、ェミッタ部 12の厚みを 20 m、上部電極 14と下部電極 16の対向面積を 200 m X 200 μ mとすると、集合体によるコンデンサ C2の容量値は 0. 885pF、ェミッタ部 1 2によるコンデンサ C1の容量値は 35. 4pFとなる。そして、ェミッタ部 12によるコンデ ンサ C1のうち、集合体によるコンデンサ C2と直列接続されている部分を全体の 25% としたとき、該直列接続された部分における容量値 (集合体によるコンデンサ C2の容 量値を含めた容量値)は 0. 805pFであり、残りの容量値は 26. 6pFとなる。  Here, as shown in FIG. 12, for example, the capacitance calculation is performed assuming that 25% of the capacitor C1 by the emitter 12 is connected in series with the capacitor C2 by the aggregate. . First, since the gap 28 is vacuum, the relative dielectric constant is 1. The maximum interval d of the gaps 28 is 0.1 m, the area S of one gap 28 is S = 1 ^ mxl / zm, and the number of gaps 28 is 10,000. Also, assuming that the dielectric constant of the emitter 12 is 2000, the thickness of the emitter 12 is 20 m, and the opposing area of the upper electrode 14 and the lower electrode 16 is 200 m X 200 μm, the capacitance value of the capacitor C2 by the aggregate Is 0.885pF, and the capacitance value of the capacitor C1 by the emitter section 12 is 35.4pF. When the portion connected in series with the capacitor C2 by the aggregate in the capacitor C1 by the emitter 12 is 25% of the total, the capacitance value of the capacitor connected by the series (capacitance of the capacitor C2 by the aggregate) The capacitance value including the quantity value is 0.805 pF, and the remaining capacitance value is 26.6 pF.
[0098] これら直列接続された部分と残りの部分は並列接続されているから、全体の容量値 は、 27. 5pFとなる。この容量値は、ェミッタ部 12によるコンデンサ C1の容量値 35. 4pFの 78%である。つまり、全体の容量値は、ェミッタ部 12によるコンデンサ C1の容 量値よりち/ J、さくなる。 [0099] このように、複数のギャップ 28によるコンデンサ Caの集合体については、ギャップ 2 8によるコンデンサ Caの容量値が相対的に小さ 、ものとなり、ェミッタ部 12によるコン デンサ C1との分圧から、印加電圧 Vaのほとんどはギャップ 28に印加されることになり 、各ギャップ 28において、電子放出の高出力化が実現される。 [0098] Since the serially connected portion and the remaining portion are connected in parallel, the total capacitance value is 27.5 pF. This capacitance value is 78% of the capacitance value 35.4pF of the capacitor C1 by the emitter 12. That is, the total capacitance value is less than the capacitance value of the capacitor C1 by the emitter unit 12 / J. [0099] As described above, the aggregate of the capacitors Ca by the plurality of gaps 28 has a relatively small capacitance value of the capacitor Ca by the gaps 28. From the partial pressure with the capacitor C1 by the emitter unit 12, Most of the applied voltage Va is applied to the gap 28, and in each gap 28, high output of electron emission is realized.
[0100] また、集合体によるコンデンサ C2は、ェミッタ部 12によるコンデンサ C1に直列接続 された構造となることから、全体の容量値は、ェミッタ部 12によるコンデンサ C1の容 量値よりも小さくなる。このことから、電子放出は高出力であり、全体の消費電力は小 さくなると 、う好まし 、特性を得ることができる。  [0100] Further, since the capacitor C2 by the aggregate has a structure connected in series to the capacitor C1 by the emitter section 12, the overall capacitance value is smaller than the capacitance value of the capacitor C1 by the emitter section 12. For this reason, the electron emission has a high output, and if the overall power consumption becomes small, it is preferable to obtain characteristics.
[0101] 次に、上述した第 1の実施の形態に係る電子放出素子 10Aの 3つの変形例につい て図 13—図 15を参照しながら説明する。  Next, three modifications of the electron-emitting device 10A according to the first embodiment described above will be described with reference to FIGS.
[0102] 先ず、第 1の変形例に係る電子放出素子 lOAaは、図 13に示すように、貫通部 20 の形状、特に、上面力も見た形状が切欠き 44の形状である点で異なる。切欠き 44の 形状としては、図 13に示すように、多数の切欠き 44が連続して形成されたくし歯状の 切欠き 46が好ましい。この場合、貫通部 20を通じて放出される電子の放出分布のば らっきを低減し、効率よく電子を放出する上で有利となる。特に、切欠き 44の平均幅 を、 0. 以上、 10 m以下とすることが好ましい。この平均幅は、切欠き 44の中 心線を直交するそれぞれ異なる複数の線分の長さの平均を示す。  First, the electron-emitting device lOAa according to the first modification differs as shown in FIG. 13 in that the shape of the penetrating portion 20, particularly the shape in view of the upper surface force, is the shape of the notch 44. As the shape of the notch 44, as shown in FIG. 13, a comb-like notch 46 in which a large number of notches 44 are continuously formed is preferable. In this case, the variation in the emission distribution of the electrons emitted through the through-hole 20 is reduced, which is advantageous in efficiently emitting electrons. In particular, it is preferable that the average width of the notches 44 is not less than 0 and not more than 10 m. This average width indicates the average of the lengths of a plurality of different line segments orthogonal to the center line of the notch 44.
[0103] 第 2の変形例に係る電子放出素子 lOAbは、図 14に示すように、貫通部 20の形状 、特に、上面から見た形状がスリット 48である点で異なる。ここで、スリット 48とは、長 軸方向(長手方向)の長さが短軸方向(短手方向)の長さの 10倍以上であるものを 、 う。従って、長軸方向(長手方向)の長さが短軸方向(短手方向)の長さの 10倍未満 のものは孔 32 (図 3参照)の形状として定義することができる。また、スリット 48としては 、複数の孔 32が連通してつながつたものも含まれる。この場合、スリット 48の平均幅 は、 0.: m以上、 10 m以下とすることが好ましい。貫通部 20を通じて放出される 電子の放出分布のばらつきを低減し、効率よく電子を放出する上で有利になるから である。この平均幅は、スリット 48の中心線を直交するそれぞれ異なる複数の線分の 長さの平均を示す。  As shown in FIG. 14, the electron-emitting device lOAb according to the second modification is different in that the shape of the penetrating portion 20, particularly the shape seen from the top surface, is a slit 48. Here, the slit 48 is a slit having a length in the major axis direction (longitudinal direction) of 10 or more times the length in the minor axis direction (short direction). Therefore, a hole having a length in the major axis direction (longitudinal direction) less than 10 times the length in the minor axis direction (short direction) can be defined as the shape of the hole 32 (see FIG. 3). Further, the slit 48 includes one in which a plurality of holes 32 are connected and connected. In this case, the average width of the slits 48 is preferably set to 0 .: m or more and 10 m or less. This is because variations in the emission distribution of electrons emitted through the penetrating portion 20 are reduced, and this is advantageous in efficiently emitting electrons. This average width indicates the average length of a plurality of different line segments orthogonal to the center line of the slit 48.
[0104] 第 3の変形例に係る電子放出素子 lOAcは、図 15に示すように、ェミッタ部 12の上 面のうち、貫通部 20と対応する部分、例えば誘電体の粒界の凹部 24にフローテイン グ電極 50が存在している点で異なる。この場合、フローティング電極 50も電子供給 源となることから、電子の放出段階 (上述した第 1の電子放出方式における第 2の出 力期間 T2 (図 4参照))において、多数の電子を貫通部 20を通じて外部に放出させ ることがでさる。 [0104] The electron-emitting device lOAc according to the third modification is formed on the top of the emitter 12 as shown in FIG. The difference is that the floating electrode 50 exists in a portion of the surface corresponding to the penetrating portion 20, for example, the concave portion 24 of the grain boundary of the dielectric. In this case, since the floating electrode 50 also serves as an electron supply source, in the electron emission stage (the second output period T2 in the first electron emission method described above (see FIG. 4)), a large number of electrons are passed through the through-hole. It can be released outside through 20.
[0105] ここで、第 1の実施の形態に係る電子放出素子 10Aの特性、特に、電圧 電荷量 特性 (電圧一分極量特性)について説明する。  Here, characteristics of the electron-emitting device 10A according to the first embodiment, in particular, voltage charge amount characteristics (voltage-polarization amount characteristics) will be described.
[0106] この第 1の実施の形態に係る電子放出素子 10Aは、真空中において、図 16の特 性に示すように、基準電圧 =o(v)を基準とした非対称のヒステリシス曲線を描く。  The electron-emitting device 10A according to the first embodiment draws an asymmetric hysteresis curve with reference voltage = o (v) as a reference, as shown in the characteristics of FIG. 16, in vacuum.
[0107] この特性について説明すると、先ず、ェミッタ部 12のうち、電子が放出される部分を 電子放出部と定義したとき、基準電圧が印加されるポイント pi (初期状態)では、前記 電子放出部に電子がほとんど蓄積されていない状態となっている。その後、負電圧を 印加すると、前記電子放出部における正電荷の量が増し、それに伴って、電子が蓄 積されていくこととなる。負電圧のレベルを負方向に大きくしていくと、前記電子放出 部への電子の蓄積に伴って、ある負電圧のポイント p2において正電荷の量と電子の 量が平衡な状態となり、負電圧のレベルを負方向に大きくしていくと、さらに電子の蓄 積量が増加し、これに伴って、負電荷の量が正電荷の量よりも多い状態となる。ボイ ント p3において電子の蓄積飽和状態となる。  [0107] This characteristic will be described. First, when the electron emitting portion of the emitter 12 is defined as an electron emitting portion, at the point pi (initial state) where a reference voltage is applied, the electron emitting portion In this state, almost no electrons are accumulated. Thereafter, when a negative voltage is applied, the amount of positive charges in the electron emission portion increases, and accordingly, electrons are accumulated. As the level of the negative voltage is increased in the negative direction, the amount of positive charge and the amount of electrons are balanced at a certain negative voltage point p2 as the electrons accumulate in the electron emission portion, and the negative voltage Increasing the level in the negative direction further increases the amount of accumulated electrons, resulting in a state where the amount of negative charge is greater than the amount of positive charge. At point p3, the electron is saturated.
[0108] その後、負電圧のレベルを小さくしていき、さらに、基準電圧を超えて正電圧を印加 していくと、ポイント p4において、電子の放出が開始される。この正電圧を正方向に 大きくすれば、電子の放出量が増加し、ポイント p5では、正電荷の量と電子の量が平 衡な状態となる。そして、ポイント P6では、蓄積されていた電子がほとんど放出され、 正電荷の量と負電荷の量の差が初期状態とほぼ同じになる。 [0108] Thereafter, when the level of the negative voltage is decreased and a positive voltage is applied exceeding the reference voltage, emission of electrons starts at point p4. Increasing this positive voltage in the positive direction increases the amount of emitted electrons, and at point p5, the amount of positive charge and the amount of electrons are balanced. At the point P 6, the accumulated electrons are almost released, and the difference between the positive charge amount and the negative charge amount is almost the same as in the initial state.
[0109] そして、この特性の特徴ある部分は、以下の点である。  [0109] Characteristic portions of this characteristic are as follows.
[0110] (1)正電荷の量と電子の量が平衡な状態であるポイント p2における負電圧を VI、ポ イント p5における正電圧を V2としたとき、  [0110] (1) When the negative voltage at point p2 where the amount of positive charge and the amount of electrons are in equilibrium is VI, and the positive voltage at point p5 is V2,
I VI I < I V2 I  I VI I <I V2 I
である。 [0111] (2)より詳しくは、 1. 5 X I VI I < I V2 Iである。 It is. [0111] (2) More specifically, 1.5 XI VI I <I V2 I.
[0112] (3)ポイント p2における正電荷の量と電子の量の変化の割合を A Q1Z AV1、ポィ ント ρ5における正電荷の量と電子の量の変化の割合を A Q2Z AV2としたとき、  [0112] (3) When the rate of change in the amount of positive charge and the amount of electrons at point p2 is A Q1Z AV1, and the rate of change in the amount of positive charge and the amount of electrons at point ρ5 is A Q2Z AV2,
( A Ql/ AVl) > ( A Q2/ AV2)  (A Ql / AVl)> (A Q2 / AV2)
である。  It is.
[0113] (4)電子が蓄積飽和状態となる電圧を V3、電子の放出が開始される電圧を V4とした とき、  [0113] (4) When V3 is the voltage at which electrons are accumulated and saturated, and V4 is the voltage at which electron emission starts,
1≤ I V4 I / I V3 I ≤1. 5  1≤ I V4 I / I V3 I ≤1.5
である。  It is.
[0114] 次に、図 16の特性を電圧一分極量特性の立場で説明する。初期状態において、ェ ミッタ部 12がー方向に分極されて、例えば双極子モーメントの負極がェミッタ部 12の 上面に向いた状態(図 17A参照)となっている場合を想定して説明する。  Next, the characteristic of FIG. 16 will be described from the standpoint of the voltage-one-polarization characteristic. In the initial state, the description will be made on the assumption that the emitter section 12 is polarized in the negative direction and the negative pole of the dipole moment is directed to the upper surface of the emitter section 12 (see FIG. 17A).
[0115] 先ず、図 16に示すように、基準電圧 (例えば OV)が印加されるポイント pi (初期状 態)では、図 17Aに示すように、双極子モーメントの負極がェミッタ部 12の上面に向 いた状態となっていることから、ェミッタ部 12の上面には電子がほとんど蓄積されてい ない状態となっている。  First, as shown in FIG. 16, at a point pi (initial state) where a reference voltage (eg, OV) is applied, the negative pole of the dipole moment is applied to the upper surface of the emitter section 12 as shown in FIG. 17A. Since it is in the facing state, almost no electrons are accumulated on the upper surface of the emitter 12.
[0116] その後、負電圧を印加し、該負電圧のレベルを負方向に大きくしていくと、負の抗 電圧を超えたあたり(図 16のポイント p2参照)から分極が反転しはじめ、図 16のボイ ント p3にて全ての分極が反転することになる(図 17B参照)。この分極反転によって、 上記したトリプルジャンクションにおいて電界集中が発生し、例えばェミッタ部 12のう ち、上部電極 14の貫通部 20から露出する部分や上部電極 14の周縁部近傍の部分 に電子が蓄積される(図 17C参照)。特に、上部電極 14から、ェミッタ部 12のうち、上 部電極 14の貫通部 20から露出する部分に向けて電子が放出(内部放出)されること になる。そして、図 16のポイント p3において電子の蓄積飽和状態となる。  [0116] After that, when a negative voltage is applied and the level of the negative voltage is increased in the negative direction, the polarization starts to reverse around the point where the negative coercive voltage is exceeded (see point p2 in Fig. 16). All polarizations are reversed at 16 points p3 (see Fig. 17B). Due to this polarization inversion, electric field concentration occurs in the triple junction described above, and electrons are accumulated in, for example, the portion exposed from the penetrating portion 20 of the upper electrode 14 or the portion near the peripheral edge of the upper electrode 14 in the emitter portion 12. (See Figure 17C). In particular, electrons are emitted (internally emitted) from the upper electrode 14 toward a portion of the emitter portion 12 exposed from the through portion 20 of the upper electrode 14. Then, at point p3 in FIG.
[0117] その後、負電圧のレベルを小さくしていき、さらに、基準電圧を超えて正電圧を印加 していくと、ある電圧レベルまでは、ェミッタ部 12の上面の帯電状態が維持される(図 18A参照)。正電圧のレベルをさらに大きくいくと、図 16のポイント p4の直前におい て、双極子モーメントの負極がェミッタ部 12の上面に向き始める領域が発生し(図 18 B参照)、さらに、レベルを上げて図 16のポイント p4以降において、電子の放出が開 始される(図 18C参照)。この正電圧を正方向に大きくすれば、電子の放出量が増加 し、正の抗電圧を超えたあたり(ポイント p5)力 分極が再び反転する領域が拡大して 、ポイント P6では、蓄積されていた電子がほとんど放出され、このときの分極量は初 期状態の分極量とほぼ同じになる。 [0117] After that, when the level of the negative voltage is decreased and a positive voltage is applied exceeding the reference voltage, the charged state of the upper surface of the emitter unit 12 is maintained up to a certain voltage level ( (See Figure 18A). When the level of the positive voltage is further increased, a region in which the negative pole of the dipole moment begins to face the upper surface of the emitter 12 immediately before the point p4 in FIG. 16 (FIG. 18). B (see Fig. 18C), and then the level is raised and electron emission starts after point p4 in Fig. 16 (see Fig. 18C). When the positive voltage is increased in the positive direction, the amount of emitted electrons is increased, positive per exceeding the coercive voltage (the point p5) force polarization is expanded region again inverted, the point P 6, is accumulated Most of the electrons were released, and the amount of polarization at this time was almost the same as the amount of polarization in the initial state.
[0118] そして、この電子放出素子 10Aの特性の特徴ある部分は、以下の点となる。  [0118] Characteristic portions of the characteristics of the electron-emitting device 10A are as follows.
[0119] (A)負の抗電圧を vl、正の抗電圧を v2としたとき、  [0119] (A) When the negative coercive voltage is vl and the positive coercive voltage is v2,
I vl I < I v2 I  I vl I <I v2 I
である。  It is.
[0120] (B)より詳しくは、 1. 5 X I vl I < I v2 Iである。  [0120] (B) More specifically, 1.5 X I vl I <I v2 I.
[0121] (C)負の抗電圧 vlを印加した際における分極の変化の割合を A qlZ Avl、正の抗 電圧 v2を印加した際における分極の変化の割合を Δ q2Z Δ v2としたとき、  (C) When the rate of change in polarization when a negative coercive voltage vl is applied is A qlZ Avl, and the rate of change in polarization when a positive coercive voltage v2 is applied is Δ q2Z Δ v2,
( A ql/ Avl) > ( A q2/ Av2)  (A ql / Avl)> (A q2 / Av2)
である。  It is.
[0122] (D)電子が蓄積飽和状態となる電圧を v3、電子の放出が開始される電圧を v4とした とき、  [0122] (D) When the voltage at which electrons are accumulated and saturated is v3 and the voltage at which electrons start to be emitted is v4,
1≤ I v4 I / I v3 I ≤1. 5  1≤ I v4 I / I v3 I ≤1.5
である。  It is.
[0123] 第 1の実施の形態に係る電子放出素子 10Aは、上述のような特性を有することから 、複数の画素に応じて配列された複数の電子放出素子 10Aを有し、各電子放出素 子 10Aからの電子放出によって画像表示を行うディスプレイに簡単に適用させること ができる。  [0123] Since the electron-emitting device 10A according to the first embodiment has the characteristics as described above, the electron-emitting device 10A includes a plurality of electron-emitting devices 10A arranged according to a plurality of pixels, It can be easily applied to a display that displays an image by emitting electrons from the child 10A.
[0124] 次に、第 1の実施の形態に係る電子放出素子 10Aを使用した構成されたディスプ レイ 100について説明する。  Next, a display 100 configured using the electron-emitting device 10A according to the first embodiment will be described.
[0125] このディスプレイ 100は、図 19に示すように、多数の電子放出素子 10Aが画素に 対応してマトリックス状あるいは千鳥状に配列された表示部 102と、該表示部 102を 駆動するための駆動回路 104とを有する。この場合、 1画素当たり 1つの電子放出素 子 10Aを割り当ててもよいし、 1画素当たり複数の電子放出素子 10Aを割り当てるよ うにしてもよい。この実施の形態では、説明を簡単にするために、 1画素当たり 1つの 電子放出素子 10Aを割り当てた場合を想定して説明する。 As shown in FIG. 19, the display 100 includes a display unit 102 in which a large number of electron-emitting devices 10A are arranged in a matrix or staggered manner corresponding to pixels, and a drive for driving the display unit 102. And a driving circuit 104. In this case, one electron emitting element 10A may be allocated per pixel, or a plurality of electron emitting elements 10A may be allocated per pixel. You may do it. In this embodiment, in order to simplify the description, the description will be made on the assumption that one electron-emitting device 10A is assigned per pixel.
[0126] この駆動回路 104は、表示部 102に対して行を選択するための複数の行選択線 1 06が配線され、同じく表示部 102に対して画素信号 Sdを供給するための複数の信 号線 108が配線されている。  This drive circuit 104 is provided with a plurality of row selection lines 106 for selecting a row for the display unit 102, and a plurality of signals for supplying the pixel signal Sd to the display unit 102. Wire 108 is wired.
[0127] さらに、この駆動回路 104は、行選択線 106に選択的に選択信号 Ssを供給して、 1 行単位に電子放出素子 10Aを順次選択する行選択回路 110と、信号線 108にパラ レルに画素信号 Sdを出力して、行選択回路 110にて選択された行 (選択行)にそれ ぞれ画素信号 Sdを供給する信号供給回路 112と、入力される映像信号 Sv及び同期 信号 Scに基づいて行選択回路 110及び信号供給回路 112を制御する信号制御回 路 114とを有する。  In addition, the drive circuit 104 selectively supplies a selection signal Ss to the row selection line 106 to sequentially select the electron-emitting devices 10A for each row, and the signal line 108 has a parameter. The pixel signal Sd is output to the real signal, the signal supply circuit 112 supplies the pixel signal Sd to each row selected by the row selection circuit 110 (selected row), and the input video signal Sv and the synchronization signal Sc. And a signal control circuit 114 for controlling the row selection circuit 110 and the signal supply circuit 112 based on the above.
[0128] 行選択回路 110及び信号供給回路 112には電源回路 116 (例えば 50V及び 0V) が接続され、特に、行選択回路 110と電源回路 116間の負極ラインと GND (グランド )間にパルス電源 118が接続されている。パルス電源 118は、後述する電荷蓄積期 間 Tdに基準電圧 (例えば 0V)、発光期間 Thに電圧 (例えば 400V)とされたパルス 状の電圧波形を出力する。  [0128] A power supply circuit 116 (for example, 50V and 0V) is connected to the row selection circuit 110 and the signal supply circuit 112, and in particular, a pulse power supply is connected between the negative line between the row selection circuit 110 and the power supply circuit 116 and GND (ground). 118 is connected. The pulse power supply 118 outputs a pulsed voltage waveform having a reference voltage (for example, 0 V) in a charge accumulation period Td, which will be described later, and a voltage (for example, 400 V) in the light emission period Th.
[0129] 行選択回路 110は、電荷蓄積期間 Tdに、選択行に対して選択信号 Ssを出力し、 非選択行に対して非選択信号 Snを出力する。また、行選択回路 110は、発光期間 T hに電源回路 116からの電源電圧(例えば 50V)とパルス電源 118からの電圧(例え ば- 400V)が加わった一定電圧(例えば- 350V)を出力する。  [0129] In the charge accumulation period Td, the row selection circuit 110 outputs the selection signal Ss to the selected row and outputs the non-selection signal Sn to the non-selected row. In addition, the row selection circuit 110 outputs a constant voltage (for example, −350 V) in which the power supply voltage (for example, 50 V) from the power circuit 116 and the voltage from the pulse power supply 118 (for example, −400 V) are added during the light emission period Th. .
[0130] 信号供給回路 112は、パルス生成回路 120と振幅変調回路 122とを有する。パル ス生成回路 120は、電荷蓄積期間 Tdにおいて、一定のパルス周期で一定の振幅( 例えば 50V)を有するパルス信号 Spを生成、出力し、発光期間 Thにおいて、基準電 圧 (例えば 0V)を出力する。  The signal supply circuit 112 includes a pulse generation circuit 120 and an amplitude modulation circuit 122. The pulse generation circuit 120 generates and outputs a pulse signal Sp having a constant amplitude (eg, 50 V) with a constant pulse period during the charge accumulation period Td, and outputs a reference voltage (eg, 0 V) during the light emission period Th. To do.
[0131] 振幅変調回路 122は、電荷蓄積期間 Tdにおいて、ノ ルス生成回路 120からのパ ルス信号 Spをそれぞれ選択行に関する画素の輝度レベルに応じて振幅変調し、そ れぞれ選択行に関する画素の画素信号 Sdとして出力し、発光期間 Thにおいて、パ ルス生成回路 120からの基準電圧をそのまま出力する。これらのタイミング制御並び に選択された複数の画素の輝度レベルの振幅変調回路 122への供給は、信号制御 回路 114を通じて行われる。 [0131] In the charge accumulation period Td, the amplitude modulation circuit 122 amplitude-modulates the pulse signal Sp from the pulse generation circuit 120 in accordance with the luminance level of the pixel related to the selected row, and each pixel related to the selected row. The pixel signal Sd is output and the reference voltage from the pulse generation circuit 120 is output as it is during the light emission period Th. These timing control sequences The luminance levels of the plurality of pixels selected in the above are supplied to the amplitude modulation circuit 122 through the signal control circuit 114.
[0132] 例えば図 20A—図 20Cにおいて 3つの例を示すように、輝度レベルが低い場合は 、パルス信号 Spの振幅を低レベル Vslとし(図 20A参照)、輝度レベルが中位の場合 は、パルス信号 Spの振幅を中レベル Vsmとし(図 20B参照)、輝度レベルが高い場 合は、パルス信号 Spの振幅を高レベル Vshとする(図 20C参照)。この例では、 3つ に分けた例を示した力 ディスプレイ 100に適用する場合には、パルス信号 Spを、画 素の輝度レベルに応じて、例えば 128段階や 256段階に振幅変調される。  [0132] For example, as shown in three examples in FIGS. 20A to 20C, when the luminance level is low, the amplitude of the pulse signal Sp is set to the low level Vsl (see FIG. 20A), and when the luminance level is medium, The amplitude of the pulse signal Sp is set to the medium level Vsm (see Fig. 20B). If the luminance level is high, the amplitude of the pulse signal Sp is set to the high level Vsh (see Fig. 20C). In this example, when applied to the force display 100 shown in the example divided into three, the pulse signal Sp is amplitude-modulated in 128 steps or 256 steps, for example, according to the luminance level of the pixel.
[0133] ここで、信号供給回路 112の変形例について図 21—図 22Cを参照しながら説明す る。  Here, a modification of the signal supply circuit 112 will be described with reference to FIGS. 21 to 22C.
[0134] 変形例に係る信号供給回路 112aは、図 21に示すように、パルス生成回路 124とパ ルス幅変調回路 126とを有する。パルス生成回路 124は、電荷蓄積期間 Tdにおい て、電子放出素子 10Aに印加される電圧波形(図 22A—図 22Cにおいて実線で示 す)において、立ち上がり部分の波形が連続的にレベルが変化するパルス信号 Spa ( 図 22A—図 22Cにおいて破線で示す)を生成、出力し、発光期間 Thにおいて、基 準電圧を出力する。そして、パルス幅変調回路 126は、電荷蓄積期間 Tdにおいて、 パルス生成回路 124からのパルス信号 Spaのパルス幅 Wp (図 22A—図 22C参照) をそれぞれ選択行に関する画素の輝度レベルに応じて変調し、それぞれ選択行に 関する画素の画素信号 Sdとして出力する。発光期間 Thにおいてはパルス生成回路 124からの基準電圧をそのまま出力する。この場合も、これらのタイミング制御並びに 選択された複数の画素の輝度レベルのパルス幅変調回路 126への供給は、信号制 御回路 114を通じて行われる。  As shown in FIG. 21, the signal supply circuit 112a according to the modification includes a pulse generation circuit 124 and a pulse width modulation circuit 126. The pulse generation circuit 124 is a pulse whose voltage rises continuously in the voltage waveform applied to the electron emitter 10A (shown by the solid line in FIGS. 22A to 22C) during the charge accumulation period Td. Generates and outputs the signal Spa (indicated by a broken line in FIGS. 22A to 22C), and outputs a reference voltage during the light emission period Th. In the charge accumulation period Td, the pulse width modulation circuit 126 modulates the pulse width Wp (see FIGS. 22A to 22C) of the pulse signal Spa from the pulse generation circuit 124 according to the luminance level of the pixel relating to the selected row. These are output as pixel signals Sd of the pixels related to the selected row. In the light emission period Th, the reference voltage from the pulse generation circuit 124 is output as it is. Also in this case, the timing control and the supply of the luminance levels of the selected pixels to the pulse width modulation circuit 126 are performed through the signal control circuit 114.
[0135] 例えば図 22A—図 22Cにおいて 3つの例を示すように、輝度レベルが低い場合は 、パルス信号 Spaのパルス幅 Wpを短くして、実質的な振幅を低レベル Vslとし(図 22 A参照)、輝度レベルが中位の場合は、パルス信号 Spaのパルス幅 Wpを中位の長さ にして、実質的な振幅を中位レベル Vsmとし(図 22B参照)、輝度レベルが高い場合 は、パルス信号 Spaのパルス幅 Wpを長くして、実質的な振幅を高レベル Vshとする( 図 22C参照)。ここでは、 3つの例を示したが、ディスプレイ 100に適用する場合には 、ノ ルス信号 Spaを、画素の輝度レベルに応じて、例えば 128段階や 256段階にパ ルス幅変調される。 [0135] For example, as shown in three examples in FIGS. 22A to 22C, when the luminance level is low, the pulse width Wp of the pulse signal Spa is shortened and the substantial amplitude is set to the low level Vsl (see FIG. 22A). If the brightness level is medium, the pulse width Wp of the pulse signal Spa is set to the medium length, the actual amplitude is set to the medium level Vsm (see Figure 22B), and the brightness level is high. In this case, the pulse width Wp of the pulse signal Spa is lengthened and the substantial amplitude is set to the high level Vsh (see Fig. 22C). Here are three examples, but when applied to the display 100 The pulse width of the noise signal Spa is modulated in 128 steps or 256 steps, for example, according to the luminance level of the pixel.
[0136] ここで、上述した電子の蓄積に係る負電圧のレベルを変化させた場合の特性図の 変化を、図 20A—図 20Cに示すパルス信号 Spに対する 3つの振幅変調の例と、図 2 2A—図 22Cに示すパルス信号 Spaに対する 3つのパルス幅変調の例との関連でみ ると、図 20A及び図 22Aに示す負電圧のレベル Vslでは、図 23Aに示すように、電 子放出素子 10Aに蓄積される電子の量が少ない。図 20B及び図 22Bに示す負電圧 のレベル Vsmでは、図 23Bに示すように、蓄積される電子の量が中位であり、図 20C 及び図 22Cに示す負電圧のレベル Vshでは、図 23Cに示すように、蓄積される電子 の量が多ぐほぼ飽和状態となっている。  Here, changes in the characteristic diagram when the level of the negative voltage related to the above-described electron accumulation is changed are shown in FIG. 20A to FIG. 20C as examples of three amplitude modulations for the pulse signal Sp shown in FIG. 2A—In relation to the three pulse width modulation examples for the pulse signal Spa shown in FIG. 22C, at the negative voltage level Vsl shown in FIG. 20A and FIG. 22A, as shown in FIG. The amount of electrons stored in 10A is small. At the negative voltage level Vsm shown in FIG. 20B and FIG. 22B, the amount of accumulated electrons is medium as shown in FIG. 23B, and at the negative voltage level Vsh shown in FIG. 20C and FIG. As shown, the amount of accumulated electrons is large and almost saturated.
[0137] し力し、これら図 23A—図 23Cに示すように、電子の放出が開始されるポイント p4 の電圧レベルはほとんど同じになっている。すなわち、電子を蓄積した後、ポイント p4 に示す電圧レベルまで印加電圧が変化したとしても、電子の蓄積量にほとんど変化 はなぐメモリ効果が発揮されることがわかる。  As shown in FIGS. 23A to 23C, the voltage level at the point p4 at which the electron emission starts is almost the same. In other words, even after the electrons are accumulated, even if the applied voltage changes up to the voltage level shown at point p4, it can be seen that a memory effect is exhibited in which there is almost no change in the amount of accumulated electrons.
[0138] また、第 1の実施の形態に係る電子放出素子 10Aをディスプレイ 100の画素として 利用する場合は、図 24に示すように、上部電極 14の上方に、例えばガラスやアタリ ル製の透明板 130が配置され、該透明板 130の裏面 (上部電極 14と対向する面)に 例えば透明電極にて構成されたコレクタ電極 132が配置され、該コレクタ電極 132に は蛍光体 134が塗布される。なお、コレクタ電極 132にはバイアス電圧源 136 (コレク タ電圧 Vc)が抵抗を介して接続される。また、電子放出素子 10Aは、当然のことなが ら、真空空間内に配置される。雰囲気中の真空度は、 102— 10— 6Paが好ましぐより 好ましくは 10— 3— 10— 5Paである。 [0138] When the electron-emitting device 10A according to the first embodiment is used as a pixel of the display 100, as shown in FIG. 24, a transparent material made of glass or attal, for example, is disposed above the upper electrode 14. A plate 130 is disposed, and a collector electrode 132 made of, for example, a transparent electrode is disposed on the back surface (the surface facing the upper electrode 14) of the transparent plate 130, and a phosphor 134 is applied to the collector electrode 132. . A bias voltage source 136 (collector voltage Vc) is connected to the collector electrode 132 via a resistor. Needless to say, the electron-emitting device 10A is disposed in the vacuum space. The degree of vacuum in the atmosphere is preferably 10 2 − 10− 6 Pa, more preferably 10 3 − 10− 5 Pa.
[0139] このような範囲を選んだ理由は、低真空では、(1)空間内に気体分子が多いため、 プラズマを生成し易ぐプラズマが多量に発生され過ぎると、その正イオンが多量に 上部電極 14に衝突して損傷を進めるおそれや、(2)放出電子がコレクタ電極 132〖こ 到達する前に気体分子に衝突してしま 、、コレクタ電圧 Vcで十分に加速した電子に よる蛍光体 134の励起が十分に行われなくなるおそれがあるからである。  [0139] The reason for selecting such a range is that, in a low vacuum, (1) because there are many gas molecules in the space, if too much plasma that is easy to generate plasma is generated, the amount of positive ions will be large. There is a possibility of colliding with the upper electrode 14 to promote damage, and (2) phosphors due to electrons accelerated sufficiently by the collector voltage Vc when the emitted electrons collide with gas molecules before reaching the collector electrode 132 〖. This is because 134 may not be sufficiently excited.
[0140] 一方、高真空では、電界が集中するポイントから電子を放出し易いものの、構造体 の支持、及び真空のシール部が大きくなり、小型化に不利になるという問題があるか らである。 [0140] On the other hand, in a high vacuum, although it is easy to emit electrons from the point where the electric field concentrates, This is because there is a problem that the size of the support and the vacuum seal becomes large, which is disadvantageous for miniaturization.
[0141] 図 24の例では、透明板 130の裏面にコレクタ電極 132を形成し、該コレクタ電極 13 2の表面(上部電極 14と対向する面)に蛍光体 134を形成するようにしたが、その他、 図 25に示すように、透明板 130の裏面に蛍光体 134を形成し、該蛍光体 134を覆う ようにコレクタ電極 132を形成するようにしてもよ!、。  In the example of FIG. 24, the collector electrode 132 is formed on the back surface of the transparent plate 130, and the phosphor 134 is formed on the surface of the collector electrode 132 (the surface facing the upper electrode 14). In addition, as shown in FIG. 25, the phosphor 134 may be formed on the back surface of the transparent plate 130, and the collector electrode 132 may be formed so as to cover the phosphor 134!
[0142] これは、 CRT等で用いられる構成であって、コレクタ電極 132がメタルバックとして 機能する。ェミッタ部 12から放出された電子はコレクタ電極 132を貫通して蛍光体 13 4に進入し、該蛍光体 134を励起する。従って、コレクタ電極 132は電子が貫通でき る程度の厚さであり、 lOOnm以下が好ましい。電子の運動エネルギーが大きいほど 、コレクタ電極 132の厚みを厚くすることができる。  [0142] This is a configuration used in a CRT or the like, and the collector electrode 132 functions as a metal back. Electrons emitted from the emitter 12 pass through the collector electrode 132 and enter the phosphor 134 to excite the phosphor 134. Therefore, the collector electrode 132 is thick enough to allow electrons to pass through, and is preferably less than lOOnm. The greater the kinetic energy of electrons, the thicker the collector electrode 132 can be made.
[0143] このような構成とすることで以下の効果を奏することができる。  [0143] With such a configuration, the following effects can be obtained.
[0144] (a)蛍光体 134が導電性でない場合、蛍光体 134の帯電 (負)を防ぎ、電子の加速 電界を維持することができる。  (A) When the phosphor 134 is not conductive, charging (negative) of the phosphor 134 can be prevented, and the acceleration electric field of electrons can be maintained.
[0145] (b)コレクタ電極 132が蛍光体 134の発光を反射して、蛍光体 134の発光を効率よく 透明板 130側 (発光面側)に放出することができる。  (B) The collector electrode 132 reflects the light emission of the phosphor 134, and the light emission of the phosphor 134 can be efficiently emitted to the transparent plate 130 side (light emission surface side).
[0146] (c)蛍光体 134への過度な電子の衝突を防ぐことができ、蛍光体 134の劣化や蛍光 体 134からのガス発生を防止することができる。  (C) Excessive collision of electrons with the phosphor 134 can be prevented, and deterioration of the phosphor 134 and generation of gas from the phosphor 134 can be prevented.
[0147] 次に、この第 1の実施の形態に係る電子放出素子 10Aについての 4つの実験例( 第 1一第 4の実験例)を示す。  Next, four experimental examples (first to fourth experimental examples) for the electron-emitting device 10A according to the first embodiment are shown.
[0148] 第 1の実験例は、電子放出素子 10Aの電子の放出状態をみたものである。すなわ ち、図 26Aに示すように、電子放出素子 10Aに対して 70Vの電圧を有する書込み パルス Pwを印加して、電子放出素子 10Aに電子を蓄積させ、その後、 280Vの電圧 を有する点灯パルス Phを印加して電子を放出させた。電子の放出状態は、蛍光体 1 34の発光を受光素子 (フォトダイオード)にて検出して測定した。検出波形を図 26B に示す。なお、書込みパルス Pwと点灯パルス Phのデューティ比は 50%とした。  [0148] In the first experimental example, the electron emission state of the electron-emitting device 10A is observed. That is, as shown in FIG. 26A, a write pulse Pw having a voltage of 70V is applied to the electron-emitting device 10A to accumulate electrons in the electron-emitting device 10A, and then a lighting pulse having a voltage of 280V. Ph was applied to emit electrons. The electron emission state was measured by detecting the light emission of the phosphor 1 34 with a light receiving element (photodiode). The detected waveform is shown in Figure 26B. The duty ratio of the write pulse Pw and the lighting pulse Ph was 50%.
[0149] この第 1の実験例から、点灯パルス Phの立ち上がり途中から発光が開始され、該点 灯パルス Phの初期段階で発光が終了していることがわかる。従って、点灯パルス Ph の期間をより短くしても発光には影響はないものと考えられる。これは、高電圧の印加 期間の短縮ィ匕につながり、消費電力の低減ィ匕を図る上で有利になる。 [0149] From this first experimental example, it can be seen that light emission started in the middle of the rise of the lighting pulse Ph, and light emission ended at the initial stage of the lighting pulse Ph. Therefore, the lighting pulse Ph It is considered that the light emission is not affected even if the period is shortened. This leads to a shortening of the high voltage application period, which is advantageous in reducing the power consumption.
[0150] 第 2の実験例は、電子放出素子 10Aの電子の放出量力 図 27に示す書込みパル ス Pwの振幅によってどのように変化するかをみたものである。電子の放出量の変化 は第 1の実験例と同様に、蛍光体 134の発光を受光素子 (フォトダイオード)にて検出 して測定した。実験結果を図 28に示す。  [0150] The second experiment example shows how the electron emission amount force of the electron-emitting device 10A changes depending on the amplitude of the write pulse Pw shown in FIG. The change in the amount of emitted electrons was measured by detecting the light emission of the phosphor 134 with a light receiving element (photodiode) as in the first experimental example. The experimental results are shown in FIG.
[0151] 図 28において、実線 Aは、点灯パルス Phの振幅を 200Vとし、書込みパルス Pwの 振幅を 10Vから 80Vに変化させた場合の特性を示し、実線 Bは、点灯パルス Ph の振幅を 350Vとし、書込みパルス Pwの振幅を 10Vから—80Vに変化させた場合 の特性を示す。  [0151] In Fig. 28, the solid line A shows the characteristics when the amplitude of the lighting pulse Ph is 200V and the amplitude of the writing pulse Pw is changed from 10V to 80V, and the solid line B shows the amplitude of the lighting pulse Ph is 350V. The characteristics when the amplitude of the write pulse Pw is changed from 10V to –80V are shown.
[0152] この図 28に示すように、書込みパルス Pwを 20Vから 40Vに変化させた場合、 発光輝度は、ほとんど直線的に変化していることがわかる。特に、点灯パルス Phの振 幅が 350Vの場合と 200Vの場合とで比較すると、 350Vの場合が書込みパルス Pw に対する発光輝度変化のダイナミックレンジが広くなつており、画像表示における輝 度向上、コントラストの向上を図る上で有利であることがわかる。この傾向は、点灯パ ルス Phの振幅設定に対して発光輝度が飽和するまでの範囲にぉ 、て、点灯パルス Phの振幅を上げるほど有利になると思われる力 信号伝送系の耐圧や消費電力との 関係で、最適な値に設定することが好ましい。  As shown in FIG. 28, when the write pulse Pw is changed from 20 V to 40 V, it can be seen that the light emission luminance changes almost linearly. In particular, when the lighting pulse Ph amplitude is 350 V and 200 V, the dynamic range of the emission luminance change with respect to the write pulse Pw is wider in the case of 350 V, which improves the brightness and contrast of the image display. It can be seen that it is advantageous for improvement. This tendency can be seen in the range until the light emission brightness is saturated with respect to the amplitude setting of the lighting pulse Ph. Therefore, it is preferable to set the optimal value.
[0153] 第 3の実験例は、電子放出素子 10Aの電子の放出量力 図 27に示す点灯パルス Phの振幅によってどのように変化するかをみたものである。電子の放出量の変化は 第 1の実験例と同様に、蛍光体 134の発光を受光素子 (フォトダイオード)にて検出し て測定した。実験結果を図 29に示す。  [0153] The third experiment example shows how the electron emission amount force of the electron-emitting device 10A changes depending on the amplitude of the lighting pulse Ph shown in Fig. 27. The change in the amount of emitted electrons was measured by detecting the light emission of the phosphor 134 with a light receiving element (photodiode) as in the first experimental example. The experimental results are shown in Fig. 29.
[0154] 図 29において、実線 Cは、書込みパルス Pwの振幅を 40Vとし、点灯パルス Phの 振幅を 50Vカゝら 400Vに変化させた場合の特性を示し、実線 Dは、書込みパルス Pw の振幅を 70Vとし、点灯パルス Phの振幅を 50Vから 400Vに変化させた場合の特 性を示す。  In FIG. 29, the solid line C shows the characteristics when the amplitude of the write pulse Pw is 40V and the amplitude of the lighting pulse Ph is changed from 50V to 400V, and the solid line D is the amplitude of the write pulse Pw. Shows the characteristics when the lighting pulse Ph amplitude is changed from 50V to 400V.
[0155] この図 29に示すように、点灯パルス Phを 100Vから 300Vに変化させた場合、発光 輝度は、ほとんど直線的に変化していることがわかる。特に、書込みパルス Pwの振 幅が 40Vの場合と 70Vの場合とで比較すると、 70Vの場合が点灯パルス Phに 対する発光輝度変化のダイナミックレンジが広くなつており、画像表示における輝度 向上、コントラストの向上を図る上で有利であることがわかる。この傾向は、書込みパ ルス Pwの振幅設定に対して発光輝度が飽和するまでの範囲にぉ 、て、書込みパル ス Pwの振幅 (この場合、絶対値)を上げるほど有利になると思われる力 この場合も、 信号伝送系の耐圧や消費電力との関係で、最適な値に設定することが好ましい。 As shown in FIG. 29, when the lighting pulse Ph is changed from 100 V to 300 V, it can be seen that the emission luminance changes almost linearly. In particular, write pulse Pw oscillation Comparing the width between 40V and 70V, the 70V range has a wider dynamic range of the light emission luminance change with respect to the lighting pulse Ph, which is advantageous for improving the brightness and contrast of the image display. I know that there is. This tendency is a force that seems to be more advantageous as the amplitude (in this case, absolute value) of the write pulse Pw is increased over the range until the emission luminance is saturated with respect to the amplitude setting of the write pulse Pw. Even in this case, it is preferable to set the optimum value in relation to the withstand voltage and power consumption of the signal transmission system.
[0156] 第 4の実験例は、電子放出素子 10Aの電子の放出量力 図 24又は図 25に示すコ レクタ電圧 Vcのレベルによってどのように変化するかをみたものである。電子の放出 量の変化は第 1の実験例と同様に、蛍光体 134の発光を受光素子 (フォトダイオード )にて検出して測定した。実験結果を図 30に示す。  [0156] The fourth experimental example looks at how the electron emission amount force of the electron-emitting device 10A changes depending on the level of the collector voltage Vc shown in Fig. 24 or Fig. 25. The change in the amount of emitted electrons was measured by detecting the light emission of the phosphor 134 with a light receiving element (photodiode) as in the first experimental example. The experimental results are shown in FIG.
[0157] 図 30において、実線 Eは、コレクタ電圧 Vcのレベルを 3kVとし、点灯パルス Phの振 幅を 80Vから 500Vに変化させた場合の特性を示し、実線 Fは、コレクタ電圧 Vcのレ ベルを 7kVとし、点灯パルス Phの振幅を 80Vから 500Vに変化させた場合の特性を 示す。  [0157] In Fig. 30, the solid line E shows the characteristics when the level of the collector voltage Vc is 3kV and the amplitude of the lighting pulse Ph is changed from 80V to 500V. The solid line F is the level of the collector voltage Vc. The characteristics when the amplitude of the lighting pulse Ph is changed from 80V to 500V are shown.
[0158] この図 30に示すように、コレクタ電圧 Vcを 7kVとした方力 3kVの場合よりも、点灯 パルス Phに対する発光輝度変化のダイナミックレンジが広くなつており、画像表示に おける輝度向上、コントラストの向上を図る上で有利であることがわかる。この傾向は 、コレクタ電圧 Vcのレベルを上げるほど有利になると思われる力 この場合も、信号 伝送系の耐圧や消費電力との関係で、最適な値に設定することが好ましい。  [0158] As shown in Fig. 30, the dynamic range of the emission luminance change with respect to the lighting pulse Ph is wider than when the collector voltage Vc is 7 kV and the force is 3 kV. It can be seen that it is advantageous in improving the above. This tendency is a force that seems to be more advantageous as the level of the collector voltage Vc is increased. In this case as well, it is preferable to set the optimum value in relation to the withstand voltage and power consumption of the signal transmission system.
[0159] ここで、上述したディスプレイ 100の 1つの駆動方法について図 31及び図 32を参 照しながら説明する。図 31は、代表的に 1行 1列、 2行 1列及び n行 1列の画素の動作 を示す。なお、ここで使用する電子放出素子 10Aは、図 16のポイント p2における抗 電圧 vlが例えば 20V、ポイント p5における抗電圧 v2が + 70V、ポイント p3におけ る電圧 v3が— 50V、ポイント p4における電圧 v4が + 50Vの特性を有する。  Here, one driving method of the display 100 described above will be described with reference to FIG. 31 and FIG. FIG. 31 typically shows the operation of pixels in 1 row, 1 column, 2 rows, 1 column, and n rows, 1 column. The electron-emitting device 10A used here has a coercive voltage vl at point p2 in FIG. 16 of, for example, 20V, a coercive voltage v2 at point p5 of + 70V, a voltage v3 at point p3 of −50V, and a voltage at point p4. v4 has the characteristics of + 50V.
[0160] また、図 31に示すように、 1枚の画像の表示期間を 1フレームとしたとき、該 1フレー ム内に 1つの電荷蓄積期間 Tdと 1つの発光期間 Thが含まれており、 1つの電荷蓄積 期間 Tdには、 n個の選択期間 Tsが含まれる。各選択期間 Tsはそれぞれ対応する行 の選択期間 Tsとなるため、対応しな!、n-l個の行にっ ヽては非選択期間 Tnとなる。 [0161] そして、この駆動方法は、電荷蓄積期間 Tdに、全ての電子放出素子 10Aを走査し て、 ON対象 (発光対象)の画素に対応した複数の電子放出素子 10Aにそれぞれ対 応する画素の輝度レベルに応じた電圧を印加することにより、 ON対象の画素に対応 した複数の電子放出素子 10Aにそれぞれ対応する画素の輝度レベルに応じた量の 電荷 (電子)を蓄積させ、次の発光期間 Thに、全ての電子放出素子 10Aに一定の電 圧を印加して、 ON対象の画素に対応した複数の電子放出素子 10Aからそれぞれ 対応する画素の輝度レベルに応じた量の電子を放出させて、 ON対象の画素を発光 させるというものである。 Further, as shown in FIG. 31, when the display period of one image is one frame, one charge accumulation period Td and one light emission period Th are included in the one frame, One charge accumulation period Td includes n selection periods Ts. Since each selection period Ts becomes the selection period Ts of the corresponding row, it does not correspond !, and the nl number of rows becomes the non-selection period Tn. [0161] Then, in this driving method, during the charge accumulation period Td, all the electron-emitting devices 10A are scanned, and pixels corresponding to a plurality of electron-emitting devices 10A corresponding to ON-target (light-emitting target) pixels, respectively. By applying a voltage according to the brightness level of the pixel, charges (electrons) of an amount corresponding to the brightness level of the pixel corresponding to each of the plurality of electron-emitting devices 10A corresponding to the ON target pixel are accumulated, and the next light emission In period Th, a constant voltage is applied to all the electron-emitting devices 10A, and an amount of electrons corresponding to the luminance level of the corresponding pixel is emitted from the plurality of electron-emitting devices 10A corresponding to the ON target pixels. Thus, the ON target pixel emits light.
[0162] 具体的に説明すると、図 32にも示すように、先ず、 1行目の選択期間 Tsにおいては 、 1行目の行選択線 106に例えば 50Vの選択信号 Ssが供給され、その他の行の行 選択線 106に例えば 0Vの非選択信号 Snが供給される。 1列目の画素のうち、 ON ( 発光)とすべき画素の信号線 108に供給される画素信号 Sdの電圧は、 0V以上、 30 V以下の範囲であって、かつ、それぞれ対応する画素の輝度レベルに応じた電圧と なる。輝度レベル最大であれば 0Vとなる。この画素信号 Sdの輝度レベルに応じた変 調は、図 19に示す振幅変調回路 122や図 21に示すパルス幅変調回路 126を通じ て行われる。  More specifically, as shown in FIG. 32, first, in the selection period Ts of the first row, for example, a selection signal Ss of 50 V is supplied to the row selection line 106 of the first row, and the other For example, a non-selection signal Sn of 0 V is supplied to the row selection line 106 of the row. Among the pixels in the first column, the voltage of the pixel signal Sd supplied to the signal line 108 of the pixel to be turned ON (light emission) is in the range of 0 V or more and 30 V or less, and each of the corresponding pixels The voltage depends on the brightness level. If the luminance level is maximum, it will be 0V. The modulation according to the luminance level of the pixel signal Sd is performed through the amplitude modulation circuit 122 shown in FIG. 19 and the pulse width modulation circuit 126 shown in FIG.
[0163] これにより、 1行目の ONとすべき各画素にそれぞれ対応する電子放出素子 10Aの 上部電極 14と下部電極 16間にはそれぞれ輝度レベルに応じて— 50V以上、— 20V 以下の電圧が印加される。その結果、上述した各電子放出素子 10Aには、印加され た電圧に応じた電子が蓄積されることになる。例えば 1行 1列目の画素に対応する電 子放出素子は、例えば最大輝度レベルであることから、図 16の特性のポイント p3の 状態となり、ェミッタ部 12のうち、上部電極 14の貫通部 20から露出する部分に最大 量の電子が蓄積されることになる。  [0163] Accordingly, between the upper electrode 14 and the lower electrode 16 of the electron-emitting device 10A corresponding to each pixel to be turned ON in the first row, a voltage of -50 V or more and -20 V or less is applied depending on the luminance level. Is applied. As a result, electrons corresponding to the applied voltage are accumulated in each of the electron-emitting devices 10A described above. For example, since the electron-emitting device corresponding to the pixel in the first row and the first column has, for example, the maximum luminance level, the state becomes a point p3 in the characteristic of FIG. The maximum amount of electrons is accumulated in the exposed area.
[0164] なお、 OFF (消光)を示す画素に対応する電子放出素子 10Aに供給される画素信 号 Sdの電圧は、例えば 50Vであり、これにより、 OFF対象の画素に対応する電子放 出素子 10Aには 0Vが印加され、これは、図 16の特性のポイント piの状態となり、電 子の蓄積は行われない。  [0164] The voltage of the pixel signal Sd supplied to the electron-emitting device 10A corresponding to the pixel indicating OFF (quenching) is, for example, 50 V. Thus, the electron-emitting device corresponding to the OFF target pixel 0V is applied to 10A, which is the state of point pi in the characteristics of Fig. 16, and no electrons are stored.
[0165] 1行目への画素信号 Sdの供給が終了した後、 2行目の選択期間 Tsにおいては、 2 行目の行選択線 106に 50Vの選択信号 Ssが供給され、その他の行の行選択線 106 に 0Vの非選択信号 Snが供給される。この場合も、 ON (発光)とすべき画素に対応 する電子放出素子 10Aの上部電極 14と下部電極 16間にはそれぞれ輝度レベルに 応じて 50V以上、 20V以下の電圧が印加される。このとき、非選択状態にある例 えば 1行目の画素に対応する電子放出素子 10Aの上部電極 14と下部電極 16間に は 0V以上、 50V以下の電圧が印加される力 この電圧は、図 16の特性のポイント 4 に達しないレベルの電圧であることから、 1行目のうち、 ON (発光)とすべき画素に対 応する電子放出素子 10Aから電子が放出されるということはない。つまり、非選択状 態の 1行目の画素が、選択状態の 2行目の画素に供給される画素信号 Sdの影響を 受けるということがない。 [0165] After the supply of the pixel signal Sd to the first row is completed, in the selection period Ts of the second row, 2 A 50V selection signal Ss is supplied to the row selection line 106 of the row, and a 0V non-selection signal Sn is supplied to the row selection lines 106 of the other rows. Also in this case, a voltage of 50V or more and 20V or less is applied between the upper electrode 14 and the lower electrode 16 of the electron-emitting device 10A corresponding to the pixel to be turned on (light emission) according to the luminance level. At this time, for example, in a non-selected state, a voltage of 0 V or more and 50 V or less is applied between the upper electrode 14 and the lower electrode 16 of the electron-emitting device 10A corresponding to the pixel in the first row. Since the voltage does not reach point 4 of the 16 characteristics, electrons are not emitted from the electron-emitting device 10A corresponding to the pixel to be turned ON (light emission) in the first row. That is, the pixel in the first row in the non-selected state is not affected by the pixel signal Sd supplied to the pixel in the second row in the selected state.
[0166] 以下同様に、 n行目の選択期間 Tsにおいては、 n行目の行選択線 106に 50Vの選 択信号 Ssが供給され、その他の行の行選択線 106に 0Vの非選択信号 Snが供給さ れる。この場合も、 ON (発光)とすべき画素に対応する電子放出素子 10Aの上部電 極 14と下部電極 16間にはそれぞれ輝度レベルに応じて— 50V以上、— 20V以下の 電圧が印加される。このとき、非選択状態にある 1行一 (n— 1)行の各画素に対応する 電子放出素子 10Aの上部電極 14と下部電極 16間には 0V以上、 50V以下の電圧 が印加されるが、これら非選択状態の各画素のうち、 ON (発光)とすべき画素に対応 する電子放出素子 10Aから電子が放出されると 、うことはな 、。  [0166] Similarly, in the selection period Ts of the nth row, the 50V selection signal Ss is supplied to the row selection line 106 of the nth row, and the 0V non-selection signal is supplied to the row selection line 106 of the other row. Sn is supplied. Also in this case, a voltage of −50 V or more and −20 V or less is applied between the upper electrode 14 and the lower electrode 16 of the electron-emitting device 10A corresponding to the pixel to be turned ON (light emission) according to the luminance level. . At this time, a voltage of 0 V or more and 50 V or less is applied between the upper electrode 14 and the lower electrode 16 of the electron-emitting device 10A corresponding to each pixel in one row and one (n−1) row in the non-selected state. Of these non-selected pixels, when electrons are emitted from the electron-emitting device 10A corresponding to the pixel to be turned ON (light emission), nothing happens.
[0167] n行目の選択期間 Tsが経過した段階で、発光期間 Thに入る。この発光期間 Thで は、全電子放出素子 10Aの上部電極 14には、信号供給回路 112を通じて基準電圧 (例えば 0V)が印加され、全電子放出素子 10Aの下部電極 16には、 350Vの電圧 (パルス電源 118の- 400V+行選択回路 110の電源電圧 50V)が印加される。これ により、全電子放出素子 10Aの上部電極 14と下部電極 16間に高電圧( + 350V)が 印加される。全電子放出素子 10Aは、それぞれ図 16の特性のポイント p6の状態とな り、図 18Cに示すように、ェミッタ部 12のうち、前記電子の蓄積されていた部分から、 貫通部 20を通じて電子が放出される。もちろん、上部電極 14の外周部近傍からも電 子が放出される。  [0167] The light emission period Th starts when the selection period Ts of the n-th row has elapsed. In this light emission period Th, a reference voltage (for example, 0 V) is applied to the upper electrode 14 of the all-electron emitting device 10A through the signal supply circuit 112, and a voltage (350 V) is applied to the lower electrode 16 of the all-electron emitting device 10A. Pulse power supply 118 -400V + row selection circuit 110 power supply voltage 50V) is applied. As a result, a high voltage (+350 V) is applied between the upper electrode 14 and the lower electrode 16 of the all-electron emitting device 10A. All the electron-emitting devices 10A are in the state of the characteristic point p6 in FIG. 16, and as shown in FIG. 18C, electrons are transmitted from the portion where the electrons are accumulated in the emitter section 12 through the penetrating section 20. Released. Of course, electrons are also emitted from the vicinity of the outer periphery of the upper electrode 14.
[0168] つまり、 ON (発光)とすべき画素に対応する電子放出素子 10Aから電子が放出さ れ、放出された電子は、これら電子放出素子 10Aに対応するコレクタ電極 132に導 かれて、対応する蛍光体 134を励起し、発光する。これによつて、透明板 130の表面 力 画像が表示されることになる。 That is, electrons are emitted from the electron-emitting device 10A corresponding to the pixel to be turned ON (light emission). The emitted electrons are guided to the collector electrode 132 corresponding to these electron-emitting devices 10A to excite the corresponding phosphor 134 and emit light. Thereby, the surface force image of the transparent plate 130 is displayed.
[0169] 以後同様に、フレーム単位に、電荷蓄積期間 Tdにおいて、 ON (発光)とすべき画 素に対応する電子放出素子 10Aに電子を蓄積し、発光期間 Thにおいて、蓄積され ていた電子を放出して蛍光発光させることで、透明板 130の表面力も動画像あるい は静止画像が表示されることになる。  [0169] Similarly, in the frame unit, electrons are accumulated in the electron-emitting device 10A corresponding to the pixel to be turned ON (light emission) in the charge accumulation period Td, and the electrons accumulated in the light emission period Th are By emitting and emitting fluorescent light, the surface force of the transparent plate 130 is also displayed as a moving image or a still image.
[0170] このように、第 1の実施の形態に係る電子放出素子においては、複数の画素に応じ て配列された複数の電子放出素子 10Aを有し、各電子放出素子 10Aからの電子放 出によって画像表示を行うディスプレイ 100に適用させることが容易になる。  Thus, the electron-emitting device according to the first embodiment has a plurality of electron-emitting devices 10A arranged according to a plurality of pixels, and the electron-emitting devices from each electron-emitting device 10A This makes it easy to apply to the display 100 that displays images.
[0171] 例えば、上述したように、 1フレーム内の電荷蓄積期間 Tdに、全ての電子放出素子 を走査して、 ON対象の画素に対応した複数の電子放出素子 10Aにそれぞれ対応 する画素の輝度レベルに応じた電圧を印加することにより、 ON対象の画素に対応し た複数の電子放出素子 10Aにそれぞれ対応する画素の輝度レベルに応じた量の電 荷を蓄積させ、次の発光期間 Thに、全ての電子放出素子 10Aに一定の電圧を印加 して、 ON対象の画素に対応した複数の電子放出素子 10Aからそれぞれ対応する画 素の輝度レベルに応じた量の電子を放出させて、 ON対象の画素を発光させることが 可能となる。  [0171] For example, as described above, all the electron-emitting devices are scanned during the charge accumulation period Td in one frame, and the luminance of each of the pixels corresponding to the plurality of electron-emitting devices 10A corresponding to the ON target pixels is determined. By applying a voltage according to the level, an amount of charge corresponding to the luminance level of the pixel corresponding to each of the plurality of electron-emitting devices 10A corresponding to the ON target pixel is accumulated, and in the next light emission period Th. By applying a constant voltage to all the electron-emitting devices 10A, a plurality of electron-emitting devices 10A corresponding to the pixels to be turned on emit electrons corresponding to the luminance level of the corresponding pixels, and turn on. The target pixel can be made to emit light.
[0172] また、この第 1の実施の形態においては、例えば電子が蓄積飽和状態となる電圧 V 3と、電子の放出が開始される電圧 V4との関係力 1≤ I V4 I / I V3 I ≤1. 5で ある。  [0172] In the first embodiment, for example, the relationship between the voltage V3 at which electrons are accumulated and saturated and the voltage V4 at which the emission of electrons starts is 1≤ I V4 I / I V3 I ≤1.5.
[0173] 通常、例えば、電子放出素子 10Aをマトリックス状に配列して、水平走査期間に同 期させて 1行単位に電子放出素子 10Aを選択し、選択状態にある電子放出素子 10 Aに対してそれぞれ画素の輝度レベルに応じた画素信号 Sdを供給するとき、非選択 状態の画素にも、画素信号 Sdが供給されることになる。  [0173] Usually, for example, the electron-emitting devices 10A are arranged in a matrix, synchronized in the horizontal scanning period, and the electron-emitting devices 10A are selected in units of one row, and the selected electron-emitting devices 10A are selected. Thus, when the pixel signal Sd corresponding to the luminance level of each pixel is supplied, the pixel signal Sd is also supplied to the non-selected pixel.
[0174] 非選択状態の電子放出素子 10Aが画素信号 Sdの影響を受けて例えば電子放出 してしまうと、表示画像の画質の劣化やコントラストの低下を招くという問題がある。  [0174] When the electron-emitting device 10A in the non-selected state emits, for example, electrons due to the influence of the pixel signal Sd, there is a problem that the image quality of the display image is deteriorated and the contrast is lowered.
[0175] しかし、この第 1の実施の形態では、上述した特性を有するため、選択状態の電子 放出素子 10Aに供給される画素信号 Sdの電圧レベルを、基準電圧から電圧 V3まで の任意の電圧とし、非選択状態の電子放出素子 10Aに対して、例えば画素信号 Sd の逆極性の信号が供給されるように設定するという簡単な電圧関係にしても、非選択 状態の画素が、選択状態の画素への画素信号 Sdによって影響を受けることなぐ各 画素でのメモリ効果を実現でき、高輝度、高コントラストイ匕を図ることができる。 However, since the first embodiment has the above-described characteristics, the selected state electrons The voltage level of the pixel signal Sd supplied to the emitting element 10A is set to an arbitrary voltage from the reference voltage to the voltage V3, and a signal having a polarity opposite to that of the pixel signal Sd is supplied to the non-selected electron emitting element 10A, for example. Even in a simple voltage relationship, the memory effect at each pixel can be realized without the pixel in the non-selected state being affected by the pixel signal Sd to the pixel in the selected state. High contrast can be achieved.
[0176] 一方、このディスプレイ 100においては、電荷蓄積期間 Tdに、全ての電子放出素 子 10Aに必要な電荷を蓄積し、その後の発光期間 Thに、全ての電子放出素子 10A に対して電子放出に必要な電圧を印加して、 ON対象の画素に対応した複数の電子 放出素子 10Aから電子を放出させて、 ON対象の画素を発光させるようにして ヽる。  [0176] On the other hand, in this display 100, necessary charges are accumulated in all the electron-emitting devices 10A during the charge accumulation period Td, and electrons are emitted from all the electron-emitting devices 10A during the subsequent light-emitting period Th. A voltage necessary for the ON is applied, and electrons are emitted from the plurality of electron-emitting devices 10A corresponding to the ON target pixels so that the ON target pixels emit light.
[0177] 通常、電子放出素子 10Aで画素を構成した場合、画素を発光させるには、電子放 出素子 10Aに高電圧を印加する必要がある。そのことから、画素への走査時に電荷 を蓄積してさらに発光を行わせる場合、 1つの画像を表示させる期間(例えば 1フレー ム)にわたつて高電圧を印加する必要があり、消費電力が大きくなるという問題がある 。また、各電子放出素子 10Aを選択し、画素信号 Sdを供給する回路も高電圧に対 応した回路にする必要がある。  [0177] Normally, when a pixel is constituted by the electron-emitting device 10A, it is necessary to apply a high voltage to the electron-emitting device 10A in order to cause the pixel to emit light. For this reason, when charges are accumulated during scanning of pixels and further light emission is performed, it is necessary to apply a high voltage over a period during which one image is displayed (for example, one frame), resulting in high power consumption. There is a problem of becoming. Also, the circuit that selects each electron-emitting device 10A and supplies the pixel signal Sd needs to be a circuit that supports high voltage.
[0178] しかし、この例では、全ての電子放出素子 1 OAに電荷を蓄積した後に、全ての電子 放出素子 10Aに電圧を印加して、 ON対象の電子放出素子 10Aに対応する画素を 発光させると 、うものである。  However, in this example, after charges are accumulated in all the electron-emitting devices 1 OA, a voltage is applied to all the electron-emitting devices 10A so that the pixels corresponding to the ON-target electron-emitting devices 10A emit light. It is a thing.
[0179] 従って、全ての電子放出素子 10Aに電子放出のための電圧 (放出電圧)を印加す る期間 Thは、当然に、 1フレームよりも短くなり、しかも、図 26A及び図 26Bに示す第 1の実験例力ももわ力るように、放出電圧の印加期間を短くすることができることから、 画素への走査時に電荷の蓄積と発光とを行わせる場合と比して消費電力を大幅に 低減させることができる。  [0179] Accordingly, the period Th in which the voltage for emitting electrons (emission voltage) is applied to all the electron-emitting devices 10A is naturally shorter than one frame, and the first period shown in FIGS. 26A and 26B is used. The power consumption can be greatly reduced compared to the case where charge accumulation and light emission are performed during scanning to the pixel because the period of applying the emission voltage can be shortened so that the power of the experimental example 1 can also be achieved. Can be made.
[0180] また、電子放出素子 10Aに電荷を蓄積する期間 Tdと、 ON対象の画素に対応する 電子放出素子 10Aから電子放出させる期間 Thとを分離したため、各電子放出素子 10Aにそれぞれ輝度レベルに応じた電圧を印加するための回路の低電圧駆動を図 ることがでさる。 [0180] Further, since the period Td for accumulating charges in the electron-emitting device 10A and the period Th for emitting electrons from the electron-emitting device 10A corresponding to the ON target pixel are separated, each electron-emitting device 10A has a brightness level. The circuit for applying the corresponding voltage can be driven at a low voltage.
[0181] また、画像に応じた画素信号及び電荷蓄積期間 Tdの選択信号 SsZ非選択信号 S nは、行又は列毎に駆動する必要がある力 上述した実施の形態にみられるように、 駆動電圧は数 10ボルトでよいため、蛍光表示管等で使用される安価な多出力ドライ バを使用することができる。一方、発光期間 Thにおいては、電子を十分に放出させ る電圧は、前記駆動電圧よりも大きくなる可能性があるが、全て ON対象の画素を一 括して駆動すればよいため、多出力の回路部品を必要としない。例えば高耐圧のデ イスクリート部品で構成した 1出力だけの駆動回路があればよいため、コスト的に安価 で済む上に、回路規模も小さく済むという利点がある。 [0181] Further, the pixel signal corresponding to the image and the charge accumulation period Td selection signal SsZ non-selection signal S n is the force that needs to be driven for each row or column. As can be seen from the above-described embodiments, the drive voltage may be several tens of volts. Therefore, an inexpensive multi-output driver used in a fluorescent display tube or the like is used. Can be used. On the other hand, in the light emission period Th, the voltage that sufficiently discharges electrons may be higher than the drive voltage, but since all the pixels to be turned on need to be driven together, No circuit parts are required. For example, it is sufficient to have a drive circuit with only one output composed of high withstand voltage discreet components, which is advantageous in that the cost is low and the circuit scale is small.
[0182] 次に、第 2の実施の形態に係る電子放出素子 10Bについて図 33を参照しながら説 明する。 [0182] Next, an electron-emitting device 10B according to a second embodiment will be described with reference to FIG.
[0183] この第 2の実施の形態に係る電子放出素子 10Bは、図 33に示すように、上述した 第 1の実施の形態に係る電子放出素子 10Aとほぼ同様の構成を有するが、上部電 極 14の構成材料が下部電極 16と同じである点と、上部電極 14の厚み tが 10 μ mより も厚い点と、貫通部 20をエッチング(ウエットエッチング、ドライエッチング)やリフトォ フ、レーザ等を使用して人為的に形成している点で特徴を有する。貫通部 20の形状 は、上述した第 1の実施の形態と同様に、孔 32の形状、切欠き 44の形状、スリット 48 の形状を採用することができる。  As shown in FIG. 33, the electron-emitting device 10B according to the second embodiment has substantially the same configuration as the electron-emitting device 10A according to the first embodiment described above. The constituent material of the electrode 14 is the same as that of the lower electrode 16, the thickness t of the upper electrode 14 is thicker than 10 μm, and the penetrating part 20 is etched (wet etching, dry etching), liftoff, laser, etc. It is characterized in that it is artificially formed using. As the shape of the penetrating portion 20, the shape of the hole 32, the shape of the notch 44, and the shape of the slit 48 can be adopted as in the first embodiment described above.
[0184] さらに、上部電極 14における貫通部 20の周部 26の下面 26aは、貫通部 20の中心 に向力うに従って徐々に上方に傾斜している。この形状は、例えばリフトオフを使用 することで簡単に形成することができる。  [0184] Furthermore, the lower surface 26a of the peripheral portion 26 of the penetrating portion 20 in the upper electrode 14 is gradually inclined upward as it is directed toward the center of the penetrating portion 20. This shape can be easily formed by using, for example, lift-off.
[0185] この第 2の実施の形態に係る電子放出素子 10Bにおいても、上述した第 1の実施 の形態に係る電子放出素子 10Aと同様に、高い電界集中を容易に発生させることが でき、しかも、電子放出箇所を多くすることができ、電子放出について高出力、高効 率を図ることができ、低電圧駆動 (低消費電力)も可能となる。  [0185] Also in the electron-emitting device 10B according to the second embodiment, similarly to the electron-emitting device 10A according to the first embodiment described above, high electric field concentration can be easily generated, and In addition, it is possible to increase the number of electron emission locations, to achieve high output and high efficiency for electron emission, and to enable low voltage driving (low power consumption).
[0186] また、図 34に示す第 1の変形例に係る電子放出素子 lOBaのように、ェミッタ部 12 の上面のうち、貫通部 20と対応する部分にフローティング電極 50を存在させてもょ ヽ  Further, like the electron-emitting device lOBa according to the first modification shown in FIG. 34, the floating electrode 50 may be present in a portion corresponding to the penetrating portion 20 in the upper surface of the emitter portion 12.
[0187] また、図 35に示す第 2の変形例に係る電子放出素子 lOBbのように、上部電極 14 として、断面形状がほぼ T字状とされた電極を形成するようにしてもよい。 [0188] また、図 36に示す第 3の変形例に係る電子放出素子 lOBcのように、上部電極 14 の形状、特に、上部電極 14の貫通部 20の周部 26が浮き上がった形状としてもよい。 これは、上部電極 14となる膜材料の中に、焼成工程中においてガス化する材料を含 ませておけばよい。これにより、焼成工程において、前記材料がガス化し、その跡とし て、上部電極 14に多数の貫通部 20が形成されると共に、貫通部 20の周部 26が浮き 上がった形状になる。 [0187] Further, like the electron-emitting device lOBb according to the second modification shown in FIG. 35, an electrode having a substantially T-shaped cross section may be formed as the upper electrode 14. Further, like the electron-emitting device lOBc according to the third modification shown in FIG. 36, the shape of the upper electrode 14, particularly, the shape in which the peripheral portion 26 of the penetrating portion 20 of the upper electrode 14 is raised may be used. . In this case, the film material to be the upper electrode 14 may include a material that is gasified during the firing process. Thereby, in the firing step, the material is gasified, and as a result, a large number of through portions 20 are formed in the upper electrode 14 and the peripheral portion 26 of the through portion 20 is lifted.
[0189] 次に、第 3の実施の形態に係る電子放出素子 10Cについて図 37を参照しながら説 明する。  [0189] Next, an electron-emitting device 10C according to a third embodiment will be described with reference to FIG.
[0190] この第 3の実施の形態に係る電子放出素子 10Cは、図 37に示すように、上述した 第 1の実施の形態に係る電子放出素子 10Aとほぼ同様の構成を有する力 例えば セラミックスで構成された 1つの基板 60を有する点と、下部電極 16が基板 60上に形 成され、ェミッタ部 12が基板 60上であって、かつ、下部電極 16を覆うように形成され 、さらに上部電極 14がェミッタ部 12上に形成されている点で異なる。  As shown in FIG. 37, the electron-emitting device 10C according to the third embodiment is made of a force having substantially the same configuration as the electron-emitting device 10A according to the first embodiment described above, for example, ceramics. The lower electrode 16 is formed on the substrate 60, the emitter 12 is formed on the substrate 60 and covers the lower electrode 16, and the upper electrode is formed. 14 is different in that 14 is formed on the emitter 12.
[0191] 基板 60の内部には、各ェミッタ部 12が形成される部分に対応した位置に、後述す る薄肉部を形成するための空所 62が設けられている。空所 62は、基板 60の他端面 に設けられた径の小さ 、貫通孔 64を通じて外部と連通されて 、る。  [0191] Inside the substrate 60, a space 62 for forming a thin portion described later is provided at a position corresponding to a portion where each of the emitter portions 12 is formed. The void 62 has a small diameter provided on the other end surface of the substrate 60 and communicates with the outside through the through hole 64.
[0192] 前記基板 60のうち、空所 62の形成されている部分が薄肉とされ (以下、薄肉部 66 と記す)、それ以外の部分が厚肉とされて前記薄肉部 66を支持する固定部 68として 機能するようになっている。  [0192] In the substrate 60, the portion where the void 62 is formed is thin (hereinafter referred to as the thin portion 66), and the other portions are thick and are fixed to support the thin portion 66. It is designed to function as part 68.
[0193] つまり、基板 60は、最下層である基板層 60Aと中間層であるスぺーサ層 60Bと最 上層である薄板層 60Cの積層体であって、スぺーサ層 60Bのうち、ェミッタ部 12に対 応する箇所に空所 62が形成された一体構造体として把握することができる。基板層 60Aは、補強用基板として機能するほか、配線用の基板としても機能するようになつ ている。なお、前記基板 60は、基板層 60A、スぺーサ層 60B及び薄板層 60Cの一 体焼成で形成してもよ ヽし、これら層 60A— 60Cを接着して形成するようにしてもょ ヽ  That is, the substrate 60 is a laminate of the substrate layer 60A as the lowermost layer, the spacer layer 60B as the intermediate layer, and the thin plate layer 60C as the uppermost layer, and among the spacer layers 60B, the emitter 60 It can be grasped as an integral structure in which a void 62 is formed at a location corresponding to the portion 12. The substrate layer 60A functions not only as a reinforcing substrate but also as a wiring substrate. The substrate 60 may be formed by single firing of the substrate layer 60A, the spacer layer 60B, and the thin plate layer 60C, or may be formed by bonding these layers 60A-60C.
[0194] 薄肉部 66は、高耐熱性材料であることが好ましい。その理由は、ェミッタ部 12を有 機接着剤等の耐熱性に劣る材料を用いずに、固定部 68によって直接薄肉部 66を支 持させる構造とする場合、少なくともェミッタ部 12の形成時に、薄肉部 66が変質しな いようにするため、薄肉部 66は、高耐熱性材料であることが好ましい。 [0194] The thin-walled portion 66 is preferably a high heat resistant material. The reason is that the thin-walled portion 66 is directly supported by the fixing portion 68 without using the material having poor heat resistance such as an organic adhesive for the emitter portion 12. In the case of a structure to be held, it is preferable that the thin portion 66 is a high heat resistant material so that the thin portion 66 does not change quality at least when the emitter portion 12 is formed.
[0195] また、薄肉部 66は、基板 60上に形成される上部電極 14に通じる配線と下部電極 1[0195] In addition, the thin-walled portion 66 includes a wiring that leads to the upper electrode 14 formed on the substrate 60, and the lower electrode 1
6に通じる配線との電気的な分離を行うために、電気絶縁材料であることが好ま 、。 In order to achieve electrical separation from the wiring leading to 6, is preferably an electrical insulating material.
[0196] 従って、薄肉部 66の材料としては、高耐熱性の金属あるいはその金属表面をガラ ス等のセラミック材料で被覆したホーロウ等の材料であってもよ 、が、セラミックスが最 適である。 [0196] Therefore, the material of the thin-walled portion 66 may be a highly heat-resistant metal or a material such as a hollow whose surface is covered with a ceramic material such as glass, but ceramics is most suitable. .
[0197] 薄肉部 66を構成するセラミックスとしては、例えば、安定ィ匕された酸ィ匕ジルコニウム 、酸ィ匕アルミニウム、酸化マグネシウム、酸化チタン、スピネル、ムライト、窒化アルミ- ゥム、窒化珪素、ガラス、これらの混合物等を使用することができる。その中でも、酸 化アルミニウム及び安定ィ匕された酸ィ匕ジルコニウム力 強度及び剛性の観点から好 ましい。安定化された酸ィ匕ジルコニウムは、機械的強度が比較的高いこと、靭性が比 較的高いこと、上部電極 14及び下部電極 16との化学反応が比較的小さいこと等の 観点から特に好適である。なお、安定ィ匕された酸ィ匕ジルコニウムとは、安定化酸化ジ ルコ-ゥム及び部分安定化酸化ジルコニウムを包含する。安定化された酸化ジルコ [0197] Ceramics constituting the thin-walled portion 66 include, for example, stabilized acid zirconium, acid aluminum, magnesium oxide, titanium oxide, spinel, mullite, aluminum nitride, silicon nitride, glass A mixture of these can be used. Of these, aluminum oxide and stabilized acid-zirconium force are preferred from the viewpoint of strength and rigidity. Stabilized zirconium oxide is particularly suitable from the viewpoints of relatively high mechanical strength, relatively high toughness, and relatively small chemical reaction with the upper electrode 14 and the lower electrode 16. is there. Note that stabilized zirconium oxide includes stabilized zirconium oxide and partially stabilized zirconium oxide. Stabilized zirco oxide
-ゥムでは、立方晶等の結晶構造をとるため、相転移が生じない。 -UM has a cubic crystal structure, so no phase transition occurs.
[0198] 一方、酸ィ匕ジルコニウムは、 1000°C前後で単斜晶と正方晶との間を相転移し、こ のような相転移の際にクラックが発生するおそれがある。安定化された酸化ジルコ二 ゥムは、酸化カルシウム、酸化マグネシウム、酸化イットリウム、酸化スカンジウム、酸 ィ匕イッテルビウム、酸化セリウム、希土類金属の酸ィ匕物等の安定剤を、 1一 30モル0 /0 含有する。なお、基板 60の機械的強度を向上させるために、安定化剤が酸化イツトリ ゥムを含有すると好適である。この場合、酸化イットリウムを、好適には 1. 5— 6モル0 /0 、さらに好適には 2— 4モル0 /0含有し、さらに 0. 1— 5モル0 /0の酸化アルミニウムを含 有することが好ましい。 [0198] On the other hand, zirconium oxide has a phase transition between monoclinic and tetragonal crystals at around 1000 ° C, and cracks may occur during such phase transition. Oxide stabilized zirconium two © beam is calcium oxide, magnesium oxide, yttrium oxide, scandium oxide, acid I spoon ytterbium, cerium oxide, a stabilizer such as rare earth metal Sani匕物, 1 one 30 mole 0 / Contains 0 . In order to improve the mechanical strength of the substrate 60, it is preferable that the stabilizer contains yttrium oxide. In this case, yttrium oxide, preferably 1. 5-6 mole 0/0, further preferably contains 2-4 mole 0/0, further comprising containing the aluminum oxide 0.5 1 5 mole 0/0 It is preferable.
[0199] また、結晶相を、立方晶 +単斜晶の混合相、正方晶 +単斜晶の混合相、立方晶 + 正方晶 +単斜晶の混合相等とすることができる力 その中でも、主たる結晶相を、正 方晶又は正方晶 +立方晶の混合相としたものが、強度、靭性及び耐久性の観点から 最適である。 [0200] 基板 60をセラミックス力も構成した場合、比較的多数の結晶粒が基板 60を構成す る力 基板 60の機械的強度を向上させるためには、結晶粒の平均粒径を、好適には 0. 05— 2 mとし、さらに好適には 0. 1— とするとよい。 [0199] Further, the force that can make the crystal phase a cubic + monoclinic mixed phase, a tetragonal + monoclinic mixed phase, a cubic + tetragonal + monoclinic mixed phase, etc. From the viewpoints of strength, toughness, and durability, the main crystal phase is a tetragonal or tetragonal + cubic mixed phase. [0200] When the substrate 60 also has a ceramic force, a relatively large number of crystal grains constitute the substrate 60. In order to improve the mechanical strength of the substrate 60, the average grain size of the crystal grains is preferably 0.05-2 m, more preferably 0.1-.
[0201] 一方、固定部 68は、セラミックス力もなることが好ましいが、薄肉部 66の材料と同一 のセラミックスでもよいし、異なっていてもよい。固定部 68を構成するセラミックスとし ては、薄肉部 66の材料と同様に、例えば、安定ィ匕された酸ィ匕ジルコニウム、酸ィ匕ァ ルミ-ゥム、酸化マグネシウム、酸化チタン、スピネル、ムライト、窒化アルミニウム、窒 化珪素、ガラス、これらの混合物等を用いることができる。  [0201] On the other hand, the fixing portion 68 preferably has a ceramic force, but may be the same ceramic as the material of the thin-walled portion 66 or may be different. As the ceramics constituting the fixed portion 68, for example, as in the material of the thin portion 66, for example, stabilized acid zirconium, acid medium, magnesium oxide, titanium oxide, spinel, mullite. Aluminum nitride, silicon nitride, glass, a mixture thereof, or the like can be used.
[0202] 特に、この電子放出素子 10Cで用いられる基板 60は、酸ィ匕ジルコニウムを主成分 とする材料、酸ィ匕アルミニウムを主成分とする材料、又はこれらの混合物を主成分と する材料等が好適に採用される。その中でも、酸ィ匕ジルコニウムを主成分としたもの 力 Sさらに好ましい。  [0202] In particular, the substrate 60 used in the electron-emitting device 10C is made of a material mainly composed of acid zirconium, a material mainly composed of acid aluminum, or a material mainly composed of a mixture thereof. Is preferably employed. Among them, a material mainly composed of zirconium oxide is preferred.
[0203] なお、焼結助剤として粘土等を加えることもあるが、酸化珪素、酸化ホウ素等のガラ ス化し易いものが過剰に含まれないように、助剤成分を調節する必要がある。なぜな ら、これらのガラス化し易い材料は、基板 60とェミッタ部 12とを接合させる上で有利 ではあるものの、基板 60とェミッタ部 12との反応を促進し、所定のェミッタ部 12の組 成を維持することが困難となり、その結果、素子特性を低下させる原因となるからであ る。  [0203] Although a clay or the like may be added as a sintering aid, it is necessary to adjust the aid component so as not to include excessively glassy substances such as silicon oxide and boron oxide. This is because these easily vitrified materials are advantageous in bonding the substrate 60 and the emitter 12, but promote the reaction between the substrate 60 and the emitter 12, and the predetermined emitter 12 is formed. This is because it is difficult to maintain the characteristics, and as a result, the device characteristics are deteriorated.
[0204] すなわち、基板 60中の酸ィ匕珪素等は重量比で 3%以下、さらに好ましくは 1%以下 となるように制限することが好ましい。ここで、主成分とは、重量比で 50%以上の割合 で存在する成分をいう。  [0204] That is, it is preferable to limit the amount of silicon oxide or the like in the substrate 60 to 3% or less, more preferably 1% or less by weight. Here, the main component means a component present in a ratio of 50% or more by weight.
[0205] また、前記薄肉部 66の厚みとェミッタ部 12の厚みは、同次元の厚みであることが好 ましい。なぜなら、薄肉部 66の厚みが極端にェミッタ部 12の厚みより厚くなると(1桁 以上異なると)、ェミッタ部 12の焼成収縮に対して、薄肉部 66がその収縮を妨げるよ うに働くため、ェミッタ部 12と基板 60との界面での応力が大きくなり、はがれ易くなる 。反対に、厚みの次元が同程度であれば、ェミッタ部 12の焼成収縮に基板 60 (薄肉 部 66)が追従し易くなるため、一体ィ匕には好適である。具体的には、薄肉部 66の厚 みは、 1一 100 mであることが好ましぐ 3— 50 m力 Sさらに好ましく、 5— 力 S より一層好ましい。一方、ェミッタ部 12は、その厚みとして 5— 100 mが好ましぐ 5 一 50 μ mがさらに好ましぐ 5— 30 μ mがより一層好ましい。 [0205] Further, the thickness of the thin portion 66 and the thickness of the emitter portion 12 are preferably the same dimension. This is because when the thickness of the thin portion 66 is extremely thicker than the thickness of the emitter portion 12 (by one digit or more), the thin portion 66 acts to prevent the shrinkage of the emitter portion 12 from firing shrinkage. The stress at the interface between the portion 12 and the substrate 60 becomes large, and it is easy to peel off. On the other hand, if the thickness dimension is approximately the same, the substrate 60 (thin wall portion 66) can easily follow the firing shrinkage of the emitter portion 12, which is preferable for an integrated substrate. Specifically, it is preferable that the thickness of the thin-walled portion 66 is 1 to 100 m 3 to 50 m force S, more preferably 5 to force S Even more preferred. On the other hand, the thickness of the emitter portion 12 is preferably 5-100 m, more preferably 5-30 μm, even more preferably 5-30 μm.
[0206] そして、基板 60上にェミッタ部 12を形成する方法としては、スクリーン印刷法、ディ ッビング法、塗布法、電気泳動法等の各種厚膜形成法や、イオンビーム法、スパッタ リング法、真空蒸着法、イオンプレーティング法、化学気相成長法 (CVD)、めっき等 の各種薄膜形成法を用いることができる。  [0206] And, as a method of forming the emitter portion 12 on the substrate 60, various thick film forming methods such as a screen printing method, a dubbing method, a coating method, an electrophoresis method, an ion beam method, a sputtering method, Various thin film formation methods such as vacuum deposition, ion plating, chemical vapor deposition (CVD), and plating can be used.
[0207] また、電子放出素子 10Cの焼成処理としては、基板 60上に下部電極 16となる材料 、ェミッタ部 12となる材料及び上部電極 14となる材料を順次積層してから一体構造と して焼成するようにしてもよいし、下部電極 16、ェミッタ部 12、上部電極 14をそれぞ れ形成するたびに熱処理 (焼成処理)して基板 60と一体構造にするようにしてもょ ヽ 。なお、上部電極 14及び下部電極 16の形成方法によっては、一体化のための熱処 理 (焼成処理)を必要としな!、場合もある。  [0207] In addition, as a firing process for the electron-emitting device 10C, a material that becomes the lower electrode 16, a material that becomes the emitter portion 12, and a material that becomes the upper electrode 14 are sequentially laminated on the substrate 60, and then an integrated structure is formed. The substrate may be fired, or the lower electrode 16, the emitter portion 12, and the upper electrode 14 may be heat-treated (fired) each time they are formed to be integrated with the substrate 60. Depending on the method of forming the upper electrode 14 and the lower electrode 16, a heat treatment (firing treatment) for integration is not required! ,In some cases.
[0208] 基板 60と、ェミッタ部 12、上部電極 14及び下部電極 16とを一体ィ匕させるための焼 成処理に係る温度としては、 500— 1400°Cの範囲、好適には、 1000— 1400°Cの 範囲とするとよい。さら〖こ、膜状のェミッタ部 12を熱処理する場合、高温時にェミッタ 部 12の糸且成が不安定にならな 、ように、ェミッタ部 12の蒸発源と共に雰囲気制御を 行!、ながら焼成処理を行うことが好ま 、。  [0208] The temperature related to the baking treatment for integrating the substrate 60, the emitter section 12, the upper electrode 14, and the lower electrode 16 is in the range of 500-1400 ° C, preferably 1000-1400. It should be in the range of ° C. Furthermore, when heat treatment is performed on the film-like emitter 12, the firing process is performed while controlling the atmosphere together with the evaporation source of the emitter 12 so that the yarn formation of the emitter 12 does not become unstable at high temperatures! Preferred to do.
[0209] また、ェミッタ部 12を適切な部材によって被覆し、ェミッタ部 12の表面が焼成雰囲 気に直接露出しないようにして焼成する方法を採用してもよい。この場合、被覆部材 としては、基板 60と同様の材料を用いることが好ましい。  [0209] Alternatively, a method may be employed in which the emitter portion 12 is covered with an appropriate member and fired so that the surface of the emitter portion 12 is not directly exposed to the firing atmosphere. In this case, it is preferable to use the same material as the substrate 60 as the covering member.
[0210] この第 3の実施の形態に係る電子放出素子 10Cにおいては、焼成時においてエミ ッタ部 12が収縮することになるが、この収縮時に発生する応力が空所 62の変形等を 通じて開放されることから、ェミッタ部 12を十分に緻密化させることができる。ェミッタ 部 12の緻密化が向上することにより、耐電圧が向上すると共に、ェミッタ部 12での分 極反転並びに分極変化が効率よく行われることになり、電子放出素子 10Cとしての 特性が向上することになる。  [0210] In the electron-emitting device 10C according to the third embodiment, the emitter 12 contracts during firing, and the stress generated during the contraction passes through deformation of the void 62 and the like. Thus, the emitter 12 can be sufficiently densified. By improving the densification of the emitter section 12, the withstand voltage is improved, and the polarization inversion and the polarization change in the emitter section 12 are efficiently performed, and the characteristics as the electron-emitting device 10C are improved. become.
[0211] 上述した第 3の実施の形態では、基板 60として 3層構造の基板を用いたが、その他 、図 38の変形例に係る電子放出素子 lOCaに示すように、最下層の基板層 60Aを省 略した 2層構造の基板 60aを用レ、てもよ 、。 [0211] In the third embodiment described above, a substrate having a three-layer structure is used as the substrate 60. However, as shown in the electron-emitting device lOCa according to the modification of FIG. 38, the lowermost substrate layer 60A is used. Saving You can use the abbreviated two-layer substrate 60a.
なお、本発明に係る電子放出素子は、上述の実施の形態に限らず、本発明の要旨 を逸脱することなぐ種々の構成を採り得ることはもちろんである。  It should be noted that the electron-emitting device according to the present invention is not limited to the above-described embodiment, but can of course have various configurations without departing from the gist of the present invention.

Claims

請求の範囲 The scope of the claims
[1] 誘電体で構成されたェミッタとなる物質(12)と、電子放出のための駆動電圧 (Va) が印加される第 1の電極(14)及び第 2の電極(16)とを有し、  [1] It has a substance (12) that becomes an emitter composed of a dielectric, and a first electrode (14) and a second electrode (16) to which a driving voltage (Va) for electron emission is applied. And
前記第 1の電極(14)は、前記ェミッタとなる物質(12)の第 1の面に形成され、 前記第 2の電極( 16)は、前記ェミッタとなる物質( 12)の第 2の面に形成され、 少なくとも前記第 1の電極(14)は、前記ェミッタとなる物質(12)が露出される複数 の貫通部(20)を有し、前記第 1の電極(14)のうち、前記貫通部(20)の周部(26)に おける前記ェミッタとなる物質(12)と対向する面(26a)が、前記ェミッタとなる物質(1 The first electrode (14) is formed on a first surface of the substance (12) serving as the emitter, and the second electrode (16) is a second surface of the substance (12) serving as the emitter. And at least the first electrode (14) has a plurality of through portions (20) from which the substance (12) serving as the emitter is exposed, and the first electrode (14) includes: The surface (26a) facing the substance (12) serving as the emitter in the peripheral part (26) of the penetrating part (20) is the substance (1
2)力 離間して 、ることを特徴とする電子放出素子。 2) An electron-emitting device characterized in that the force is separated.
[2] 請求項 1記載の電子放出素子において、 [2] The electron-emitting device according to claim 1,
前記ェミッタとなる物質(12)の少なくとも前記第 1の面は、誘電体の粒界による凹 凸(22)が形成され、  At least the first surface of the substance (12) serving as the emitter is formed with concaves and convexes (22) due to grain boundaries of the dielectric,
前記第 1の電極(14)は、前記誘電体の粒界における凹部(24)に対応した部分に 前記貫通部(20)が形成されて!、ることを特徴とする電子放出素子。  The electron-emitting device according to claim 1, wherein the first electrode (14) has the penetrating portion (20) formed in a portion corresponding to the concave portion (24) in the grain boundary of the dielectric.
[3] 請求項 1記載の電子放出素子において、 [3] The electron-emitting device according to claim 1,
前記ェミッタとなる物質(12)の前記第 1の面と、前記第 1の電極(14)のうち、前記 貫通部(20)の周部(26)における前記ェミッタとなる物質(12)と対向する面(26a)と のなす角の最大角度 0力 1° ≤ Θ≤60° であることを特徴とする電子放出素子。  The first surface of the substance (12) serving as the emitter and the substance (12) serving as the emitter in the peripheral part (26) of the through-hole (20) of the first electrode (14) Electron emitting device characterized in that the maximum angle formed by the surface (26a) is 0 force 1 ° ≤ Θ≤60 °.
[4] 請求項 1記載の電子放出素子において、 [4] The electron-emitting device according to claim 1,
前記ェミッタとなる物質(12)の前記第 1の面と、前記第 1の電極(14)のうち、前記 貫通部(20)の周部(26)における前記ェミッタとなる物質(12)と対向する面(26a)と の間の鉛直方向に沿った最大間隔 dが、 0 m< d≤ 10 mであることを特徴とする 電子放出素子。  The first surface of the substance (12) serving as the emitter and the substance (12) serving as the emitter in the peripheral part (26) of the through-hole (20) of the first electrode (14) The electron-emitting device characterized in that the maximum distance d along the vertical direction between the surface (26a) and the surface (26a) is 0 m <d≤10 m.
[5] 請求項 1記載の電子放出素子において、 [5] The electron-emitting device according to claim 1,
前記ェミッタとなる物質(12)の前記第 1の面のうち、前記貫通部(20)と対応する部 分にフローティング電極 (50)が存在して 、ることを特徴とする電子放出素子。  An electron-emitting device, wherein a floating electrode (50) is present in a portion corresponding to the penetrating portion (20) in the first surface of the substance (12) serving as the emitter.
[6] 請求項 1記載の電子放出素子において、 [6] The electron-emitting device according to claim 1,
前記貫通部(20)は、孔(32)であることを特徴とする電子放出素子。 The electron-emitting device, wherein the through portion (20) is a hole (32).
[7] 請求項 6記載の電子放出素子において、 [7] The electron-emitting device according to claim 6,
前記孔(32)の平均径が、 0. 1 m以上、 10 μ m以下であることを特徴とする電子 放出素子。  The electron-emitting device characterized in that an average diameter of the holes (32) is 0.1 m or more and 10 μm or less.
[8] 請求項 1記載の電子放出素子において、  [8] The electron-emitting device according to claim 1,
前記貫通部(20)は、切欠き (44)であることを特徴とする電子放出素子。  The electron-emitting device, wherein the penetrating part (20) is a notch (44).
[9] 請求項 8記載の電子放出素子において、 [9] The electron-emitting device according to claim 8,
前記貫通部(20)は、くし歯状の切欠き (44)であることを特徴とする電子放出素子  The penetrating part (20) is a comb-shaped notch (44),
[10] 請求項 8記載の電子放出素子において、 [10] The electron-emitting device according to claim 8,
前記切欠き (44)の平均幅が、 0. 1 m以上、 10 μ m以下であることを特徴とする 電子放出素子。  The electron emission element, wherein an average width of the notches (44) is 0.1 m or more and 10 μm or less.
[11] 請求項 1記載の電子放出素子において、 [11] The electron-emitting device according to claim 1,
前記貫通部(20)は、任意の形状のスリット (48)であることを特徴とする電子放出素 子。  The electron-emitting device, wherein the penetrating portion (20) is a slit (48) having an arbitrary shape.
[12] 請求項 11記載の電子放出素子において、  [12] The electron-emitting device according to claim 11,
前記スリット (48)の平均幅が、 0. 1 m以上、 10 μ m以下であることを特徴とする 電子放出素子。  The electron emission element, wherein an average width of the slit (48) is 0.1 m or more and 10 μm or less.
[13] 誘電体で構成されたェミッタとなる物質(12)と、 [13] Emitter material (12) composed of dielectric,
前記ェミッタとなる物質(12)の第 1の面に接するように形成された第 1の電極(14) と、  A first electrode (14) formed to be in contact with the first surface of the substance (12) serving as the emitter;
前記ェミッタとなる物質( 12)の第 2の面に接するように形成された第 2の電極 ( 16) とを有し、  A second electrode (16) formed so as to be in contact with the second surface of the substance (12) serving as the emitter,
少なくとも前記第 1の電極(14)は、前記ェミッタとなる物質(12)が露出される複数 の貫通部(20)を有し、  At least the first electrode (14) has a plurality of through portions (20) through which the substance (12) serving as the emitter is exposed,
電気的な動作において、前記第 1の電極(14)と前記第 2の電極(16)間に、 前記ェミッタとなる物質(12)によるコンデンサ (C1)と、  In electrical operation, between the first electrode (14) and the second electrode (16), a capacitor (C1) made of the substance (12) serving as the emitter,
前記第 1の電極(14)に形成された前記複数の貫通部(20)によって前記第 1の電 極(14)と前記ェミッタとなる物質(12)との間に構成される複数のコンデンサ(Ca)の 集合体 (C2)とが形成されることを特徴とする電子放出素子。 A plurality of capacitors (between the first electrode (14) and the substance (12) serving as the emitter by the plurality of through portions (20) formed in the first electrode (14). Ca) An electron-emitting device characterized in that an aggregate (C2) is formed.
[14] 電子放出部を有する電子放出素子において、 [14] In an electron-emitting device having an electron-emitting portion,
負電圧の印加によって電子の蓄積に伴う正電荷の量と負電荷の量が平衡な状態( 第 1の状態)に変化し、更なる電子の蓄積に伴って負電荷の量が正電荷の量よりも多 V、状態 (第 2の状態)に変化し、  By applying a negative voltage, the amount of positive charge accompanying the accumulation of electrons and the amount of negative charge change to an equilibrium state (first state), and the amount of negative charges increases with the accumulation of further electrons. More than V, change to state (second state),
前記第 2の状態力 正電圧の印加によって電子の放出に伴う正電荷の量と負電荷 の量が平衡な状態 (第 3の状態)に変化し、更なる電子の放出に伴って正電荷の量 が負電荷の量よりも多い状態に変化する場合に、  When the second state force positive voltage is applied, the amount of positive charge and the amount of negative charge associated with electron emission change to an equilibrium state (third state). When the amount changes to a state greater than the amount of negative charge,
前記第 1の状態に変化するための印加電圧を VI、前記第 3の状態に変化するため の印加電圧を V2としたとき、  When the applied voltage for changing to the first state is VI and the applied voltage for changing to the third state is V2,
I VI I < I V2 I  I VI I <I V2 I
の特性を有することを特徴とする電子放出素子。  An electron-emitting device having the following characteristics:
[15] 請求項 14記載の電子放出素子において、  [15] The electron-emitting device according to claim 14,
1. 5 X I VI I < I V2 I  1. 5 X I VI I <I V2 I
であることを特徴とする電子放出素子。  An electron-emitting device characterized in that
[16] 請求項 14記載の電子放出素子において、  [16] The electron-emitting device according to claim 14,
第 1の状態における正電荷の量と電子の量の変化の割合を Δ Q1Z Δ VI、第 3の 状態における正電荷の量と電子の量の変化の割合を Δ Q2Z Δ V2としたとき、  When the rate of change in the amount of positive charge and the amount of electrons in the first state is Δ Q1Z Δ VI, and the rate of change in the amount of positive charge and the amount of electrons in the third state is Δ Q2Z Δ V2,
( A Ql/ AVl) > ( A Q2/ AV2)  (A Ql / AVl)> (A Q2 / AV2)
であることを特徴とする電子放出素子。  An electron-emitting device characterized in that
[17] 請求項 14記載の電子放出素子において、 [17] The electron-emitting device according to claim 14,
電子が蓄積飽和状態となる電圧を V3、電子の放出が開始される電圧を V4としたと さ、  Let V3 be the voltage at which electrons accumulate and become saturated, and V4 be the voltage at which electron emission starts.
1≤ I V4 I / I V3 I ≤1. 5  1≤ I V4 I / I V3 I ≤1.5
であることを特徴とする電子放出素子。  An electron-emitting device characterized in that
[18] 誘電体で構成されたェミッタとなる物質(12)と、電子放出のための駆動電圧 (Va) が印加される第 1の電極(14)及び第 2の電極(16)とを有する電子放出素子にお!、 て、 前記第 1の電極(14)と前記第 2の電極(16)間に対する一方向への電圧の印加に よって、前記ェミッタとなる物質(12)がー方向に分極された状態力 分極が反転した 状態に変化する電圧を第 1の抗電圧 vlとし、この状態から他方向への電圧の印加に よって分極が再び前記一方向に変化する電圧を第 2の抗電圧 v2としたとき、 [18] It has a substance (12) to be an emitter composed of a dielectric, and a first electrode (14) and a second electrode (16) to which a driving voltage (Va) for electron emission is applied For electron-emitting devices! ,,, By applying a voltage in one direction between the first electrode (14) and the second electrode (16), the substance (12) serving as the emitter is polarized in the negative direction. The polarization is reversed. When the voltage that changes to the state is the first coercive voltage vl, and the voltage whose polarization changes again in the one direction by applying a voltage from this state to the other direction is the second coercive voltage v2,
vl < 0又は v2< 0であって、  vl <0 or v2 <0 and
I vl I < I v2 I  I vl I <I v2 I
の特性を有することを特徴とする電子放出素子。  An electron-emitting device having the following characteristics:
[19] 請求項 18記載の電子放出素子において、  [19] The electron-emitting device according to claim 18,
1. 5 X I vl I < I v2 I  1. 5 X I vl I <I v2 I
であることを特徴とする電子放出素子。  An electron-emitting device characterized in that
[20] 請求項 18記載の電子放出素子において、 [20] The electron-emitting device according to claim 18,
前記第 1の抗電圧を印加した際における分極の変化の割合を Δ qlZ Δνΐ、前記 第 2の抗電圧を印加した際における分極の変化の割合を A q2Z Av2としたとき、 When the rate of change in polarization when the first coercive voltage is applied is Δ qlZ Δνΐ, and the rate of change in polarization when the second coercive voltage is applied is A q2Z Av2,
( A ql/ Avl) > ( A q2/ Av2) (A ql / Avl)> (A q2 / Av2)
であることを特徴とする電子放出素子。  An electron-emitting device characterized in that
[21] 請求項 18記載の電子放出素子において、 [21] The electron-emitting device according to claim 18,
電子が蓄積飽和状態となる電圧を v3、電子の放出が開始される電圧^ v4としたと さ、  If the voltage at which electrons are accumulated and saturated is v3, and the voltage at which electrons start to be emitted ^ v4,
1≤ I v4 I / I v3 I ≤1. 5  1≤ I v4 I / I v3 I ≤1.5
であることを特徴とする電子放出素子。  An electron-emitting device characterized in that
PCT/JP2005/000500 2005-01-17 2005-01-17 Electron emitting element WO2006075405A1 (en)

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