WO2006055766A1 - Means to eliminate bubble entrapment during electrochemical processing of workpiece surface - Google Patents
Means to eliminate bubble entrapment during electrochemical processing of workpiece surface Download PDFInfo
- Publication number
- WO2006055766A1 WO2006055766A1 PCT/US2005/041798 US2005041798W WO2006055766A1 WO 2006055766 A1 WO2006055766 A1 WO 2006055766A1 US 2005041798 W US2005041798 W US 2005041798W WO 2006055766 A1 WO2006055766 A1 WO 2006055766A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- wafer
- solution
- rigid plate
- electrode
- wsid
- Prior art date
Links
- 238000012545 processing Methods 0.000 title claims abstract description 25
- 238000000034 method Methods 0.000 claims abstract description 126
- 230000008569 process Effects 0.000 claims abstract description 83
- 239000012530 fluid Substances 0.000 claims abstract description 13
- 230000007246 mechanism Effects 0.000 claims description 7
- 238000004070 electrodeposition Methods 0.000 claims description 3
- 239000000758 substrate Substances 0.000 abstract description 9
- 238000007654 immersion Methods 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 180
- 239000000243 solution Substances 0.000 description 91
- 239000010410 layer Substances 0.000 description 42
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 25
- 229910052802 copper Inorganic materials 0.000 description 25
- 239000010949 copper Substances 0.000 description 25
- 238000000151 deposition Methods 0.000 description 15
- 239000000463 material Substances 0.000 description 14
- 230000008021 deposition Effects 0.000 description 13
- 239000003792 electrolyte Substances 0.000 description 11
- 238000005530 etching Methods 0.000 description 9
- 239000004020 conductor Substances 0.000 description 8
- 230000009471 action Effects 0.000 description 7
- 238000005498 polishing Methods 0.000 description 6
- 238000007747 plating Methods 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 4
- 239000003989 dielectric material Substances 0.000 description 4
- 238000009713 electroplating Methods 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 238000007493 shaping process Methods 0.000 description 4
- 241001417527 Pempheridae Species 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000002245 particle Substances 0.000 description 3
- 239000011148 porous material Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 238000010408 sweeping Methods 0.000 description 3
- 239000000654 additive Substances 0.000 description 2
- 238000013459 approach Methods 0.000 description 2
- 230000000740 bleeding effect Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 239000008151 electrolyte solution Substances 0.000 description 2
- 238000000866 electrolytic etching Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000003993 interaction Effects 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-M Chloride anion Chemical compound [Cl-] VEXZGXHMUGYJMC-UHFFFAOYSA-M 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 238000000418 atomic force spectrum Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 229910000365 copper sulfate Inorganic materials 0.000 description 1
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 229910052745 lead Inorganic materials 0.000 description 1
- 238000010297 mechanical methods and process Methods 0.000 description 1
- 230000005226 mechanical processes and functions Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012806 monitoring device Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000009877 rendering Methods 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000003351 stiffener Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67075—Apparatus for fluid treatment for etching for wet etching
- H01L21/67086—Apparatus for fluid treatment for etching for wet etching with the semiconductor substrates being dipped in baths or vessels
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23H—WORKING OF METAL BY THE ACTION OF A HIGH CONCENTRATION OF ELECTRIC CURRENT ON A WORKPIECE USING AN ELECTRODE WHICH TAKES THE PLACE OF A TOOL; SUCH WORKING COMBINED WITH OTHER FORMS OF WORKING OF METAL
- B23H5/00—Combined machining
- B23H5/06—Electrochemical machining combined with mechanical working, e.g. grinding or honing
- B23H5/08—Electrolytic grinding
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D17/00—Constructional parts, or assemblies thereof, of cells for electrolytic coating
- C25D17/001—Apparatus specially adapted for electrolytic coating of wafers, e.g. semiconductors or solar cells
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D17/00—Constructional parts, or assemblies thereof, of cells for electrolytic coating
- C25D17/008—Current shielding devices
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/04—Electroplating with moving electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/7684—Smoothing; Planarisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
Definitions
- the present invention generally relates to semiconductor integrated circuit technology and, more particularly, to a device for electrotreating or electrochemically processing a workpiece.
- IC integrated circuits
- IC integrated circuits
- IC semiconductor devices
- a semiconductor substrate usually a silicon substrate
- insulating material layers Conductive material layers, or interconnects, form the wiring network of the integrated circuit.
- ILDs interlayer or interlevel dielectrics
- One dielectric material that is commonly used in silicon integrated circuits is silicon dioxide, although there is now a trend to replace at least some of the standard dense silicon dioxide material in IC structures with low-k dielectric materials such as organic, inorganic, spin-on and CVD candidates.
- IC interconnects are formed by filling a conductor such as copper in features or cavities etched into the dielectric interlayers by a metallization process. Copper is becoming the preferred conductor for interconnect applications because of its low electrical resistance and good electromigration property. The preferred method of copper metallization is electroplating. Ih an integrated circuit, multiple levels of interconnect networks laterally extend with respect to the substrate surface. Interconnects formed in sequential layers can be electrically connected using features such as vias or contacts. In a typical interconnect fabrication process, first an insulating layer is formed on the semiconductor substrate, and patterning and etching processes are then performed to form features or cavities such as trenches, vias, and pads etc., in the insulating layer.
- the wafer is placed on a wafer carrier and a cathodic (-) voltage with respect to an electrode is applied to the wafer surface while a deposition electrolyte wets both the wafer surface and the electrode.
- a cathodic (-) voltage with respect to an electrode is applied to the wafer surface while a deposition electrolyte wets both the wafer surface and the electrode.
- a material removal step such as a chemical mechanical polishing (CMP) process step is conducted to remove the excess copper layer, which is also called copper overburden, from the top surfaces (also called the field region) of the workpiece, leaving copper only in the features.
- CMP chemical mechanical polishing
- An additional material removal step is then employed to remove the other conductive layers such as the barrier/glue layers that are on the field region. Fabrication in this manner results in copper deposits within features that are physically as well as electrically isolated from each other.
- electrochemical polishing electrochemical etching
- electropolishing electrochemical polishing
- electrochemical etching an anodic voltage is applied to the wafer surface with respect to a cathodic electrode in an electropolishing electrolyte.
- Excess conductor such as overburden copper is removed without physically touching and stressing the interconnect structure.
- electropolishing on a wafer surface while physically touching the surface with a pad material.
- electrochemical mechanical polishing or etching methods are called electrochemical mechanical polishing or etching methods.
- Electrochemical Mechanical Processing which term is used to include Electrochemical Mechanical Deposition (ECMD) processes as well as Electrochemical Mechanical Polishing (ECMP) (also known as Electrochemical Mechanical Etching (ECME)).
- ECMPR Electrochemical Mechanical Processing
- a workpiece-surface-influencing- device such as a mask, pad or a sweeper is used during at least a portion of the electrotreatment process when there is physical contact or close proximity and relative motion between the workpiece surface and the WSID.
- WSID workpiece-surface-influencing- device
- the surface of the workpiece is wetted by the electrolyte and is rendered cathodic with respect to an electrode, which is also wetted by the electrolyte.
- the wafer surface is pushed against or in close proximity to the surface of the WSID or vice versa when relative motion between the surface of the workpiece and the WSID results in sweeping of the workpiece surface. Planar deposition is achieved due to this sweeping action as described in the above-cited patent applications.
- the surface of the workpiece is wetted by the electropolishing electrolyte or etching solution, but the polarity of the applied voltage is reversed, thus rendering the workpiece surface more anodic compared to the electrode.
- a WSID touches the surface during removal of the layer from the workpiece surface.
- Very thin planar films can be obtained by first depositing a planar layer using an ECMD technique and then applying an ECMP technique on the planar film in the same electrolyte by reversing the applied voltage.
- the ECMP step can be carried out in a separate machine and a different etching electrolyte or electropolishing solution. This way the thickness of the deposit may be reduced in a planar manner.
- an ECMP technique may be continued until all the metal on the field regions is removed.
- a WSID may or may not be used during the electroetching process since substantially planar etching can be achieved either way as long as the starting layer surface is planar.
- FIG. 1 is a schematic illustration of an exemplary conventional ECMPR system 10 used for processing wafers.
- a WSID 12 having openings 14 in it, is disposed in close proximity of a workpiece or wafer 16 to be processed.
- the wafer 16 is a silicon wafer to be plated with a conductor metal, preferably copper or copper alloy.
- the wafer may or may not have a previously plated copper layer on it.
- the wafer 16 is retained by a wafer carrier 18 so as to position front surface 20 of the wafer against top surface 22 of the WSID 12.
- the openings 14 are designed to assure uniform deposition of copper from an electrolyte solution 24, depicted by arrows, onto the front surface 22, or uniform electropolishing from the front surface 22.
- the top surface 22 of the WSID 12 facing the front surface 20 of the wafer is used as the sweeper and the WSID 12 itself establishes appropriate electrolyte flow and electric field flow to the front surface 22 for globally uniform deposition or electroetching.
- Such an ECMPR system 10 also includes an electrode 26, which is immersed in the electrolyte 24.
- the electrolyte solution 24 is contained in a process chamber 25.
- the electrolyte 24 is in fluid communication with the electrode 26 and the front surface 20 of the wafer 16 through the openings 14 in the WSID 12.
- the electrode 26 is only schematically shown in Figure 1. In actual practice, the electrodes are shielded with a particle filter and other precautions are taken to avoid bubble accumulation under the WSID and to avoid particles generated on the electrode 26 to reach the surface of the wafer 16.
- An exemplary copper electrolyte may be copper sulfate solution with additives such as accelerators, suppressors, leveler, chloride and such, which are commonly used in the industry.
- the top surface 22 of the WSID 12 sweeps the front surface 20 the wafer while an electrical potential is established between the electrode 26 and the front surface 20 of the wafer.
- the front surface of the wafer 12 is made more cathodic (negative) compared to the electrode 26, which becomes the anode.
- the wafer surface is made more anodic than the electrode.
- a method for immersing a surface of a wafer in a solution for processing the surface.
- the method included flowing the solution through openings of a rigid plate having a protruding region to form a raised solution surface over the protruding region. A selected portion of the wafer surface is contacted with the raised solution surface. The wafer surface is immersed fully into the solution.
- a system for eliminating bubble entrapment under a surface of a wafer when the surface is immersed into a process solution to process the surface of a wafer.
- the system includes a rigid plate, having a protruded region and fluid openings. The plate is configured such that when the solution flows through the rigid plate, a raised solution surface forms over the protruded region.
- the system also includes a moving mechanism configured to move the wafer such that, as the wafer is moved towards the solution, a selected portion of the surface of the wafer contacts the raised solution surface before immersing the surface of the wafer fully into the solution.
- a method of processing a conductive surface of a wafer using a process solution includes flowing the solution through openings of a rigid plate having a protruding region to form a raised solution surface over the protruding region. A selected portion of the conductive surface is contacted with the raised solution surface. The conductive surface is fully immersed into the solution and the conductive surface is processed.
- a system for electroprocessing a conductive surface of a wafer using a process solution.
- the system includes an electrode configured to be placed in the process solution.
- a rigid plate having a protruded region and fluid openings, is configured to be immersed in the solution and positioned between the electrode and the conductive surface.
- the plate is configured such that as the solution flows through the rigid plate, a raised solution surface forms over the protruded region.
- a moving mechanism is configured to move the wafer such that as the wafer moves towards the solution, a selected portion of the conductive surface contacts the raised solution surface before immersing the surface fully into the solution.
- Figure 1 is a schematic illustration of an exemplary conventional electrochemical mechanical processing system
- Figure 2 is an exemplary portion of a wafer surface with a planar conductive layer
- Figure 3 is a schematic illustration of an electrochemical mechanical processing system where a force is applied to the back surface of the wafer
- Figure 4 is a graph showing the distribution of the applied force over the wafer surface as the force is applied in the manner shown in Figure 3;
- Figure 5 is a schematic illustration of interaction between a wafer front surface and the workpiece surface influencing device (WSID) as the center region of the wafer back surface is pressed against the WSID;
- WSID workpiece surface influencing device
- Figures 6A-6D are schematic illustrations of various force sources to apply force on the back surface of a wafer
- Figure 7 is a schematic illustration of the electrochemical mechanical processing system where a force is applied to the back surface of the workpiece surface influencing device
- Figure 8 is a schematic illustration of the interaction between a wafer front surface and the workpiece surface influencing device as the surface of the workpiece surface influencing device is pressed against the center region of the wafer front surface;
- Figure 9 is a graph showing the distribution of the applied force over the wafer surface as the force is applied in the manner shown in Figure 8;
- Figure 10 is a schematic illustration of an embodiment of a smart electrochemical mechanical processing system where a force is applied to the back surface of the workpiece surface influencing device;
- Figure 1 IA-I IB are schematic illustrations of various combinations of support plate and workpiece influencing device having convex profiles;
- Figures 12A-14B are schematic illustrations of various plates having varying thickness and resulting degrees of bowing under applied pressure
- Figure 15A-15B are schematic illustrations of removing entrapped bubbles by bowing the WSID towards the center of a wafer during a process
- Figure 16A is a schematic illustration of the relative positions of a wafer and an embodiment of a rigid plate having a protruding region in top view;
- Figure 16B is a schematic illustration of an alternative electrochemical mechanical processing system including the rigid plate shown in Figure 16 A, wherein the surface of the wafer contacts a raised solution surface formed over the protruding region;
- Figure 16C is a schematic illustration of system shown in Figure 16B, after the surface of the wafer has been moved to be immersed into the solution;
- Figure 17A-17B are schematic illustrations of the relative positions of a wafer and another embodiment of a rigid plate having a protruding region in top view and side views;
- FIGS 18A-18F are schematic illustrations of various embodiments of rigid plates.
- Figure 19 is a schematic illustration of an electrochemical mechanical processing system including an embodiment of a rigid plate having a cavity.
- ECMPR electrochemical mechanical processing
- ECMD electrochemical mechanical deposition
- ECMP electrochemical mechanical polishing
- ECME etching
- FIG. 2 shows an exemplary portion of a substrate or workpiece 100 such as a wafer having a front and a back surface 101 and 102.
- the wafer 100 comprises a semiconductor substrate 103 and an insulation or dielectric layer 104 on which a planar conductive layer 106 such as a planar copper layer is formed in accordance with embodiments described herein.
- the copper layer 106 maintains a uniform overburden thickness over the entire wafer surface.
- the copper layer 106 is plated to fill features in the dielectric layer using an ECMD process in which the wafer surface is mechanically swept with a pad mask or WSID during plating. Further, in an exemplary process the copper layer 106 may be electropolished using ECMP.
- the dielectric layer 104 is processed to form features such as vias 108 and trenches 109 and 110.
- the features 108, 109 and 110 and top surface 112 of the dielectric layer which is often referred to as a field region or surface, are lined with one or more conductive layers such as a barrier layer 114 and a copper seed layer (not shown) before forming the copper layer 106.
- Interconnects are formed when the copper layer 106 is removed down to the level of field regions 112 and the barrier layer 144 covering the field regions 112 is also removed. Overall efficiency of this process depends on the thickness uniformity of the copper layer 106 over the entire wafer surface.
- the present invention provides a method of forming a planar conductive layer while maintaining its thickness uniformity.
- the belt WSID or the wafer may be moved linearly.
- the high linear velocity of the belt WSID is constant everywhere on the wafer surface as long as the velocity on the wafer surface due to rpm is much lower than the linear velocity of the belt WSID. For example, if the wafer is rotated with 5 rpm and belt linear velocity is 100 cm/sec, the linear velocity at the edge of the wafer due to rpm would be about 5 cm/sec for an 8" wafer. This is negligible compared to the belt speed of 100 cm/sec.
- the force applied by the WSID is adjusted such that a higher force is applied onto certain surface regions, such as the central region of the wafer, where the relative velocity is low.
- the wafer is rotated and also translated over a stationary WSID surface. If the velocity of the lateral motion is lower than the motion near the edge of the wafer due to rotation, velocity near the center of the wafer would be lower than at the edge. Therefore, additional force should be applied near the center of the wafer to improve process results.
- FIG. 3 illustrates a partial view of an ECMPR system 200.
- Figure 3 illustrates a partial view of an ECMPR system 200.
- Only components such as a wafer carrier 202 and a WSID 204 of the system 200 are illustrated for the purpose of clarity.
- the wafer carrier 202 holds the wafer 100 by the back surface 102 while exposing the front surface 101 of the wafer to the WSE) 204.
- the wafer is held on a chuck face 203 of the wafer carrier 202.
- the WSID 204 may have a compressible layer 206 having a top surface 208.
- the top surface 208 may be made of a flexible material and may be abrasive or it may contain a polishing pad material.
- the top surface 208 is brought to physical contact with the front surface 101 of the wafer during the ECMD or ECMP processes.
- the WSID 204 comprises openings 210, such as holes with various geometrical shapes or slits with varying width, or may be made of a porous material that allows a process solution (not shown) to flow through the WSDD and wet the surface of the wafer.
- the WSID 204 is supported by a support plate 212, which has a top surface 213 and a back surface 214.
- the WSID 204 is placed on the top surface 213 of the support plate 212.
- the support plate 212 is fixed on sidewalls 25 of a process chamber, which is not shown in Figure 3 but can be seen in Figure 1.
- the openings 210 may continue through the support plate 214 as support plate openings 216, although size and location of the openings 216 may be different from the openings 210 in the WSID.
- support plate openings 216 may be made of narrow slits or very small holes.
- support plate openings 216 may be larger than openings 210 of the WSID.
- a flow restrictor such as a filter 218 may be placed under the support plate. This filter 218 also reduces the number of particles that may reach the wafer surface.
- a process solution 217 in the process chamber is delivered to the front surface 101 of the wafer 100.
- Process solution 217 flows through the pores of the filter 218, openings 216, 210 of the support plate 212 and the WSID 204 to reach the front surface during the process.
- shaping of the front surface 101 of the wafer 100 may be performed by applying a force to the back surface 102 of the wafer 100 to deflect the front surface 101.
- the wafer bows into the WSID and a higher-pressure interface 219 forms between the center region 220 of the front surface of the wafer and the top surface 208 of the WSID 204.
- the support plate 212 is relatively rigid in this example and extra compression of the compressible layer of the WSID in the central region applies higher force to the wafer surface in this region compared to the edge region.
- the size of the pressure interface depends on the applied force and depending on the force it may get smaller or larger.
- a force source in the wafer carrier 202 may apply a force A to the back of the wafer and cause the wafer to bow into the WSID 204, thereby pushing a center region 220 of the wafer 100 in the direction of the arrow A.
- the force source may use a pressurized fluid, inflatable membranes, or a mechanism using shims or pins to physically apply force to the back surface 102 of the wafer.
- Application of the force A gives the wafer 100 and hence the front surface 101 a convex shape which allows WSID to exert more force on the center region 220 than edge region 222 of the wafer 100. In Figure 4, this can be seen in the force distance graph 224. As seen in the graph, the force applied to the center region is higher than the edge region of the wafer.
- the center region is pushed into the WSID 204 by a distance D at the center region 220 and a distance d at the edge region 222. Since the force applied by the WSID onto the wafer surface is proportional to the distance the surface is pressed into the WSID, as the D distance becomes larger than the d-distance, the force, which is applied to the center region becomes higher than the edge region. It should be understood that the distances and the convex shape of the wafer are exaggerated in the figures for clarity. In practice the difference between the distance D and distance d may be in the range of 0.1-1 mm for an 8" wafer or as much as 2 mm for a 300 mm wafer. For the purpose of clarity, openings in the WSID are not shown in Figure 5.
- Figures 6A-6D illustrate various configurations of force source. In each configuration edges of the wafer are held by a holding mechanism on the wafer carrier and the force is applied on the back surface of the wafer.
- Figure 6A shows a pressurized fluid source 230, preferably air to apply pressure to the back surface of the wafer.
- the fluid source 230 may be in the chuck face 203 of the wafer carrier (see Figure 3).
- Figure 6B illustrates an inflatable member 232 such as a bladder to fill with pressurized air or another gas to apply pressure.
- the bladder may be placed between the chuck face and the back surface of the wafer 100, and attached to the fluid source 230.
- Figure 6C shows a curved object 234, which may be placed between the back surface of the wafer 100 and the chuck face to press against the back surface 102 of the wafer to shape it.
- Figure 6D shows use of pins 236 configured to have varying lengths so that more force is applied to the center region on the back of the wafer 100.
- the pins 236 may be placed in the chuck face and moved by a moving mechanism.
- FIG. 7 As shown in Figure 7 in system 200, another method for achieving the same result involves applying force to the center region of the WSID 204 and thereby compressing a portion of the WSID more against the center region 220.
- the support plate 212 since the edges of the support plate 212 are substantially fixed on the side walls of the process chamber, by applying a force in the direction of arrow B to the back surface 214 of the support plate 212, the support plate 212 is bowed towards the front surface 101 of the wafer. This way, a selected region 240 of the support plate 212 is brought closer to the center region 220 of the wafer 100 and forms a high-pressure interface 219.
- the location of the selected region 240 is configured to correspond to the center region 220 of the wafer.
- the selected region may move up a distance only in the range of 0.1 to 2 millimeters.
- a portion 242 of the compressible layer 206 between the center region 220 and the selected region 240 is compressed between these two surfaces. This, in turn, pushes the top surface 208 of the WSID against the center region and applies more force to the center region 220 than the edge region 222.
- a relatively flexible support plate 212 may be used. By selecting the thickness and flexibility of the support plate and the magnitude of the applied force, the degree of bowing and the magnitude of the extra force applied to the central region may be controlled.
- the force maybe applied to the support plate 212 by exerting more process solution pressure to the back surface of the support plate 212 or the filter 218 placed under it.
- Such pressure gives the support plate 212 a convex shape.
- the pressure and thus the magnitude of the applied force may be controlled by various means such as flow restrictors, filters with varying porosity or bleed valves.
- One exemplary method of controlling force involves controlling the flow rate of the process solution. Depending on the porosity of the filter 218, as the flow rate of the process solution increases, the pressure under the filter 218 increases. Since the edges of the support plate 212 are fixed, the support plate 212 bows up under increased process solution flow as shown in Figure 8. It is also possible to increase or decrease the amount of bowing by keeping the flow constant but by using one or more bleed valves that can control the pressure under the filter.
- the pressure under the filter 218 maybe increased (when valves are closed, restricting the amount of solution bleeding out through them) or decreased (when valves are opened, increasing the amount of solution bleeding out through them) or kept constant at a predetermined pressure level. It should be noted that this process may be automated using feedback control as will be discussed later. For the purpose of clarity, openings in the WSID are not shown in Figure 8.
- Another way of controlling the bowing and thus the force on the central region of the wafer involves controlling the porosity of the filter 218. At a given solution flow rate, filters with smaller pore size would give more bowing and thus more additional force would be applied to the central section of the wafer. As can be seen in the force- distance graph in Figure 9, the force applied to the center 220 of the wafer is preferably higher than the force applied to the edge 222.
- FIG 10 illustrates a smart system 250 which can sense the pressure under the filter element 256 using a transducer.
- the system 250 includes a WSID 252 supported by a support plate 254.
- a filter 256 is placed under the support plate 254.
- the filter 256 may not be needed if the openings in the WSDD are small enough to keep the cavity 265 pressurized. However, presence of the filter 256 is preferable since it also filters out any particulates from the process solution before delivering it to the wafer surface.
- Process solution 258 enters chamber 260 through an inlet 262.
- a pressure-monitoring device 264 such as a pressure transducer monitors the solution pressure and turns on and off a bleed valve 266 to keep the pressure, and hence the bowing of the support plate 254 at a predetermined desired value. For example, if the flow is set to a constant value and the pressure in the cavity 265 is higher than the pre-determiiied value, the bleed valve 266 is automatically opened more to let more solution out and bring the pressure down to the pre-determined level. Similarly, if the actual pressure within cavity 265 is lower than the pre-determined value, then the bleed valve 266 would automatically close to restrict flow through it and bring the pressure up to the pre-determined level.
- a predetermined value for the pressure is selected and kept through the process. Also, by changing the pressure during the process, more or less force may be applied on the surface in a controlled manner. Bowing is a strong function of the choice of filter, flexibility of the support plate and the pressure under the support plate.
- the force may also be controlled by shaping the WSID itself or by constructing the support plate to make it more or less compliant along the diameter of the wafer.
- Other stiffeners or flexural members can be added to WSID to produce a force curve of any desired shape for planarization, especially at the center region.
- Figures 1 IA-I IB illustrate various support plate and WSID combined structures to create a bowing effect.
- a first structure 300 includes a support plate 302 having a curved top surface 304.
- a WSID 306 is attached on the curved top surface 304 so that a top surface 308 of the WSID is in compliance with the curved top surface 304 of the support plate 302.
- a support plate and WSID combined structure 310 includes a support plate 312 and a WSID 314.
- a curved top surface 316 of the WSID is provided using a curved insert 318.
- FIGs 1 IA-I IB for the purpose of clarity openings of the support plates and the WSIDs are not shown.
- FIGS 12A-12B illustrate a support plate 320 before and after the application of the force.
- the support plate 320 is a thin support plate; therefore, with the applied pressure it bows more in comparison to a thicker support plate. This may allow the support plate 320 to apply more localized pressure and to a smaller area of the wafer.
- Figures 13A-13B show a support plate 322, which is thicker than the support plate 320 described above. Since it is thicker, the support plate 322 bows less and thereby, it may apply a force to a larger (central) area on the wafer.
- Figures 14A-14B illustrate a support plate 324 before and after the application of the force.
- the support plate 324 has a thin section 326; therefore, when a pressure is applied to the thin section, the thin section 326 protrudes more. This may allow the support plate 324 to apply more localized pressure and to a smaller area of the wafer.
- the bowing effects in all these drawing are greatly exaggerated to clearly explain the principles, advantages and distinctions.
- openings in the support plates are not shown in Figures 12A-14B.
- the above-noted methods and structures may also be used for eliminating bubbles that may be trapped between the wafer surface and the process solution during electroplating and electropolishing processes.
- bubbles 406 may get trapped under the wafer surface 404, especially near the center of the wafer. This is a common problem in electroplating and electropolishing technologies and is generally due to the fact that the edges of the wafer may get wetted by the process solution before its center. If these bubbles stay on the wafer surface during the process, they may generate defects in the forming layers and therefore they should be removed.
- the solution from the top of the convex shape reaches the center of the conductive surface of the wafer 400 and wets the center region before the solution flowing from the rest of the WSID 402 reaches and wets the rest of the surface of the wafer 400. This way, since the bubbles are swept away from the center, and no bubble entrapment occurs.
- openings in the WSID and the support plates are not shown in Figures 15A-15B.
- the surface of the support plate or solution supply plate through which the solution flows towards the workpiece surface can itself be given a profile to assist removal of bubbles in electrochemical processes without having a compressible layer or a pad on it, particularly in a non-contact ECMPR. Since in a non- contact ECMPR there is no need to touch the wafer surface with a WSID, there is no need for a pad, and the WSID may be formed as a rigid structure. In that respect, non-contact ECMPR may actually be called ECPR (electrochemical processing) since there is no mechanical action applied to the wafer surface during process.
- ECPR electrochemical processing
- the support plate may be a rigid plate having openings and a surface profile, which will be referred to as a plate hereinbelow.
- a surface of the plate includes a protruding profile or region, which may be any curved or protruding surface or surface portion, including but not limited to, spherical, cylindrical, conical, pyramidal, rectangular, trapezoidal, or triangular surfaces.
- the workpiece surface When a workpiece is lowered towards the process solution, the workpiece surface first touches the raised surface of the solution which corresponds to the location of the protruding region of the plate. If so configured, the central region of the workpiece may be wetted first by the process solution, and then the solution moves towards the periphery of the wafer, sweeping any bubbles out with it. This prevents bubble entrapment under the workpiece before the rest of the surface of the workpiece is wetted by the solution. This way, since the bubbles are eliminated or swept away from the center, and no bubble entrapment occurs.
- the protruding region may be placed about the center of the plate surface or may extend along the length or width of the plate surface.
- a gap filled with solution is formed between the workpiece surface and the surface of the plate. Peripheral ends of the gap are unblocked so that the solution is moved laterally to the open ends of the gap as the pressure from the moving workpiece surface pushes the solution while the workpiece surface is getting closer to the surface of the plate.
- the surface profile of the plate locally narrows the gap and applies more pressure to the adjacent solution. For example if a protrusion on the plate is placed across from the center of the workpiece surface, the gap between the two surfaces, i.e.
- Figures 16A, 16B and 16C illustrate a plate 500 in top view, and in side views of a ECMPR system 502.
- circle W in dotted lines shows the position of a wafer 503 facing towards the plate 500.
- the plate 500 has a rectangular shape, it may have any geometrical shape, preferably allowing side electrical contacts to touch the front surface of the wafer 503 (i.e., allowing the wafer W to overhang).
- Figures 16B-16C show side views along from the short edge of the plate 500. It should be noted that all dimensions of the plate 500 may be larger than the diameter of the wafer if other means of making electrical contact to the wafer, such as a clamp ring contact, are employed.
- FIG. 16B a wafer 503 is above the surface 504 of a process solution 505, and in Figure 16C the wafer is immersed in the solution 505.
- the plate 500 is placed between the wafer 503 and an electrode 506.
- a carrier head 508 holds the wafer 503 by its back surface while exposing a front surface 510 of the wafer 503. The carrier head 508 may rotate and move the wafer laterally over the plate 500.
- the front surface 510 includes a conductive layer, e.g., a copper seed layer, a barrier layer or a nucleation layer etc., for electrodeposition or a copper layer for electropolishing.
- the electrode 506 may be an anode for electrodeposition, and may be a cathode if the process is electropolishing.
- a power supply 512 is electrically connected to the electrode 506 and the front surface 510 to apply a potential difference while the process solution 505 is contacting the electrode 506 and the front surface 510 during the electrochemical process.
- electrical connection to the front surface 510 is made using movable electrical contacts 516 adjacent and along the long edge of the plate 500.
- the front surface 510 of the wafer to be processed is placed across from a first surface 518 of the plate 500.
- Fluid openings 520 between the first surface 518 and the second surface 522 of the plate 500 allow the process solution 505 to flow between the front surface 510 of the wafer 503 and the electrode 506.
- the openings 520 may be shaped as holes or slits and may have any geometrical shape.
- the first surface 518 includes a protruding region 524 or a protruding surface or a bump to eliminate bubble entrapment under the front surface 510.
- the protruding region 524 may be a portion of the first surface or may be the entire first surface.
- the second surface 522 may be flat as shown in Figure 16B, but it may also be curved.
- the protruding region 524 has a spherical surface and is placed at a central location of the first surface 518.
- the protruding region of the first surface 518 may be any three dimensional surface.
- the protruding region 524 may extend along the length of the first surface 518 of the plate 500 and again may have any geometrical surface such as cylindrical, rectangular, etc. Referring back to Figure 16B, the process solution 505 flowing through the plate 500 forms a raised surface 526 over the protruding region 524 of the plate 500.
- the raised surface 526 of the process solution 505 is closer to the front surface 510 than the rest of the surface 504 of the process solution 505. Accordingly, as the wafer is lowered towards the process solution 505, the center of the front surface 510 touches the raised surface 526 of the process solution 505 first and gets wet without bubble entrapment, and as the wafer 503 is further advanced towards the process solution 505 the rest of the front surface immerses into the solution without bubble entrapment.
- Figure 17B shows the raised surface 526 of the process solution 505 over the protruding region 524 of the plate 500.
- Figures 18A-18F illustrate various first or top surfaces of exemplary plates 500 placed across the wafers 503 to be processed.
- Figures 18 A, 18B, 18D and 18E the first surfaces 518 are shaped to have protruded regions to form the raised solution surfaces over them, hi this respect,
- Figure 18A shows a cylindrical first surface profile;
- Figure 18B shows a triangular first surface profile;
- Figure 18D shows a slanted first surface profile;
- Figure 18E shows a curved and slanted first surface profile.
- a portion of the first surfaces includes protruded regions, which is triangular in Figure 18C and rectangular in Figure 18F.
- FIG 19 shows an electrochemical processing system 600 employing another embodiment of a rigid plate 602.
- the rigid plate 602 has a top surface 604, which faces a front surface 606 of a wafer 608, and the rigid plate 502 has a back surface 606.
- Fluid channels or openings 605 extend between the top surface 604 and the back surface 606 to flow a process solution 610 towards the surface 606 of the wafer 608.
- the top surface 604 of the rigid plate 602 is substantially flat and the back surface includes a cavity 612. In the region of the cavity 612, the thickness of the rigid plate 602 is reduced, which is at a minimum at the top of the cavity 612.
- the cavity 612 helps forming a raised solution surface 614 over the top surface 604 of the plate 602, with the pressure of the process solution 610 filling the cavity 612.
- the level of the solution above the cavity 612 is higher (highest at the top of the cavity), than its level over the rest of the rigid plate 602, due to the fact that the resistance to fluid flow is the lowest at that location.
- a selected portion of the surface of the wafer 608 e.g. the center of the surface of the wafer
- entrapped bubbles are swept away with the solution flowing over the top surface 604 of the rigid plate 602 from the center towards the edge of the wafer.
- the rigid plate 602 is positioned between an electrode 616 and the wafer 608, which is moved and rotated by a wafer holder 618 during the process.
- a power supply 620 applies a potential difference between the surface of the wafer 608 and the electrode 616 for electrochemically processing the surface 606 of the wafer 608.
- the rigid plate 602 may be rectangular as in the other embodiments.
- the cavity 612 may be positioned under the center of the wafer or may extend along the long edge of the rigid plate (see also Figures 17A-17B).
- the cavity 612 may be shaped in any 3-D form, such as hemispherical, cylindrical, conical, pyramidal, rectangular.
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Mechanical Engineering (AREA)
- Life Sciences & Earth Sciences (AREA)
- Sustainable Development (AREA)
- Electroplating Methods And Accessories (AREA)
- Weting (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US63511204P | 2004-11-19 | 2004-11-19 | |
US60/635,112 | 2004-11-19 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2006055766A1 true WO2006055766A1 (en) | 2006-05-26 |
Family
ID=36407480
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2005/041798 WO2006055766A1 (en) | 2004-11-19 | 2005-11-18 | Means to eliminate bubble entrapment during electrochemical processing of workpiece surface |
Country Status (3)
Country | Link |
---|---|
CN (1) | CN101056718A (zh) |
TW (1) | TW200633038A (zh) |
WO (1) | WO2006055766A1 (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9309604B2 (en) | 2008-11-07 | 2016-04-12 | Novellus Systems, Inc. | Method and apparatus for electroplating |
US9318358B2 (en) | 2011-04-28 | 2016-04-19 | Infineon Technologies Ag | Etching device and a method for etching a material of a workpiece |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9822461B2 (en) | 2006-08-16 | 2017-11-21 | Novellus Systems, Inc. | Dynamic current distribution control apparatus and method for wafer electroplating |
US9523155B2 (en) | 2012-12-12 | 2016-12-20 | Novellus Systems, Inc. | Enhancement of electrolyte hydrodynamics for efficient mass transfer during electroplating |
US10233556B2 (en) | 2010-07-02 | 2019-03-19 | Lam Research Corporation | Dynamic modulation of cross flow manifold during electroplating |
TWI550139B (zh) | 2011-04-04 | 2016-09-21 | 諾菲勒斯系統公司 | 用於裁整均勻輪廓之電鍍裝置 |
US9909228B2 (en) | 2012-11-27 | 2018-03-06 | Lam Research Corporation | Method and apparatus for dynamic current distribution control during electroplating |
TWI606154B (zh) * | 2012-12-12 | 2017-11-21 | 諾發系統有限公司 | 用於電鍍期間之有效率質量傳送的電解液流體動力學之增強 |
US9670588B2 (en) | 2013-05-01 | 2017-06-06 | Lam Research Corporation | Anisotropic high resistance ionic current source (AHRICS) |
US9752248B2 (en) | 2014-12-19 | 2017-09-05 | Lam Research Corporation | Methods and apparatuses for dynamically tunable wafer-edge electroplating |
US9567685B2 (en) | 2015-01-22 | 2017-02-14 | Lam Research Corporation | Apparatus and method for dynamic control of plated uniformity with the use of remote electric current |
US9816194B2 (en) | 2015-03-19 | 2017-11-14 | Lam Research Corporation | Control of electrolyte flow dynamics for uniform electroplating |
US10014170B2 (en) | 2015-05-14 | 2018-07-03 | Lam Research Corporation | Apparatus and method for electrodeposition of metals with the use of an ionically resistive ionically permeable element having spatially tailored resistivity |
US9988733B2 (en) | 2015-06-09 | 2018-06-05 | Lam Research Corporation | Apparatus and method for modulating azimuthal uniformity in electroplating |
US10364505B2 (en) | 2016-05-24 | 2019-07-30 | Lam Research Corporation | Dynamic modulation of cross flow manifold during elecroplating |
US11001934B2 (en) | 2017-08-21 | 2021-05-11 | Lam Research Corporation | Methods and apparatus for flow isolation and focusing during electroplating |
US10781527B2 (en) | 2017-09-18 | 2020-09-22 | Lam Research Corporation | Methods and apparatus for controlling delivery of cross flowing and impinging electrolyte during electroplating |
CN115044958B (zh) * | 2022-06-07 | 2024-05-28 | 赛莱克斯微系统科技(北京)有限公司 | 一种晶圆电镀回液管及晶圆电镀设备 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6413388B1 (en) * | 2000-02-23 | 2002-07-02 | Nutool Inc. | Pad designs and structures for a versatile materials processing apparatus |
-
2005
- 2005-11-18 CN CN 200580038413 patent/CN101056718A/zh active Pending
- 2005-11-18 TW TW094140578A patent/TW200633038A/zh unknown
- 2005-11-18 WO PCT/US2005/041798 patent/WO2006055766A1/en active Application Filing
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6413388B1 (en) * | 2000-02-23 | 2002-07-02 | Nutool Inc. | Pad designs and structures for a versatile materials processing apparatus |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9309604B2 (en) | 2008-11-07 | 2016-04-12 | Novellus Systems, Inc. | Method and apparatus for electroplating |
US9318358B2 (en) | 2011-04-28 | 2016-04-19 | Infineon Technologies Ag | Etching device and a method for etching a material of a workpiece |
Also Published As
Publication number | Publication date |
---|---|
TW200633038A (en) | 2006-09-16 |
CN101056718A (zh) | 2007-10-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2006055766A1 (en) | Means to eliminate bubble entrapment during electrochemical processing of workpiece surface | |
US6776693B2 (en) | Method and apparatus for face-up substrate polishing | |
US7238092B2 (en) | Low-force electrochemical mechanical processing method and apparatus | |
US7045040B2 (en) | Process and system for eliminating gas bubbles during electrochemical processing | |
JP4575729B2 (ja) | エレクトロケミカルメカニカルポリッシングのための研磨パッド | |
KR100780257B1 (ko) | 연마 방법, 연마 장치, 도금 방법 및 도금 장치 | |
US6837979B2 (en) | Method and apparatus for depositing and controlling the texture of a thin film | |
US7341649B2 (en) | Apparatus for electroprocessing a workpiece surface | |
US6402925B2 (en) | Method and apparatus for electrochemical mechanical deposition | |
US20050173260A1 (en) | System for electrochemical mechanical polishing | |
US7425250B2 (en) | Electrochemical mechanical processing apparatus | |
US20060217049A1 (en) | Perforation and grooving for polishing articles | |
WO2004044273A1 (en) | Electropolishing system and process | |
US7648622B2 (en) | System and method for electrochemical mechanical polishing | |
US20070131563A1 (en) | Means to improve center to edge uniformity of electrochemical mechanical processing of workpiece surface | |
US7141146B2 (en) | Means to improve center to edge uniformity of electrochemical mechanical processing of workpiece surface | |
US20060131177A1 (en) | Means to eliminate bubble entrapment during electrochemical processing of workpiece surface | |
JP2007511095A (ja) | 集積回路相互接続の製作システム及び方法 | |
KR20020022600A (ko) | 기판도금장치 및 도금방법 | |
US7316602B2 (en) | Constant low force wafer carrier for electrochemical mechanical processing and chemical mechanical polishing | |
JP2005260224A (ja) | 電気化学機械研磨のためのシステム | |
WO2002077327A2 (en) | Mask plate design | |
US7097755B2 (en) | Electrochemical mechanical processing with advancible sweeper | |
US20040182715A1 (en) | Process and apparatus for air bubble removal during electrochemical processing | |
US20050101138A1 (en) | System and method for applying constant pressure during electroplating and electropolishing |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KM KN KP KR KZ LC LK LR LS LT LU LV LY MA MD MG MK MN MW MX MZ NA NG NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SM SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU LV MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 200580038413.8 Country of ref document: CN |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
32PN | Ep: public notification in the ep bulletin as address of the adressee cannot be established |
Free format text: NOTING OF LOSS OR RIGHTS PURSUANT TO RULE(1)EPC |
|
32PN | Ep: public notification in the ep bulletin as address of the adressee cannot be established |
Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 69(1) EPC |