WO2006013629A1 - 無線通信端末装置 - Google Patents
無線通信端末装置 Download PDFInfo
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- WO2006013629A1 WO2006013629A1 PCT/JP2004/011247 JP2004011247W WO2006013629A1 WO 2006013629 A1 WO2006013629 A1 WO 2006013629A1 JP 2004011247 W JP2004011247 W JP 2004011247W WO 2006013629 A1 WO2006013629 A1 WO 2006013629A1
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- error correction
- communication terminal
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
Definitions
- the present invention relates to a wireless communication terminal apparatus that can cope with burst errors that occur in wireless transmission, and relates to a technique that is effective when applied to, for example, a wireless LAN communication terminal compliant with the IEEE802.il standard.
- ACK frame delivery confirmation frame
- Patent Document 1 describes that high-quality communication is enabled by applying an error correction code that corrects severe random or burst errors of one bit string in a wireless LAN.
- Patent Document 1 Japanese Patent Laid-Open No. 5-56045 (paragraph 0040 0044)
- the present inventor studied error correction for burst errors occurring in wireless transmission. Since wireless communication is easily affected by external noise, it is necessary for the transmitting side to confirm that the transmitted data has arrived at the receiving side device, and IEE E802. Then, the power ACK frame that uses the acknowledgment frame (ACK frame) also uses the bandwidth, and the bandwidth for transferring the data frame decreases. In addition, when ACK frames are used, reliable retransmission is possible. This causes a transfer delay. Further, it has been found by the present inventor that the technique described in Patent Document 1 has a limit to the ability to correct an error correction code by using only an error correction code. For example, by adding 16 bits of the Reed-Solomon code check bit calculated by the encoder to 239 bytes and transmitting the data block, the receiving coder can correct errors up to 8 of 255 bytes. Only.
- An object of the present invention is to provide a radio communication terminal apparatus that does not require the use of an ACK frame to cope with a burst error.
- Another object of the present invention is to provide a radio communication terminal apparatus that can improve the throughput of data transfer compared to the case of using an ACK frame.
- Still another object of the present invention is to provide a wireless communication terminal apparatus that is less likely to cause a transfer delay compared to the case of using an ACK frame.
- a wireless communication terminal device includes a data processing unit and a high-frequency unit.
- the high-frequency unit receives and wirelessly transmits transmission data supplied from the data processing unit, and the high-frequency unit receives wirelessly.
- the data processing unit processes the received data.
- the data processing unit includes an interleave circuit, and the interleave circuit includes a data division unit that divides transmission data, an error correction coding unit that adds an error correction code to the divided data, and an error correction code
- An interleave processing unit that performs an interleave process on the plurality of divided data.
- the interleaving process is a process in which a plurality of pieces of divided data to which an error correction code is added are arranged in a unit of a plurality of bits according to a predetermined rule.
- a burst error occurs in wireless transmission of interleaved data, the error is distributed over multiple pieces of data. In short, burst errors are apparently converted to random errors.
- the data size of a block in which an error correction code is added to the divided data is m bytes
- the distribution unit by interleaving processing is 1 byte
- the target of interleaving processing is n blocks.
- the error correction capability of divided data by error correction code is 8 bytes, a maximum of 8 block burst errors during transmission can be corrected by the error correction code on the receiving side. In other words, it is possible to perform error correction processing with a burst error of up to 8 blocks as a random error of up to 8 bytes on each divided data.
- the interleave circuit further performs a error correction process using an error correction code included in the divided data and a dingerating processor that reproduces the plurality of divided data from the received data. It has an error correction unit and a data combination unit that combines the divided data that has undergone error correction processing.
- the ding-taling processing unit performs ding-taling processing for reproducing the plurality of divided data from reception data having an arrangement in which the plurality of divided data is discrete in units of a plurality of bits according to a predetermined rule.
- the interleave circuit includes a frame generation unit that generates a transmission frame that conforms to the IEEE 802.11 standard for the array data subjected to the interleaving process, and IEEE802
- a frame analysis unit that analyzes a received frame that conforms to the eleventh standard and extracts the received data that is the target of the dingter processing is provided.
- the data processing unit further includes a MAC layer controller that complies with the 802.11 standard. The MAC layer controller receives a transmission frame from the interleave circuit and outputs the reception frame to the interleave circuit.
- the error correction code is based on a Reed-Solomon code system.
- the interleave circuit adds an error correction code to MPEG-TS data and makes it discrete with the divided data in units of a plurality of bits.
- the MPEG-TS data is separated from the received data having the discrete arrangement, and the separated MPEG-TS data is also subject to error correction processing using an error correction code.
- the interleave circuit has a pair of transmission buffer circuits each storing a plurality of pieces of divided data to which an error correction code is attached, and one of the transmission buffer circuits is mutually connected.
- a predetermined number of pieces of divided data stored in the other transmission buffer are stored.
- a transmission frame is formed in an array that is discrete in units of a plurality of bits according to a rule. Since it takes time to divide the transmission data and add error correction codes until the transmission frame is formed by performing the interleaving process, the waiting time between them is provided by having a pair of transmission buffer circuits. Can be used effectively, and the data transmission processing efficiency can be improved.
- the interleave circuit has a pair of reception buffer circuits each storing reception data, and stores reception data in one reception buffer circuit.
- the plurality of divided data are reproduced from the received data stored in the other buffer. Deinterleave processing is possible after waiting for all interleaved received data to be received, so by having a pair of receive buffer circuits, the waiting time between them can be used effectively to improve data reception processing efficiency. Is possible.
- a wireless communication terminal device includes a data processing unit and a high-frequency unit.
- the high-frequency unit receives and wirelessly transmits information supplied from the data processing unit, and the high-frequency unit wirelessly
- the data processing unit processes the received information.
- the data processing unit includes an interleave circuit, and the interleave circuit divides transmission data, adds an error correction code to the divided data, and adds a plurality of divided data to which the error correction code is added to a predetermined data.
- the transmission frame is generated for the data in the discrete array by dividing the data in units of multiple bits according to the rules.
- the interleave circuit analyzes the received frame, and receives the plurality of pieces of received data from the received data having a layout 1J in which a plurality of divided data is discrete in units of a plurality of bits according to a predetermined rule.
- the divided data is reproduced, error correction processing using the error correction code included in the divided data is performed, and processing for combining the divided data after the error correction processing is performed.
- the transmission frame and the reception frame conform to, for example, the IEEE 802.11 standard.
- FIG. 1 is a block diagram illustrating a wireless communication terminal device.
- FIG. 2 is an explanatory diagram showing the form of data in the transmission process.
- FIG. 3 is an explanatory diagram showing the form of data in the reception process.
- FIG. 4 is a block diagram showing a configuration of a transmission buffer circuit of the interleave unit.
- FIG. 5 is a block diagram showing a configuration of a reception buffer circuit of the dintareve unit. Explanation of symbols
- FIG. 1 illustrates a block diagram of a wireless communication terminal device.
- the wireless communication terminal device (TMLU) 18 is a wireless LAN terminal device that conforms to the IEEE802.il standard, but has a data processing unit (DATP) 19 and a high-frequency unit (RF) 20.
- the high-frequency unit 20 receives the transmission data supplied from the data processing unit 19 and wirelessly transmits the transmission data, and the high-frequency unit 20 processes the reception data received wirelessly.
- the data processing unit 19 includes a transmission / reception data processing circuit (TRDP) 29, an interleave circuit (ITLVC) 1, and a MAC layer controller (MACC) 12.
- TRDP transmission / reception data processing circuit
- INLVC interleave circuit
- MCC MAC layer controller
- the transmission / reception data processing circuit 29 includes a frame data input / output circuit and a data processor, although not particularly shown.
- the MAC layer controller 12 controls the LAN frame configuration and access method, receives the transmission frame from the interleave circuit 1, and outputs the received frame to the interleave circuit 1.
- the high-frequency unit 20 includes a physical layer processing circuit (PHYS) 13 that defines the physical connection of the LAN.
- PHYS physical layer processing circuit
- the interleave circuit 1 includes, as a transmission circuit, a frame division unit (FRMD) 2 as a data division unit that divides frame data as transmission data, and an error correction code that adds an error correction code to the divided data Input unit (CDR) 4, interleave processing unit (ITLV) 5, frame generation unit (FRMGN) 6, and MPEG-TS data input that performs interleaving on multiple divided data with error correction codes added Has a buffer (MPEGBUF) 3.
- MPEG-TS data is not particularly limited, but means transport stream data in an audio and video multiplexed format.
- the interleave circuit 1 includes, as a reception circuit, a frame analysis unit (FR MAL) 7 for received data, a ding interleave processing unit (DITLV) 8 for performing a ding interleave process for reproducing the plurality of divided data from the received data, and a division Using the error correction code included in the data It has an error correction unit (ECR) 9 that performs error correction processing, a frame combining unit (FRMC) 11 as a data combining unit that combines divided data that has undergone error correction processing, and an MPEG-TS data synchronization unit (MPEGSY) 10 .
- ECR error correction unit
- FRMC frame combining unit
- MPEGSY MPEG-TS data synchronization unit
- FIG. 2 shows the form of data in the transmission process.
- the transmission process will be described with reference to FIG.
- the first transmission target is MPEG-TS data16.
- the MPEG-TS data 16 has a fixed length of 188 bytes as shown in (2) of FIG.
- the buffer 3 is a buffer buffer for absorbing the speed difference between the input speed of the MPEG-TS data 16 and the error correction coding section that performs the next processing.
- data 22 is generated by adding 4-byte status information (STATUS) 22A to the MPEG-TS data 16 as shown in (3) of FIG.
- Status information 22 A for MPEG-TS data (MPEGTSD) 16 is “0008h”.
- an error correction code is generated by the error correction encoding unit 4 and data 24 is generated by adding a 16-byte error correction code (RSCD) 23 to the data 22 as shown in (4) of FIG.
- the error correction code (RSCD) 23 used here is an error correction code based on the Reed-Solomon encoding method.For example, the error detection code up to 8 bytes is detected and corrected for the generated 16-byte error correction code (RSCD) 23. Has the ability.
- the data 24 including the MPEG-TS data 16 as shown in (5) of FIG. 2 is subjected to an interleaving process in the interleaving unit 5 together with the data 24 including the divided data 21 of frame data described later.
- the data 24 is block data to be subjected to the interleaving process, and the data obtained by cutting the 208 block data 24 in bytes in the vertical direction in units of 208 bytes is interleaved.
- the processed block data is 25.
- the interleaved data 25 is assembled into MAC frame data in a frame format conforming to the IEEE802.11 standard as shown in (6) of FIG.
- the assembled MAC frame data is input to the IEEE802.11 MAC layer controller 12 and transmitted as radio waves via the IEEE802.11 physical layer processing circuit 13.
- the MAC frame data includes a MAC header 26, block data 25 after interleaving processing, and a block number (block No.) 27 of the block data 25.
- the second transmission target is frame data.
- the frame data (FRMD) 14 is input to the frame division unit 2, and the input frame data is, for example, 188 bytes as shown in (2) of FIG. Divided into divided data 21 for each.
- status information (STATUS) 22A indicating the position in the frame is divided at the time of division so that the divided data 21 can be combined later by the frame combining unit 11 on the receiving side. Appended to data 21.
- the frame data 14 is a multiple of 188 bytes, and status information to be added after the division is OOOlh (being the first divided data), OOOOh (middle divided data), 0002h (the last divided data) Or 0003h (that is, undivided data).
- the divided data is processed by the error correction encoding unit 4 in the same manner as the MPEG-TS data 16, and the same processing as described above is performed.
- FIG. 3 shows the data format in the reception process.
- the reception process will be described with reference to FIG.
- the received IEEE802.il-compliant MAC frame is input to the IEEE802.11 physical layer processing circuit 13 and input to the IEEE 802.11 frame analysis unit 7 via the IEEE802.il MAC layer controller 12.
- the frame structure of the MAC frame is as shown in (1) of FIG. 3, and includes a MAC header 26, a block number 27, and block data 25.
- the IEEE802.il frame analysis unit 7 removes the MAC header 26 from the MAC frame, and the dingtering unit 8 performs dingtery processing as shown in (2) of FIG. The details of the dingterive processing will be described later.
- the data 25 is the block data used for the dingterive processing, and the data obtained by cutting out 208 block data 25 in bytes in the vertical direction in units of 208 bytes. Later block data 24. This block data is illustrated in (3) of FIG. An error correction code 23 is added to the end of each of the reproduced plurality of block data. Next, the error correction unit 9 performs error correction using the 16-byte error correction code 23 in the data, and outputs 22 data shown in (4) of FIG. If the status information 22A in the output data is 0008h, the status data is transferred to the synchronization unit 10. If the status information 22A power 0000h, OOOlh, 0002h, 0003h is transferred to the frame connection 11 up to the data 22f.
- the data transferred to the synchronization unit 10 is output according to the necessary transfer rate as MPEG-TS data (MPEGTSD) 17 with the status information removed as shown in (5) of FIG.
- MPEGTSD MPEG-TS data
- the data 21 included in the data 22 transferred to the frame coupling unit 11 is the sequence of OOOlh (first), 0000h (intermediate), 00002h (final), 00003h (no harm U). According to the one-task information, it is combined into one frame as shown in (6) of FIG. 3 and output as frame data (FRMD) 15.
- the interleaving unit 5 accumulates 208 blocks of the block data 24 output from the error correction coding unit 4 as shown in (5) of FIG. As shown in Fig. 2 (5), the accumulation order is block data 24 ⁇ (4) _1 ⁇ , 24 ⁇ (4) -2 ⁇ , 24 ⁇ (4) _3 ⁇ , ..., 24 ⁇ ( 4) —accumulate in 208 ⁇ order.
- Block data 24 ⁇ (4) _n ⁇ means the nth block data of the block data indicated by (4) in FIG. After accumulation, the first byte of each block data 24 ⁇ (4) _1 ⁇ , 24 ⁇ (4) -2 ⁇ , 24 ⁇ (4) _3 ⁇ , ..., 24 ⁇ (4) -208 ⁇ Are read in order.
- the reading order is the vertical order of a, b, c, and 208, as shown in 24 of FIG.
- the data read 208 times is handled as one block data 25 and output to the next IEEE802.il frame generator.
- the 208 blocks are read in the vertical direction in the same way as the first byte.
- the interleaving process is a process of making an array in which a plurality of data 24 to which an error correction code is added is dispersed in units of a plurality of bits according to a predetermined rule.
- the dintarving unit 5 stores the data block 25 output from the IEEE 802.11 frame analysis unit 7 as shown in (2) of FIG.
- the accumulation order is stored in the position indicated by the block number information 27 based on the block number information 27 input from the IEEE802.il frame analysis unit 7. For example, if the block number information 27 is 2, it is stored at the position 25 ⁇ (1) -2 ⁇ .
- Block data 25 ⁇ (1) -2 ⁇ means the second block data of the block data shown in (2) of Fig. 3.
- the reading order is the vertical direction of a, b, c and 208 in 1-byte units.
- the data read 208 times is handled as one block data 24 and output to the next error correction unit 9.
- This process is referred to as a dintarib process.
- the dingtery process is a process in which a plurality of divided data 22 are defined according to a predetermined rule. The process of reproducing the plurality of pieces of divided data 22 from the received data 25 having an array dispersed in units of a plurality of bits according to
- the frame generation unit 6 will be described.
- the frame generation unit adds the MAC header 26 to the data 25 as shown in (6) of FIG. 2 to the data input from the interleaving unit 5.
- the block number 27 of the block data 25 input from the interleave unit 5 is also added. It is also possible to assemble a frame by combining a plurality of block data 25 input from the interleave unit 5.
- Block number 27 may be information on the block number of the first block data among a plurality of block data.
- FIG. 4 shows a transmission buffer circuit of the interleave unit 5.
- the interleaving unit 5 is a power for starting the interleaving process after accumulating 208 blocks of block data.
- a buffer circuit for transmitting block data (TBUF) 40, 41 By preparing these two storage buffers and using them alternately, it is possible to perform continuous interleaving. Since it takes time to divide the transmission data and add an error correction code until the transmission frame is formed by performing the interleaving process, the waiting time between the pair of transmission buffer circuits 40 and 41 is reduced. It can be used effectively and the data transmission processing efficiency can be improved.
- FIG. 5 shows a reception buffer circuit of the deinterleave unit 8.
- the dingerive unit 8 is a force for starting the dingtering process after accumulating 208 blocks of the block data 25.
- the receiving buffer circuit (RBUF) )
- RBUF receiving buffer circuit
- the interleave circuit 1 when a burst error occurs in radio transmission of data subjected to interleave processing, the error is distributed to a plurality of block data. In short, burst errors are apparently converted into random errors.
- the data size of a block in which an error correction code is added to the divided data is m bytes
- the distribution unit by interleaving is 1 byte
- the target of interleaving is n blocks
- the error correction capability of the divided data by the error correcting code is increased.
- 8 bytes When 8 bytes are used, a maximum of 8 block burst errors during transmission can be corrected by the error correction code on the receiving side.
- the wireless communication terminal transmission may be a transmission-only machine or a reception-only machine.
- the size of block data 25 for interleave processing is not limited to 208 bytes in accordance with the number of bytes when 1 block data 24 is 208 bytes. By aligning the data size with the horizontal data size, the dingtering process is simplified.
- the data unit for interleaving and dingtering is not limited to bytes (8 bits), and units such as words (16 bits) can also be adopted. Industrial applicability
- the present invention can be widely applied to error correction for transfer errors in transmission of wireless communication terminals such as a wireless LAN.
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN108521416A (zh) * | 2018-03-30 | 2018-09-11 | 上海仁童电子科技有限公司 | 一种ecn板卡 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06274425A (ja) * | 1993-03-17 | 1994-09-30 | Hitachi Ltd | ネットワークアダプタ装置 |
JPH09298526A (ja) * | 1996-03-07 | 1997-11-18 | Kokusai Denshin Denwa Co Ltd <Kdd> | データ通信における誤り制御方法及び装置 |
JP2003289293A (ja) * | 2002-03-28 | 2003-10-10 | Sony Corp | 無線通信装置および無線通信方法、記録媒体、無線通信システム、並びにプログラム |
-
2004
- 2004-08-05 WO PCT/JP2004/011247 patent/WO2006013629A1/ja active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06274425A (ja) * | 1993-03-17 | 1994-09-30 | Hitachi Ltd | ネットワークアダプタ装置 |
JPH09298526A (ja) * | 1996-03-07 | 1997-11-18 | Kokusai Denshin Denwa Co Ltd <Kdd> | データ通信における誤り制御方法及び装置 |
JP2003289293A (ja) * | 2002-03-28 | 2003-10-10 | Sony Corp | 無線通信装置および無線通信方法、記録媒体、無線通信システム、並びにプログラム |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108521416A (zh) * | 2018-03-30 | 2018-09-11 | 上海仁童电子科技有限公司 | 一种ecn板卡 |
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