Description
AUTOMATIC TEST DEVICE FOR ELECTRONIC IN¬ TERLOCKING SYSTEMS AND METHOD FOR
CONTROLLING THE SAME
Technical Field
[1] The present invention relates to an automatic test device for electronic interlocking systems and a method for controlling the automatic test device, and more particularly to an automatic test device for electronic interlocking systems and a method for controlling the automatic test device, wherein a switch matrix and a test jig are used to automatically connect a power supply, a meter and a load to an input or output card, which is to be tested, and then to automatically read a response signal from the card, thereby redicing the time and effort required for the test.
[2]
Background Art
[3] Trains generally run on preset tracks of railroads including an electric railroad, and travel directions or routes of running trains are set not in the trains but in ground-based equipment with reference to destinations or passing times of the trains.
[4] In the past, tracks must be manually changed on the spot when setting travel routes of trains. However, die to the development of control technologies, electric point- switches and an electric interlocking system for centrally controlling the electric point- switches are now used to easily and safely change and set travel routes of trains.
[5] Fig. 1 is a block diagram illustrating a conventional electronic interlocking system.
[6] As shown in Fig. 1, the conventional electronic interlocking systemincludes an in¬ terlocking logic unit 1, a communication modile 2, a display controller 3, a relay 4, a track circuit 5, a distribution switchboard 6, and a field device 7. The interlocking logic unit 1 performs interlocking, bus and input/output module control, com¬ munication with the outside, and system monitoring and switching. The com¬ munication modile 2 provides communication between the display controller 3 and the interlocking logic unit 1. The display controller 3 transfers driver control information to the interlocking logic unit 1 and displays operating states of the interlocking system. The relay 4 is turned on or off to operate the track circuit 5. The distribution switchboard 6 buffers a number of control signals output from the track circuit 5, and outputs the control signals to a number of field devices 7. According to the control
signals, each of the field devices 7 operates to control the operations of trains.
[7] As shown in Fig. 1, the conventional electronic interlocking system includes a number of parts and has a complicated configuration with a number of fractions. Thus, an overall test device for testing all the parts of the electronic interlocking system has not been implemented, but a test is individually performed for each of the fiinctions by inputting a separate signal to each of the parts of the system.
[8] Generally, in order to test an electronic interlocking system, a wire must be in¬ dividually connected to a test jig for each part of the electronic interlocking system, which takes along time. In addition, the test jig must be individually connected to ports of each part of the electronic interlocking system using wires, which requires a lot of human energy.
[9] There are typically two tests of the electronic interlocking system. One is for input cards of the electronic interlocking system, each card having a number of signal input ports (for example, 32 input ports), and the other is for output cards of the electronic interlocking system, each card having a number of signal output ports (for example, 32 output ports). In the input card test, each input card of the electronic interlocking system is generally subjected to: 1) an input response test in which a varying voltage is input to the input card, and an input voltage, to which the electronic interlocking system responds, is detected, 2) a current measurement test for determining power consumption of a corresponding input circuit, in which a rated voltage with an increasing current is input to the input card, and an input current value, at which the input circuit is activated, is measured, and 3) a reliability test in which a maximum allowed voltage is applied to the input card for 10 minutes and it is checked whether or not a malfiinction has occurred in the input card. In the output card test, each output card of the electronic interlocking system is generally subjected to a protection circuit operation test of the output circuit.
[10] Specifically, input and output cards are conventionally tested in the following manner. A test targetport is selected from input or output ports of each input or output card using a manually-operated switch box. Using an individual test jig individually manufactured to be suitable for the circuitry of input and output cards of each man¬ ufacturer, each input or output card to be tested is connected to a meter and a switch box to check operating states of the input or output card.
[11] For example, when an input card is tested, operating states of the input card are checked using a jig for connection with test target prodxts, and a power supply is controlled to provide a varying input voltage to the input card. An input voltage/
current, to which the input card responds, is measured using a multi-meter or an os¬ cilloscope. When an output card is tested, output states of the output card are checked using a jig for connection with test target products, and voltage-current characteristics thereof are measured using a multi-meter or an oscilloscope.
[12] The conventional input and output card test requires a lot of time, man-hours and materials, and thus high costs. Also, it is not possible to test all input and output ports of the input and output cards using a single jig. In addition, since test condition settings and measurements are manually performed, the output measurement accuracy is low.
[13]
Disclosure of Invention Technical Problem
[14] Therefore, the present invention has been made in view of the above problems, and it is an object of the present invention to provide an automatic test device for electronic interlocking systems and a method for controlling the automatic test device, which makes it possible to adjust an input voltage and current to be provided to a test target part of an electronic interlocking system to be tested, and also to adjust the size of a load connected to the test target part.
[15] It is another object of the present inventionto provide an automatic test device for electronic interlocking systems and a method for controlling the automatic test device, which makes it possible to check and record in real time operating states of an electronic interlocking system to be tested as an external signal input to the electronic interlocking system varies while the test is in progress.
[16] It is still another object of the present invention to provide an automatic test device for electronic interlocking systems and a method for controlling the automatic test device, in which the level of a current provided to an electronic interlocking system to be tested and the level of an operating voltage of the electronic interlocking system can be accurately measured by controlling a power supply and a load connected with the electronic interlocking system.
[17] It is yet another object of the present inventionto provide an automatic test device for electronic interlocking systems and a method for controlling the automatic test device, in which different types of cards used in an electronic interlocking system to be tested are connected to measurement equipment using a switch matrix, thereby allowing various types of cards used in the electronic interlocking systemto be auto¬ matically connected to measurement equipment using a single test jig without in-
strumental change so as to check the fiinctions of each card of the electronic in¬ terlocking system.
[18]
Technical Solution
[19] In accordance with an aspect of the present invention, the above and other objects can be accomplished by the provision of an automatic test device for electronic in¬ terlocking systems, the device comprising a switch matrix including a plurality of switches; a test jig for installing therein a test target card of an electronic interlocking system so that the test target card operates in the same manner as when the test target card is installed in the electronic interlocking system; a voltage/current meter for measuring a voltage/current of a corresponding port of the test target card connected to the test jig thrαgh the switch matrix; a load connected to the test jig thrαgh the switch matrix; and a control computer for controlling the switch matrix to connect each port of the test target card to both a power supply, which corresponds to the voltage/current meter, and the load, for varying the supply power to be provided to each port of the test target card, for reading and storing a response voltage and a response current from each port of the test target card as the supply power varies, and for varying power to be supplied from each port of the test target card to the load and measuring and storing an automatic cutoff voltage.
[20] Preferably, the test jig includes a VME rack having a VME bus for installing a test target card of an electronic interlocking system in the test jig in the same condition as when the test target card is installed in the electronic interlocking system and controlled by a controller of the electronic interlocking system. The test jig is connected to both the power supply and the load thrαgh the switch matrix so that various types of cards used in electronic interlocking systems can be tested using a single jig without instrumental change.
[21] Preferably, serial communication is performed between the control computer and the switch matrix, between the control computer and the test jig, between the control computer and the power supply, and between the control computer and the load.
[22] In accordance with another aspect of the present invention, there is provided a method for controlling an automatic test device for electronic interlocking systems, the device comprising a switch matrix, a test jig, a power supply, and a control computer, the method comprising the steps of: a) performing afirst input response test comprising the steps of: a-1) initializing the device when the device is powered on, setting a first port of an input card as a test target port, and controlling the switch matrix to connect
the power supply to the test target port of the input card; a-2) setting a supply voltage of the power supply to a first predetermined voltage, and applying the supply voltage to the test target port, and determining whether or not a response voltage has been generated from the test jig; a-3) if the response voltage has not been generated, increasing the supply voltage of the power supply by 0.1V, and applying the increased supply voltage to the test target port, and then returning to the step of determining whether or not the response voltage has been generated; a-4) if the response voltage has been generated, reading the response voltage and a corresponding response current, and storing the read response voltage and current in a memory; and a-5) repeating the steps a-1) to a-4) for each of second to last ports of the input card; b) performing a reliability test comprising the steps of: b-1) applying a maximum allowed voltage to the input card for 10 minutes; and b-2) determining whether or not a malfunction has occurred in the input card; and c) performing a second input response test comprising the steps of: c-1) setting the first port of the input card as a test target port and controlling the switch matrix to connect the power supply to the test target port of the input card; c-2) setting thesupply voltage of the power supply to a second predetermined voltage, and applying the supply voltage to the test target port, and de¬ termining whether or not a response voltage has been generated from the test jig; c-3) if the response voltage has not been generated, decreasing the supply voltage of the power supply by 0.1V, and applying the decreased supply voltage to the test target port, and then returning to the step of determining whether or not the response voltage has been generated; c-4) if the response voltage has been generated, reading the response voltage and a corresponding response current, and storing the read response voltage and current in the memory; and c-5) repeating the steps c-1) to c-4) for each of the second to last ports of the input card.
[23] Preferably, the reliabilitytest is performed by plugging a plurality of input cards into a rack of the test jig at the same time after the first input response test is performed for the input cards.
[24] In accordance with yet another aspect of the present invention, there is provided a method for controlling an automatic test device for electronic interlocking systems, the device comprising a switch matrix, a test jig, a power supply, and a control computer, the method comprising the steps of: a) initializing the device when the device is powered on, setting a first port of an output card as a test target port, and controlling switches of the switch matrix to connect the power supply to the test target port of the output card; b) setting a supply current of the power supply to a predetermined current,
providing the supply current to the test target port of the output card, and determining whether or not a voltage output from the test jig thrαgh the test target port has dropped to zero; c) if the voltage output from the test jig through the test target port has not dropped to zero, increasing the supply current of the power supply by 2OmA, providing the increased supply current to the test target port, and returning to the step of determining whether or notthe voltage output from the test jig through the test target port has dropped to zero; d) if the voltage output from the test jig through the test target port has dropped to zero with a supply current of the power supply provided to the test target port, measuring the supply current of the power supply as a cutoff current, reading the measured cutoff current value thrαgh a predetermined com¬ munication interface with a load connected to the test target port, and storing the read cutoff current value in a memory; and e) repeating the steps a) to d) for each of the second to last ports of the output card.
[25]
Advantageous Effects
[26] Input and output cards of an electronic interlocking system are automatically tested using a switch matrix and a test jig. Specifically, using the switch matrix and the test jig, a meter and a power supply are automatically connected to each of a number of input or output ports of an input or output card of the electronic interlocking system, and a response voltage or current signal generated from the input or output card in response to a voltage or current signal applied to the input or output card is auto¬ matically detected, thereby redxing the time and effort required to test the input and output cards.
[27]
Brief Description of the Drawings
[28] The above and other objects, features and other advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:
[29] Fig. 1 is a block diagram illustrating a conventional electronic interlocking system;
[30] Fig. 2 is a block diagram illustrating an automatic test device for electronic in¬ terlocking systems according to the present invention;
[31] Fig. 3 is a diagram illustrating how a load current is measured using a switch matrix according to the present invention
[32] Fig. 4 is a diagram illustrating on/off states of the switches of a switch matrix when
the automatic test device according to the present invention is used to test an input card of an electronic interlocking system;
[33] Fig. 5 is a diagram illustrating on/off states of the switches of a switch matrix when the automatic test device according to the present invention is used to test an output card of an electronic interlocking system;
[34] Figs. 6 and 7 are flow charts illustrating a method for testing an input card of an electronic interlocking system using the automatic test device according to the present invention; and
[35] Fig. 8 is a flow chart illustrating a method for testing an output card of an electronic interlocking system using the automatic test device according to the present invention.
[36]
Best Mode for Carrying Out the Invention
[37] Preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings.
[38] Fig. 2 is a block diagram of an automatic test device for electronic interlocking systems according to the present invention.
[39] As shown in Fig. 2, the automatic test device comprises a control computer 11, a switch matrix 12, a test jig 13, a power supply 14, and a load 15. The switch matrix 12 includes a plurality of switches. The test jig 13 installs therein a test target card of an electronic interlocking system so that the test target card operates in the same manner as when the test target card is installed in the electronic interlocking system. Specifically, a test target card is plugged into the test jig 13, which connects a plurality of ports of the test target card to columns of the switch matrix 12. The power supply 14 supplies power to the ports of the test target card throtgh the switch matrix 12, and displays the voltage and current values of the power. The load 15 is connected to output ports of the test target card throtgh the switch matrix 12. The control computer 11 controls the operations of the elements of the automatic test device.
[40] As shown in Fig. 3, the switch matrix 12 includes a plurality of switches rr
$=1,2,3,..., j=l,2,3,...) arranged in the form of a lattice or a matrix. The switches rr are connected between a plurality ofhoriiDntal signal lines 21, 22 and 23, which corresponds to rows of the matrix, and a plurality of vertical signal lines 24, 25 and 26, which corresponds to columns thereof, respectively, at positions where the horiz)ntal signal lines 21 to 23 and the vertical signal lines 24 to 26 cross.
[41] The horiiDntal signal lines 21 to 23 are used as inputs of the switch matrix 12 and the vertical signal lines 24 to 26 are used as outputs thereof. The switches rr are
normally off, and are turned on when receiving corresponding control signals from the control computer 11. [42] For example, if the two switches r and r are turned on as shown in Fig. 3, a load
12 21
29 connected between the two vertical signal lines 24 and 25 receive power from a power supply 27 throtgh the horixHital signal line 21, and is connected to a current meter 28 throtgh the horixHital signal line 22. Accordingly, a current flowing throtgh the load 29 can be measured by reading the current meter 28.
[43] Fig. 4 is a diagram illustrating on/off states of the switches of a switch matrix when the automatic test device according to the present invention is used to test an input card of an electronic interlocking system.
[44] The test jig 13, which includes a VME rack having a VME bus, is connected to both the power supply 14 and the load 15 throtgh the switch matrix 12. This allows various types of cards used in electronic interlocking systems to be tested using a single jig without instrumental change. Input or output cards are plugged into the VME rack of the test jig 13 so that input or output ports of the input or output cards are connected to the switch matrix 12 throtgh the test jig 13. As shown in Fig. 4, a Vcc terminal of the power supply 14 is connected to the first row of the switch matrix 12, and a ground terminal thereof is connected to the second row thereof. A positive terminal (+) of the load 15 is connected to the third row of the switch matrix 12, and a negative terminal (-) thereof is connected to the fourth row of the switch matrix 15.
[45] A first terminal (A ) of a first port (Ibrt 0) of an input card 16 is connected to the o first column of the switch matrix 12, a second terminal (B ) of the first port (Ibrt 0) is o connected to the second column of the switch matrix 12, and a third terminal (C ) of o the first port (Ibrt 0) is connected to the third column of the switch matrix 12. Likewise, a first terminal (A ) of a second port (Ibrt 1) of the input card 16 is connected to the fourth column of the switch matrix 12, a second terminal (B ) of the i second port (Ibrt 1) is connected to the fifth column of the switch matrix 12, and a third terminal (C ) of the second port (Ibrt 1) is connected to the sixth column of the switch matrix 12, and so on. Finally, a first terminal (A ) of a 32nd port (Ibrt 31) of the input card 16 is connected to the 94th column of the switch matrix 12, a second terminal (B ) of the 32nd port (Ibrt 31) is connected to the 95th column of the switch matrix 12, and a third terminal (C ) of the 32nd port (Ibrt 31) is connected to the 96th column of the switch matrix 12.
[46] First, for the input response test of the first port (Ibrt 0) of the input card 16, the control computer 11 controls the switch matrix 12 throtgh an RS 485 communication
link to turn on a switch in the 2nd row and 1st column of the matrix switch 12, thereby connecting the ground terminal of the power supply 14 to the first terminal A of the o first port (Ibrt 0) of the input card 16, and also to turn on a switch in the 1st row and 3rd column, thereby connecting the V terminal of the power supply 14 to the third terminal C of the first port (Ibrt 0) of the input card 16. o
[47] By turning on the switch in the 2nd row and 1st column and the switch in the 1st row and 3rd row of the switch matrix 12 in this manner, the control computer 11 connects the power supply 14 to the first port (Ibrt 0) of the input card 16. The control computer 11 initially sets a supply of the power supply 14 to "V " thrαgh a com¬ munication interface (GPIB), and applies the set voltage to the first port (Ibrt 0) of the input card 16 while gradually increasing the supply voltage in increments of 0.1 V.
[48] If the input card 16 outputs a response voltage (V ), rising from "low" to "high", in
LH response to the gradually increasing voltage applied to the first port (Ibrt 0) of the input card 16, the control computer 11 reads the response voltage (V ) and a cor-
LH responding response current (I ) from the test jig 13 through an RS 232 com-
LH munication link, and stores the read voltage and current values in a memory.The control computer 11 then turns off the switch in the 2nd row and 1st column of the matrix switch 12 and the switch in the 1st row and 3rd column, thereby completing the input response test for the first port (Ibrt 0) of the input card 16.
[49] Next, for the input response test of the second port (Ibrt 1) of the input card 16, the control computer 11 controls the switch matrix 12 through the RS 485 communication link to turn on a switch in the 2nd row and 4th column of the matrix switch 12, thereby connecting the ground terminal of the power supply 14 to the first terminal A of the second port (Ibrt 1) of the input card 16, and also to turn on a switch in the 1st row and 6th column, thereby connecting the Vcc terminalof the power supply 14 to the third terminal (C ) of the second port (Ibrt 1) of the input card 16.
[50] Wth the power supply 14 connected to the second port (Ibrt 1) of the input card
16, the control computer 11 reads a response voltage (V ) and a response current (I )
LH LH from the second port (Ibrt 1) while gradually increasing the supply voltage to be applied to the second port (Ibrt 1) from V in increments of 0.1V. The control computer 11 stores the read voltage and current values in the memory, and then turns off the switch in the 2nd row and4th column of the matrix switch 12 and the switch in the 1st row and 6th column, thereby completing the input response test for the second port (Ibrt 1) of the input card 16. In the same manner, the control computer 11 then performs the input response test for the third to 32nd ports (Ibrt 2 to 31). The control
computer 11 then performs a reliabilitytest of the input card, in which it applies a maximum allowed voltage (for example, 30V) to the input card for 10 minutes and then checks whether or not a malfiinction has occurred in the input card.
[51] However, if the reliability test is performed for a single input card for 10 minutes in this manner after the input response test is performed, the test for the next input card must be delayed more than 10 minutes, so that it takes too long to complete the test of all input cards of the electronic interlocking system.
[52] According to the present invention, after the input response test is performed for 10 input cards, the 10 input cards are plugged into the rack of the test jig 13 and the re¬ liability test is performed for the 10 input cards at the same time. If the reliability test is performed for the 10 input cards at the same time, it takes only one minute to complete the reliability test per input card, thereby significantly reducing the time required to complete the test of all input cards of the electronic interlocking system.
[53] After the reliability test is completed, the control computer 11 performs a second input response test of the input card 16 in the following manner. The control computer 11 detects a response voltage (V ) and a response current (I ) for each input port
HL HL while gradually decreasing a supply voltage to be applied to the input card from an initially set voltage "V " (for example, 24V) in increments of 0.1V. [54] Next, an output card test for checking operating states of the output card is performed in the followingmanner. The output card is plugged into the rack of the test jig 13, and the power supply 14 supplies a rated output voltage (for example, +24V) and a rated output current (for example, 0.5A) to the output card. With an output voltage of the output card applied to the load 15, the supply current of the power supply 14 is gradually increased in increments of 2OmA. When the output voltage of the output card applied to the load 15 drops to zero with a supply current of the power supply 14 provided to the output card, the supply current is detected as a cutoff current I , thereby completing a protection circuit operation test. off
[55] Fig. 5 is a diagram illustrating on/off states of the switches of a switch matrix when the automatic test device according to the present invention is used to test an output card of an electronic interlocking system.
[56] First, for the output response test of a first port (Ibrt 0) of an output card 17, a control computer 11 controls a switch matrix 12 to turn on a switch in the 1st row and 1st column of the matrix switch 12, thereby connecting a V terminal of a power supply 14 to a first terminal A of the first port (Ibrt 0) of the output card 17, and also to turn on a switch in the 2nd row and 2nd column and a switch in the 4th row and 2nd
column, thereby connecting a ground terminalof the power supply 14 and a ground terminal of a load 15 to a second terminal B of the first port (Ibrt 0) of the output card o
17, and fiirther to turn on a switch in the 3rd row and 3rd column, thereby connecting an output voltage of a third terminal C of the first port (Ibrt 0) of the output card 17 to a V terminal of the load 15.
[57] Wth the connection as shown in Fig. 5, the control computer 11 controls the power supply 14 through a communication interface (GPIB) to gradually increase a supply current provided from the power supply 14 from Il in increments of 2OmA, and provides the supply current to the first terminal (A ) of the first port (Ibrt 0). When a voltage applied to the load 15 drops to zero with a supply current of the power supply 14 provided to the first port (Ibrt 0), the control computer 11 measures the supply current of the power supply 14 as a cutoff current I , and reads the cutoff current off value through a communication interface (GPIB) with the load 15, and stores the read cutoff current value in an internal memory of the control computer 11. This test is performed on the remaining ports (Port 1 to 31) of the output card 17 in the same manner, thereby completing a protection circuit operation test for the output card 17.
[58] Figs. 6 and 7 are flow charts illustrating a method for testing an input card of an electronic interlocking system using the automatic test device according to the present invention.
[59] When the automatic test device is powered on, the control computer, the control computer 11 initializes the components of the automatic test device (i.e., the monitor, the communication interface (GPIB), the RS232 and RS485 communication links, the power supply, the meter, and the test jig) (Sl). The control computer 11 then controls switches of the switch matrix 12 to connect the power supply 14 to the first port (Port 0) of the input card 16, thereby setting the first port (Port 0) as a test target port (S2).
[60] The control computer 11 sets a supply voltage of the power supply 14 to "V " and applies the supply voltage to the test target port, i.e., the first port (Port 0) (S3), and then checks whether or not a response voltage (V ) has been generated from a
LH controller of the test jig 13 (S4). [61] If no response voltage (V ) has been generated, the control computer 11 increases
LH the supply voltage by 0.1V and applies the increased supply voltage to the first port (Port 0) (S5), and returns to step S4 to check whether or not a response voltage (V )
LH has been generated. [62] If the response voltage (V ) has been generated, the control computer 11 reads the
LH response voltage (V ) and a corresponding response current (I ) and stores the read
LH LH
voltage and current values in a memory (S6). The control computer 11 then deter¬ mines whether or not the current port is the last port (Ibrt 31) (S7). If the current port is not the last port, the control computer 11 returns to step S2 to set the next port (for example, Ibrt 1) as a test target port and repeats the input response test for the next port.
[63] If the current target is the last port at step S7, the control computer 11 then performs a reliabilitytest of the input card 16, in which it applies a maximum allowed voltage (for example, 30V) to the input card for 10 minutes and then checks whether or not a malfunction has occurred in the input card (S8). The control computer 11 then performs a second input response test (S9 to S 14).
[64] A detailed description of the second input response test is omitted herein since it is performed in the same manner as the first input response test, except that the control computer 11 detects a response voltage (V ) and a response current (I ) for each input port while gradually decreasing a supply voltage to be applied to the input card from an initially set voltage "V " in increments of 0.1V (S12).
2
[65] Fig. 8 is a flow chart illustrating a method for testing an output card of an electronic interlocking system using the automatic test device according to the present invention.
[66] When the automatic test device is powered on, the control computer 11 initializes the components of the automatic test device (S21). The control computer 11 then controls the switch matrix 12 to connect the power supply 14 to the first port (Ibrt 0) of the input card 16, thereby setting the first port (Ibrt 0) as a test target port (S22).
[67] The control computer 11 sets a supply current of the power supply 14 to II, and provides the supply current to the test target port (i.e., the first port (Ibrt O)) (S23). The control computer 11 checks whether or nota voltage of the third terminal (C ) of the first port (Ibrt 0), output from a controller of the test jig 13, has dropped to zero (S24).
[68] If the voltage of the third terminal (C ) of the first port (Ibrt 0) has not dropped to o zero, the control computer 11 increases the supply current of the power supply 14 by 2OmA and applies the increased current to the first port (Ibrt 0) (S25), and returns to step S24 to check whether or not the voltage of the third terminal (C ) has dropped to zero.
[69] When the voltage of the third terminal (C ) of the first port (Ibrt 0) drops to zero, o the control computer 11 measures a corresponding supply current of the power supply 14 as a cutoff current I , and reads the cutoff current value through a communication off interface (GPIB) with the load 15, and stores the read cutoff current value in an internal memory of the control computer 11 (S26). The control computer 11 then
determines whether or not the current port is the last port (Ibrt 31) (S27).
[70] If the current port is the last port, the control computer 11 returns to step S22 to set the next port (for example, Ibrt 1) as a test target port and repeats the output response test for the next port. If the current port is the last port, the output card test is completed.
[71] An automatic test device for electronic interlocking systems and a method for controlling the automatic test device according to the present inventionhave the following features and advantages. Input and output cards of an electronic interlocking system are automatically tested using a switch matrix and a test jig. Specifically, using the switch matrix and the test jig, a meter and a power supply are automatically connected to each of a number of input or output ports of an input or output card of the electronic interlocking system, and a response voltage or current signal generated from the input or output card in response to a voltage or current signal applied to the input or output card is automatically detected, thereby redxing the time and effort required to test the input and output cards.
[72]
[73] Althαgh the preferred embodiments of the present invention have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modi¬ fications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims. Industrial Applicability
[74] The present invention relates toan automatic test device for electronic interlocking systems and a method for controlling the automatic test device, and more particularly to an automatic test device for electronic interlocking systems and a method for controlling the automatic test device, wherein a switch matrix and a test jig are used to automatically connecta power supply, a meter and a load to an input or output card, which is to be tested, and then to automatically read a response signal from the card, thereby redxing the time and effort required for the test.
[75]