WO2005101470A1 - 三次元微細加工方法及び高密度三次元微細構造 - Google Patents
三次元微細加工方法及び高密度三次元微細構造 Download PDFInfo
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- WO2005101470A1 WO2005101470A1 PCT/JP2004/005262 JP2004005262W WO2005101470A1 WO 2005101470 A1 WO2005101470 A1 WO 2005101470A1 JP 2004005262 W JP2004005262 W JP 2004005262W WO 2005101470 A1 WO2005101470 A1 WO 2005101470A1
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- electron beam
- compound semiconductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02395—Arsenides
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y20/00—Nanooptics, e.g. quantum optics or photonic crystals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/02546—Arsenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02639—Preparation of substrate for selective deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02639—Preparation of substrate for selective deposition
- H01L21/02642—Mask materials other than SiO2 or SiN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02392—Phosphides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
- H01S5/341—Structures having reduced dimensionality, e.g. quantum wires
Definitions
- the present invention provides an Al x G a y I n! _ X _ y A s z in which an m-v group compound semiconductor crystal is epitaxially grown on a compound semiconductor substrate by a molecular beam epitaxy method.
- the present invention relates to a three-dimensional microfabrication method for a PJ_z layer surface.
- proXimity effect Another problem in electron beam lithography is the effect of secondary electron scattering from within the resist and substrate as well as the incident electrons (called the proXimity effect). Due to this effect, a region considerably larger than the beam diameter of the incident electron beam becomes a reaction region for the resist. This effect determines the resolution between adjacent drawing lines. Many efforts have been made to reduce the proXimity effect, one example of which is to reduce the effective beam diameter by using a multilayer resist to control the refractive index of an electron beam penetrating the substrate. However, at present, the proXimit effect (resist reaction area larger than the beam diameter) is a major limitation on miniaturization.
- Patent Document 1 the diffusion length of surface atoms is long due to the use of the MOCVD method, so that the selective growth of m-V group compound semiconductors on a substrate having a high density arrangement can be sufficiently performed. Therefore, it is difficult to increase the density of the substrate. Also, it is not possible to make uniform the thickness of each crystal grown in the crystal growth direction on the order of nanometers.
- an object of the present invention is to provide a three-dimensional circuit in which a circuit pattern in which the density of a substrate can be easily increased and the crystal film thickness in the crystal growth direction is uniform in the nano order is formed on the spot. It is to provide a microfabrication method and a high-density three-dimensional microstructure. Disclosure of the invention
- the three-dimensional microfabrication method of the present invention includes a substrate made of an m-V compound semiconductor,
- a natural oxide film formed on the substrate surface is selectively replaced with an m-group oxide or an m-group oxide is generated. Part substituted with the m-group oxide
- in-V group compound semiconductor crystals can be selectively grown.
- the high-density three-dimensional microstructure of the present invention uses the above-described three-dimensional microfabrication method to convert the mV group compound semiconductor crystal into a part other than the in-group oxide-substituted part or the m-group oxide-substituted part. It is preferable that the substrate be manufactured by selectively growing the region.
- a chemically stable m-group oxide with high crystallinity is formed. Since it can be desorbed by heat, any circuit pattern on the surface can be easily processed. At this time, even if the circuit pattern has a high-density arrangement, the growth conditions of the MBE method are controlled to control the surface atom diffusion length, thereby facilitating the selective growth of the group III-V compound semiconductor crystal.
- FIG. 1 is a diagram for explaining an embodiment of a three-dimensional microfabrication method according to the present invention.
- FIG. 2 is a view showing an observation photograph by AFM of the substrate surface in Example 1 of the two-dimensional microfabrication method according to the present invention.
- FIG. 3 shows the results of AFM on the substrate surface in Example 2 of the three-dimensional microfabrication method according to the present invention.
- FIG. 4 is a view showing an observation photograph by AFM of the substrate surface in Example 3 of the three-dimensional microfabrication method according to the present invention.
- reference numeral 1 denotes a GaAs layer
- 2 denotes a natural oxide film on the surface of As 2 O 3 or the like which is naturally formed on the surface of the GaAs layer 1.
- the electron beam irradiation is performed in a single line mode with an acceleration voltage of 10 to 50 kV and a linear dose range of 10 nC / cm to 1 ⁇ C / cm.
- the surface of the layer 1 is patterned by an electron beam so as to have a predetermined circuit pattern, an arbitrary circuit pattern can be processed on the surface of the GaAs layer 1.
- GaAs is selectively grown on the GaAs layer 1 on the side from which the surface oxide film 2 has been removed by the MBE method.
- the GaAs crystal growth temperature is set to 500 to 650 ° C
- the Ga atomic growth direction is adjusted to the plane orientation (100) of the GaAs layer 1
- the Ga atomic and as 4 5 to 20 a F v / / F m is the flux ratio of the molecules
- the growth rate is calculated by using the thickness of the GaAs grown layer as about the electron beam writing interval.
- the GaAs crystal growth rate is adjusted by using a reflection high-speed electron beam diffractometer (hereinafter referred to as RHEED) for in-situ observation of the surface state of the sample thin film or substrate.
- RHEED reflection high-speed electron beam diffractometer
- the thickness of the GaAs crystal 5 can be controlled by adjusting the GaAs crystal growth time. By such control, it is possible to fabricate a substrate having a high density and a constant B thickness of each GaAs grown crystal 5 (see FIG. 1 (c)).
- the effective line dose ultimately G a 2 0 3 3 electron beam is 50n C / cm will not be sublimated during growth, if the line dose amount is greater than G a It is thought that it will be covered by the As grown crystal 5.
- the growth conditions of the MBE method are controlled to control the surface atom diffusion length, so that the selective growth of the GaAs crystal can be easily performed, and The crystal thickness in the crystal growth direction can be made uniform on a nano-order.
- the temperature is 300 to 650 ° C. 20
- the F v ZF m is box ratio, the m-V compound semiconductor crystal growth rate 0. l SMLZs ec (molecular layer Z s: Growth rate conversion for two-dimensional thin film), the m-V group compound
- the ⁇ -V group compound semiconductor crystal can be selectively grown by setting the thickness of the semiconductor crystal growth layer to about the drawing interval of the electron beam. At this time, it is preferable that the width of the m-group oxide portion is controlled to be equal to or smaller than the diameter of the irradiated electron beam. It is still preferable to form a three-dimensional microstructure having a plurality of types of three-dimensional shapes by controlling only the electron beam irradiation interval.
- the irradiation interval of the electron beam refers to a distance in which the electron beam is irradiated in a single line mode and is translated to a next irradiation line.
- the above three-dimensional microfabrication method be performed collectively in a single ultrahigh vacuum environment.
- the growth can be controlled.
- the shape of the group III-V compound semiconductor crystal grown in the minute area on the substrate surrounded by the drawing lines is reduced to the minute size.
- it depends on the area in the area, the crystal orientation of the substrate, and the crystal growth film thickness.
- the group IV compound semiconductor is any of GaAs, InAs, and InP.
- a high-density three-dimensional microstructure including InAs, InP, and the like in which the distance between adjacent three-dimensional microstructures is equal to or smaller than a submicron can be formed.
- a 1 x Ga y I r ⁇ - is naturally formed in the x _ y As ⁇ ⁇ z ⁇ - V group containing of compound semiconductors such as layer compound semiconductor crystal surface Natural acid
- a chemically stable Group III oxide with high crystallinity is formed, and the natural oxide film portion other than the Group III oxide Since it can be desorbed by heat, an arbitrary circuit pattern can be easily processed on the surface.
- the selective growth of DI-V compound semiconductor crystals can be easily performed by controlling the growth conditions of the MBE method and controlling the surface atom diffusion length.
- the resist sensitivity to the molecular beam epitaxy growth method using a solid raw material in the subsequent process is generally high as high resolution lithography. It has the same sensitivity as the organic resist PMMA used, and has high sensitivity and resolution even among inorganic resists.Therefore, this is a problem when using inorganic resists. Throughput can be greatly improved.
- the region of the native oxide film that is modified by the electron beam method is determined by the incident electron beam (primary electron) and the scattered electron (secondary electron) in the thin film.
- the selectivity of the growth is only for the high energy region of the primary electrons. And control of the structure below the electron beam diameter becomes possible.
- the present invention having these effects makes it possible to realize useful elements utilizing various quantum device characteristics, for example, photonic crystals, quantum wires, quantum boxes, diffraction gratings, semiconductor laser structures, and micromachines.
- the electron beam irradiation on the surface of the GaAs layer in each of the following examples A s layer A are naturally formed on the surface s 2 0 accelerating voltage 3 like toward the surface of the surface oxide film of the electron beam focused to 0. 1 mu m of the electron beam diameter in vacuo 30 k V, current amount 1 X 10- 8 a, was carried out under the conditions of the line dose 40 NCZ cm.
- GaAs was used as the grown crystal in each example, and the GaAs crystal growth rate was measured and controlled using RHEED.
- the crystal growth conditions of the MBE method on the surface of the GaAs layer after the irradiation with the electron beam in the [1-110] direction of the (100) GaAs layer 1 at the irradiation interval of 1.1 ⁇ were determined.
- the GaAs crystal growth temperature is 5.80 ° C
- the flux ratio between Ga atoms and As 4 molecules is F As / F Ga 10
- the GaAs crystal growth rate is 0.2 ML / s.ec (molecular layer / sec. : Growth rate conversion for two-dimensional thin film)
- GaAs crystal growth time was 20 min, and the substrate was fabricated.
- the substrate thus manufactured was used as a sample of Example 1.
- the crystal growth conditions of the E method are as follows: the GaAs crystal growth temperature is 580 ° C, the flux ratio between Ga atoms and As 4 molecules is F As / F Ga 10, and the GaAs crystal growth rate is 0.2 ML / sec ( Substrates were fabricated with a molecular layer of Z seconds: a growth rate conversion for a two-dimensional thin film) and a GaAs crystal growth time of 20 min. The substrate manufactured in this manner was used as a sample of Example 2. -(Example 3)
- the GaAs crystal growth temperature was 580 ° C
- the flux ratio between atoms and As 4 molecules was F As / F Ga 10
- the GaAs crystal growth rate was A substrate was prepared with a temperature of 0.2 ML / sec (molecular layer Z second: a growth rate conversion for a two-dimensional thin film) and a GaAs crystal growth time of 20 min.
- the substrate manufactured in this manner was used as a sample of Example 3.
- FIGS. 2 to 4 show photographs of the surfaces of the samples of Examples 1 to 3 observed with an atomic force microscope (hereinafter, referred to as AFM).
- AFM atomic force microscope
- each of the patterns formed as described above functions as a negative mask for growth, and that a three-dimensional structure is directly formed selectively in the non-irradiated area of the electron beam.
- One three-dimensional structural unit is composed of stable crystal facets and is flat at the atomic level. Also, more of the growth from these results the modified region to G a 2 0 3 by beam lithography of an electron beam is applied, it can be seen which is smaller as kills with negligible with respect to the electron beam diameter.
- An arbitrary circuit pattern can be easily processed with good reproducibility by drawing an electron beam on the surface of the GaAs layer so as to have a predetermined circuit pattern during electron beam irradiation. This makes it possible to apply not only to semiconductor devices but also to wavelength discrimination devices, micromachining, microfabrication of photonic crystal and microcomponents, quantum wires and quantum boxes.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
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- Nanotechnology (AREA)
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Abstract
Description
Claims
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB2004800433163A CN100449691C (zh) | 2004-04-13 | 2004-04-13 | 三维微制造方法及高密度三维精细结构 |
CA002568789A CA2568789A1 (en) | 2004-04-13 | 2004-04-13 | Method of three-dimensional microfabrication and high-density three-dimensional fine structure |
US11/578,034 US7432176B2 (en) | 2004-04-13 | 2004-04-13 | Method of three-dimensional microfabrication and high-density three-dimentional fine structure |
PCT/JP2004/005262 WO2005101470A1 (ja) | 2004-04-13 | 2004-04-13 | 三次元微細加工方法及び高密度三次元微細構造 |
EP04727145A EP1739728A4 (en) | 2004-04-13 | 2004-04-13 | METHOD FOR THREE-DIMENSIONAL MICRO-PRODUCTION AND HIGH-DENSITY THREE-DIMENSIONAL FINE STRUCTURE |
KR1020067023782A KR101026507B1 (ko) | 2004-04-13 | 2004-04-13 | 삼차원 미세 가공 방법 및 고밀도 삼차원 미세 구조 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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PCT/JP2004/005262 WO2005101470A1 (ja) | 2004-04-13 | 2004-04-13 | 三次元微細加工方法及び高密度三次元微細構造 |
Publications (1)
Publication Number | Publication Date |
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WO2005101470A1 true WO2005101470A1 (ja) | 2005-10-27 |
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Application Number | Title | Priority Date | Filing Date |
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PCT/JP2004/005262 WO2005101470A1 (ja) | 2004-04-13 | 2004-04-13 | 三次元微細加工方法及び高密度三次元微細構造 |
Country Status (6)
Country | Link |
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US (1) | US7432176B2 (ja) |
EP (1) | EP1739728A4 (ja) |
KR (1) | KR101026507B1 (ja) |
CN (1) | CN100449691C (ja) |
CA (1) | CA2568789A1 (ja) |
WO (1) | WO2005101470A1 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN102107847B (zh) * | 2009-12-23 | 2013-01-16 | 中国科学院物理研究所 | 一种制备三维微纳器件的方法 |
CN102092675B (zh) * | 2011-01-14 | 2013-11-27 | 中国科学院物理研究所 | 一种自掩模单结多端三维纳米结构的制备方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03192719A (ja) * | 1989-12-22 | 1991-08-22 | Hikari Gijutsu Kenkyu Kaihatsu Kk | 化合物半導体結晶成長法 |
JPH08172053A (ja) | 1994-12-19 | 1996-07-02 | Sony Corp | 結晶成長法 |
JPH08264446A (ja) * | 1995-03-22 | 1996-10-11 | Dainippon Printing Co Ltd | ガリウム砒素基板における選択的結晶成長方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6265329B1 (en) * | 1998-03-09 | 2001-07-24 | Motorola, Inc. | Quantum deposition distribution control |
US20030011515A1 (en) * | 2001-07-16 | 2003-01-16 | Motorola, Inc. | Apparatus for effecting transfer of electromagnetic energy |
US7348222B2 (en) * | 2003-06-30 | 2008-03-25 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing a thin film transistor and method for manufacturing a semiconductor device |
-
2004
- 2004-04-13 WO PCT/JP2004/005262 patent/WO2005101470A1/ja active Application Filing
- 2004-04-13 CA CA002568789A patent/CA2568789A1/en not_active Abandoned
- 2004-04-13 KR KR1020067023782A patent/KR101026507B1/ko not_active IP Right Cessation
- 2004-04-13 US US11/578,034 patent/US7432176B2/en not_active Expired - Fee Related
- 2004-04-13 EP EP04727145A patent/EP1739728A4/en not_active Withdrawn
- 2004-04-13 CN CNB2004800433163A patent/CN100449691C/zh not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03192719A (ja) * | 1989-12-22 | 1991-08-22 | Hikari Gijutsu Kenkyu Kaihatsu Kk | 化合物半導体結晶成長法 |
JPH08172053A (ja) | 1994-12-19 | 1996-07-02 | Sony Corp | 結晶成長法 |
JPH08264446A (ja) * | 1995-03-22 | 1996-10-11 | Dainippon Printing Co Ltd | ガリウム砒素基板における選択的結晶成長方法 |
Non-Patent Citations (2)
Title |
---|
LOPEZ ET AL., SOLID-STATE ELECTRONICS, vol. 40, no. 1-8, 1996, pages 627 - 631 |
See also references of EP1739728A4 |
Also Published As
Publication number | Publication date |
---|---|
US7432176B2 (en) | 2008-10-07 |
KR101026507B1 (ko) | 2011-04-01 |
CA2568789A1 (en) | 2005-10-27 |
CN100449691C (zh) | 2009-01-07 |
EP1739728A1 (en) | 2007-01-03 |
CN1969374A (zh) | 2007-05-23 |
EP1739728A4 (en) | 2011-06-22 |
KR20070061482A (ko) | 2007-06-13 |
US20070232029A1 (en) | 2007-10-04 |
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