WO2005070178A2

WO2005070178A2 - Test result marking of electronic packages

Info

Publication number: WO2005070178A2
Application number: PCT/US2005/000941
Authority: WO
Inventors: Patrick B. Cochran; Zhi-Gang Bai; Lu-Xin Cao; Wai Wong Chow; Gary J. Kovar
Original assignee: Freescale Semiconductor, Inc.
Priority date: 2004-01-13
Filing date: 2005-01-12
Publication date: 2005-08-04
Also published as: WO2005070178A3; CN1641852A

Abstract

A number of electronic die are attached to an interconnect structure (e.g., a lead frame, a substrate, a panel, or a strip). The die are encapsulated to provide a number of unsingulated packages of an overall package assembly. The unsingulated packages are then tested, and test results for each package are automatically marked on encapsulant corresponding to the package. The packages are then singulated after the automated machine marking, and sorted according to the markings.

Description

TEST RESULT MARKING OF ELECTRONIC PACKAGES

BACKGROUND

Field

[O001] The present invention relates to packaging of electronics, and, more particularly, to manufacturing packaged electronics including testing and marking of the electronic packages.

Related Art

[O002] As the semiconductor industry evolves, devices continually become smaller. This continuing evolution leads to very small packages which become increasingly difficult to handle and time consuming to test. Device package technologies have progressed from discrete packaging for individual devices to packaging many devices at one time in a single format.

[OO03] One of the issues raised by this industry development is how best to test such devices which are manufactured using the combined, multi-package format. Typically, electronic packages are tested after they have been singulated so that there is no need to track test results with electronic packages of a multi-package assembly.

[OO04] It would be advantageous, however, to test individual devices while such devices are still part of a multi-device assembly. In order to perform testing of individual devices packaged together, the test results must be tracked in unique correspondence with the tested packages. One technique involves using an integrated package assembly test and singulation line which stores test results to a server which in turn maintains a correspondence between the devices under test and the test results from test to singulation to sorting. Another technique also uses a server to store the results, but implements a "smart saw" which scans a panel serial number, downloads test results from the server for devices on the identified panel, and saws and sorts the devices accordingly.

[0005] Such methods can be very expensive. Moreover, such methods can be quite inflexible. For example, only one test or an insufficient number of tests may be run in such integrated, server-based systems before singulation occurs. If repeated burn-in tests at different temperatures are required, the correspondence between device and test results can often not be maintained between test runs without adversely affecting the schedule of the test line.

[0006] Accordingly, a need exists for systems and techniques for effectively testing multiple electronic packages prior to singulation from a package assembly into individual electronic packages which do not require relatively excessive investments in new test and packaging equipment (such as "smart saws") and which are more flexible in allowing multi- insert testing and delayed retesting of devices.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The present invention may be better understood, and its numerous objects, features, and advantages made apparent to those skilled in the art, by referencing the accompanying drawings.

[0008] Figure 1 is a flow chart illustrating a method for manufacturing electronic packages including testing the electronic packages and marking test results thereon.

[0009] Figure 2 is a block diagram illustrating a system for testing electronic packages and marking test results thereon in accordance with the method of Figure 1.

[0010] Figure 3 is a perspective drawing illustrating a panel of electronic packages configured for testing according to the method of Figure 1.

[0011] The use of the same reference symbols in different drawings indicates similar or identical items. Elements in the figures are illustrated for simplicity and clarity, and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help improve the understanding of the embodiments of the present invention.

DETAILED DESCRIPTION

[0012] The following discussion is intended to provide a detailed description of at least one example of the invention and should not be taken to be limiting of the invention itself. Rather, any number of variations may fall within the scope of the invention which is properly defined in the claims following this description.

[0013] Figure 1 is a flow chart illustrating a method 100 for manufacturing electronic packages. The electronic packages may include, for example, integrated circuits, multi-chip modules, and any other type or combination of electronic or semiconductor devices. The electronic packages are manufactured using interconnect structures to facilitate multi-device manufacturing. The electronic packages are tested while still associated with an interconnect structure. The test results are marked on each electronic package while each electronic package is still associated with an interconnect structure.

[0014] For example, during the manufacturing process, a number of integrated circuit die are attached to an interconnect structure during attach operation 110. Any number of electronic packages may be attached to the interconnect structure. For example, in the embodiment shown in Figure 3, six die 323-328 are attached to interconnect structure 310. Other exemplary embodiments may include other numbers of electronic packages with numbers commonly ranging from 10-196 die per interconnect structure, and even more or less depending on the application. Interconnect structure 310 may be, for example, an interconnect frame such as a lead frame, a substrate, a panel, a strip, or other type of interconnect structure. Attach operation 110 is repeated for each new set of electronic packages as necessary.

[0015] After the electronic packages are associated with an interconnect structure during attach operation 110, the electronic packages are encapsulated during encapsulate operation 120. Any appropriate type of encapsulant and encapsulating technique may be used as is already known in the art or hereafter developed, including for example molding. Encapsulate operation 120 may be performed later if desired. For example, the encapsulate operation 120 may be performed later (e.g., after testing) if each electronic package is to include multiple integrated circuits, and a second set of integrated circuits are to be added to the passing integrated circuits of a first set of already tested integrated circuits.

[0016] After the electronic packages are encapsulated during encapsulate operation 120, the die are tested during test operation 130. The electronic packages of each interconnect structure are provided to a test system for testing. An exemplary test system is discussed in further detail below with reference to Figure 2.

[0017] After testing of the electronic packages of each interconnect structure during test operation 130, the test system marks test result information for each electronic package at a location on the package encapsulant corresponding to each of the electronic packages during mark operation 140. Test information is automatically marked at a location over, corresponding to, or otherwise indicative of a corresponding electronic package. For example, if an electronic package fails a test, a test failure mark is placed on the electronic package. Thus, in one embodiment, all electronic packages which fail are marked with test result information indicative of that failure. In another embodiment, all electronic packages which pass are marked with test result information indicative of that test passage. Laser marking, deposition of ink, or any other appropriate marking technique may be used.

[0018] As illustrated, a round of testing during test operation 130 is followed by marking the test results of that round of testing during mark operation 140. However, additional testing may occur after a first test round during test operation 130 and before marking operation 140. As such, test operation 130 may be performed a number of times before marking operation 140, thereby making the process applicable for multiple-insert test and retest. Also, although not illustrated, other markings may be used such as serial number to track multiple test flows on the same package assembly (e.g., strip) so that marking may be performed when all tests are complete. This allows the flexibility of having different tests performed on different days, for example. Also, general marking can be placed on all packages at any time during the operational flow.

[0019] After the electronic packages are marked during mark operation 130, the test system determines whether additional tests are to be performed during final test decision 150. If the final test has not been performed, control transitions to test operation 130 for additional testing. If the final test has been performed, control transitions to a post test and marking step such as singulate operation 16.

[0020] The electronic packages are separated from each other and the interconnect structure during singulate operation 160. Singulation may be performed by any of a variety of traditional singulation techniques such as sawing, breaking, cutting, etc. [0021] After the electronic packages are singulated during singulate operation 160, the electronic packages are sorted during sort operation 170. The indications of the test results marked on each electronic package is read, and the electronic packages are sorted according to the marked test results. The marked test results may be read by any now known or later developed optical reading technique or other machine reading technique. Many such techniques are now known in the industry.

[0022] An exemplary test system 200 for performing the test and marking operations 13 and 140 is illustrated in Figure 2. Test system 200 includes tester 210 and handler/marker 220. Tester 210 can be any of a variety of known automatic test equipment. In one embodiment, a Teradyne J750 available from Teradyne, Inc. may be used. Handler/marker 220 is an automated test handler modified to provide marking capability. Handler/marker 220 includes a controller 222, a handler 224 and a marker 226. As illustrated, interconnect structures 232 and 234 have been provided via handler 224 for testing by test system 200.

[0023] Tester 210 is coupled to handler/marker 220 to control testing of die in interconnect structures being handled by handler/marker 220. Controller 222 of handler/marker 220 controls the handling of devices under test responsive to signals from Tester 210 and provides indications of test results to tester 210.

[0024] In the manufacturing state illustrated, interconnect structure 232 is located at handler 224 for testing by tester 210, and interconnect structure 234 is located at marker 226 for marking according to test results previously obtained when interconnect structure was located at handler 224. After interconnect structure 232 is tested, handler 224 will provide tested interconnect structure 232 to marker 226 and will receive a next interconnect structure for testing from a stack of interconnect structures. After interconnect structure 234 is marked, marker 226 will provide interconnect structure 234 to a stack of marked interconnect structures and will receive tested interconnect structure 232.

[0025] Figure 3 is a perspective drawing illustrating a package assembly 310 including an interconnect structure 312 to which electronic packages 323, 324, 325, 326, 327 and 328 have been attached (e.g., during attach operation 110 of Figure 1). The electronic packages 323- 328 have been encapsulated by encapsulant 314. Package assembly 310 includes identification information such as serial number 340 on interconnect structure 312 to identify the package assembly. Serial number 340 may be a dot code or even a bar code or some other means for recording identification information.

[0026] Test result information has been marked on each electronic package (e.g., during mark operation 140). For example, electronic package 326 includes a marking 334 represented by the numeral "2" indicative of a first type of test failure, and electronic package 323 includes a marking 331 represented by the numeral "3" indicative of a second type of test failure. Electronic packages 324, 325, 327 and 328 have test result information 333 represented by the numeral "1" marked thereon to indicate that the corresponding electronic packages passed one or all tests. Of course, different types of markings may be used. Markings may be used to indicate only test failures or only successful test results or both.

[0027] A low cost process to test strip and panel based devices (e.g., MAP and QFN devices in the substrate/lead frame) uses largely standard equipment sets in new ways to enable massively parallel testing of such. By adding laser marking capability to a standard handler module, burn-in and test results can be marked directly onto each strip or panel based device. The devices can then be later singulated using equipment that has no knowledge of the results of the testing (e.g., traditional "dumb" saws, not difficult to implement "smart" saws) and then sorted based on automated visual inspections of the markings. A post-test mark operation is built into the final test handler. Individual device burn-in or test results are marked directly onto each device package. Burn-in or test rejects are sorted using standard vision/pack & ship equipment. This technique eliminates the need for in advance laser marking (e.g., a dot code for each panel), eliminates the need for a server to store test results and panel codes, and eliminates the need for a smart saw capable of reading dot codes and downloading test results for sorting. The disclosed technique can enable increased throughput, yield and test cell utilization.

[0028] The above description is intended to describe at least one embodiment of the invention. The above description is not intended to define the scope of the invention. Rather, the scope of the invention is defined in the claims below. Thus, other embodiments of the invention include other variations, modifications, additions, and/or improvements to the above description. [0029] In one embodiment, a method includes the steps of testing circuitry of each package of a plurality of unsingulated packages of a package assembly, machine marking encapsulant of unsingulated packages of the plurality of unsingulated packages of the package assembly with an indication of results of the testing, and singulating the unsingulated • packages of the plurality after the machine marking.

[0030] In a further embodiment, the step of machine marking includes machine marking those packages having circuitry failing the testing with an indication of test failure. The indication of failing the testing further includes an indication of a reason for the test failure. In a further embodiment, the step of machine marking includes machine marking those packages having circuitry passing the testing with an indication of passing the testing. The indication of passing the testing may include one of a logo and a pin identifier, for example. In another further embodiment, the step of machine marking includes both machine marking encapsulant of unsingulated packages of the plurality having circuitry failing the testing with an indication of failing the testing and machine marking encapsulant of unsingulated packages of the plurality having circuitry passing the testing with an indication of passing the testing.

[0031] In another further embodiment, the circuitry of each package of a plurality of unsingulated packages of the package assembly is tested for a second time after a first test and prior to the singulating. The encapsulant of unsingulated packages of the plurality of unsingulated packages of the package assembly may then be machine marked with an indication of results of the testing for a second time. Alternatively, or in addition, the encapsulant of unsingulated packages failing the first and second tests may be machine marked with an indication of the first and second test failures. Alternatively, or in addition, the encapsulant of unsingulated packages passing the testing for the second time may be machine marked. Alternatively, or in addition, the encapsulant of unsingulated packages passing the first and second testing with an indication of the successful first and second test passes.

[0032] In another further embodiment, the method includes the step of sorting the packages after singulating based upon the indications of the test results machine marked on the encapsulant. In another further embodiment, the machine marking includes laser marking the encapsulant. [0033] In another further embodiment, the method includes the step of encapsulating circuitry of each package of the plurality of unsingulated packages with an encapsulant. The testing may be performed after the encapsulating.

[0034] In another further embodiment, the package assembly is one of a strip package assembly or a panel package assembly. In another further embodiment, the circuitry of each package includes an electronic die. In another further embodiment, the testing includes a functional test. In another further embodiment, the indication includes a measure of quantitative results of the testing.

[0035] In another embodiment, a method includes the steps of attaching a plurality of electronic die to an interconnect structure, encapsulating the plurality of die attached to the interconnect structure, testing the plurality of die attached to the interconnect structure, machine marking encapsulant of packages of the interconnect structure with an indication of results of the testing, and singulating the packages of the interconnect structure after the machine marking. In yet a further embodiment, the interconnect structure is one of a lead frame, a substrate, a panel, and a strip.

[0036] In another embodiment, a plurality of electronic die are attached to an interconnect structure. The plurality of die attached to the interconnect structure are encapsulated. The plurality of die attached to the interconnect structure are tested. Encapsulant of each package of a subset of the plurality of die attached to the interconnect structure are machine marked with an indication of results of the testing. The subset is one of die of the plurality failing the testing and die of the plurality passing the testing. The packages of the interconnect structure are singulated after the machine marking. The testing may be performed after the encapsulating.

[0037] In a further embodiment, a second test is performed on the plurality of die attached to the interconnect structure after the first test and prior to the singulation.

Encapsulant of each package of a subset of the plurality of die attached to the interconnect structure are machine marked with an indication of the second test results. The subset is one of the plurality of die failing the second test and die passing the second test. [0038] In a further embodiment, the packages are sorted after singulating based upon the indications of the test results machine marked on encapsulant.

[0039] In a further embodiment, each package of a second subset of the plurality of die attached to the interconnect structure is machine marked with an indication of test results. The second subset is the other one of the die failing the testing and die passing the testing.

[0040] In a further embodiment, the plurality of die attached to the interconnect structure are tested a second time after the first test and prior to singulation. The subset is one of die of the plurality failing the first or second testing and die of the plurality passing the first and second testing. Alternatively, the subset is one of die of the plurality failing the first and second testing and die passing the second testing. In a further embodiment, the subset is the die of the plurality failing the testing, and the indication of results of the testing includes an indication of a reason for failing the testing. In a further embodiment, the subset is the die of the plurality passing the testing and the indication includes a measure of quantitative results of the testing.

[0041] The foregoing components and devices are used herein as examples for sake of conceptual clarity. Consequently, as used herein these specific exemplars are intended to be representative of their more general classes. Furthermore, in general, the use of any specific exemplar herein is also intended to be representative of its class and the noninclusion of any specific devices in any exemplary lists herein should not be taken as indicating that limitation is desired.

[0042] Those skilled in the art will recognize that boundaries between the functionality of the above described operations merely illustrative. The functionality of multiple operations may be combined into a single operation, and or the functionality of a single operations may be distributed in additional operations. Moreover, alternative embodiments may include multiple instances of a particular operation, and the order of operations may be altered in various other embodiments.

[0043] Based on the teachings herein, those skilled in the art will readily implement the steps necessary to provide the structures and the methods disclosed herein, and will understand that the process parameters, materials, dimensions, and sequence of steps are given by way of example only and can be varied to achieve the desired structure as well as modifications that are within the scope of the invention. Variations and modifications of the embodiments disclosed herein may be made based on the description set forth herein, without departing from the spirit and scope of the invention as set forth in the following claims.

[0044] While particular embodiments of the present invention have been shown and described, it will be obvious to those skilled in the art that, based upon the teachings herein, ^■ various modifications, alternative constructions, and equivalents may be used without departing from the invention claimed herein. Consequently, the appended claims encompass within their scope all such changes, modifications, etc. as are within the true spirit and scope of the invention. Furthermore, it is to be understood that the invention is solely defined by the appended claims. The above description is not intended to present an exhaustive list of embodiments of the invention. Unless expressly stated otherwise, each example presented herein is a nonlimiting or nonexclusive example, whether or not the terms nonlimiting, nonexclusive or similar terms are contemporaneously expressed with each example. Although an attempt has been made to outline some exemplary embodiments and exemplary variations thereto, other embodiments and/or variations are within the scope of the invention as defined in the claims below.

Claims

WHAT IS CLAIMED IS:

1. A method comprising: testing circuitry of each package of a plurality of unsingulated packages of a package assembly; machine marking encapsulant of unsingulated packages of the plurality of unsingulated packages of the package assembly with an indication of results of the testing; and singulating the unsingulated packages of the plurality after the machine marking.

2. The method of claim 1 wherein the machine marking further comprises machine marking encapsulant of unsingulated packages of the plurality having circuitry failing the testing, wherein the indication is an indication of failing the testing.

3. The method of claim 2 wherein the indication of failing the testing further includes an indication of a reason for failing the testing.

4. The method of claim 1 wherein the machine marking further comprises machine marking encapsulant of unsingulated packages of the plurality having circuitry passing the testing, wherein the indication is an indication of passing the testing.

5. The method of claim 4 wherein the indication of passing the testing includes one of a logo and a pin identifier.

6. The method of claim 1 wherein the indication includes a measure of quantitative results of the testing.

7. The method of claim 1 wherein the circuitry of each package includes an electronic die.

8. The method of claim 1 further comprising: encapsulating circuitry of each package of the plurality of unsingulated packages with an encapsulant.

9. The method of claim 8 wherein the testing is performed after the encapsulating.

10. The method claim 1 further comprising: testing for a second time circuitry of each package of a plurality of unsingulated packages of the package assembly after the testing and prior to the singulating; machine marking encapsulant of unsingulated packages of the plurality of unsingulated packages of the package assembly with an indication of results of the testing for a second time.

11. The method claim 1 further comprising: testing for a second time circuitry of each package of the plurality of unsingulated packages of an package assembly after the testing and prior to the singulating; wherein the machine marking further includes marking encapsulant of unsingulated packages of the plurality having circuitry failing the testing and failing the testing for the second time, wherein the indication is an indication of failing the testing and failing the testing for the second time.

12. The method claim 1 further comprising: testing for a second time circuitry of each package of the plurality of unsingulated packages of the package assembly after the testing and prior to the singulating; wherein the machine marking further includes marking encapsulant of unsingulated packages of the plurality having circuitry passing the testing for the second time.

13. The method claim 1 further comprising: testing for a second time circuitry of each package of the plurality of unsingulated packages of package assembly after the testing and prior to the singulating; wherein the machine further includes marking encapsulant of unsingulated packages of the plurality having circuitry passing the testing and passing the testing for the second time, wherein the indication is an indication of passing the testing and passing the testing for the second time.

14. The method of claim 1 further comprising: sorting the packages after singulating based upon the indications of the test results machine marked on the encapsulant.

15. The method of claim 1 wherein the machine marking includes laser marking the encapsulant.

16. The method of claim 1 wherein the machine marking further comprises: machine marking encapsulant of unsingulated packages of the plurality having circuitry failing the testing with an indication of failing the testing; machine marking encapsulant of unsingulated packages of the plurality having circuitry passing the testing with an indication of passing the testing.

17. The method of claim 1 wherein the package assembly is one of a strip package assembly or a panel package assembly.

18. The method of claim 1 wherein the testing includes a functional test.

19. A method comprising: attaching a plurality of electronic die to an interconnect structure; encapsulating the plurality of die attached to the interconnect structure; testing the plurality of die attached to the interconnect structure; machine marking encapsulant of packages of the interconnect structure with an indication of results of the testing; and singulating the packages of the interconnect structure after the machine marking.

20. The method of claim 19 wherein the machine marking further includes machine marking encapsulant of packages of the interconnect structure having a die failing the testing, wherein the indication is an indication of failing the testing.

21. The method of claim 20 wherein the indication of failing the testing further includes an indication of a reason for failing the testing.

22. The method of claim 19 wherein the machine marking further includes machine marking encapsulant of packages of the interconnect structure having a die passing the testing, wherein the indication is an indication of passing the testing.

23. The method of claim 22 wherein the indication of passing the testing includes one of a logo and a pin identifier.

24. The method of claim 19 wherein the indication includes a measure of quantitative results of the testing.

25. The method of claim 19 wherein the testing is performed after the encapsulating.

26. The method of claim 19 further comprising: testing for a second time the plurality of die attached to the interconnect structure after the testing and prior to the singulating; machine marking encapsulant of packages of the interconnect structure with an indication of results of the testing for the second time.

27. The method of claim 19 further comprising: testing for a second time the plurality of die attached to the interconnect structure after the testing and prior to the singulating; wherein the machine further includes marking encapsulant of packages of the interconnect structure having a die passing the testing and passing the testing for the second time, wherein the indication is an indication of passing the testing and passing the testing for the second time.

28. The method of claim 19 further comprising: testing for a second time the plurality of die attached to the interconnect structure after the testing and prior to the singulating; wherein the machine marking further includes marking encapsulant of packages of the interconnect structure having a die failing the testing and failing the testing for the second time, wherein the indication is an indication of failing the testing and failing the testing for the second time.

29. The method of claim 19 further comprising: testing for a second time the plurality of die attached to the interconnect structure after the testing and prior to the singulating; wherein the machine marking further includes marking encapsulant of packages of the interconnect structure having a die passing the testing for the second time, wherein the indication is an indication of passing the testing for the second time.

30. The method of claim 19 further comprising: sorting the packages after singulating based upon the indications of the test results machine marked on the encapsulant.

31. The method of claim 19 wherein the machine marking includes laser marking the encapsulant.

32. The method of claim 19 wherein the machine marking further comprises: machine marking encapsulant of packages of the interconnect structure having a die failing the testing with an indication of failing the testing; machine marking encapsulant of packages of the interconnect structure having a die passing the testing with an indication of passing the testing.

33. The method of claim 19 wherein the interconnect structure includes one of a lead frame, a substrate, a panel, and a strip.

34. A method comprising: attaching a plurality of electronic die to an interconnect structure; encapsulating the plurality of die attached to the interconnect structure; testing the plurality of die attached to the interconnect structure; machine marking encapsulant of each package of a subset of the plurality of die attached to the interconnect structure with an indication of results of the testing, wherein the subset is one of die of the plurality failing the testing and die of the plurality passing the testing; singulating the packages of the interconnect structure after the machine marking.

35. The method of claim 34 wherein the testing is performed after the encapsulating.

36. The method claim 34 further comprising: testing for a second time the plurality of die attached to the interconnect structure after the testing and prior to the singulating; machine marking encapsulant of each package of a subset of the plurality of die attached to the interconnect structure with an indication of results of the testing for a second time, wherein the subset is one of die of the plurality failing the testing for the second time and die of the plurality passing the testing for the second time.

37. The method of claim 34 further comprising: sorting the packages after singulating based upon the indications of the test results machine marked on encapsulant.

38. The method of claim 34 wherein the machine marking further includes machine marking encapsulant of each package of a second subset of the plurality of die attached to the interconnect structure with an indication of results of the testing, wherein the second subset is the other one of die of the plurality failing the testing and die of the plurality passing the testing.

39. The method claim 34 further comprising: testing for a second time the plurality of die attached to the interconnect structure after the testing and prior to the singulating; wherein the subset is one of die of the plurality failing the testing or the failing the testing for a second time and die of the plurality passing the testing and passing the testing the second time.

40. The method claim 34 further comprising: testing for a second time the plurality of die attached to the interconnect structure after the testing and prior to the singulating; wherein the subset is one of die of the plurality failing the testing and the failing the testing for a second time and die passing the testing for the second time.

41. The method of claim 34 wherein the machine marking includes laser marking the encapsulant.

42. The method of claim 34 wherein: the subset is the die of the plurality failing the testing; the indication of results of the testing includes an indication of a reason for failing the testing.

43. The method of claim 34 wherein: the indication of the results include one of a logo and a pin identifier.

44. The method of claim 34 wherein: the subset is the die of the plurality passing the testing; wherein the indication includes a measure of quantitative results of the testing.