CN114632710A - Method and device for screening defective products of chip, terminal and server - Google Patents

Method and device for screening defective products of chip, terminal and server Download PDF

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Publication number
CN114632710A
CN114632710A CN202210143243.5A CN202210143243A CN114632710A CN 114632710 A CN114632710 A CN 114632710A CN 202210143243 A CN202210143243 A CN 202210143243A CN 114632710 A CN114632710 A CN 114632710A
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target
chip
packaged
test
chip carrier
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CN114632710B (en
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王英广
栗伟斌
李安平
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Shenzhen Mifitech Technology Co ltd
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Shenzhen Mifitech Technology Co ltd
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B07—SEPARATING SOLIDS FROM SOLIDS; SORTING
    • B07C—POSTAL SORTING; SORTING INDIVIDUAL ARTICLES, OR BULK MATERIAL FIT TO BE SORTED PIECE-MEAL, e.g. BY PICKING
    • B07C5/00—Sorting according to a characteristic or feature of the articles or material being sorted, e.g. by control effected by devices which detect or measure such characteristic or feature; Sorting by manually actuated devices, e.g. switches
    • B07C5/02—Measures preceding sorting, e.g. arranging articles in a stream orientating
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B07—SEPARATING SOLIDS FROM SOLIDS; SORTING
    • B07C—POSTAL SORTING; SORTING INDIVIDUAL ARTICLES, OR BULK MATERIAL FIT TO BE SORTED PIECE-MEAL, e.g. BY PICKING
    • B07C5/00—Sorting according to a characteristic or feature of the articles or material being sorted, e.g. by control effected by devices which detect or measure such characteristic or feature; Sorting by manually actuated devices, e.g. switches
    • B07C5/34—Sorting according to other particular properties
    • B07C5/3412—Sorting according to other particular properties according to a code applied to the object which indicates a property of the object, e.g. quality class, contents or incorrect indication
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B07—SEPARATING SOLIDS FROM SOLIDS; SORTING
    • B07C—POSTAL SORTING; SORTING INDIVIDUAL ARTICLES, OR BULK MATERIAL FIT TO BE SORTED PIECE-MEAL, e.g. BY PICKING
    • B07C5/00—Sorting according to a characteristic or feature of the articles or material being sorted, e.g. by control effected by devices which detect or measure such characteristic or feature; Sorting by manually actuated devices, e.g. switches
    • B07C5/34—Sorting according to other particular properties
    • B07C5/344—Sorting according to other particular properties according to electric or electromagnetic properties
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B07—SEPARATING SOLIDS FROM SOLIDS; SORTING
    • B07C—POSTAL SORTING; SORTING INDIVIDUAL ARTICLES, OR BULK MATERIAL FIT TO BE SORTED PIECE-MEAL, e.g. BY PICKING
    • B07C5/00—Sorting according to a characteristic or feature of the articles or material being sorted, e.g. by control effected by devices which detect or measure such characteristic or feature; Sorting by manually actuated devices, e.g. switches
    • B07C5/36—Sorting apparatus characterised by the means used for distribution
    • B07C5/361—Processing or control devices therefor, e.g. escort memory
    • B07C5/362—Separating or distributor mechanisms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67276—Production flow monitoring, e.g. for increasing throughput
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67294—Apparatus for monitoring, sorting or marking using identification means, e.g. labels on substrates or labels on containers

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Automation & Control Theory (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

The application is suitable for the technical field of chip packaging test, and provides a method, a device, a terminal and a server for screening defective products of a chip, wherein the method for screening the defective products comprises the following steps: acquiring identification information corresponding to a chip carrier; acquiring target test information corresponding to the chip carrier from a server according to the identification information corresponding to the chip carrier, wherein the target test information comprises coordinates of the N chips to be packaged on the chip carrier respectively and first test results corresponding to the N chips to be packaged respectively; and sending an unqualified instruction to a laser marking machine according to the target coordinate, wherein the unqualified instruction is used for indicating the laser marking machine to mark a defective product on the chip to be packaged at the target coordinate. According to the scheme, the defective products are marked by recording the test result of the target process in the chip packaging process, the defective products in the chip can be screened out before the chip finished product is tested, and the yield of the chip is improved.

Description

Chip defective product screening method and device, terminal and server
Technical Field
The application belongs to the technical field of chip packaging testing, and particularly relates to a method and a device for screening defective products of a chip, a terminal and a server.
Background
An integrated circuit is used as a core of a semiconductor industry, a market industry chain of the integrated circuit at present can be divided into four parts, namely a chip design part, a wafer manufacturing part, a chip packaging test part and a material and equipment part, wherein the chip packaging test is an essential link of the integrated circuit industry chain, and is mainly divided into three parts, namely a wafer test part, a chip packaging part and a chip finished product test part, the chip packaging part refers to a process of obtaining an integrated circuit product with certain functions by carrying out a series of processing procedures, such as scribing, loading, bonding, plastic packaging, electroplating, rib cutting and forming on a wafer passing through the test, in a plurality of procedures of the chip packaging, due to the complexity of processing environment, the probability of producing defective products is high (for example, the defective products are easy to produce in the loading and bonding processes), the defective products in the chip are usually screened out through the chip finished product test at present, but after a plurality of users obtain the packaged chip, in order to save cost and time, simple connectivity tests are usually performed on the packaged chips, and the simple connectivity tests do not necessarily screen out all the defective products in the chips.
Disclosure of Invention
The embodiment of the application provides a method, a device, a terminal and a server for screening defective products of a chip, which can screen the defective products in the chip before testing of a finished chip product and improve the yield of the chip.
A first aspect of an embodiment of the present application provides a method for screening a defective product of a chip, which is applied to a first terminal, and the method for screening a defective product includes:
acquiring identification information corresponding to a chip carrier, wherein the chip carrier is used for loading N chips to be packaged, and N is an integer greater than zero;
acquiring target test information corresponding to the chip carrier from a server according to the identification information corresponding to the chip carrier, wherein the target test information comprises coordinates of the N chips to be packaged on the chip carrier respectively and first test results corresponding to the N chips to be packaged respectively, and the first test results are obtained according to second test results corresponding to target procedures of the chips to be packaged in chip packaging procedures;
and sending a disqualification instruction to a laser marking machine according to a target coordinate, wherein the target coordinate is the coordinate of the chip to be packaged on the chip carrier, the first test result of which is disqualified, and the disqualification instruction is used for indicating the laser marking machine to mark the defective product of the chip to be packaged at the target coordinate.
A second aspect of the embodiments of the present application provides a method for screening defective products of a chip, which is applied to a server, and the method for screening defective products includes:
receiving first test information corresponding to a chip carrier from a second terminal, wherein the second terminal is equipment in communication connection with first target process execution equipment, the first test information comprises coordinates of N chips to be packaged on the chip carrier respectively and corresponding test results of the N chips to be packaged in a first target process, and the first target process is a target process in which execution sequence is first in all the target processes;
adding test results respectively corresponding to the N chips to be packaged in the remaining target processes from the remaining target process execution equipment to the first test information according to the execution sequence of the remaining target processes so as to update the first test information, wherein the remaining target processes refer to other target processes except the first target process in all target processes, and the remaining target process execution equipment refers to other target process execution equipment except the first target process execution equipment in all target process execution equipment;
after the test results corresponding to all target processes are added to the first test information, the first test information is updated, and target test information corresponding to the chip carrier is obtained;
and receiving a retrieval instruction from a first terminal, retrieving the target test information according to the retrieval instruction, and sending the target test information to the first terminal.
A third aspect of the embodiments of the present application provides a defective product screening apparatus for a chip, which is applied to a first terminal, the defective product screening apparatus includes:
the chip packaging device comprises an identification acquisition module, a chip packaging module and a chip packaging module, wherein the identification acquisition module is used for acquiring identification information corresponding to a chip carrier, the chip carrier is used for loading N chips to be packaged, and N is an integer greater than zero;
the target obtaining module is used for obtaining target test information corresponding to the chip carrier from a server according to the identification information corresponding to the chip carrier, wherein the target test information comprises coordinates of the N chips to be packaged on the chip carrier respectively and first test results corresponding to the N chips to be packaged respectively, and the first test results are obtained according to second test results corresponding to target processes of the chips to be packaged in a chip packaging process;
and the defective product marking module is used for sending a defective instruction to the laser marking machine according to a target coordinate, wherein the target coordinate is the coordinate of the chip to be packaged on the chip carrier, the first test result of which is unqualified, and the defective instruction is used for indicating the laser marking machine to mark the defective product of the chip to be packaged at the target coordinate.
A fourth aspect of the embodiments of the present application provides a defective product screening apparatus for a chip, which is applied to a server, the defective product screening apparatus including:
the information receiving module is used for receiving first test information corresponding to a chip carrier from a second terminal, wherein the second terminal is equipment in communication connection with first target process execution equipment, the first test information comprises coordinates of N chips to be packaged on the chip carrier respectively and corresponding test results of the N chips to be packaged in a first target process, and the first target process is a target process in which the execution sequence is first in all the target processes;
an information updating module, configured to add test results corresponding to the N chips to be packaged in remaining target processes from remaining target process execution devices to the first test information according to an execution order of the remaining target processes to update the first test information, where the remaining target processes refer to other target processes except the first target process in all target processes, and the remaining target process execution devices refer to other target process execution devices except the first target process execution device in all target process execution devices;
the target determining module is used for updating the first test information until the test results corresponding to all target processes are added to the first test information, so as to obtain target test information corresponding to the chip carrier;
and the target sending module is used for receiving a retrieval instruction from a first terminal, retrieving the target test information according to the retrieval instruction, and sending the target test information to the first terminal.
A fifth aspect of an embodiment of the present application provides a terminal, including: a memory, a processor and a computer program stored in the memory and operable on the processor, wherein the processor implements the method for screening for a defective product of a chip according to the first aspect when executing the computer program.
A sixth aspect of an embodiment of the present application provides a server, including: a memory, a processor and a computer program stored in the memory and operable on the processor, wherein the processor implements the method for screening for defects in a chip according to the second aspect when executing the computer program.
A seventh aspect of the embodiments of the present application provides a computer-readable storage medium, in which a computer program is stored, and the computer program, when executed by a processor, implements the method for screening defective products of the chip according to the first aspect, or implements the method for screening defective products of the chip according to the second aspect.
An eighth aspect of the embodiments of the present application provides a computer program product, which, when running on a terminal, causes the terminal to execute the method for screening a defective product of a chip according to the first aspect, or execute the method for screening a defective product of a chip according to the second aspect.
Compared with the prior art, the embodiment of the application has the advantages that: the embodiment of the application firstly obtains the target test information corresponding to the chip carrier from the server by obtaining the identification information corresponding to the chip carrier, wherein the target test information comprises the coordinates of the N chips to be packaged on the chip carrier respectively, and the first test results corresponding to the N chips to be packaged respectively, and the first test result is obtained according to a second test result corresponding to a target process of the chip to be packaged in the chip packaging process, therefore, the method can ensure that the defective products can be tested in time by testing the target process in the chip packaging process, and the laser marking machine can be instructed to mark defective products on the chips to be packaged at the target coordinates according to the target coordinates (namely, the coordinates of the chips to be packaged on the chip carrier, wherein the first test result is unqualified), and the defective products can be screened out according to the defective product marks. According to the scheme, the defective products are marked by recording the test result of the target process in the chip packaging process, the defective products in the chip can be screened out before the chip finished product is tested, and the yield of the chip is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
FIG. 1 is a schematic structural diagram of a system for screening a defective chip according to an embodiment of the present disclosure;
FIG. 2 is a schematic flow chart illustrating a method for screening a defective chip according to the second embodiment of the present application;
FIG. 3 is a schematic flow chart of a method for screening a defective chip according to a third embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of a defective product screening apparatus for a chip according to a fourth embodiment of the present application;
fig. 5 is a schematic structural diagram of a defective product screening apparatus for a chip according to a fifth embodiment of the present application;
fig. 6 is a schematic structural diagram of a terminal according to a sixth embodiment of the present application;
fig. 7 is a schematic structural diagram of a server according to a seventh embodiment of the present application.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It should also be understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
As used in this specification and the appended claims, the term "if" may be interpreted contextually as "when", "upon" or "in response to" determining "or" in response to detecting ". Similarly, the phrase "if it is determined" or "if a [ described condition or event ] is detected" may be interpreted contextually to mean "upon determining" or "in response to determining" or "upon detecting [ described condition or event ]" or "in response to detecting [ described condition or event ]".
Furthermore, in the description of the present application and the appended claims, the terms "first," "second," "third," and the like are used for distinguishing between descriptions and not necessarily for describing or implying relative importance.
Reference throughout this specification to "one embodiment" or "some embodiments," or the like, means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the present application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," or the like, in various places throughout this specification are not necessarily all referring to the same embodiment, but rather "one or more but not all embodiments" unless specifically stated otherwise. The terms "comprising," "including," "having," and variations thereof mean "including, but not limited to," unless expressly specified otherwise.
In order to screen out defective products in chips before testing of finished chips and improve the yield of the chips, the application provides a method for screening out defective products of the chips, which obtains target test information corresponding to a chip carrier from a server by obtaining identification information corresponding to the chip carrier, wherein the target test information comprises coordinates of N chips to be packaged on the chip carrier and first test results corresponding to the N chips to be packaged respectively, and the first test results are obtained according to second test results corresponding to target processes of the chips to be packaged in a chip packaging process, so that the application can be informed that the defective products can be tested in time by testing the target processes in the chip packaging process and can be tested according to the target coordinates (namely the coordinates of the chips to be packaged on the chip carrier, the first test results are unqualified), and indicating the laser marking machine to mark defective products on the chip to be packaged at the target coordinate, and screening out the defective products according to the defective product marks. The method can realize screening of the defective products according to the test result of the target procedure in the chip packaging process, thereby solving the problem that all the defective products in the chip can not be screened out necessarily by carrying out simple connectivity test on the finished chip.
It should be understood that, the sequence numbers of the steps in this embodiment do not mean the execution sequence, and the execution sequence of each process should be determined by the function and the inherent logic of the process, and should not constitute any limitation to the implementation process of the embodiment of the present application.
In order to explain the technical solution of the present application, the following description is given by way of specific examples.
Referring to fig. 1, a schematic structural diagram of a system for screening a defective chip according to an embodiment of the present application is shown. As shown in fig. 1, the system for screening defective chips includes a server, a switch, a laser marking machine in a laser marking process, a first terminal corresponding to the laser marking machine, a first target process execution device (i.e., a chip mounter), a second terminal corresponding to the first target process execution device, a target process execution device in a second target process (i.e., a bonder), and a third terminal corresponding to the second target process execution device.
Screening defective products in a chip before a finished chip product is tested, namely screening the defective products in the chip in a chip packaging process, wherein a first terminal can firstly acquire identification information corresponding to a chip carrier so as to acquire target test information corresponding to the chip carrier from a server according to the acquired identification information, wherein the target test information refers to test information corresponding to each chip to be packaged in the chip carrier in the chip packaging process, and specifically comprises the following steps: the chip packaging method comprises the steps of respectively arranging coordinates of each chip to be packaged on a chip carrier in the chip carrier, and respectively corresponding first test results of each chip to be packaged, wherein the first test results respectively corresponding to each chip to be packaged are obtained according to second test results corresponding to target processes of the chip to be packaged in a chip packaging process.
Specifically, the specific process of acquiring the target test information is as follows: the server receives first test information corresponding to a chip carrier from a second terminal, wherein the second terminal is equipment in communication connection with target process execution equipment in a first target process in a target process, the target process execution equipment is equipment for executing the corresponding target process, for example, the first target process in the target process is a chip mounting process, the target process execution equipment is a chip mounter, and the second terminal is equipment in communication connection with the chip mounter. Secondly, after receiving the first test information, in order to record the test results of the to-be-packaged chips in the remaining target processes, the server may add the test results respectively corresponding to each to-be-packaged chip in the chip carrier from the target process execution device in the remaining target processes to the first test information according to the execution sequence of the target processes, and update the first test information, where the test results respectively corresponding to each to-be-packaged chip in the chip carrier in the remaining target processes are second test results corresponding to the to-be-packaged chips in the chip carrier in the remaining target processes in the chip packaging process. After the testing of all target processes is completed, the first test information includes the test results of all target processes (i.e. the first target process and the remaining target processes) of each chip to be packaged, at this time, the first test information is updated, and the server obtains the target test information corresponding to the chip carrier. And the first terminal sends a retrieval instruction to the server and further receives target test information corresponding to the chip carrier sent by the server.
Because the target test information comprises the coordinates of each chip to be packaged in the chip carrier on the chip carrier and the first test result corresponding to each chip to be packaged, the first terminal can send a disqualification instruction to the laser marking machine according to the coordinates of the chip to be packaged on the chip carrier, which are disqualified according to the first test result, and instruct the laser marking machine to mark the disqualification of the chip to be packaged at the coordinate, so that the defective products in the chip can be screened out before the chip finished product test, and the yield is improved.
The target process may refer to a process that a chip to be packaged can be tested in M chip packaging processes, where M is an integer greater than zero, for example, a chip mounting process, a bonding process, a plastic packaging process, an electroplating process, and the like, and in the embodiment of the present application, a corresponding target process or a target process combination may be selected based on a user's requirement, for example, the chip mounting process and the bonding process are selected as a first target process and a second target process, respectively; or selecting a chip mounting process, a bonding process, a plastic packaging process and an electroplating process as a first target process, a second target process, a third target process and a fourth target process respectively; the present application does not limit the number of target processes and the type of specific processes.
It should be understood that the first target process, the second target process, the third target process and the fourth target process in the embodiment of the present application are arranged in the execution order of the target processes, the execution order of the first target process is arranged before the execution order of the second target process, the execution order of the second target process is arranged before the execution order of the third target process, and the execution order of the third target process is arranged before the execution order of the fourth target process.
It should be further understood that when the test result corresponding to each chip to be packaged in the chip carrier in all target processes is obtained and added to the first test information, the test result is sequentially added to the first test information according to the execution sequence of the target processes, for example, in the chip packaging process, the execution sequences of the chip mounting process, the bonding process, the plastic packaging process and the electroplating process are respectively the chip mounting process, the bonding process, the plastic packaging process and the electroplating process, so that after receiving the first test information corresponding to the chip carrier from the second terminal in the chip mounting process, the server first updates the first test information according to the test result corresponding to the same chip carrier from the third terminal (i.e. a device in communication connection with the bonder) in the second target process (i.e. the bonding process), and then updates the first test information according to the test result corresponding to the same chip carrier from the plastic packaging process execution device in the plastic packaging process, and updating the first test information, and finally completing the updating of the first test information according to the test result corresponding to the same chip carrier from the electroplating process execution equipment in the electroplating process to obtain the target test information.
The server acquires the test result corresponding to the same chip carrier from the plastic packaging process execution device, which means that the plastic packaging process execution device sends the generated test result to a terminal in communication connection with the plastic packaging process execution device, and the terminal sends the test result to the server; the server may obtain the test result corresponding to the same chip carrier from the electroplating process execution device, where the electroplating process execution device sends the generated test result to a terminal in communication connection with the electroplating process execution device, and the terminal sends the test result to the server.
Taking the target processes as a mounting process and a bonding process as examples, as shown in fig. 1, the first target process is a mounting process and the second target process is a bonding process. Assuming that the identified identification information of the chip carrier a is YYYYMMDD12345, the second terminal may locally create a map file with YYYYMMDD12345 as a file name, and when the chip to be packaged in the chip carrier a performs the mounting process in the chip mounter 1, every time the mounting of one chip to be packaged is completed, the coordinates of the chip to be packaged on the chip carrier a and chip mounting test result data are added to the map file with YYYYMMDD12345 as the file name, for example, (X ═ 10, Y ═ 1, DB ═ PASS), the data format of the result data may be customized, and the present application is not limited. After all the chips to be packaged on the chip carrier a are packaged, the second terminal in communication connection with the chip mounter 1 may send a map file containing a chip mounting test result to the server through the switch, where data in the map file is the first test information. After the chip carrier a is subjected to the die bonding process, the die bonding process may be performed by any one of three devices, i.e., the bonder 1, the bonder 2 and the bonder 3, and if the chip carrier a is subjected to the die bonding process by the bonder 2 and the bonder 2 scans the identification information of the chip carrier a, the map file corresponding to the chip carrier a may be downloaded to a third terminal communicatively connected to the bonder 2 according to the identification information, and when the bonding of one chip to be packaged is completed, the map file is updated according to the bonding result and the coordinates of the chip to be packaged, for example, when the bonding result of the chip to be packaged is qualified and the coordinates are (10,1), the result data (X ═ 10, Y ═ 1, DB ═ PASS) in the map file is updated to (X ═ 10, Y ═ 1, DB ═ PASS, and pawb); if the bonding result of the chip to be packaged is not qualified and the coordinate is (10,1), updating the result data (X ═ 10, Y ═ 1, DB ═ PASS) in the map file to (X ═ 10, Y ═ 1, DB ═ PASS, WB ═ FAIL), until all chips to be packaged on the chip carrier a are bonded, the third terminal communicatively connected to the bonder 2 may send the map file containing the bonding result to the server through the switch, or after the bonder 2 scans the identification information of the chip carrier a, the bonding result and the coordinate of the chip to be packaged are sent to the server every time the bonding of one chip to be packaged is completed, after the server receives the bonding result and the coordinate of the chip to be packaged, the bonding result of the chip to be packaged is added to the corresponding map file to update the first test information, after all chips to be packaged are bonded on the chip carrier a, and after the first test information is updated, updating the first test information stored in the server into target test information corresponding to the chip carrier A.
When the laser marking process is executed according to the sequence of chip packaging, if the chip carrier A performs the laser marking process on the laser marking machine 1 at the moment, after the laser marking machine 1 acquires the identification information of the chip carrier A, a first terminal in communication connection with the laser marking machine 1 can acquire target test information corresponding to the chip carrier A from a server through the identification information of the chip carrier A, and after the target test information is acquired, the first terminal can send a failure instruction to the laser marking machine according to the coordinates of a chip to be packaged on the chip carrier, of which the first test result is unqualified, and mark the chip to be packaged, of which the first test result is unqualified. The first test result being unqualified may indicate that the first test result of the chip to be packaged is unqualified if any one of the chip mounting test result and the bonding result of the chip to be packaged indicates unqualified when the chip to be packaged performs the chip mounting process and the bonding process.
The step of obtaining the target test information from the server may be that the first terminal sends a retrieval instruction for retrieving the target test information to the server according to the identification information of the chip carrier, and then obtains the target test information from the server, or the server sends the target test information to the first terminal after obtaining the target test information, and stores the target test information in the first terminal, so that the first terminal can directly obtain the target test information corresponding to the chip carrier from the local.
Wherein, in the defective product screening system of the chip, each target process has a plurality of target process execution apparatuses, each target process execution device is provided with a terminal which is communicated with the target process execution device, the laser marking process is also provided with a plurality of laser marking machines, each laser marking machine is provided with a terminal which is communicated with the laser marking machine, the terminal, the laser marking machine and the target process execution device are provided with standard communication interfaces, such as Ethernet port, SECS/GEM Interface, General-Purpose Interface Bus (GPIB), etc., through different communication instruction sets respectively corresponding to the communication interface, the terminal, the laser marking machine and the target process executing equipment, data interaction between the terminal and the laser marking machine and the target process execution equipment can be realized by writing a control program, or the terminal can be controlled by the laser marking machine and the target process execution equipment.
The terminal communicatively connected to each target process execution Device may be various terminal devices such as a Mobile phone, a tablet computer, a Personal Digital Assistant (PDA), a Mobile Internet Device (MID), and the like, and the embodiment of the present invention is not limited thereto.
The terminal in communication connection with each laser marking machine may be various terminal devices such as a Mobile phone, a tablet computer, a Personal Digital Assistant (PDA), a Mobile Internet Device (MID), and the like, and the embodiment of the present invention is not limited thereto.
It should be understood that the map file may further include the model, lot number, batch number of the chip to be packaged in the chip carrier, and identification information of the chip carrier, so as to calculate the defective product rate in the same lot number or the same batch number when the defective products in the chip are screened out.
It should also be understood that the terminal communicatively connected to each target process execution device and the terminal communicatively connected to each laser marking machine may perform data interaction with the server through a switch, or may perform data interaction with the server through a wireless network, which is not limited in the present application.
Referring to fig. 2, a schematic structural diagram of a method for screening a defective chip according to a second embodiment of the present application is shown. The defective product screening method is applied to a first terminal in a defective product screening system as shown in fig. 1. As shown in fig. 2, the method for screening defective products may include the steps of:
step 201, obtaining identification information corresponding to the chip carrier.
The chip carrier may refer to a frame or a substrate for loading N chips to be packaged, where N is an integer greater than zero, for example, 20 chips to be packaged may be loaded on one substrate.
In the embodiment of the application, when the defective products of the chips are screened, the plurality of substrates can be placed in one cartridge clip in batches as one substrate, so that the chips to be packaged in the plurality of substrates can be packaged simultaneously. Therefore, before the identification information corresponding to the chip carrier is obtained, a unique identifier is generated for each chip carrier, and the identifier can be used for obtaining the identification information corresponding to the chip carrier. Wherein the identification of each chip carrier is different. And secondly, marking each chip carrier by using a laser marking machine according to the generated unique identification, wherein the marking method can be that a bar code or a two-dimensional code or other identification codes are generated on a substrate or a frame by the laser marking machine, wherein the same laser marking machine can be used for marking the chip carriers and the defective products of the chips, and different laser marking machines can also be used.
In this embodiment of the application, when chips to be packaged in a plurality of substrates are packaged simultaneously, whether each substrate in the cassette completes the corresponding packaging process can be detected according to the number of the substrates in the same cassette and the identification information, and the next packaging process can be executed after each substrate completes the corresponding packaging process.
In one possible implementation, the obtaining of the identification information corresponding to the chip carrier includes:
and identifying the identification code on the chip carrier to identify the identification information corresponding to the chip carrier.
In this embodiment, the identification code may be a barcode or a two-dimensional code, and identifying the identification code on the chip carrier may be reading identification information represented by the barcode or the two-dimensional code by using a barcode scanning gun or by using a visual identification method.
Step 202, according to the identification information corresponding to the chip carrier, target test information corresponding to the chip carrier is obtained from the server.
In this embodiment of the application, the target test information includes coordinates of the N chips to be packaged on the chip carrier thereof and first test results corresponding to the N chips to be packaged, where the first test results are obtained according to second test results corresponding to target processes of the chips to be packaged in the chip packaging process, for example, the target processes in the chip packaging process are a chip mounting process and a bonding process, respectively, and for the chip a to be packaged, the second test results corresponding to the chip a to be packaged in the chip mounting process and the bonding process are a chip mounting test result and a bonding result corresponding to the chip a to be packaged, respectively, and then the first test result of the chip a to be packaged is obtained according to the chip mounting test result and the bonding result corresponding to the chip a to be packaged.
In the embodiment of the application, each chip carrier has unique corresponding identification information, and the server stores target test information corresponding to the chip carrier, so that the first terminal can read the identification information corresponding to the chip carrier by using a barcode scanning gun or a visual identification manner, and obtain the target test information corresponding to the chip carrier (that is, data in a map file named with the identification information after update) from the server through communication connection with the server.
In a possible implementation manner, the obtaining target test information corresponding to the chip carrier from the server according to the identification information corresponding to the chip carrier includes:
sending a retrieval instruction to a server according to the identification information corresponding to the chip carrier;
and receiving target test information corresponding to the chip carrier from the server.
The retrieval instruction is used for instructing the server to retrieve target test information corresponding to the chip carrier stored in the server according to the identification information corresponding to the chip carrier.
In this embodiment of the application, the target test information corresponding to the chip carrier stored in the server may refer to data in a map file named with identification information, after the server receives a retrieval instruction from the first terminal, the server searches the map file named with the identification information according to the identification information corresponding to the chip carrier carried in the retrieval instruction, after the map file is retrieved, the map file is sent to the first terminal, and the first terminal reads the data in the map file, so as to obtain the target test information corresponding to the chip carrier undergoing the laser marking process.
And step 203, sending an unqualified instruction to the laser marking machine according to the target coordinates.
The first test result of the target coordinate is the coordinate of the unqualified chip to be packaged on the chip carrier, and the unqualified instruction is used for indicating the laser marking machine to mark the unqualified chip to be packaged at the target coordinate.
In the embodiment of the application, after the first terminal acquires the target test information corresponding to the chip carrier, the first terminal can acquire the target coordinates of the defective product and the defective product of the chip to be packaged according to the target information, so that the first terminal can send a disqualification instruction to the laser marking machine according to the target coordinates to control the laser marking machine to mark the defective product, and mark the qualified chip according to the marking rule.
The laser marking machine can mark the defective product by user-defined marking, for example, marking without any mark or marking with a fork, and the application does not limit the marking.
In one possible embodiment, failing the first test result comprises:
and if at least one second test result of the chips to be packaged in the second test results corresponding to all the target processes is unqualified, determining that the first test result corresponding to the chips to be packaged is unqualified.
In the embodiment of the present application, it is assumed that all target processes are a chip mounting process and a bonding process, for a chip B to be packaged, second test results of the chip B to be packaged in the chip mounting process and the bonding process are a chip mounting test result and a bonding result corresponding to the chip B to be packaged, respectively, and if any one of the chip mounting test result and the bonding result corresponding to the chip B to be packaged is unqualified, a first test result of the chip B to be packaged is unqualified.
It should be understood that after marking defective products, the laser marking machine loads the chip carrier of the chip to be packaged and still needs to be subjected to a cutting process or a rib cutting and forming process so as to package the chip to be packaged into an individual chip.
In the embodiment of the application, a first terminal connected to a laser marking machine can first obtain target test information corresponding to a chip carrier from a server by obtaining identification information corresponding to the chip carrier, wherein the target test information includes coordinates of N chips to be packaged on the chip carrier respectively, and first test results corresponding to the N chips to be packaged respectively, and the first test results are obtained according to second test results corresponding to a target process of the chips to be packaged in a chip packaging process, so that the application can be informed that a defective product can be timely tested by testing the target process in the chip packaging process, and can indicate the laser marking machine to mark the chips to be packaged at the target coordinates according to the target coordinates (i.e. coordinates of the chips to be packaged on the chip carrier, where the first test results are unqualified), defective products can be screened out according to the defective product marks. According to the scheme, the defective products are marked by recording the test result of the target process in the chip packaging process, the defective products in the chip can be screened out before the chip finished product is tested, and the yield of the chip is improved.
Referring to fig. 3, a schematic structural diagram of a method for screening a defective chip provided in the third embodiment of the present application is shown. The defective product screening method is applied to a server in a defective product screening system shown in fig. 1. As shown in fig. 3, the method for screening defective products may include the steps of:
step 301, receiving first test information corresponding to the chip carrier from the second terminal.
The second terminal is a device in communication connection with the first target process execution device, the first test information includes coordinates of the N chips to be packaged on the chip carrier respectively, and test results of the N chips to be packaged in the first target process, the first target process refers to a target process in which execution sequences are first in all the target processes, for example, the first target process is a chip mounting process, the first target process execution device is a chip mounter, and the first test information includes coordinates of the N chips to be packaged on the chip carrier respectively, and chip mounting test results of the N chips to be packaged. .
In this embodiment of the application, since the first target process in the target processes is a die attach process, the target process execution device is a chip mounter, and the second terminal is a device communicatively connected to the chip mounter, the first test information received by the server is test information of the chips to be packaged in the die attach process, and includes coordinates of each chip to be packaged on a chip carrier and a chip attach test result of each chip to be packaged.
Step 302, adding the test results respectively corresponding to the N chips to be packaged from the remaining target process execution device in the remaining target process to the first test information according to the execution sequence of the remaining target process, so as to update the first test information.
The remaining target processes refer to other target processes except the first target process among all target processes, the remaining target process execution equipment refers to other target process execution equipment except the first target process execution equipment among all target process execution equipment, and the target process execution equipment refers to equipment for executing the corresponding target processes; if the target process in the rest of the target processes, of which the execution sequence is located at the second position, is a plastic packaging process and the corresponding target process execution equipment is a plastic packaging machine, the test results respectively corresponding to the N chips to be packaged from the plastic packaging machine in the bonding process are plastic packaging results respectively corresponding to the N chips to be packaged; adding the test results to the first test information according to the execution sequence of the remaining target processes may refer to first adding bonding results corresponding to the N chips to be packaged to the first test information, and then adding plastic packaging results corresponding to the N chips to be packaged to the first test information.
In this embodiment of the application, after the target process execution device in the first target process performs the die attach operation on the chips in the chip carrier, the second terminal in communication connection with the die attach machine may generate the first test information according to the die attach test result and the coordinates corresponding to each chip to be packaged in the chip carrier, and when all target processes are directed to the chips to be packaged in the same chip carrier, the second target process does not need to generate new test information, and only needs to add the test result and the coordinates of the second target process corresponding to the chips to be packaged in the same chip carrier to the first test information, and update the first test information.
It should be understood that the first target process and the second target process in the embodiments of the present application are arranged in the execution order of the target processes, and the execution order of the first target process is arranged before the execution order of the second target process.
It should also be understood that, all target processes after the first target process do not need to generate new test information for the chips to be packaged in the same chip carrier, and the test results respectively corresponding to the chips to be packaged in the target processes may be sequentially added to the test information generated when the first target process is performed according to the execution sequence of the target processes.
Step 303, after the test results corresponding to the target process are all added to the first test information, the first test information is updated, and the target test information corresponding to the chip carrier is obtained.
In the embodiment of the present application, the target test information includes test results of the chip to be packaged in all target processes.
In a possible embodiment, after adding the test results corresponding to all target processes to the first test information, the method further includes:
receiving the modification of a test result corresponding to at least one target process by a user;
and adding the modified test result corresponding to the at least one target process to the first test information to update the first test information.
In the embodiment of the application, in order to make the target detection information more accurate, a user may modify a test result corresponding to at least one target process on a terminal corresponding to the target process execution device based on a visual inspection result, and after receiving the modification of the test result corresponding to the at least one target process by the user, the server needs to add the modified test result corresponding to the at least one target process to the first test information to update the first test information.
Step 304, receiving a retrieval instruction from the first terminal, retrieving to obtain target test information according to the retrieval instruction, and sending the target test information to the first terminal.
In this embodiment of the application, the retrieval instruction of the first terminal carries identification information corresponding to the chip carrier, and the server may retrieve target test information corresponding to the indication information according to the identification information, and send the target test information to the first terminal after retrieving the target test information corresponding to the indication information, so that the first terminal obtains target coordinates of defective products in the chip to be packaged according to the target test information.
According to the method and the device, the first test information corresponding to the chip carrier from the second terminal is received, the test results corresponding to all target processes are added into the first test information, so that the target test information corresponding to the chip carrier can be obtained, the test result of each chip to be packaged in the target processes is obtained through the terminal in communication connection with the target process execution equipment, the test result is sent to the first terminal connected with the laser marking machine, the first terminal can judge whether the chip to be packaged is a qualified chip according to the test result of the target process of the chip to be packaged in the packaging process, namely, the defective products in the chip can be screened out before the chip finished product test, and the yield of the chip is improved.
Referring to fig. 4, a schematic structural diagram of a device for screening a defective product of a chip according to a fourth embodiment of the present application is shown, and for convenience of description, only the parts related to the embodiment of the present application are shown.
The defective screening device of the chip may specifically include the following modules:
an identifier obtaining module 401, configured to obtain identifier information corresponding to a chip carrier, where the chip carrier is used to load N chips to be packaged, where N is an integer greater than zero;
a target obtaining module 402, configured to obtain, from the server, target test information corresponding to the chip carrier according to identification information corresponding to the chip carrier, where the target test information includes coordinates of the N chips to be packaged on the chip carrier, respectively, and first test results corresponding to the N chips to be packaged, respectively, and the first test results are obtained according to second test results corresponding to a target process of the chips to be packaged in a chip packaging process;
and a defective product marking module 403, configured to send a defective instruction to the laser marking machine according to a target coordinate, where the target coordinate is a coordinate of the chip to be packaged on the chip carrier, where the first test result is a defective product, and the defective instruction is used to instruct the laser marking machine to mark a defective product on the chip to be packaged at the target coordinate.
In this embodiment, the identifier obtaining module 401 may specifically include the following sub-modules:
and the identification recognition submodule is used for recognizing the identification code on the chip carrier so as to recognize the identification information corresponding to the chip carrier.
In this embodiment of the present application, the target obtaining module 402 may specifically include the following sub-modules:
the retrieval instruction sending submodule is used for sending a retrieval instruction to the server according to the identification information corresponding to the chip carrier, and the retrieval instruction is used for indicating the server to retrieve target test information corresponding to the chip carrier stored in the server according to the identification information corresponding to the chip carrier;
and the target information receiving submodule is used for receiving target test information corresponding to the chip carrier from the server.
In this embodiment, the defective product marking module 403 may specifically include the following sub-modules:
and the result determining submodule is used for determining that the first test result corresponding to the chip to be packaged is unqualified if at least one second test result is unqualified in the second test results corresponding to all target procedures of the chip to be packaged.
The device for screening defective products of a chip provided in the embodiment of the present application can be applied to the foregoing method embodiments, and for details, reference is made to the description of the foregoing method embodiments, which is not described herein again.
Referring to fig. 5, a schematic structural diagram of a device for screening a defective product of a chip according to a fifth embodiment of the present application is shown, and for convenience of description, only the parts related to the fifth embodiment of the present application are shown.
The defective screening apparatus for chips may specifically include the following modules:
the information receiving module 501 is configured to receive first test information corresponding to a chip carrier from a second terminal, where the second terminal is a device in communication connection with a first target process execution device, the first test information includes coordinates of N chips to be packaged on the chip carrier, respectively, and test results corresponding to the N chips to be packaged in a first target process, and the first target process is a target process in which execution sequences are first in all target processes;
an information updating module 502, configured to add, to the first test information according to an execution sequence of the remaining target processes, test results corresponding to the N chips to be packaged in the remaining target processes from the remaining target process execution device, so as to update the first test information, where the remaining target processes refer to other target processes except the first target process in all target processes, and the remaining target process execution device refers to other target process execution devices except the first target process execution device in all target process execution devices;
a target determining module 503, configured to update the first test information until the test results corresponding to all target processes are added to the first test information, so as to obtain target test information corresponding to the chip carrier;
and the target sending module 504 is configured to receive a retrieval instruction from the first terminal, retrieve target test information according to the retrieval instruction, and send the target test information to the first terminal.
In this embodiment, the defective screening apparatus for a chip further includes:
the modification module is used for receiving the modification of the test result corresponding to at least one target process by a user;
and the information updating module is used for adding the modified test result corresponding to the at least one target process to the first test information so as to update the first test information.
The device for screening defective products of a chip provided in the embodiment of the present application can be applied to the foregoing method embodiments, and for details, reference is made to the description of the foregoing method embodiments, which is not described herein again.
Fig. 6 is a schematic structural diagram of a terminal according to a sixth embodiment of the present application. As shown in fig. 6, the terminal 600 of this embodiment includes: at least one processor 610 (only one is shown in fig. 6), a memory 620, and a computer program 621 stored in the memory 620 and operable on the at least one processor 610, wherein the processor 610 executes the computer program 621 to implement the steps in the method for screening a defective product of the chip in the embodiment.
The terminal 600 may be a desktop computer, a notebook, a palm computer, a cloud server, or other computing devices. The terminal may include, but is not limited to, a processor 610, a memory 620. Those skilled in the art will appreciate that fig. 6 is only an example of the terminal 600, and does not constitute a limitation to the terminal 600, and may include more or less components than those shown, or combine some components, or different components, such as input and output devices, network access devices, etc.
The Processor 610 may be a Central Processing Unit (CPU), and the Processor 610 may be other general purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field-Programmable Gate arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The storage 620 may in some embodiments be an internal storage unit of the terminal 600, such as a hard disk or a memory of the terminal 600. The memory 620 may also be an external storage device of the terminal 600 in other embodiments, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), etc. provided on the terminal 600. Further, the memory 620 may also include both an internal storage unit and an external storage device of the terminal 600. The memory 620 is used for storing an operating system, an application program, a BootLoader (BootLoader), data, and other programs, such as program codes of the computer programs. The memory 620 may also be used to temporarily store data that has been output or is to be output.
Fig. 7 is a schematic structural diagram of a server according to a seventh embodiment of the present application. As shown in fig. 7, the server 700 of this embodiment includes: at least one processor 710 (only one is shown in fig. 7), a memory 720, and a computer program 721 stored in the memory 720 and operable on the at least one processor 710, the processor 710 implementing the steps in the method embodiment for screening a defective product of the chip as described above when executing the computer program 721.
The server 700 may be a computing device such as a desktop computer, a notebook, a palm computer, and a cloud server. The server may include, but is not limited to, a processor 710, a memory 720. Those skilled in the art will appreciate that fig. 7 is merely an example of server 700 and does not constitute a limitation on server 700 and may include more or fewer components than shown, or some components in combination, or different components, such as input output devices, network access devices, etc.
The Processor 710 may be a Central Processing Unit (CPU), and the Processor 710 may be other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic device, discrete hardware component, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The storage 720 may be an internal storage unit of the server 700 in some embodiments, such as a hard disk or a memory of the server 700. The memory 720 may also be an external storage device of the server 700 in other embodiments, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), etc. provided on the server 700. Further, the memory 720 may also include both an internal storage unit and an external storage device of the server 700. The memory 720 is used for storing an operating system, an application program, a BootLoader (BootLoader), data, and other programs, such as a program code of the computer program. The memory 720 may also be used to temporarily store data that has been output or is to be output.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-mentioned functions. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only used for distinguishing one functional unit from another, and are not used for limiting the protection scope of the present application. The specific working processes of the units and modules in the system may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus/terminal and method may be implemented in other ways. For example, the above-described apparatus/terminal embodiments are merely illustrative, and for example, the division of the modules or units is only one logical division, and there may be other divisions when actually implemented, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated module/unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, all or part of the flow in the method of the embodiments described above can be realized by a computer program, which can be stored in a computer-readable storage medium and can realize the steps of the embodiments of the methods described above when the computer program is executed by a processor. Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, etc. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, usb disk, removable hard disk, magnetic disk, optical disk, computer Memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier signal, telecommunications signal, software distribution medium, and the like. It should be noted that the computer readable medium may contain content that is subject to appropriate increase or decrease as required by legislation and patent practice in jurisdictions, for example, in some jurisdictions, computer readable media does not include electrical carrier signals and telecommunications signals as is required by legislation and patent practice.
When the computer program product runs on a terminal, the steps in the method embodiments can be implemented when the terminal executes the computer program product.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same. Although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.

Claims (10)

1. A method for screening defective products of a chip is applied to a first terminal, and comprises the following steps:
acquiring identification information corresponding to a chip carrier, wherein the chip carrier is used for loading N chips to be packaged, and N is an integer greater than zero;
acquiring target test information corresponding to the chip carrier from a server according to identification information corresponding to the chip carrier, wherein the target test information comprises coordinates of the N chips to be packaged on the chip carrier respectively and first test results corresponding to the N chips to be packaged respectively, and the first test results are obtained according to second test results corresponding to target processes of the chips to be packaged in a chip packaging process;
and sending a disqualification instruction to a laser marking machine according to a target coordinate, wherein the target coordinate is the coordinate of the chip to be packaged on the chip carrier, the first test result of which is disqualified, and the disqualification instruction is used for indicating the laser marking machine to mark the defective product of the chip to be packaged at the target coordinate.
2. The method for screening defective products according to claim 1, wherein the obtaining of the identification information corresponding to the chip carrier includes:
and identifying the identification code on the chip carrier so as to identify the identification information corresponding to the chip carrier.
3. The method for screening defective products according to claim 1, wherein the obtaining target test information corresponding to the chip carrier from a server according to the identification information corresponding to the chip carrier includes:
sending a retrieval instruction to a server according to the identification information corresponding to the chip carrier, wherein the retrieval instruction is used for instructing the server to retrieve target test information corresponding to the chip carrier, which is stored in the server, according to the identification information corresponding to the chip carrier;
and receiving target test information corresponding to the chip carrier from the server.
4. The method of screening for rejects according to claim 1, wherein the first test result being a fail comprises:
and if at least one second test result of the chips to be packaged in the second test results corresponding to all the target processes is unqualified, determining that the first test result corresponding to the chips to be packaged is unqualified.
5. A method for screening defective products of a chip is applied to a server, and the method for screening defective products comprises the following steps:
receiving first test information corresponding to a chip carrier from a second terminal, wherein the second terminal is equipment in communication connection with first target process execution equipment, the first test information comprises coordinates of N chips to be packaged on the chip carrier respectively and corresponding test results of the N chips to be packaged in a first target process, and the first target process is a target process in which execution sequence is first in all the target processes;
adding test results respectively corresponding to the N chips to be packaged in the remaining target processes from the remaining target process execution equipment to the first test information according to the execution sequence of the remaining target processes so as to update the first test information, wherein the remaining target processes refer to other target processes except the first target process in all target processes, and the remaining target process execution equipment refers to other target process execution equipment except the first target process execution equipment in all target process execution equipment;
after the test results corresponding to all target processes are added to the first test information, the first test information is updated, and target test information corresponding to the chip carrier is obtained;
and receiving a retrieval instruction from a first terminal, retrieving the target test information according to the retrieval instruction, and sending the target test information to the first terminal.
6. The method for screening for defective products according to claim 5, wherein the step of adding the test results corresponding to all the target processes to the first test information further comprises:
receiving the modification of a test result corresponding to at least one target process by a user;
and adding the modified test result corresponding to at least one target process to the first test information so as to update the first test information.
7. The utility model provides a defective products sieving mechanism of chip which characterized in that is applied to first terminal, defective products sieving mechanism includes:
the chip packaging device comprises an identification acquisition module, a chip packaging module and a chip packaging module, wherein the identification acquisition module is used for acquiring identification information corresponding to a chip carrier, the chip carrier is used for loading N chips to be packaged, and N is an integer greater than zero;
the target obtaining module is used for obtaining target test information corresponding to the chip carrier from a server according to the identification information corresponding to the chip carrier, wherein the target test information comprises coordinates of the N chips to be packaged on the chip carrier respectively and first test results corresponding to the N chips to be packaged respectively, and the first test results are obtained according to second test results corresponding to target processes of the chips to be packaged in a chip packaging process;
and the defective product marking module is used for sending a defective instruction to the laser marking machine according to a target coordinate, wherein the target coordinate is the coordinate of the chip to be packaged on the chip carrier, the first test result of which is unqualified, and the defective instruction is used for indicating the laser marking machine to mark the defective product of the chip to be packaged at the target coordinate.
8. The utility model provides a defective products sieving mechanism of chip which characterized in that is applied to the server, defective products sieving mechanism includes:
the information receiving module is used for receiving first test information corresponding to a chip carrier from a second terminal, wherein the second terminal is equipment in communication connection with first target process execution equipment, the first test information comprises coordinates of N chips to be packaged on the chip carrier respectively and corresponding test results of the N chips to be packaged in a first target process, and the first target process refers to a target process in which execution sequences are positioned at the head in all the target processes;
an information updating module, configured to add test results corresponding to the N chips to be packaged in remaining target processes from remaining target process execution devices to the first test information according to an execution order of the remaining target processes to update the first test information, where the remaining target processes refer to other target processes except the first target process in all target processes, and the remaining target process execution devices refer to other target process execution devices except the first target process execution device in all target process execution devices;
the target determining module is used for updating the first test information until the test results corresponding to all target processes are added to the first test information, so as to obtain target test information corresponding to the chip carrier;
and the target sending module is used for receiving a retrieval instruction from a first terminal, retrieving the target test information according to the retrieval instruction, and sending the target test information to the first terminal.
9. A terminal comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the steps of the method according to any of claims 1 to 4 when executing the computer program.
10. A server comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the steps of the method according to any of claims 5 to 6 are implemented when the computer program is executed by the processor.
CN202210143243.5A 2022-02-16 2022-02-16 Chip defective product screening method and device, terminal and server Active CN114632710B (en)

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