WO2005059928A1 - Semiconductor ceramic electronic component and method for manufacturing same - Google Patents

Semiconductor ceramic electronic component and method for manufacturing same Download PDF

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Publication number
WO2005059928A1
WO2005059928A1 PCT/JP2004/018941 JP2004018941W WO2005059928A1 WO 2005059928 A1 WO2005059928 A1 WO 2005059928A1 JP 2004018941 W JP2004018941 W JP 2004018941W WO 2005059928 A1 WO2005059928 A1 WO 2005059928A1
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WO
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Prior art keywords
insulator
semiconductor ceramic
green sheet
zntio
semiconductor
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PCT/JP2004/018941
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French (fr)
Japanese (ja)
Inventor
Kazutaka Nakamura
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Murata Manufacturing Co.,Ltd.
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Application filed by Murata Manufacturing Co.,Ltd. filed Critical Murata Manufacturing Co.,Ltd.
Priority to JP2005516371A priority Critical patent/JP4466567B2/en
Publication of WO2005059928A1 publication Critical patent/WO2005059928A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/10Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
    • H01C7/105Varistor cores
    • H01C7/108Metal oxide
    • H01C7/112ZnO type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/18Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material comprising a plurality of layers stacked between terminals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/018Dielectrics
    • H01G4/06Solid dielectrics
    • H01G4/08Inorganic dielectrics
    • H01G4/12Ceramic dielectrics
    • H01G4/1272Semiconductive ceramic capacitors

Definitions

  • the present invention relates to a semiconductor ceramic electronic component and a method of manufacturing the same, and more particularly, to a semiconductor ceramic electronic component manufactured using a laminating method and an integrated firing method, and particularly using a semiconductor ceramic body containing Zn ⁇ as a main component.
  • the present invention relates to an electronic component and a method for manufacturing the same.
  • non-linear resistors laminated voltage non-linear resistors (hereinafter simply referred to as “non-linear resistors”) have recently been widely used as noise protection elements in the mobile phone and other communication equipment markets.
  • non-linear resistors As a characteristic required for noise protection, a capability to suppress a voltage with a large surge withstand voltage and a low voltage is being demanded.
  • devices with smaller size and higher performance will be required, and with the increase in the number of electronic devices, lower cost components will be required. It has become.
  • a non-linear resistor including a ZnO-based semiconductor material is required to reach a grain boundary.
  • the electrical characteristics fluctuate due to the diffusion of the electric current or the like, and particularly immediately affect the breakdown voltage and the limit voltage.
  • Patent Document 1 JP-A-8-330106
  • the present invention solves the above-mentioned problems, and can be manufactured by using a lamination method and an integral firing method, is simple, has sufficient insulating properties, is small, has high performance, and is reliable. It is an object to provide a semiconductor ceramic electronic component having high performance and a method for manufacturing the same.
  • a semiconductor ceramic electronic component of the present invention includes: a ceramic element using a semiconductor ceramic body; an electrode electrically connected to the ceramic element; A semiconductor ceramic electronic component comprising: an insulator disposed so as to cover at least a portion where the electrode is not formed,
  • the insulator is characterized in that the insulator contains at least one of an oxide containing Sr and W and an oxide containing Zn and Ti.
  • the semiconductor ceramic electronic component of claim 2 is characterized in that the semiconductor ceramic body is a semiconductor ceramic body containing ZnO as a main component.
  • the semiconductor ceramic electronic component of claim 3 is
  • a semiconductor ceramic body containing ZnO as a main component and a metal oxide compound body that forms a potential barrier with ZnO are arranged inside the insulator,
  • An internal electrode disposed inside the insulator so that a conductive path passes through a joint surface of the joined body
  • an external electrode disposed on the surface of the insulator and electrically connected to the internal electrode.
  • the semiconductor ceramic electronic component of claim 4 is
  • An internal electrode disposed inside the insulator so that a conductive path passes through the semiconductor ceramic body
  • an external electrode disposed on the surface of the insulator and electrically connected to the internal electrode.
  • the semiconductor ceramic electronic component of claim 5 is
  • the oxide containing Sr and W is SrWO or a mixed crystal of SrWO and W ⁇ , and the oxide containing Zn and Ti is at least one of ZnTiO and ZnTiO.
  • the semiconductor ceramic electronic component of claim 6 when the insulator contains both ZnTiO and ZnTiO, the total content of ZnTiO and ZnTiO is 90 mol% or more; When containing either Zn TiO or ZnTiO, Zn
  • a semiconductor ceramic body containing ZnO as a main component, and a potential barrier with ZnO are formed inside an insulator containing at least one of an oxide containing Sr and W, and an oxide containing Zn and Ti.
  • a bonded body in which the metal oxide compound to be formed is bonded by a surface is provided, and an internal electrode is provided in such a manner that a conductive path passes through the bonded surface of the bonded body;
  • the ceramic green sheet serving as the insulator which mainly includes an insulator material containing at least one of oxides containing Sr and W, and oxides containing Zn and Ti, has through holes at predetermined positions.
  • a semiconductor ceramic body having ZnO as a main component and having varistor characteristics is provided inside the insulator, and an internal electrode is provided in such a manner that a conductive path passes through the semiconductor ceramic body; and A method of manufacturing a semiconductor ceramic electronic component having a structure in which an external electrode conducting to the internal electrode is provided on a surface of an insulator,
  • the ceramic green sheet serving as the insulator which mainly includes an insulator material containing at least one of oxides containing Sr and W, and oxides containing Zn and Ti, has through holes at predetermined positions.
  • a method for manufacturing a semiconductor ceramic electronic component according to claim 9 is characterized in that:
  • the oxide containing Sr and W is SrWO, or a mixed crystal of SrW ⁇ and W ⁇ , and the oxide containing Zn and Ti is at least one of ZnTiO and ZnTi ⁇ .
  • a method for manufacturing a semiconductor ceramic electronic component according to claim 10 is characterized in that:
  • the insulator material constituting the ceramic green sheet serving as the insulator Sr or Using calcined powders obtained by pre-calcining oxides containing W and W, and oxides containing Zn and Ti at 900 ° C to 1100 ° C,
  • the semiconductor ceramic powder and the metal oxide compound powder constituting the semiconductor ceramic paste and the metal oxide compound paste to be filled in the through holes were preliminarily calcined at 900 ° C to 1100 ° C as the semiconductor ceramic powder and the metal oxide compound powder. Using calcined powder
  • the insulator is made of ZnTi.
  • the semiconductor ceramic electronic component of the present invention includes a ceramic element using a semiconductor ceramic body, an electrode that conducts with the ceramic element, and at least one of the ceramic elements formed with an electrode.
  • the insulator contains at least one of an oxide containing Sr and W, and an oxide containing Zn and Ti as an insulator. Therefore, it is possible to obtain a semiconductor ceramic electronic component that has reliable surface insulation, has high environmental resistance, and has high resistance to the flux used during soldering.
  • the insulator containing at least one of oxides containing Sr and W, and oxides containing Zn and Ti used in the semiconductor ceramic electronic component of the present invention (claim 1) is a ZnO-based material, The feature is that the ZnO sintered body does not easily diffuse into each other even when heat or electricity is applied.
  • the above-mentioned insulator is subjected to current or sintering during sintering or to, for example, a bonded body in which a semiconductor ceramic body containing ZnO as a main component and a metal oxide compound body that forms a potential barrier with ZnO are bonded in a plane. It has good characteristics to prevent mutual diffusion even when voltage is applied.
  • highly reliable semiconductor ceramic electronic components for example, non-linear resistor Etc.
  • the semiconductor ceramic electronic component according to claim 3 is a semiconductor ceramic body containing ZnO as a main component in an insulator containing at least one of an oxide containing Sr and W, and an oxide containing Zn and Ti. And a metal oxide compound that forms a potential barrier, and a bonded body (ceramic element) in which the conductive path passes through the bonded surface of the bonded body.
  • the external electrodes that conduct to the internal electrodes are arranged on the surface of the insulator, it has reliable surface insulation, and has high environmental resistance and resistance to flux used during soldering.
  • a semiconductor ceramic electronic component such as a non-linear resistor can be obtained.
  • an insulator containing at least one of an oxide containing Sr and W, and an oxide containing Zn and Ti can form a potential barrier with ZnO, for example, a metal such as Pt, or a general formula: Metal oxide compound represented by MA BO (M is a rare earth element, A is Sr and Ba
  • B is at least one of Mn and Co, and X is greater than 0 and metal oxide compound such as 0.4 or less).
  • X is greater than 0 and metal oxide compound such as 0.4 or less.
  • the insulator reacts with Zn and Ti
  • the insulator is resistant to acids and alkalis as compared with a semiconductor ceramic containing ZnO as a main component. Electrode plating and electroless plating can be adequately dealt with, which is preferable.
  • A is represented by A BO, where M is a rare earth element and A is at least 3 of Sr and Ba
  • Examples of the metal oxide compound that is preferably used in the semiconductor ceramic electronic component of the present invention include La Sr MnO. Contains Sr
  • the resistance becomes low, so that the non-linearity in the high current region can be improved.
  • the value be larger than 0 and 0.4 or less.
  • the value of X exceeds 0.4, it becomes difficult to integrally sinter with Zn ⁇ , and it becomes difficult to obtain sufficient bonding properties between Zn ⁇ and the metal oxide compound.
  • the semiconductor ceramic electronic component according to claim 4 is characterized in that an insulator containing at least one of an oxide containing Sr and W, and an oxide containing Zn and Ti contains ZnO as a main component and a varistor characteristic. And an internal electrode is disposed inside the insulator so that the conductive path passes through the semiconductor ceramic body having varistor characteristics, and the surface of the insulator is electrically connected to the internal electrode. Since external electrodes are provided, they have reliable surface insulation, and have high resistance to environment and flux used during soldering. It becomes possible to obtain parts.
  • an insulator containing at least one of an oxide containing Sr and W and an oxide containing Zn and Ti is used as an insulator, a semiconductor having varistor characteristics when sintering a laminated body is used. It is possible to obtain a highly reliable semiconductor ceramic electronic component such as a non-linear resistor, for example, which has good characteristics to prevent mutual diffusion even when a current 'voltage is applied to the ceramic body.
  • the oxide containing Sr and W constituting the insulator Zn and Ti are used by using SrWO or a mixed crystal of SrWO and WO.
  • the electric conductivity is less than or equal to 8 measured, it is possible to design a low-voltage, small-capacitance element, and to cope with an increase in the frequency of the circuit.
  • the insulator is made of ZnTiO and ZnTiO.
  • the total content of ZnTiO and ZnTiO should be 90 mol%
  • Other substances that can be contained in the insulator include substances that are unlikely to react with semiconductor ceramics containing ZnO as a main component and have a sintering temperature higher than that of semiconductor ceramics containing Zn ⁇ as a main component.
  • ZrO and Zn TiO are exemplified.
  • the total content is less than 90 mol% and contains either ZnTiO or ZnTiO.
  • the content of either Zn TiO or ZnTiO is less than 90 mol%
  • the insulation resistance is lowered and corrosion due to the flux at the time of soldering is caused.
  • ZnO and the like may cause defects due to energy generated by current pulses such as ESD, which is not preferable.
  • the method for manufacturing a semiconductor ceramic electronic component according to the present invention (claim 7) is characterized in that A ceramic green sheet having a through hole at a predetermined position mainly composed of a body material and a ceramic green sheet having no through hole are prepared. A powder of a metal oxide compound which forms an electric potential barrier with Zn ⁇ is filled in a through hole of a ceramic green sheet in which a semiconductor ceramic paste containing Zn ⁇ as a main component is filled and another through hole is formed. A ceramic green sheet in which a metal oxide compound paste as a main component is filled and a conductor pattern is provided is prepared.A ceramic green sheet in which a semiconductor ceramic paste is filled in a through hole, and a metal oxide compound in a through hole.
  • a ceramic green sheet filled with paste, a ceramic green sheet provided with a conductor pattern, A ceramic green sheet with no holes formed is laminated and fired, and a semiconductor ceramic body containing ZnO as a main component and a metal oxide compound body that forms a potential barrier with ZnO are bonded inside by surface.
  • An insulator having a body (ceramic element) and internal electrodes arranged in such a manner that a conductive path passes through the joint surface of the joined body is formed, and an outer surface is formed on the surface so as to conduct with the internal electrodes.
  • An electrode is formed.
  • a semiconductor ceramic body containing ZnO as a main component and a potential barrier between ZnO and an oxide containing at least one of an oxide containing Sr and W and an oxide containing Zn and Ti are formed.
  • a bonded body (ceramic element) in which the metal oxide compound to be formed is bonded by a surface is provided, and an internal electrode is provided in such a manner that a conductive path passes through the bonded surface of the bonded body.
  • it has a structure in which an external electrode that is electrically connected to the internal electrode is disposed on the surface of the insulator, and has high environmental resistance and resistance to flux used for soldering. It becomes possible to obtain semiconductor ceramic electronic components such as bodies.
  • an insulator containing at least one of an oxide containing Sr and W, and an oxide containing Zn and Ti is formed as an insulator, the insulator may be used when sintering the laminated body, When current and voltage are applied to a joined body consisting of a semiconductor ceramic body composed mainly of ZnO and a metal oxide compound body that forms a potential barrier with ZnO, mutual diffusion does not occur, resulting in good characteristics and reliability. It is possible to manufacture semiconductor ceramic electronic components with high cost.
  • a laminated body formed by the laminating method is integrally fired to be formed simultaneously with an internal element and an insulator disposed around the element. Therefore, it is possible to form an insulator that has a sufficient thickness to ensure surface insulation and weather resistance, and that does not have thickness variations as seen when a conventional glass insulating layer is used. Will be possible.
  • a potential barrier is formed with ZnO, for example, Pt Or a metal oxide compound represented by the general formula: MA BO l 3
  • M is a rare earth element, A is at least one of Sr and Ba, B is at least one of Mn and Co, and X is greater than 0 and is 0.4 or less
  • the “ceramic green sheet on which the conductor pattern is provided” means that a through hole is formed at a predetermined position, and the through hole has a semiconductor.
  • the ceramic green sheet may be a ceramic green sheet filled with a ceramic paste or a metal oxide compound paste, or may be a ceramic green sheet having no through holes.
  • a ceramic green sheet having a through hole at a predetermined position mainly composed of the above-described insulator material, and a through hole are formed.
  • No ceramic green sheet was prepared, and the through hole of the ceramic green sheet having the through hole was filled with a semiconductor ceramic paste obtained by pasting a semiconductor ceramic powder having varistor characteristics, and a conductor pattern was provided.
  • a ceramic green sheet is prepared, and a ceramic green sheet in which a through hole is filled with a semiconductor ceramic paste, a ceramic green sheet in which a conductor pattern is provided, and a ceramic green sheet in which a through hole is not formed are laminated and fired. And a semiconductor ceramic body having varistor characteristics inside.
  • conductive path passes through a semiconductor ceramic body
  • An insulator having the internal electrode provided in the above is formed, and an external electrode is formed on the surface thereof so as to conduct with the internal electrode.
  • a semiconductor ceramic body having ZnO as a main component and relister characteristics is disposed inside an insulator containing at least one of an oxide containing Sr and W and an oxide containing Zn and Ti.
  • a structure in which an internal electrode is provided in such a manner that a conductive path passes through the semiconductor ceramic body, and an external electrode which is electrically connected to the internal electrode is provided on the surface of the insulator.
  • a semiconductor ceramic electronic component such as a non-linear resistor having high environmental performance and high resistance to a flux used in soldering.
  • an insulator containing at least one of an oxide containing Sr and W and an oxide containing Zn and Ti is formed as an insulator, the insulator may be used when sintering a laminated body, Even when a current or voltage is applied to a semiconductor ceramic body having a high reliability, it is possible to efficiently manufacture highly reliable semiconductor ceramic electronic components that have good characteristics to prevent mutual diffusion.
  • an insulator containing at least one of oxides containing Sr, W, and oxides containing Zn and Ti is formed, when sintering the laminated body, Zn ⁇ Even if a current 'voltage is applied to a bonded body in which a metal oxide compound that forms a potential barrier with the semiconductor ceramic body to be formed and ZnO has a surface, mutual diffusion does not occur even when a current is applied, and the characteristics are good and reliable.
  • Semiconductor ceramic electronics It is possible to manufacture the goods.
  • the insulator with the elements disposed inside is formed by the laminating method and integrated firing, it has a necessary and sufficient thickness to ensure surface insulation and weather resistance.
  • the “ceramic green sheet on which the conductor pattern is provided” means that a through hole is formed at a predetermined position, and the through hole is formed in the through hole.
  • the ceramic green sheet may be a ceramic green sheet filled with a semiconductor ceramic paste obtained by pasting a semiconductor ceramic powder having a lister characteristic, or may be a ceramic green sheet having no through-hole formed therein.
  • SrWO or a mixed crystal of SrWO and W ⁇ is used as the oxide containing Sr and W constituting the insulator.
  • At least one of ZnTiO and ZnTiO may be used as the oxide containing n and Ti.
  • a reliable insulator composition can be formed, and a semiconductor ceramic electronic component having excellent weather resistance can be obtained.
  • penetration of plating liquid and the like can be prevented, it is possible to efficiently manufacture semiconductor ceramic electronic components that can reliably cope with electrolytic plating and electroless plating of external electrodes. .
  • a calcined powder preliminarily calcined at 900 ° C to 1100 ° C
  • the semiconductor ceramic paste and the metal oxide compound powder constituting the semiconductor ceramic paste and metal oxide compound paste filled in the through-holes are used as semiconductor powder.
  • a calcined powder obtained by calcining ceramic powder and metal oxide compound powder in advance at 900 ° C to 1100 ° C it is possible to mix between different materials (insulator material and semiconductor ceramic or metal oxide compound) during sintering.
  • the insulator is made of ZnT.
  • the content of either ZnTiO or ZnTiO should be 90 mol% or more. In this case, it is possible to more reliably obtain a highly reliable semiconductor ceramic electronic component having good characteristics in which the environment resistance and the resistance to the flux used in soldering are large.
  • FIG. 1] (a)-(g) are diagrams for explaining a method of manufacturing a semiconductor ceramic electronic component (non-linear resistor) according to an embodiment of the present invention.
  • FIG. 2 (a) is a diagram for explaining a method of forming a crimp block (mother-laminate) by a lamination method in a method of manufacturing a semiconductor ceramic electronic component (non-linear resistor) which is useful in an embodiment of the present invention.
  • (b) is a cross-sectional view showing the internal structure of the formed crimp block (mother laminate).
  • FIG. 3 is a cross-sectional view showing a structure of an element obtained by cutting a crimp block and dividing the crimp block.
  • FIG. 4 is a cross-sectional view showing a structure of a semiconductor ceramic electronic component (non-linear resistor) manufactured by a method for manufacturing a semiconductor ceramic electronic component (non-linear resistor) according to an embodiment of the present invention.
  • FIG. 5 (a) is a diagram for explaining a method of forming a crimp block (mother-laminate) by a laminating method in a method of manufacturing a semiconductor ceramic electronic component (non-linear resistor) which is useful in an embodiment of the present invention.
  • (B) is a cross-sectional view showing the internal structure of the formed crimp block (mother laminate).
  • FIG. 6 is a cross-sectional view showing a structure of an element obtained by cutting a crimp block and dividing the crimp block.
  • FIG. 7 is a cross-sectional view showing a structure of a semiconductor ceramic electronic component (non-linear resistor) manufactured by a method of manufacturing a semiconductor ceramic electronic component (non-linear resistor) according to an embodiment of the present invention.
  • FIG. 8 is a cross-sectional view showing a configuration of a semiconductor ceramic electronic component (non-linear resistor) (Comparative Sample X) manufactured for comparison.
  • FIG. 9 is a cross-sectional view showing a configuration of a semiconductor ceramic electronic component (non-linear resistor) (comparative sample Y) manufactured for comparison.
  • a mother laminate having a plurality of internal elements is formed, and this is cut and divided into individual elements.
  • a semiconductor ceramic electronic component (non-linear resistor in this example) having a length of 1. Omm, a width of 0.5 mm and a thickness of 0.5 mm was manufactured.
  • the ceramic green sheet mainly composed of an insulator material for forming the insulator is shown below. It was produced by the method described above.
  • a mixed crystal powder of wo and wo (raw material powder) was obtained.
  • a through hole 2 having a diameter of 200 ⁇ m was formed in a predetermined ceramic green sheet (insulating sheet) 1 by a laser.
  • the above-mentioned SrWO powder and the mixed crystal powder of SrWO and W ⁇ were used for the insulator.
  • it is a substance that does not easily react with the semiconductor ceramic containing ZnO as a main component and has a sintering temperature higher than that of the semiconductor ceramic containing ZnO as a main component, such as ZnTi ⁇ .
  • La O, SrCO, and Mn O are each monoliths]; so that they become 0.35, 0.3, 1.0
  • the reaction product thus obtained is once ground in a ball mill until the average particle size becomes 1 ⁇ m or less, and a solvent and a varnish are added and paste-ridden to form a metal oxide compound that forms a potential barrier with ZnO. A paste was obtained.
  • La, Sr, and Mn reaction oxides are abbreviated as “LSMO”.
  • the slurry was calcined at 900 to 1000 ° C. for 2 hours. Pure water is added to this calcined material at a ratio of 1: 1 and the average particle size is reduced using PSZ beads with a diameter of 2 mm. Crushed to about 0.5 / m. Then, the slurry obtained in this manner is dewatered and dried, and then a solvent, a varnish, etc. are added to the obtained powder, and the paste is pasteurized to obtain a semiconductor ceramic paste having Zn ⁇ as a main component and having varistor characteristics. (Hereinafter simply referred to as “Zn ⁇ varistor material paste”).
  • the through hole 2 of the ceramic green sheet (insulating sheet) 1 for forming an insulator prepared in (1) above is filled with the Zn ⁇ paste 3 prepared in (2) above.
  • the metal oxide compound paste prepared in (3) above is inserted into the through holes 2 of the ceramic green sheet (insulated sheet) 1 for insulator formation prepared in (1) above.
  • (LSMO paste) 4 was filled by a screen printing method, and dried to prepare a Zn ⁇ paste-filled sheet 1 (la) and an LSMO paste-filled sheet 1 (lb).
  • the through-hole 2 of the ceramic green sheet (insulating sheet) 1 for forming an insulator prepared in (1) above was formed in the above-described (4).
  • a Zn ⁇ varistor material paste-filled sheet 1 (lc) was prepared by filling the ZnO paste material paste 13.
  • a Pt paste (conductor pattern for forming internal electrodes) 5 was printed by a screen printing method so as to be electrically connected to the ZnO paste 3 and the LSMO paste 4 filled in 2, and dried.
  • the Zn ⁇ varistor filled in the through hole 2 was provided on the surface of a predetermined sheet.
  • a Pt paste (conductor pattern for forming internal electrodes) 5 was printed by a screen printing method so as to be electrically connected to the material paste 13 and dried.
  • FIG. 2 (a) From the bottom to the top, an insulating sheet 1 with no through holes, an LSMO paste-filled sheet 1 (lb) with a conductive pattern, and a Zn ⁇ ⁇ 1.96 x 10 6 is filled and stacked in the following order: Filling sheet 1 (la), LSMO paste filling sheet 1 (1 b) with conductor pattern, and insulating sheet 1 without through holes
  • a crimping block (mother laminated body) 6 as shown in FIG. 2 (b) was prepared by crimping at a pressure of Pa. Also, as shown in FIG.
  • the crimping blocks 6 and 16 prepared in (7) are cut perpendicularly to the lamination surface by a dicer, and the individual elements (fired) are cut.
  • the element 7 shown in FIG. 3 is a bonded body (a ceramic element) in which a semiconductor ceramic body 22 containing ZnO as a main component and a metal oxide compound body 23 forming a potential barrier with ZnO are bonded inside a insulator 21. ) And internal electrodes 25a and 25b arranged in such a manner that the conductive path passes through the joint surface of the joined body 24.
  • the element 17 shown in FIG. 6 is disposed inside an insulator 21 in such a manner that a semiconductor ceramic body 27 mainly composed of ZnO and having varistor characteristics and a conductive path passes through the semiconductor ceramic body 27. It has a structure having internal electrodes 25a and 25b.
  • the element (firing precursor) 7 in FIG. 3 and the element (firing precursor) 17 in FIG. 6 cut and divided in (8) above were degreased at 600 ° C., and then the element (firing precursor) 7 in FIG. was fired at 1300 ° C, and the device (firing precursor) 17 in FIG. 6 was fired at 1200 ° C for 3 hours.
  • Ag—Pd (Ag / Pd weight ratio: 9) was added to both ends of the element (sintered body) fired in (9) above (7a) including the end faces facing each other from which the internal electrodes 25a and 25b were drawn out. / 1) The paste was applied and baked at 900 ° C for 10 minutes to form external electrodes 26a and 26b that are electrically connected to the internal electrodes 25a and 25b, as shown in FIG.
  • the internal electrodes 25a and 25b of the element (sintered body) 17 (17a) fired in the above (9) are drawn out.
  • Ag-Pd (Ag / Pd weight ratio 9/1) base is applied to both ends including the opposing end surfaces, and baked at 900 ° C for 10 minutes, as shown in Fig. 7.
  • Ethanol, toluene, and a dispersing agent are added to the Zn-based semiconductor ceramic powder prepared in (2) above to form a slurry, and a binder and a plasticizer are formed into a slurry.
  • a 50 ⁇ thick sheet (ZnO sheet) is prepared by the method, and ethanol, toluene and a dispersing agent are added to the powder of the metal oxide compound prepared in the above (3), and the mixture is dispersed. ⁇ ⁇ ⁇ After the slurry, a 50-zm-thick sheet (LSMO sheet) was prepared by the doctor blade method.
  • LSMO sheet (10 sheets) _Zn sheet (10 sheets)-LSMO sheet (10 sheets) are laminated and crimped in this order, and a block having a thickness of 1.18 mm is formed.
  • the shape was cut to a size of 0.58mm X 0.58mm. That power, 600. C to escape from the moon, 1250.
  • 3B temple with C ⁇ After firing, apply external electrode paste consisting of Ag / Pd (9/1) to the exposed LSMO material (upper and lower ends) on both upper and lower surfaces after sintering, 900 ° C After forming the external electrodes by baking for 10 minutes, apply a glass paste containing bismuth borosilicate as a main component to the area where the external electrodes are not formed, and bake at 700 ° C for 10 minutes.
  • a metal oxide compound (LSMO) 32 that forms a potential barrier with Zn ⁇ has a structure in which the metal oxide compound (LSMO) 32 is bonded and disposed.
  • a sample X for comparison was prepared in which the external electrodes 33a and 33b were formed on the exposed surface of the (LSMO) 32, and the portion where the external electrodes 33a and 33b had no force S was covered with the glass layer.
  • a sheet having a thickness of 50 / im was produced by a doctor blade method. After printing Pt paste in a predetermined pattern on this sheet, laminating and pressing, cutting to a predetermined size, degreased at 600 ° C, and baked at 1200 ° C for 3 hours, As shown in FIG. 9, an element (sintered body) in which a Pt internal electrode 42 is disposed in a semiconductor ceramic body 41 having Zn ⁇ as a main component and having varistor characteristics so as to face each other via a semiconductor ceramic layer 43. ) 44 was obtained.
  • external electrodes 45a and 45b electrically connected to the internal electrode 42 were formed as shown in FIG.
  • a glass paste containing bismuth phosphate as a main component is applied to a region where the external electrodes 45a and 45b are not formed, and baked at 700 ° C. for 10 minutes to form a glass layer 46 for comparison.
  • a sample Y was obtained.
  • the size of the sample of the present invention was 0.6 ⁇ 0.3 ⁇ 0.3 mm.
  • the size of each of the samples of Comparative Example X and Comparative Example Y was 1.0 X 0.5 X 0.5 mm.
  • Tables 1 and 2 show the measurement results for each characteristic.
  • the data of Comparative Samples X and Y in Table 1 and the data of Comparative Samples X and Y in Table 2 are the same data.
  • structure means A for the non-linear resistor having the structure shown in FIG. 4, B for the structure shown in FIG. 7, C for the structure shown in FIG. The structure shown in FIG.
  • Breakdown voltage V measures the voltage across the sample when a DC current of 1 mA flows
  • Voltage nonlinear coefficient ⁇ is a value obtained by the following equation from the voltage across the sample and the breakdown voltage when a DC current of 0.1 mA flows.
  • V / V measures the voltage across the sample when a DC current of 1 ⁇ A flows
  • Capacitance is the value measured at 1 MHz using an LCR meter.
  • the flux resistance was measured using a flux containing PbZSn solder and Br2% in order to check for deterioration during soldering.
  • the change in V before and after immersion was examined.
  • the rate of change (V before immersion / V -1 after immersion) x 100 (%) is shown in Tables 1 and 2 as flux resistance. I have.
  • V / V has a triangular waveform of 8 X 20 ⁇ s and a current peak of 1 mm.
  • V ratio V / V.
  • the ESD resistance was measured by applying a contact discharge type ESD generator, applying a static electricity of 30kV to both ends of the sample 100 times each, and examining the change in V before and after the application. This rate of change (
  • Tables 1 and 2 show the value of V before application / V -1 after application) ⁇ 100 (%) as ESD resistance.
  • a life test was performed by applying a voltage, and the change in V before and after 1000 hours of application was examined.
  • the substances that correspond to "others” are mainly Zn ⁇ and TiO.
  • the proportion of these substances varies depending on the composition ratio at the time of preparation and the calcining temperature (adjusted in the range of 900 to 1100 ° C).
  • ZrO can be included as another substance
  • Tables 1 and 2 show that samples No. 16 (Table 1) and No. 9 which are samples that are useful for the examples of the present invention.
  • breakdown voltage V voltage nonlinear coefficient: a
  • No. 16 and No. 17 samples with a total content of Zn TiO and ZnTiO of less than 90 mol%
  • the flux resistance, ESD resistance, life change rate, and the like are slightly unfavorable, and it is desirable that the total content of ZnTiO and ZnTiO should be 90 mol% or more.
  • a non-linear resistor semiconductor having a high environmental resistance and a high resistance to a flux used in soldering is obtained by integrally firing the laminate formed by the lamination method. Ceramic electronic components) can be manufactured efficiently.
  • a potential barrier is formed with ZnO, for example, Metals such as Pt and metal oxide compounds represented by the general formula: MA BO (
  • M is a rare earth element
  • A is at least one of Sr and Ba
  • B is at least one of Mn and Co
  • X is a metal oxide compound that is larger than 0 and 0.4 or less. Since it is possible to form an insulator which is not easily cracked immediately after bonding with the material system, a highly reliable non-linear resistor can be obtained.
  • the element is surely covered with an insulating layer (insulator), reduction by flux at the time of soldering such as reflow and reduction of electrical characteristics due to residual or permeated flux. It is possible to prevent a decrease and the like, and it is possible to improve environmental resistance such as weather resistance.
  • the element is covered with an insulating layer that is integrally sintered, surface current can be suppressed, leakage current can be reduced, and weather resistance can be improved.
  • a semiconductor which is partially deposited on the surface easily causes a surface discharge or is easily deteriorated by static electricity.
  • a mixed crystal containing SrWO and WO is referred to as an insulator material.
  • the dielectric constant is less than or equal to 8 measured, it is possible to design a low-voltage and small-capacitance element, and it is possible to cope with a high-frequency circuit in a circuit.
  • the invention of the present application is directed to a ceramic element using a semiconductor ceramic body, an electrode electrically connected to the ceramic element, and an insulator provided so as to cover at least a portion of the ceramic element where no electrode is formed.
  • a material containing at least one of an oxide containing Sr and W and an oxide containing Zn and Ti is used as an insulator. It is possible to obtain a semiconductor ceramic electronic component having a surface insulating property and having high environmental resistance and high resistance to flux used during soldering.
  • a half of A ceramic element using a conductive ceramic body is provided, and for example, a semiconductor ceramic electronic component such as a non-linear resistor can be manufactured using a laminating method and an integrated firing method. Semiconductor ceramic electronic components such as nonlinear resistors with high performance and high reliability can be manufactured efficiently.
  • the semiconductor ceramic electronic component obtained by the present invention for example, a linearly-coupled antibody
  • the semiconductor ceramic electronic component obtained by the present invention can be widely applied to various uses such as the field of mobile phones and other communication technologies, and the field of electronic devices used for such purposes. It is possible.

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Abstract

Disclosed is a simple, small-sized, high-performance semiconductor ceramic electronic component with high reliability and sufficient insulation which can be produced by a laminating process or integral firing process. A semiconductor ceramic electronic component comprises a bonded structure (ceramic element) (24) wherein a semiconductor ceramic body (22) mainly containing ZnO is surface-bonded to a metal oxide body (23) which forms a potential barrier with ZnO, internal electrodes (25a, 25b) which are arranged in such a manner that a current passes through the junction surface of the bonded structure (24), an insulating body (21) containing at least either of an oxide containing Sr and W and an oxide containing Zn and Ti, and external electrodes (26a, 26b) which are so formed on the surface of the insulating body as to be electrically connected to the internal electrodes (25a, 25b).

Description

明 細 書  Specification
半導体セラミック電子部品およびその製造方法  Semiconductor ceramic electronic component and method of manufacturing the same
技術分野  Technical field
[0001] 本願発明は、半導体セラミック電子部品およびその製造方法に関し、詳しくは、積 層工法および一体焼成工法を用いて製造され、特に Zn〇を主成分とする半導体セ ラミック体を用いた半導体セラミック電子部品およびその製造方法に関する。  The present invention relates to a semiconductor ceramic electronic component and a method of manufacturing the same, and more particularly, to a semiconductor ceramic electronic component manufactured using a laminating method and an integrated firing method, and particularly using a semiconductor ceramic body containing Zn〇 as a main component. The present invention relates to an electronic component and a method for manufacturing the same.
背景技術  Background art
[0002] 近年、セラミック電子部品は、基板実装の要求から小型化が求められており、チップ 型、もしくはセラミック層と内部電極層とが積層されてなる積層型のセラミック電子部 品が広く用いられている。  [0002] In recent years, ceramic electronic components have been required to be miniaturized due to the demand for mounting on a substrate, and chip-type or multilayer ceramic electronic components in which a ceramic layer and an internal electrode layer are laminated are widely used. ing.
中でも、積層型の電圧非直線抵抗体 (以下、単に「非直線抵抗体」という)は近年、 携帯電話やその他通信機市場において、ノイズ防護用素子として広く用いられてい る。これらの通信機の分野ではノイズ防護に必要な特性として、大きなサージ耐量ゃ 低い電圧で電圧を抑制する能力が要求されつつある。また、環境問題に対応して、 低消費電力に対応するため、実装時の電流リークの抑制に対する要求が高まってレ、 る。さらに、回路の高密度化に伴い、より小型で優れた能力を有する素子が要求され るようになるとともに、電子機器数量の伸びに伴い、部品も価格的に安価な素子が要 求されるようになっている。  Above all, laminated voltage non-linear resistors (hereinafter simply referred to as “non-linear resistors”) have recently been widely used as noise protection elements in the mobile phone and other communication equipment markets. In the field of these communication devices, as a characteristic required for noise protection, a capability to suppress a voltage with a large surge withstand voltage and a low voltage is being demanded. In addition, there is an increasing demand for suppressing current leakage during mounting in order to respond to environmental issues and to reduce power consumption. In addition, as the density of circuits increases, devices with smaller size and higher performance will be required, and with the increase in the number of electronic devices, lower cost components will be required. It has become.
[0003] そして、このように小型化された素子においては、外部電極間距離が小さくなるの は当然であり、素子表面に電流が流れやすぐ特に半導体素子であるバリスタなどに おいて、はんだ付け時のフラックス等による表面還元や、サージによる表面放電の影 響を受けやすいという、素子の表面の絶縁に関する問題点があった。  [0003] In such a miniaturized device, it is natural that the distance between external electrodes becomes small, and a current flows on the surface of the device and immediately after soldering, particularly in a varistor which is a semiconductor device. There is a problem related to the insulation of the element surface, which is susceptible to surface reduction due to flux at the time and surface discharge due to surge.
そこで、ガラスで素子の表面を覆う工法や、焼成時に Sbなどを反応させて、素子の 表面を絶縁化する工法が提案されてレ、る。  Therefore, a method of covering the surface of the element with glass or a method of insulating the surface of the element by reacting Sb or the like during firing has been proposed.
[0004] し力しながら、ガラスで素子表面を覆う工法や焼成時の素子の表面を絶縁化するェ 法では、ガラスなどの表面絶縁物の均一性を確保することが困難で、小型化すれば するほどその均一性が低下するという問題点がある。 [0005] また、形成される絶縁物の膜厚が薄いため、ピンホールが発生しやすぐピンホー ノレからのフラックスや水分の浸透により、素子が腐食や還元を受けて、電気特性の劣 化を引き起こすという問題点がある。一方、絶縁物の膜厚を厚くしょうとすると、焼成 時や、ガラスを焼き付ける段階で試料どうしの合着(くっつき)が発生しやすぐ歩留ま りが低下するという問題点がある。 In the method of covering the element surface with glass while applying force, or the method of insulating the element surface during firing, it is difficult to ensure the uniformity of a surface insulator such as glass, and it is difficult to reduce the size. There is a problem that the more uniform, the lower the uniformity. [0005] Furthermore, since the thickness of the formed insulator is thin, a pinhole is generated immediately and flux or moisture penetrates from the pinhole, causing the element to be corroded or reduced, thereby deteriorating electrical characteristics. There is a problem of causing. On the other hand, if the thickness of the insulator is increased, there is a problem in that the samples are attached (sticking) to each other at the time of firing or at the stage of baking the glass, and the yield is reduced immediately.
[0006] また、ガラスで素子の表面を覆う工法や焼成時に Sbなどを反応させることにより素 子の表面を絶縁化する工法において、特に ZnO系半導体材料を含む非直線抵抗 体は、粒界への拡散などにより電気特性の変動を招きやすぐ特に、ブレークダウン 電圧や制限電圧などに悪影響を及ぼすという問題点がある。  [0006] In a method of covering the surface of the element with glass or a method of insulating the surface of the element by reacting Sb or the like during firing, in particular, a non-linear resistor including a ZnO-based semiconductor material is required to reach a grain boundary. There is a problem that the electrical characteristics fluctuate due to the diffusion of the electric current or the like, and particularly immediately affect the breakdown voltage and the limit voltage.
特許文献 1:特開平 8 - 330106号公報  Patent Document 1: JP-A-8-330106
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0007] 本願発明は、上記問題点を解決するものであり、積層工法および一体焼成工法を 用いて製造することが可能で、簡便で十分な絶縁性を有する、小型、高性能で、信 頼性の高い半導体セラミック電子部品、およびその製造方法を提供することを課題と する。 [0007] The present invention solves the above-mentioned problems, and can be manufactured by using a lamination method and an integral firing method, is simple, has sufficient insulating properties, is small, has high performance, and is reliable. It is an object to provide a semiconductor ceramic electronic component having high performance and a method for manufacturing the same.
課題を解決するための手段  Means for solving the problem
[0008] 上記課題を解決するために、本願発明(請求項 1)の半導体セラミック電子部品は、 半導体セラミック体を用いたセラミック素子と、前記セラミック素子と導通する電極と、 前記セラミック素子のうち、少なくとも前記電極が形成されていない部分が覆われるよ うに配設された絶縁体とを備えた半導体セラミック電子部品であって、 [0008] In order to solve the above problems, a semiconductor ceramic electronic component of the present invention (claim 1) includes: a ceramic element using a semiconductor ceramic body; an electrode electrically connected to the ceramic element; A semiconductor ceramic electronic component comprising: an insulator disposed so as to cover at least a portion where the electrode is not formed,
前記絶縁体が、 Srおよび Wを含む酸化物、 Znおよび Tiを含む酸化物のうち少なく とも一方を含有することを特徴としてレヽる。  The insulator is characterized in that the insulator contains at least one of an oxide containing Sr and W and an oxide containing Zn and Ti.
[0009] また、請求項 2の半導体セラミック電子部品は、前記半導体セラミック体が、 ZnOを 主成分とする半導体セラミック体であることを特徴としている。 [0009] The semiconductor ceramic electronic component of claim 2 is characterized in that the semiconductor ceramic body is a semiconductor ceramic body containing ZnO as a main component.
[0010] また、請求項 3の半導体セラミック電子部品は、 [0010] The semiconductor ceramic electronic component of claim 3 is
Srおよび Wを含む酸化物、 Znおよび Tiを含む酸化物のうち少なくとも一方を含有 する絶縁体と、 前記絶縁体の内部に配設された、 ZnOを主成分とする半導体セラミック体と、 ZnO と電位障壁を形成する金属酸化化合物体とが面で接合された接合体と、 An insulator containing at least one of an oxide containing Sr and W, and an oxide containing Zn and Ti; A semiconductor ceramic body containing ZnO as a main component and a metal oxide compound body that forms a potential barrier with ZnO are arranged inside the insulator,
前記接合体の接合面を導電経路が通過するように前記絶縁体の内部に配設され た内部電極と、  An internal electrode disposed inside the insulator so that a conductive path passes through a joint surface of the joined body;
前記絶縁体の表面に配設された、前記内部電極と導通する外部電極と を具備することを特徴としてレ、る。  And an external electrode disposed on the surface of the insulator and electrically connected to the internal electrode.
[0011] また、請求項 4の半導体セラミック電子部品は、  [0011] The semiconductor ceramic electronic component of claim 4 is
Srおよび Wを含む酸化物、 Znおよび Tiを含む酸化物のうち少なくとも一方を含有 する絶縁体と、  An insulator containing at least one of an oxide containing Sr and W, and an oxide containing Zn and Ti;
前記絶縁体の内部に配設された、 Zn〇を主成分とレ リスタ特性を有する半導体 セラミック体と、  A semiconductor ceramic body disposed inside the insulator, having Zn〇 as a main component and having a resistor property;
前記半導体セラミック体を導電経路が通過するように前記絶縁体の内部に配設さ れた内部電極と、  An internal electrode disposed inside the insulator so that a conductive path passes through the semiconductor ceramic body;
前記絶縁体の表面に配設された、前記内部電極と導通する外部電極と を具備することを特徴としてレ、る。  And an external electrode disposed on the surface of the insulator and electrically connected to the internal electrode.
[0012] また、請求項 5の半導体セラミック電子部品は、  [0012] The semiconductor ceramic electronic component of claim 5 is
前記 Srおよび Wを含む酸化物が、 SrWO、または SrWOと W〇との混晶であり、 前記 Znおよび Tiを含む酸化物が Zn TiOおよび ZnTiOの少なくとも一方であるこ と  The oxide containing Sr and W is SrWO or a mixed crystal of SrWO and W〇, and the oxide containing Zn and Ti is at least one of ZnTiO and ZnTiO.
を特徴としている。  It is characterized by.
[0013] また、請求項 6の半導体セラミック電子部品は、前記絶縁体が、 Zn TiOと ZnTiO の両方を含有している場合には、 Zn TiOおよび ZnTiOの合計含有率が 90mol% 以上であり、 Zn TiOおよび ZnTiOのいずれか一方を含有している場合には、 Zn [0013] Further, in the semiconductor ceramic electronic component of claim 6, when the insulator contains both ZnTiO and ZnTiO, the total content of ZnTiO and ZnTiO is 90 mol% or more; When containing either Zn TiO or ZnTiO, Zn
TiOおよび ZnTiOのいずれか一方の含有率が 90mol%以上であることを特徴とし ている。 It is characterized in that the content of either one of TiO and ZnTiO is 90 mol% or more.
[0014] また、本願発明(請求項 7)の半導体セラミック電子部品の製造方法は、  [0014] Further, the method for manufacturing a semiconductor ceramic electronic component of the present invention (claim 7)
Srおよび Wを含む酸化物、 Znおよび Tiを含む酸化物のうち少なくとも一方を含有 する絶縁体の内部に、 ZnOを主成分とする半導体セラミック体と、 ZnOと電位障壁を 形成する金属酸化化合物体とが面で接合された接合体が配設されているとともに、 該接合体の接合面を導電経路が通過するような態様で内部電極が配設され、かつ、 絶縁体の表面に該内部電極と導通する外部電極が配設された構造を有する半導体 セラミック電子部品の製造方法であって、 Inside an insulator containing at least one of an oxide containing Sr and W, and an oxide containing Zn and Ti, a semiconductor ceramic body containing ZnO as a main component, and a potential barrier with ZnO are formed. A bonded body in which the metal oxide compound to be formed is bonded by a surface is provided, and an internal electrode is provided in such a manner that a conductive path passes through the bonded surface of the bonded body; A method for manufacturing a semiconductor ceramic electronic component having a structure in which an external electrode conducting to the internal electrode is provided on a surface of the semiconductor ceramic electronic component,
(a)前記絶縁体となるセラミックグリーンシートとして、 Srおよび Wを含む酸化物、 Zn および Tiを含む酸化物のうち少なくとも一方を含有する絶縁体材料を主成分とする、 所定の位置に貫通孔が形成されたセラミックグリーンシートおよび貫通孔が形成され ていないセラミックグリーンシートを用意する工程と、  (a) The ceramic green sheet serving as the insulator, which mainly includes an insulator material containing at least one of oxides containing Sr and W, and oxides containing Zn and Ti, has through holes at predetermined positions. A step of preparing a ceramic green sheet in which is formed and a ceramic green sheet in which a through hole is not formed;
(b)前記貫通孔が形成されたセラミックグリーンシートの貫通孔に、 Zn〇を主成分と する半導体セラミック粉末をペースト化した半導体セラミックペーストを充填する工程 と、  (b) filling a through-hole of the ceramic green sheet having the through-hole formed therein with a semiconductor ceramic paste obtained by converting a semiconductor ceramic powder containing Zn〇 as a main component into a paste;
(c)貫通孔が形成されたセラミックグリーンシートの貫通孔に、 Zn〇と電位障壁を形 成する金属酸化化合物の粉体を主成分とする金属酸化化合物粉末をペースト化し た金属酸化化合物ペーストを充填する工程と、  (c) A metal oxide compound paste in which a metal oxide compound powder mainly composed of a powder of a metal oxide compound forming a potential barrier with Zn〇 is pasted into a through hole of a ceramic green sheet having a through hole formed therein. Filling step;
(d)内部電極形成用の導体パターンが配設されたセラミックグリーンシートを用意す る工程と、  (d) preparing a ceramic green sheet provided with a conductor pattern for forming an internal electrode;
(e)貫通孔に半導体セラミックペーストが充填されたセラミックグリーンシートと、貫通 孔に前記金属酸化化合物ペーストが充填されたセラミックグリーンシートと、導体パタ ーンが配設されたセラミックグリーンシートと、貫通孔が形成されてレ、なレ、セラミックグ リ一ンシートを積層して積層体を形成する工程と、  (e) a ceramic green sheet in which a through hole is filled with a semiconductor ceramic paste, a ceramic green sheet in which a through hole is filled with the metal oxide compound paste, and a ceramic green sheet in which a conductor pattern is provided. Forming a laminate by laminating a ceramic green sheet having holes formed therein;
(f)前記積層体を焼成して、内部に、 Zn〇を主成分とする半導体セラミック体と、 Zn Oと電位障壁を形成する金属酸化化合物体とが面で接合された接合体と、接合体の 接合面を導電経路が通過するような態様で配設された内部電極とを備えた絶縁体を 形成する工程と、  (f) firing the laminate, inside, a semiconductor ceramic body containing Zn〇 as a main component, and a bonded body in which a metal oxide compound body that forms a potential barrier with ZnO is bonded to the surface, Forming an insulator with internal electrodes arranged in such a manner that the conductive path passes through the joint surface of the body; and
(g)前記絶縁体の表面に前記内部電極と導通するように外部電極を形成する工程と を具備することを特徴としてレ、る。  (g) forming an external electrode on the surface of the insulator so as to be electrically connected to the internal electrode.
また、本願発明(請求項 8)の半導体セラミック電子部品の製造方法は、  Further, the method for manufacturing a semiconductor ceramic electronic component of the present invention (claim 8)
Srおよび Wを含む酸化物、 Znおよび Tiを含む酸化物のうち少なくとも一方を含有 する絶縁体の内部に、 ZnOを主成分としバリスタ特性を有する半導体セラミック体が 配設されているとともに、該半導体セラミック体を導電経路が通過するような態様で内 部電極が配設され、かつ、絶縁体の表面に該内部電極と導通する外部電極が配設 された構造を有する半導体セラミック電子部品の製造方法であって、 Contains at least one of oxides containing Sr and W, and oxides containing Zn and Ti A semiconductor ceramic body having ZnO as a main component and having varistor characteristics is provided inside the insulator, and an internal electrode is provided in such a manner that a conductive path passes through the semiconductor ceramic body; and A method of manufacturing a semiconductor ceramic electronic component having a structure in which an external electrode conducting to the internal electrode is provided on a surface of an insulator,
(a)前記絶縁体となるセラミックグリーンシートとして、 Srおよび Wを含む酸化物、 Zn および Tiを含む酸化物のうち少なくとも一方を含有する絶縁体材料を主成分とする、 所定の位置に貫通孔が形成されたセラミックグリーンシートおよび貫通孔が形成され ていないセラミックグリーンシートを用意する工程と、  (a) The ceramic green sheet serving as the insulator, which mainly includes an insulator material containing at least one of oxides containing Sr and W, and oxides containing Zn and Ti, has through holes at predetermined positions. A step of preparing a ceramic green sheet in which is formed and a ceramic green sheet in which a through hole is not formed;
(b)前記貫通孔が形成されたセラミックグリーンシートの貫通孔に、バリスタ特性を有 する半導体セラミック粉末をペースト化した半導体セラミックペーストを充填する工程 と、  (b) filling a through-hole of the ceramic green sheet having the through-hole formed therein with a semiconductor ceramic paste obtained by converting a semiconductor ceramic powder having varistor characteristics into a paste;
(c)内部電極形成用の導体パターンが配設されたセラミックグリーンシートを用意す る工程と、  (c) a step of preparing a ceramic green sheet provided with a conductor pattern for forming an internal electrode;
(d)貫通孔に半導体セラミックペーストが充填されたセラミックグリーンシートと、導体 パターンが配設されたセラミックグリーンシートと、貫通孔が形成されてレ、なレ、セラミツ タグリーンシートを積層して積層体を形成する工程と、  (d) Laminating and laminating a ceramic green sheet in which a through hole is filled with a semiconductor ceramic paste, a ceramic green sheet in which a conductor pattern is provided, and a ceramic green sheet in which a through hole is formed. Forming a body;
(e)前記積層体を焼成して、内部に、バリスタ特性を有する半導体セラミック体と、該 半導体セラミック体を導電経路が通過するような態様で配設された内部電極とを備え た絶縁体を形成する工程と、  (e) firing the laminate to form an insulator having a semiconductor ceramic body having varistor characteristics and an internal electrode disposed in such a manner that a conductive path passes through the semiconductor ceramic body; Forming,
(f)前記絶縁体の表面に前記内部電極と導通するように外部電極を形成する工程と を具備することを特徴としてレ、る。  (f) forming an external electrode on the surface of the insulator so as to conduct with the internal electrode.
[0016] また、請求項 9の半導体セラミック電子部品の製造方法は、  [0016] A method for manufacturing a semiconductor ceramic electronic component according to claim 9 is characterized in that:
前記 Srおよび Wを含む酸化物が、 SrWO、または SrW〇と W〇との混晶であり、 前記 Znおよび Tiを含む酸化物が Zn TiOおよび ZnTi〇の少なくとも一方であるこ と  The oxide containing Sr and W is SrWO, or a mixed crystal of SrW〇 and W〇, and the oxide containing Zn and Ti is at least one of ZnTiO and ZnTi と.
を特徴としている。  It is characterized by.
[0017] また、請求項 10の半導体セラミック電子部品の製造方法は、  [0017] A method for manufacturing a semiconductor ceramic electronic component according to claim 10 is characterized in that:
前記絶縁体となるセラミックグリーンシートを構成する前記絶縁体材料として、 Srお よび Wを含む酸化物、 Znおよび Tiを含む酸化物を予め 900°C— 1100°Cで仮焼し た仮焼粉を用い、 As the insulator material constituting the ceramic green sheet serving as the insulator, Sr or Using calcined powders obtained by pre-calcining oxides containing W and W, and oxides containing Zn and Ti at 900 ° C to 1100 ° C,
前記貫通孔に充填される半導体セラミックペーストおよび金属酸化化合物ペースト を構成する半導体セラミック粉末および金属酸化化合物粉末として、半導体セラミツ ク粉末および金属酸化化合物粉末を予め 900°C— 1100°Cで仮焼した仮焼粉を用 レ、ること  The semiconductor ceramic powder and the metal oxide compound powder constituting the semiconductor ceramic paste and the metal oxide compound paste to be filled in the through holes were preliminarily calcined at 900 ° C to 1100 ° C as the semiconductor ceramic powder and the metal oxide compound powder. Using calcined powder
を特徴としている。  It is characterized by.
[0018] また、請求項 11の半導体セラミック電子部品の製造方法は、前記絶縁体が、 Zn Ti  [0018] In the method for manufacturing a semiconductor ceramic electronic component according to claim 11, the insulator is made of ZnTi.
2 2
〇と ZnTiOの両方を含有している場合には、 Zn TiOおよび ZnTiOの合計含有率If both 〇 and ZnTiO are contained, the total content of Zn TiO and ZnTiO
4 3 2 4 3 4 3 2 4 3
力 S90mol%以上であり、 Zn TiOおよび ZnTiOのいずれか一方を含有している場合  When the force is S90mol% or more and contains either ZnTiO or ZnTiO
2 4 3  2 4 3
には、 Zn TiOおよび ZnTiOのいずれか一方の含有率が 90mol%以上であることを  Requires that the content of either Zn TiO or ZnTiO be 90 mol% or more.
2 4 3  2 4 3
特徴としている。  Features.
発明の効果  The invention's effect
[0019] 本願発明(請求項 1)の半導体セラミック電子部品は、半導体セラミック体を用いた セラミック素子と、セラミック素子と導通する電極と、セラミック素子のうち、少なくとも電 極が形成されてレ、なレ、部分が覆われるように配設された絶縁体とを備えた半導体セ ラミック電子部品において、絶縁体として、 Srおよび Wを含む酸化物、 Znおよび Tiを 含む酸化物のうち少なくとも一方を含有するものを用いているので、確実な表面絶縁 性を有し、耐環境性やはんだ付の際に用いられるフラックスに対する耐性が大きい半 導体セラミック電子部品を得ることが可能になる。  [0019] The semiconductor ceramic electronic component of the present invention (claim 1) includes a ceramic element using a semiconductor ceramic body, an electrode that conducts with the ceramic element, and at least one of the ceramic elements formed with an electrode. In a semiconductor ceramic electronic component having an insulator disposed so as to cover a portion thereof, the insulator contains at least one of an oxide containing Sr and W, and an oxide containing Zn and Ti as an insulator. Therefore, it is possible to obtain a semiconductor ceramic electronic component that has reliable surface insulation, has high environmental resistance, and has high resistance to the flux used during soldering.
本願発明(請求項 1)の半導体セラミック電子部品において用いられている、 Srおよ び Wを含む酸化物、 Znおよび Tiを含む酸化物のうち少なくとも一方を含有する絶縁 体は、 ZnO系材料、 ZnO焼結体に対して、熱や電気が加わった場合にも相互拡散し にくい点に特徴がある。  The insulator containing at least one of oxides containing Sr and W, and oxides containing Zn and Ti used in the semiconductor ceramic electronic component of the present invention (claim 1) is a ZnO-based material, The feature is that the ZnO sintered body does not easily diffuse into each other even when heat or electricity is applied.
すなわち、上記絶縁体は、焼結の際や、例えば、 ZnOを主成分とする半導体セラミ ック体と ZnOと電位障壁を形成する金属酸化化合物体とが面で接合された接合体に 電流 ·電圧をカ卩えた場合にも相互拡散が生じにくぐ特性が良好で、かかる絶縁体を 用いることにより、信頼性の高い半導体セラミック電子部品(例えば、非直線抵抗体な ど)を得ることが可能になる。 That is, the above-mentioned insulator is subjected to current or sintering during sintering or to, for example, a bonded body in which a semiconductor ceramic body containing ZnO as a main component and a metal oxide compound body that forms a potential barrier with ZnO are bonded in a plane. It has good characteristics to prevent mutual diffusion even when voltage is applied. By using such an insulator, highly reliable semiconductor ceramic electronic components (for example, non-linear resistor Etc.) can be obtained.
[0020] また、請求項 2の半導体セラミック電子部品のように、半導体セラミック体として ZnO を主成分とする半導体セラミック体を用いることにより、必要とする半導体特性を確保 することが可能になり、本願発明をより実効あらしめることができる。  [0020] Further, by using a semiconductor ceramic body containing ZnO as a main component as the semiconductor ceramic body as in the semiconductor ceramic electronic component of claim 2, it becomes possible to secure required semiconductor characteristics. The invention can be made more effective.
[0021] 請求項 3の半導体セラミック電子部品は、 Srおよび Wを含む酸化物、 Znおよび Tiを 含む酸化物のうち少なくとも一方を含有する絶縁体内に、 ZnOを主成分とする半導 体セラミック体と、 ZnOと電位障壁を形成する金属酸化化合物体とが面で接合された 接合体 (セラミック素子)を配設するとともに、接合体の接合面を導電経路が通過する ように内部電極を配設し、絶縁体の表面に内部電極と導通する外部電極を配設する ようにしているので、確実な表面絶縁性を有し、耐環境性やはんだ付の際に用いら れるフラックスに対する耐性が大きい、例えば、非直線抵抗体などの半導体セラミック 電子部品を得ることが可能になる。  [0021] The semiconductor ceramic electronic component according to claim 3 is a semiconductor ceramic body containing ZnO as a main component in an insulator containing at least one of an oxide containing Sr and W, and an oxide containing Zn and Ti. And a metal oxide compound that forms a potential barrier, and a bonded body (ceramic element) in which the conductive path passes through the bonded surface of the bonded body. In addition, since the external electrodes that conduct to the internal electrodes are arranged on the surface of the insulator, it has reliable surface insulation, and has high environmental resistance and resistance to flux used during soldering. For example, a semiconductor ceramic electronic component such as a non-linear resistor can be obtained.
[0022] また、 Srおよび Wを含む酸化物、 Znおよび Tiを含む酸化物のうち少なくとも一方を 含有する絶縁体は、 ZnOと電位障壁を形成する、例えば、 Ptなどの金属や、一般式 : M A BOで表される金属酸化化合物(Mが希土類元素、 Aが Srおよび Baのうち Further, an insulator containing at least one of an oxide containing Sr and W, and an oxide containing Zn and Ti can form a potential barrier with ZnO, for example, a metal such as Pt, or a general formula: Metal oxide compound represented by MA BO (M is a rare earth element, A is Sr and Ba
1 3 13
少なくとも一方、 Bが Mnおよび Coのうち少なくとも一方で、 Xが 0よりも大きく 0. 4以下 であるような金属酸化化合物)などの材料系とも接合しやすぐクラックも発生しにくい ため、信頼性の高い、例えば、非直線抵抗体などの半導体セラミック電子部品を得る ことが可能になる。  At least one, B is at least one of Mn and Co, and X is greater than 0 and metal oxide compound such as 0.4 or less). For example, it is possible to obtain a semiconductor ceramic electronic component having a high resistance, such as a nonlinear resistor.
[0023] なお、 Znおよび Tiが反応した絶縁体の場合、 ZnOを主成分とする半導体セラミック と比較して酸やアルカリにも強いことから、特にめつき液等の進入を防止して、外部電 極の電解めつき、無電解めつきにも十分に対応することが可能になり、好ましい。  In the case where the insulator reacts with Zn and Ti, the insulator is resistant to acids and alkalis as compared with a semiconductor ceramic containing ZnO as a main component. Electrode plating and electroless plating can be adequately dealt with, which is preferable.
Zn〇と電位障壁を形成する金属酸化化合物としては、上述のように、一般式: M  As a metal oxide compound forming a potential barrier with Zn〇, as described above, the general formula: M
1-x 1-x
A BOで表されるものであって、 Mが希土類元素、 Aが Srおよび Baのうち少なくとも 3 A is represented by A BO, where M is a rare earth element and A is at least 3 of Sr and Ba
一方、 Bが Mnおよび Coのうち少なくとも一方で、 X力 SOよりも大きく 0. 4以下であるよう な金属酸化化合物を用いることが望ましぐこのような金属酸化化合物を用いることに より、確実に、所望の特性を備えた半導体セラミック電子部品を得ることが可能になる [0024] なお、本願発明の半導体セラミック電子部品において用いることが好ましい金属酸 化化合物としては、例えば、 La Sr MnOを挙げることができる。 Srを含有すること On the other hand, it is desirable to use a metal oxide compound in which B is at least one of Mn and Co and is larger than the X force SO and not more than 0.4. In addition, it is possible to obtain a semiconductor ceramic electronic component having desired characteristics. [0024] Examples of the metal oxide compound that is preferably used in the semiconductor ceramic electronic component of the present invention include La Sr MnO. Contains Sr
1 - 3  13
によって、低抵抗になるため、高電流域の非直線性を向上させることができる。  Accordingly, the resistance becomes low, so that the non-linearity in the high current region can be improved.
また、 M A BO中の Xの値は、金属酸化化合物層の抵抗を低くするとともに、電圧  In addition, the value of X in M ABO reduces the resistance of the metal oxide
3  Three
抑制能力を向上させてサージなどの過渡電圧に対する耐性を向上させる見地から、 0よりも大きく 0. 4以下とすることが望ましい。 Xの値が 0. 4を超える場合、 Zn〇との一 体焼結が困難になり、 Zn〇と金属酸化化合物の十分な接合性を得ることが困難にな る。  From the viewpoint of improving the suppression capability and improving the resistance to transient voltages such as surges, it is desirable that the value be larger than 0 and 0.4 or less. When the value of X exceeds 0.4, it becomes difficult to integrally sinter with Zn 、, and it becomes difficult to obtain sufficient bonding properties between Zn〇 and the metal oxide compound.
[0025] また、請求項 4の半導体セラミック電子部品は、 Srおよび Wを含む酸化物、 Znおよ び Tiを含む酸化物のうち少なくとも一方を含有する絶縁体内に、 ZnOを主成分とし バリスタ特性を有する半導体セラミック体を配設するとともに、バリスタ特性を有する半 導体セラミック体を導電経路が通過するように、内部電極を絶縁体の内部に配設し、 絶縁体の表面に内部電極と導通する外部電極を配設するようにしているので、確実 な表面絶縁性を有し、耐環境性やはんだ付の際に用いられるフラックスに対する耐 性が大きい、例えば、非直線抵抗体などの半導体セラミック電子部品を得ることが可 能になる。また、絶縁体として、 Srおよび Wを含む酸化物、 Znおよび Tiを含む酸化 物のうち少なくとも一方を含有する絶縁体を用いているので、積層体を焼結する際や 、バリスタ特性を有する半導体セラミック体に電流'電圧を加えた場合にも相互拡散 が生じにくぐ特性が良好で、信頼性の高い、例えば、非直線抵抗体などの半導体セ ラミック電子部品を得ることが可能になる。  [0025] The semiconductor ceramic electronic component according to claim 4 is characterized in that an insulator containing at least one of an oxide containing Sr and W, and an oxide containing Zn and Ti contains ZnO as a main component and a varistor characteristic. And an internal electrode is disposed inside the insulator so that the conductive path passes through the semiconductor ceramic body having varistor characteristics, and the surface of the insulator is electrically connected to the internal electrode. Since external electrodes are provided, they have reliable surface insulation, and have high resistance to environment and flux used during soldering. It becomes possible to obtain parts. In addition, since an insulator containing at least one of an oxide containing Sr and W and an oxide containing Zn and Ti is used as an insulator, a semiconductor having varistor characteristics when sintering a laminated body is used. It is possible to obtain a highly reliable semiconductor ceramic electronic component such as a non-linear resistor, for example, which has good characteristics to prevent mutual diffusion even when a current 'voltage is applied to the ceramic body.
[0026] また、請求項 5の半導体セラミック電子部品のように、絶縁体を構成する Srおよび W を含む酸化物として、 SrWO、または SrWOと WOとの混晶を用い、 Znおよび Tiを  [0026] Further, as in the semiconductor ceramic electronic component of claim 5, as the oxide containing Sr and W constituting the insulator, Zn and Ti are used by using SrWO or a mixed crystal of SrWO and WO.
4 4 3  4 4 3
含む酸化物として、 Zn Ti〇および ZnTiOの少なくとも一方を用いることにより、耐  By using at least one of Zn Ti〇 and ZnTiO as the oxide containing,
2 4 3  2 4 3
環境性やはんだ付の際に用いられるフラックスに対する耐性が大きぐ特性が良好で 、信頼性の高い半導体セラミック電子部品を得ることが可能になり、本願発明をより実 効あらしめることが可能になる。  It is possible to obtain a highly reliable semiconductor ceramic electronic component having good characteristics in which environmental resistance and resistance to flux used at the time of soldering are large, and to make the present invention more effective. .
特に SrWOと W〇を含有する混晶を用いた場合、 SrWOの存在により WOの融  In particular, when a mixed crystal containing SrWO and W 用 い is used, the presence of SrWO causes the melting of WO.
4 3 4 3 点が下がり、液相となる。これにより、焼成工程でクラックが発生した場合にも、クラッ クに WOが入り込み自己修復する作用を果たすため、非直線抵抗体の特性部周囲4 3 4 3 The point drops and becomes the liquid phase. As a result, even if cracks occur in the firing process, Around the characteristic part of the non-linear resistor
3 Three
に確実な絶縁体組成物を形成することが可能になり、耐候性に優れた半導体セラミツ ク電子部品を得ることができる。また、メツキ液等の浸入を防止することができるため、 外部電極の電解メツキ、無電解メツキにも確実に対応することが可能になる。なお、 w As a result, a reliable insulator composition can be formed, and a semiconductor ceramic electronic component having excellent weather resistance can be obtained. In addition, since penetration of plating liquid or the like can be prevented, it is possible to reliably cope with electrolytic plating and electroless plating of the external electrode. Note that w
Oの融点は非常に高いが、 SrWOの存在により液相化の温度が低下するので上記O has a very high melting point, but the presence of SrWO lowers the liquidus temperature.
3 4 3 4
のような作用効果が奏される。したがって、わずかに W〇を含有する SrW〇は、絶縁  The following effects are obtained. Therefore, SrW〇 containing a small amount of W〇 is insulated
3 4 体の材料として好適である。  It is suitable as a material of 34 bodies.
また、絶縁体材料として SrW〇を用いた場合、浮遊容量が小さくなり、絶縁体の誘  In addition, when SrW と し て is used as the insulator material, the stray capacitance is reduced, and the insulator is induced.
4  Four
電率が実測 8以下となるため、低電圧で、かつ静電容量の小さな素子を設計すること が可能になり、回路の高周波化にも対応することが可能になる。 Since the electric conductivity is less than or equal to 8 measured, it is possible to design a low-voltage, small-capacitance element, and to cope with an increase in the frequency of the circuit.
[0027] また、請求項 6の半導体セラミック電子部品のように、絶縁体が、 Zn TiOと ZnTiO [0027] Further, as in the semiconductor ceramic electronic component of claim 6, the insulator is made of ZnTiO and ZnTiO.
2 4 3 の両方を含有している場合には、 Zn TiOおよび ZnTiOの合計含有率を 90mol%  If both are contained, the total content of ZnTiO and ZnTiO should be 90 mol%
2 4 3  2 4 3
以上とし、 Zn TinOおよび ZnTiOのいずれか一方を含有している場合には、 Zn Ti  As described above, when one of Zn TinO and ZnTiO is contained, Zn TiO
2 4 3 2 2 4 3 2
Oおよび ZnTiOのいずれか一方の含有率を 90mol%以上とすることにより、より確By setting the content of either O or ZnTiO to 90 mol% or more,
4 3 4 3
実に、耐環境性やはんだ付の際に用いられるフラックスに対する耐性が大きぐ特性 が良好で、信頼性の高い半導体セラミック電子部品を得ることが可能になる。  In fact, it is possible to obtain a highly reliable semiconductor ceramic electronic component that has excellent characteristics such as high environmental resistance and resistance to flux used during soldering.
なお、絶縁体に含有させることができる他の物質としては、 ZnOを主成分とする半 導体セラミックと反応しにくいものであって、焼結温度が Zn〇を主成分とする半導体 セラミックより高いものであることが望ましぐ例えば、 ZrOや Zn TiOなどが例示され  Other substances that can be contained in the insulator include substances that are unlikely to react with semiconductor ceramics containing ZnO as a main component and have a sintering temperature higher than that of semiconductor ceramics containing Zn〇 as a main component. For example, ZrO and Zn TiO are exemplified.
2 2 4  2 2 4
る。  The
なお、絶縁体に、 ZnOや TiOなどが 10mol%を超える割合で存在した場合、すな  If ZnO, TiO, etc. are present in the insulator at a rate exceeding 10 mol%,
2  2
わち、 Zn TiOと ZnTiOの両方を含有している場合には、 Zn TiOおよび ZnTiOの  In other words, when both ZnTiO and ZnTiO are contained, ZnTiO and ZnTiO
2 4 3 2 4 3 合計含有率が 90mol%未満となり、 Zn TiOおよび ZnTiOのいずれか一方を含有し  2 4 3 2 4 3 The total content is less than 90 mol% and contains either ZnTiO or ZnTiO.
2 4 3  2 4 3
ている場合には、 Zn TiOおよび ZnTiOのいずれか一方の含有率が 90mol%未満  The content of either Zn TiO or ZnTiO is less than 90 mol%
2 4 3  2 4 3
になった場合、絶縁抵抗の低下とともにソルダリング時のフラックスなどによる腐食を 起こしやすぐまた、 ESDなどの電流パルスなどによるエネルギーにより、 ZnOなどが 欠陥を生じる場合があり好ましくない。  In such a case, the insulation resistance is lowered and corrosion due to the flux at the time of soldering is caused. Also, ZnO and the like may cause defects due to energy generated by current pulses such as ESD, which is not preferable.
[0028] また、本願発明(請求項 7)の半導体セラミック電子部品の製造方法は、上述の絶縁 体材料を主成分とする所定の位置に貫通孔が形成されたセラミックグリーンシートと、 貫通孔が形成されていないセラミックグリーンシートを用意し、貫通孔が形成されたセ ラミックグリーンシートの貫通孔に、 Zn〇を主成分とする半導体セラミックペーストを充 填し、かつ、他の貫通孔が形成されたセラミックグリーンシートの貫通孔に、 Zn〇と電 位障壁を形成する金属酸化化合物の粉体を主成分とする金属酸化化合物ペースト を充填するとともに、導体パターンが配設されたセラミックグリーンシートを用意し、貫 通孔に半導体セラミックペーストが充填されたセラミックグリーンシートと、貫通孔に金 属酸化化合物ペーストが充填されたセラミックグリーンシートと、導体パターンが配設 されたセラミックグリーンシートと、貫通孔が形成されていないセラミックグリーンシート を積層、焼成して、内部に、 ZnOを主成分とする半導体セラミック体と、 ZnOと電位障 壁を形成する金属酸化化合物体とが面で接合された接合体 (セラミック素子)と、接 合体の接合面を導電経路が通過するような態様で配設された内部電極とを備えた絶 縁体を形成し、その表面に内部電極と導通するように外部電極を形成するようにして いる。この製造方法により、 Srおよび Wを含む酸化物、 Znおよび Tiを含む酸化物の うち少なくとも一方を含有する絶縁体の内部に、 ZnOを主成分とする半導体セラミツ ク体と、 ZnOと電位障壁を形成する金属酸化化合物体とが面で接合された接合体( セラミック素子)が配設されているとともに、該接合体の接合面を導電経路が通過する ような態様で内部電極が配設され、かつ、絶縁体の表面に該内部電極と導通する外 部電極が配設された構造を有する、耐環境性やはんだ付の際に用レ、られるフラック スに対する耐性が大きい、例えば、非直線抵抗体などの半導体セラミック電子部品を 得ることが可能になる。また、絶縁体として、 Srおよび Wを含む酸化物、 Znおよび Ti を含む酸化物のうち少なくとも一方を含有する絶縁体を形成するようにしているので、 積層体の焼結の際や、 Zn〇を主成分とする半導体セラミック体と ZnOと電位障壁を 形成する金属酸化化合物体が面で接合された接合体に電流 ·電圧を加えた場合に も相互拡散が生じず、特性が良好で信頼性の高い半導体セラミック電子部品を製造 することが可能になる。 Further, the method for manufacturing a semiconductor ceramic electronic component according to the present invention (claim 7) is characterized in that A ceramic green sheet having a through hole at a predetermined position mainly composed of a body material and a ceramic green sheet having no through hole are prepared. A powder of a metal oxide compound which forms an electric potential barrier with Zn〇 is filled in a through hole of a ceramic green sheet in which a semiconductor ceramic paste containing Zn〇 as a main component is filled and another through hole is formed. A ceramic green sheet in which a metal oxide compound paste as a main component is filled and a conductor pattern is provided is prepared.A ceramic green sheet in which a semiconductor ceramic paste is filled in a through hole, and a metal oxide compound in a through hole. A ceramic green sheet filled with paste, a ceramic green sheet provided with a conductor pattern, A ceramic green sheet with no holes formed is laminated and fired, and a semiconductor ceramic body containing ZnO as a main component and a metal oxide compound body that forms a potential barrier with ZnO are bonded inside by surface. An insulator having a body (ceramic element) and internal electrodes arranged in such a manner that a conductive path passes through the joint surface of the joined body is formed, and an outer surface is formed on the surface so as to conduct with the internal electrodes. An electrode is formed. By this manufacturing method, a semiconductor ceramic body containing ZnO as a main component and a potential barrier between ZnO and an oxide containing at least one of an oxide containing Sr and W and an oxide containing Zn and Ti are formed. A bonded body (ceramic element) in which the metal oxide compound to be formed is bonded by a surface is provided, and an internal electrode is provided in such a manner that a conductive path passes through the bonded surface of the bonded body. In addition, it has a structure in which an external electrode that is electrically connected to the internal electrode is disposed on the surface of the insulator, and has high environmental resistance and resistance to flux used for soldering. It becomes possible to obtain semiconductor ceramic electronic components such as bodies. In addition, since an insulator containing at least one of an oxide containing Sr and W, and an oxide containing Zn and Ti is formed as an insulator, the insulator may be used when sintering the laminated body, When current and voltage are applied to a joined body consisting of a semiconductor ceramic body composed mainly of ZnO and a metal oxide compound body that forms a potential barrier with ZnO, mutual diffusion does not occur, resulting in good characteristics and reliability. It is possible to manufacture semiconductor ceramic electronic components with high cost.
また、本願発明においては、積層工法により形成された積層体を一体焼成すること により内部の素子とその周囲に配設された絶縁体と同時に形成するようにしているの で、表面絶縁性や耐候性を確保するために必要十分な厚みを有し、かつ、従来のガ ラスの絶縁層を用いる場合にみられるような厚みばらつきのない絶縁体を形成するこ とが可能になる。 Further, in the present invention, a laminated body formed by the laminating method is integrally fired to be formed simultaneously with an internal element and an insulator disposed around the element. Therefore, it is possible to form an insulator that has a sufficient thickness to ensure surface insulation and weather resistance, and that does not have thickness variations as seen when a conventional glass insulating layer is used. Will be possible.
また、耐環境性'耐フラックス性に優れた半導体セラミック電子部品を効率よく製造 することが可能になるとともに、積層工法により形成した積層体を一体焼成しているの で、小型化にも対応しやすぐ小型、高特性で信頼性の高い半導体セラミック電子部 品を効率よく製造することが可能になる。  In addition, it is possible to efficiently manufacture semiconductor ceramic electronic components with excellent environmental resistance and flux resistance, and because the laminated body formed by the laminating method is integrally fired, it can be used for miniaturization. As soon as possible, it will be possible to efficiently manufacture small, high-performance and highly reliable semiconductor ceramic electronic components.
また、絶縁体を構成する材料として、 Srおよび Wを含む酸化物、 Znおよび Tiを含 む酸化物のうち少なくとも一方を含有する材料を用いることにより、 ZnOと電位障壁を 形成する、例えば、 Ptなどの金属や、一般式: M A BOで表される金属酸化化合 l 3  Further, by using a material containing at least one of an oxide containing Sr and W and an oxide containing Zn and Ti as a material forming the insulator, a potential barrier is formed with ZnO, for example, Pt Or a metal oxide compound represented by the general formula: MA BO l 3
物(Mが希土類元素、 Aが Srおよび Baのうち少なくとも一方、 Bが Mnおよび Coのう ち少なくとも一方で、 Xが 0よりも大きぐ 0. 4以下であるような金属酸化化合物)などの 材料系とも接合しやすぐクラックも発生しにくい絶縁体を形成することができるため、 信頼性の高い半導体セラミック電子部品を得ることが可能になる。 (M is a rare earth element, A is at least one of Sr and Ba, B is at least one of Mn and Co, and X is greater than 0 and is 0.4 or less) Since it is possible to form an insulator that is not easily cracked immediately after bonding with a material system, a highly reliable semiconductor ceramic electronic component can be obtained.
なお、本願発明(請求項 7)の半導体セラミック電子部品の製造方法において、「導 体パターンが配設されたセラミックグリーンシート」とは、所定の位置に貫通孔が形成 され、該貫通孔に半導体セラミックペーストあるいは金属酸化化合物ペーストが充填 されたセラミックグリーンシートであってもよぐまた、貫通孔が形成されていないセラミ ックグリーンシートであってもよレ、。  In the method for manufacturing a semiconductor ceramic electronic component according to the present invention (claim 7), the “ceramic green sheet on which the conductor pattern is provided” means that a through hole is formed at a predetermined position, and the through hole has a semiconductor. The ceramic green sheet may be a ceramic green sheet filled with a ceramic paste or a metal oxide compound paste, or may be a ceramic green sheet having no through holes.
また、本願発明(請求項 8)の半導体セラミック電子部品の製造方法は、上述の絶縁 体材料を主成分とする所定の位置に貫通孔が形成されたセラミックグリーンシートと、 貫通孔が形成されていないセラミックグリーンシートを用意し、貫通孔が形成されたセ ラミックグリーンシートの貫通孔に、バリスタ特性を有する半導体セラミック粉末をぺー ストイ匕した半導体セラミックペーストを充填するとともに、導体パターンが配設されたセ ラミックグリーンシートを用意し、貫通孔に半導体セラミックペーストが充填されたセラ ミックグリーンシートと、導体パターンが配設されたセラミックグリーンシートと、貫通孔 が形成されていないセラミックグリーンシートを積層、焼成して、内部に、バリスタ特性 を有する半導体セラミック体と、半導体セラミック体を導電経路が通過するような態様 で配設された内部電極とを備えた絶縁体を形成し、その表面に内部電極と導通する ように外部電極を形成するようにしている。これにより、 Srおよび Wを含む酸化物、 Zn および Tiを含む酸化物のうち少なくとも一方を含有する絶縁体の内部に、 ZnOを主 成分とレ リスタ特性を有する半導体セラミック体が配設されているとともに、該半導 体セラミック体を導電経路が通過するような態様で内部電極が配設され、かつ、絶縁 体の表面に該内部電極と導通する外部電極が配設された構造を有する、耐環境性 やはんだ付の際に用いられるフラックスに対する耐性が大きい、例えば、非直線抵抗 体などの半導体セラミック電子部品を得ることが可能になる。また、絶縁体として、 Sr および Wを含む酸化物、 Znおよび Tiを含む酸化物のうち少なくとも一方を含有する 絶縁体を形成するようにしているので、積層体を焼結する際や、バリスタ特性を有す る半導体セラミック体に電流 ·電圧を加えた場合にも相互拡散が生じにくぐ特性が 良好で信頼性の高い半導体セラミック電子部品を効率よく製造することが可能になる また、絶縁体として、 Srおよび Wを含む酸化物、 Znおよび Tiを含む酸化物のうち少 なくとも一方を含有する絶縁体を形成するようにしているので、積層体の焼結の際や 、Zn〇を主成分とする半導体セラミック体と ZnOと電位障壁を形成する金属酸化化 合物体が面で接合された接合体に電流'電圧を加えた場合にも相互拡散が生じず、 特性が良好で信頼性の高い半導体セラミック電子部品を製造することが可能になる。 また、積層工法で、かつ、一体焼成を行って内部に素子の配設された絶縁体を形 成するようにしているので、表面絶縁性や耐候性を確保するために必要十分な厚み を有し、かつ、従来のガラスの絶縁層を用いる場合にみられるような厚みばらつきの ない絶縁体を形成することが可能になり、耐環境性 '耐フラックス性に優れた半導体 セラミック電子部品を効率よく製造することが可能になる。 Further, in the method of manufacturing a semiconductor ceramic electronic component according to the present invention (claim 8), a ceramic green sheet having a through hole at a predetermined position mainly composed of the above-described insulator material, and a through hole are formed. No ceramic green sheet was prepared, and the through hole of the ceramic green sheet having the through hole was filled with a semiconductor ceramic paste obtained by pasting a semiconductor ceramic powder having varistor characteristics, and a conductor pattern was provided. A ceramic green sheet is prepared, and a ceramic green sheet in which a through hole is filled with a semiconductor ceramic paste, a ceramic green sheet in which a conductor pattern is provided, and a ceramic green sheet in which a through hole is not formed are laminated and fired. And a semiconductor ceramic body having varistor characteristics inside. , Aspects such as conductive path passes through a semiconductor ceramic body An insulator having the internal electrode provided in the above is formed, and an external electrode is formed on the surface thereof so as to conduct with the internal electrode. As a result, a semiconductor ceramic body having ZnO as a main component and relister characteristics is disposed inside an insulator containing at least one of an oxide containing Sr and W and an oxide containing Zn and Ti. And a structure in which an internal electrode is provided in such a manner that a conductive path passes through the semiconductor ceramic body, and an external electrode which is electrically connected to the internal electrode is provided on the surface of the insulator. For example, it is possible to obtain a semiconductor ceramic electronic component such as a non-linear resistor having high environmental performance and high resistance to a flux used in soldering. In addition, since an insulator containing at least one of an oxide containing Sr and W and an oxide containing Zn and Ti is formed as an insulator, the insulator may be used when sintering a laminated body, Even when a current or voltage is applied to a semiconductor ceramic body having a high reliability, it is possible to efficiently manufacture highly reliable semiconductor ceramic electronic components that have good characteristics to prevent mutual diffusion. Since an insulator containing at least one of oxides containing Sr, W, and oxides containing Zn and Ti is formed, when sintering the laminated body, Zn〇 Even if a current 'voltage is applied to a bonded body in which a metal oxide compound that forms a potential barrier with the semiconductor ceramic body to be formed and ZnO has a surface, mutual diffusion does not occur even when a current is applied, and the characteristics are good and reliable. Semiconductor ceramic electronics It is possible to manufacture the goods. In addition, since the insulator with the elements disposed inside is formed by the laminating method and integrated firing, it has a necessary and sufficient thickness to ensure surface insulation and weather resistance. In addition, it is possible to form an insulator that does not vary in thickness as seen when using a conventional glass insulating layer, and to efficiently produce semiconductor ceramic electronic components with excellent environmental resistance and flux resistance. It can be manufactured.
なお、本願発明(請求項 8)の半導体セラミック電子部品の製造方法において、「導 体パターンが配設されたセラミックグリーンシート」とは、所定の位置に貫通孔が形成 され、該貫通孔にノ リスタ特性を有する半導体セラミック粉末をペーストィヒした半導体 セラミックペーストが充填されたセラミックグリーンシートであってもよぐまた、貫通孔 が形成されていないセラミックグリーンシートであってもよい。 [0030] また、請求項 9の半導体セラミック電子部品の製造方法のように、絶縁体を構成す る Srおよび Wを含む酸化物として、 SrWO、または SrWOと W〇との混晶を用レ、、 Z In the method for manufacturing a semiconductor ceramic electronic component according to the present invention (claim 8), the “ceramic green sheet on which the conductor pattern is provided” means that a through hole is formed at a predetermined position, and the through hole is formed in the through hole. The ceramic green sheet may be a ceramic green sheet filled with a semiconductor ceramic paste obtained by pasting a semiconductor ceramic powder having a lister characteristic, or may be a ceramic green sheet having no through-hole formed therein. Further, as in the method for manufacturing a semiconductor ceramic electronic component according to claim 9, SrWO or a mixed crystal of SrWO and W〇 is used as the oxide containing Sr and W constituting the insulator. , Z
4 4 3  4 4 3
nおよび Tiを含む酸化物として、 Zn TiOおよび ZnTiOの少なくとも一方を用いるこ  At least one of ZnTiO and ZnTiO may be used as the oxide containing n and Ti.
2 4 3  2 4 3
とにより、耐環境性やはんだ付の際に用いられるフラックスに対する耐性が大きぐ特 性が良好で、信頼性の高い非直線抵抗体を確実に製造することが可能になり、本願 発明をより実効あらしめることが可能になる。  As a result, it is possible to reliably manufacture a highly reliable non-linear resistor having excellent characteristics such as high environmental resistance and resistance to the flux used in soldering, and the invention of the present application is more effective. It becomes possible to summarize.
特に SrWOと W〇を含有する混晶を用いた場合、 SrWOの存在により WOの融  In particular, when a mixed crystal containing SrWO and W 用 い is used, the presence of SrWO causes the melting of WO.
4 3 4 3 点が下がり、液相となることにより、焼成工程でクラックが発生した場合にも、クラック に WOが入り込み自己修復する作用を果たすため、非直線抵抗体の特性部周囲に When the cracks occur in the firing process by lowering the 4 3 4 3 point and becoming a liquid phase, WO enters the cracks and performs the self-repairing function, so that the cracks around the characteristic portion of the nonlinear resistor
3 Three
確実な絶縁体組成物を形成することが可能になり、耐候性に優れた半導体セラミック 電子部品を得ることができる。また、メツキ液等の浸入を防止することができるため、 外部電極の電解メツキ、無電解メツキにも確実に対応することが可能な半導体セラミ ック電子部品を効率よく製造することが可能になる。  A reliable insulator composition can be formed, and a semiconductor ceramic electronic component having excellent weather resistance can be obtained. In addition, since penetration of plating liquid and the like can be prevented, it is possible to efficiently manufacture semiconductor ceramic electronic components that can reliably cope with electrolytic plating and electroless plating of external electrodes. .
[0031] また、請求項 10の半導体セラミック電子部品の製造方法のように、絶縁体となるセ ラミックグリーンシートを構成する絶縁体材料として、 Srおよび Wを含む酸化物、 Zn および Tiを含む酸化物を予め 900°C— 1100°Cで仮焼した仮焼粉を用い、貫通孔に 充填される半導体セラミックペーストおよび金属酸化化合物ペーストを構成する半導 体セラミック粉末および金属酸化化合物粉末として、半導体セラミック粉末および金 属酸化化合物粉末を予め 900°C— 1100°Cで仮焼した仮焼粉を用いることにより、焼 結の際に異種材料間(絶縁体材料と半導体セラミックや金属酸化化合物との間)に 相互拡散が生じることを防止することが可能になる。これとともに、焼結時の収縮を抑 制して、クラックなどの構造欠陥の発生を防止することが可能になる。さらに確実に、 耐環境性やはんだ付の際に用いられるフラックスに対する耐性が大きぐ特性が良好 で、信頼性の高い半導体セラミック電子部品を製造することが可能になる。  [0031] Further, as in the method for manufacturing a semiconductor ceramic electronic component according to claim 10, as an insulator material constituting a ceramic green sheet to be an insulator, an oxide containing Sr and W, an oxide containing Zn and Ti, Using a calcined powder preliminarily calcined at 900 ° C to 1100 ° C, the semiconductor ceramic paste and the metal oxide compound powder constituting the semiconductor ceramic paste and metal oxide compound paste filled in the through-holes are used as semiconductor powder. By using a calcined powder obtained by calcining ceramic powder and metal oxide compound powder in advance at 900 ° C to 1100 ° C, it is possible to mix between different materials (insulator material and semiconductor ceramic or metal oxide compound) during sintering. Between them) can be prevented from occurring. At the same time, it is possible to suppress shrinkage during sintering and prevent the occurrence of structural defects such as cracks. Furthermore, it is possible to manufacture a highly reliable semiconductor ceramic electronic component having good characteristics such as high environmental resistance and high resistance to flux used in soldering.
[0032] また、請求項 11の半導体セラミック電子部品の製造方法のように、絶縁体が、 Zn T  [0032] Further, as in the method for manufacturing a semiconductor ceramic electronic component according to claim 11, the insulator is made of ZnT.
2 i〇と ZnTiOの両方を含有している場合には、 Zn TiOおよび ZnTiOの合計含有 2 When both i〇 and ZnTiO are contained, the total content of Zn TiO and ZnTiO
4 3 2 4 3 率を 90mol%以上とし、 Zn TiOおよび ZnTiOのいずれか一方を含有している場合 When the 4 3 2 4 3 ratio is 90 mol% or more and either Zn TiO or ZnTiO is contained
2 4 3  2 4 3
には、 Zn TiOおよび ZnTiOのいずれか一方の含有率を 90mol%以上とするように した場合、より確実に、耐環境性やはんだ付の際に用いられるフラックスに対する耐 性が大きぐ特性が良好で、信頼性の高い半導体セラミック電子部品を得ることが可 肯 になる。 The content of either ZnTiO or ZnTiO should be 90 mol% or more. In this case, it is possible to more reliably obtain a highly reliable semiconductor ceramic electronic component having good characteristics in which the environment resistance and the resistance to the flux used in soldering are large.
図面の簡単な説明  Brief Description of Drawings
[0033] [図 l](a)— (g)は本願発明の実施例に力かる半導体セラミック電子部品(非直線抵抗 体)の製造方法を説明する図である。  [FIG. 1] (a)-(g) are diagrams for explaining a method of manufacturing a semiconductor ceramic electronic component (non-linear resistor) according to an embodiment of the present invention.
[図 2](a)は本願発明の実施例に力かる半導体セラミック電子部品(非直線抵抗体)の 製造方法において、積層工法により圧着ブロック(マザ一積層体)を形成する方法を 説明する図、(b)は形成された圧着ブロック(マザ一積層体)の内部構造を示す断面 図である。  FIG. 2 (a) is a diagram for explaining a method of forming a crimp block (mother-laminate) by a lamination method in a method of manufacturing a semiconductor ceramic electronic component (non-linear resistor) which is useful in an embodiment of the present invention. And (b) is a cross-sectional view showing the internal structure of the formed crimp block (mother laminate).
[図 3]圧着ブロックをカットして分割した素子の構造を示す断面図である。  FIG. 3 is a cross-sectional view showing a structure of an element obtained by cutting a crimp block and dividing the crimp block.
[図 4]本願発明の実施例に力かる半導体セラミック電子部品(非直線抵抗体)の製造 方法により製造された半導体セラミック電子部品(非直線抵抗体)の構造を示す断面 図である。  FIG. 4 is a cross-sectional view showing a structure of a semiconductor ceramic electronic component (non-linear resistor) manufactured by a method for manufacturing a semiconductor ceramic electronic component (non-linear resistor) according to an embodiment of the present invention.
[図 5](a)は本願発明の実施例に力かる半導体セラミック電子部品(非直線抵抗体)の 製造方法において、積層工法により圧着ブロック(マザ一積層体)を形成する方法を 説明する図、(b)は形成された圧着ブロック (マザ一積層体)の内部構造を示す断面 図である。  FIG. 5 (a) is a diagram for explaining a method of forming a crimp block (mother-laminate) by a laminating method in a method of manufacturing a semiconductor ceramic electronic component (non-linear resistor) which is useful in an embodiment of the present invention. (B) is a cross-sectional view showing the internal structure of the formed crimp block (mother laminate).
[図 6]圧着ブロックをカットして分割した素子の構造を示す断面図である。  FIG. 6 is a cross-sectional view showing a structure of an element obtained by cutting a crimp block and dividing the crimp block.
[図 7]本願発明の実施例に力、かる半導体セラミック電子部品(非直線抵抗体)の製造 方法により製造された半導体セラミック電子部品(非直線抵抗体)の構造を示す断面 図である。  FIG. 7 is a cross-sectional view showing a structure of a semiconductor ceramic electronic component (non-linear resistor) manufactured by a method of manufacturing a semiconductor ceramic electronic component (non-linear resistor) according to an embodiment of the present invention.
[図 8]比較のために作製した半導体セラミック電子部品(非直線抵抗体)(比較試料 X )の構成を示す断面図である。  FIG. 8 is a cross-sectional view showing a configuration of a semiconductor ceramic electronic component (non-linear resistor) (Comparative Sample X) manufactured for comparison.
[図 9]比較のために作製した半導体セラミック電子部品(非直線抵抗体)(比較試料 Y )の構成を示す断面図である。  FIG. 9 is a cross-sectional view showing a configuration of a semiconductor ceramic electronic component (non-linear resistor) (comparative sample Y) manufactured for comparison.
符号の説明  Explanation of symbols
[0034] 1 セラミックグリーンシート(絶縁シート) la Zn〇ペースト充填シート [0034] 1 Ceramic green sheet (insulating sheet) la Zn〇 paste filling sheet
lb LSMOペースト充填シート  lb LSMO paste filling sheet
lc ZnOバリスタ材料ペースト充填シート  LC ZnO varistor material paste filling sheet
2 貫通孔  2 Through hole
3 Zn〇ペースト  3 Zn〇 paste
4 金属酸化化合物ペースト(LSMOペースト)  4 Metal oxide compound paste (LSMO paste)
5 Ptペースト(内部電極形成用の導体パターン)  5 Pt paste (conductor pattern for internal electrode formation)
6, 16 圧着ブロック(マザ一積層体)  6, 16 Crimping block (one mother laminate)
7, 17 素子 (焼成前駆体)  7, 17 elements (fired precursor)
7a, 17a 焼成した素子(焼結体)  7a, 17a Fired element (sintered body)
13 ZnOバリスタ材料ペースト  13 ZnO varistor material paste
21 絶縁体  21 Insulator
22 半導体セラミック体  22 Semiconductor ceramic body
23 ZnOと電位障壁を形成する金属酸化化合物体  23 Metal oxide compound forming a potential barrier with ZnO
24 接合体 (セラミック素子)  24 Joint (Ceramic element)
25a, 25b 内部電極  25a, 25b Internal electrode
26a, 26b 外部電極  26a, 26b External electrode
27 バリスタ特性を有する半導体セラミック体  27 Semiconductor ceramic body with varistor characteristics
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0035] 以下に本願発明の実施例を示して、本願発明の特徴とするところをさらに詳しく説 明する。 The features of the present invention will be described in more detail below with reference to examples of the present invention.
実施例  Example
[0036] この実施例では、以下に示すように、複数の内部素子を有するマザ一積層体を形 成し、これを切断して個々の素子に分割する多数個取りの方法で、製品寸法が、長 さ 1. Omm、幅 0. 5mm、厚み 0. 5mmの半導体セラミック電子部品(この実施例では非 直線抵抗体)を製造した。  [0036] In this example, as shown below, a mother laminate having a plurality of internal elements is formed, and this is cut and divided into individual elements. A semiconductor ceramic electronic component (non-linear resistor in this example) having a length of 1. Omm, a width of 0.5 mm and a thickness of 0.5 mm was manufactured.
[0037] (1)絶縁体形成用のセラミックグリーンシートの作製  (1) Preparation of Ceramic Green Sheet for Forming Insulator
絶縁体を形成するための絶縁体材料を主成分とするセラミックグリーンシートを以下 の方法で作製した。 The ceramic green sheet mainly composed of an insulator material for forming the insulator is shown below. It was produced by the method described above.
約 1 /i m径の SrCO粉末と、約 2 μ m径の WO粉末を、 Sr、 Wそれぞれの元素比に  About 1 / im diameter of SrCO powder and about 2 μm diameter of WO powder were added to each element ratio of Sr and W.
3 3  3 3
して 1 · 0 : 1. 0、 1 · 0 : 1. 1、 1 · 0 : 1 · 2の割合でそれぞれ調合した。そして、得られた 調合粉末に対して、粉末総重量 1に対し 1の割合で純水を添加し、さらに直径が 2mm の PSZビーズを加え、ボールミルで 50時間粉砕混合することによりセラミックスラリー を調製した。  1 · 0: 1.0, 1 · 0: 1.1, 1 · 0: 1 · 2 at the ratio of each. Then, pure water was added to the prepared powder at a ratio of 1 to 1 of the total weight of the powder, PSZ beads having a diameter of 2 mm were further added, and the mixture was pulverized and mixed with a ball mill for 50 hours to prepare a ceramic slurry. did.
[0038] それから、セラミックスラリー中の水分を 150°Cで蒸発させて、 SrWO粉末および Sr  [0038] Then, the water in the ceramic slurry was evaporated at 150 ° C to obtain SrWO powder and SrWO powder.
4  Four
woと woの混晶の粉末 (原料粉末)を得た。  A mixed crystal powder of wo and wo (raw material powder) was obtained.
4 3  4 3
また、約 0. 5 μ m径の ZnO粉末と約 0. 4 μ m径の TiO (ルチル)粉末を、 Zn、 Tiの  Also, ZnO powder with a diameter of about 0.5 μm and TiO (rutile) powder with a diameter of about 0.4 μm
2  2
元素比で、 1. 0 : 1. 0、 1. 5 : 1. 0、 2. 0 : 1. 0、 2. 5 : 1. 0の割合でそれぞれ調合し た。そして、得られた調合粉末に対して、粉末総重量 1に対し 1の割合で純水を添カロ し、さらに直径が 2mmの PSZビーズを加え、ボールミルで 50時間粉砕混合することに よりセラミックスラリーを調製した。それから、セラミックスラリー中の水分を 150°Cで蒸 発、乾燥して Znおよび Tiを含む酸化物の粉末 (原料粉末)を得た。  Compounds were prepared at an elemental ratio of 1.0: 1.0, 1.5: 1.0, 2.0: 1.0, 2.5: 1.0, respectively. Then, pure water is added to the prepared powder at a ratio of 1 to 1 of the total weight of the powder, PSZ beads having a diameter of 2 mm are further added, and the mixture is pulverized and mixed with a ball mill for 50 hours. Was prepared. Then, the water in the ceramic slurry was evaporated at 150 ° C. and dried to obtain an oxide powder (raw material powder) containing Zn and Ti.
[0039] 次に、上述のようにして得た原料粉末(SrWOの結晶の粉末、 SrWOと WOの混 Next, the raw material powder obtained as described above (powder of SrWO crystal, a mixture of SrWO and WO)
4 4 3 晶の粉末、および Znおよび Tiを含む酸化物の粉末)を 900— 1100°Cで 2時間仮焼 し、得られた仮焼粉末をパルべライザ一で粗粉碎した後、仮焼粉末に対し 1: 1の割 合で純水を加えた。その後、 SrWOの結晶の粉末、 SrWOと WOの混晶の粉末を  443 crystal powder and oxide powder containing Zn and Ti) were calcined at 900-1100 ° C for 2 hours, and the calcined powder obtained was coarsely ground with a pulverizer and then calcined. Pure water was added at a 1: 1 ratio to the powder. After that, powder of SrWO crystal, powder of mixed crystal of SrWO and WO
4 4 3  4 4 3
、再び直径が 2mmの PSZビーズで平均粒径が 0. 7 /i mになるまで粉砕した。また、 同様にして Znおよび Tiを含む酸化物の粉末を、平均粒径が 0. 5 μ πιになるまで粉 砕した。それから、得られたスラリーを脱水、乾燥し、エタノールとトルエン、分散材を 加えて分散させた後、バインダー、可塑剤をカ卩ぇスラリーとした。  Then, it was pulverized again with PSZ beads having a diameter of 2 mm until the average particle diameter became 0.7 / im. Similarly, an oxide powder containing Zn and Ti was pulverized until the average particle size became 0.5 μπι. Then, the obtained slurry was dehydrated and dried, and ethanol, toluene, and a dispersing agent were added to disperse the slurry.
[0040] そして、得られたスラリーを脱水、乾燥した後、この原料にエタノールとトルエン、分 散材を加え分散させ、バインダー、可塑剤をカ卩えてスラリーとした後、ドクターブレー ド法により、 50 z m厚みのセラミックグリーンシート(以下、「絶縁シート」とも言う)を作 製した。それから、図 1(a)に示すように、所定のセラミックグリーンシート(絶縁シート) 1にレーザーにより直径が 200 μ mの貫通孔 2を形成した。  [0040] Then, after the obtained slurry is dehydrated and dried, ethanol, toluene, and a dispersing agent are added to and dispersed in the raw material, and a binder and a plasticizer are added to form a slurry. A 50-zm-thick ceramic green sheet (hereinafter also referred to as “insulating sheet”) was produced. Then, as shown in FIG. 1 (a), a through hole 2 having a diameter of 200 μm was formed in a predetermined ceramic green sheet (insulating sheet) 1 by a laser.
[0041] なお、絶縁体に、上述のような SrWOの粉末および SrWOと W〇の混晶の粉末を 用いる場合、 ZnOを主成分とする半導体セラミックと反応しにくいものであって、焼結 温度が ZnOを主成分とする半導体セラミックより高い物質、例えば、 Zn Ti〇などの [0041] The above-mentioned SrWO powder and the mixed crystal powder of SrWO and W〇 were used for the insulator. When used, it is a substance that does not easily react with the semiconductor ceramic containing ZnO as a main component and has a sintering temperature higher than that of the semiconductor ceramic containing ZnO as a main component, such as ZnTi〇.
2 4 粉末を含有させることが可能である。  It is possible to include 24 powder.
また、絶縁体に、 Znおよび Tiを含む酸化物の粉末を用いる場合には、 ZrOなどの  When an oxide powder containing Zn and Ti is used for the insulator, ZrO or the like is used.
2 粉末を含有させることも可能である。  2 It is also possible to include a powder.
[0042] (2)ZnOを主成分とする半導体セラミックペーストの作製 (2) Preparation of Semiconductor Ceramic Paste Containing ZnO as Main Component
Zn〇に Al O 0. 005mol。/oを添加し、純水を加えた後、直径が 2mmの PSZビーズ 0.005 mol of Al O in Zn〇. After adding / o and pure water, PSZ beads with a diameter of 2mm
2 3  twenty three
を用いてボールミルにより 50時間粉砕、混合した。このスラリーの水分を蒸発、乾燥 した後、 900 1000°Cで 2時間仮焼した。この仮焼原料に 1 : 1の割合で純水を加え 、直径が 2mmの PSZビーズを用いて平均粒径が約 0. 5 μ mになるまで粉砕した。そ れから、このようにして得たスラリーを脱水、乾燥した後、得られた粉末 (ZnOを主成 分とする半導体セラミック粉末)に溶剤、ワニスなどを添加してペーストイ匕することによ り、 Zn〇を主成分とする半導体セラミックペースト(以下、単に「Zn〇ペースト」とも言う )を得た。  Was ground and mixed by a ball mill for 50 hours. After the water in the slurry was evaporated and dried, it was calcined at 900-1000 ° C for 2 hours. Pure water was added to the calcined material at a ratio of 1: 1 and pulverized using PSZ beads having a diameter of 2 mm until the average particle size became about 0.5 μm. Then, the slurry thus obtained is dehydrated and dried, and then a solvent, a varnish, and the like are added to the obtained powder (semiconductor ceramic powder containing ZnO as a main component), followed by paste rubbing. Thus, a semiconductor ceramic paste containing Zn〇 as a main component (hereinafter, also simply referred to as “Zn〇 paste”) was obtained.
[0043] (3)ZnOと電位障壁を形成する金属酸化化合物ペーストの作製  (3) Preparation of Metal Oxide Compound Paste Forming Potential Barrier with ZnO
La O、 SrCO、および Mn Oを、それぞれモノレ];匕で 0. 35、 0. 3、 1. 0となるよう La O, SrCO, and Mn O are each monoliths]; so that they become 0.35, 0.3, 1.0
2 3 3 3 4 2 3 3 3 4
な比率で秤量し、ボールミルで湿式混合した後、蒸発乾燥し、 1000°Cで熱処理し、 仮反応させた。  After weighing in an appropriate ratio and wet-mixing with a ball mill, the mixture was evaporated to dryness, heat-treated at 1000 ° C., and temporarily reacted.
このようにして得られた反応物を一旦ボールミルにて平均粒径が 1 μ m以下になる まで粉砕し、溶剤とワニスを加えペーストイ匕することにより、 ZnOと電位障壁を形成す る金属酸化化合物ペーストを得た。  The reaction product thus obtained is once ground in a ball mill until the average particle size becomes 1 μm or less, and a solvent and a varnish are added and paste-ridden to form a metal oxide compound that forms a potential barrier with ZnO. A paste was obtained.
なお、以下では、 La、 Sr、 Mn反応酸化物を「LSMO」と略称する。  In the following, La, Sr, and Mn reaction oxides are abbreviated as “LSMO”.
[0044] (4)ZnOバリスタ材料ペーストの作成 (4) Preparation of ZnO Varistor Material Paste
Zn〇に Al O 0. 005mol%、 Pr O lmol%、 CaCO 0. lmol%、 K (OH) 0. Olmol  0.005 mol% of Al O in Zn〇, 1 mol% of PrO, 0.1 mol% of CaCO, 0.1 Olmol of K (OH)
2 3 6 11 3  2 3 6 11 3
%を添加し、純水を加えた後、直径 2mmの PSZビーズを用いてボールミルで 50時間 粉砕、混合した。  %, Pure water was added, and the mixture was pulverized and mixed in a ball mill using PSZ beads having a diameter of 2 mm for 50 hours.
このスラリーの水分を蒸発、乾燥した後、 900 1000°Cで 2時間仮焼した。この仮 焼原料に 1: 1の割合で純水をカ卩え、直径が 2mmの PSZビーズを用いて平均粒径が 約 0. 5 / mになるまで粉碎した。それから、このようにして得たスラリーを脱水、乾燥し た後、得られた粉末に溶剤、ワニスなどを添加してペース H匕することにより、 Zn〇を 主成分としバリスタ特性を有する半導体セラミックペースト(以下、単に「Zn〇バリスタ 材料ペースト」とも言う)を得た。 After the water content of the slurry was evaporated and dried, the slurry was calcined at 900 to 1000 ° C. for 2 hours. Pure water is added to this calcined material at a ratio of 1: 1 and the average particle size is reduced using PSZ beads with a diameter of 2 mm. Crushed to about 0.5 / m. Then, the slurry obtained in this manner is dewatered and dried, and then a solvent, a varnish, etc. are added to the obtained powder, and the paste is pasteurized to obtain a semiconductor ceramic paste having Zn〇 as a main component and having varistor characteristics. (Hereinafter simply referred to as “Zn〇 varistor material paste”).
[0045] (5)セラミックグリーンシートの貫通孔へのペーストの充填  [0045] (5) Filling of paste into through-holes of ceramic green sheet
図 1(b)に示すように、上記 (1)で作製した絶縁体形成用のセラミックグリーンシート( 絶縁シート) 1の貫通孔 2に、上記 (2)で作製した Zn〇ペースト 3を充填するとともに、 図 1(c)に示すように、上記 (1)で作製した絶縁体形成用のセラミックグリーンシート(絶 縁シート) 1の貫通孔 2に、上記 (3)で作製した金属酸化化合物ペースト(LSMOぺー スト) 4をスクリーン印刷法にて充填し、乾燥することにより、 Zn〇ペースト充填シート 1 (la)および LSMOペースト充填シート 1 (lb)を作製した。  As shown in FIG. 1 (b), the through hole 2 of the ceramic green sheet (insulating sheet) 1 for forming an insulator prepared in (1) above is filled with the Zn〇 paste 3 prepared in (2) above. At the same time, as shown in Fig. 1 (c), the metal oxide compound paste prepared in (3) above is inserted into the through holes 2 of the ceramic green sheet (insulated sheet) 1 for insulator formation prepared in (1) above. (LSMO paste) 4 was filled by a screen printing method, and dried to prepare a Zn〇 paste-filled sheet 1 (la) and an LSMO paste-filled sheet 1 (lb).
[0046] また、図 1(d)に示すように、上記 (1)で作製した絶縁体形成用のセラミックグリーンシ ート(絶縁シート) 1の貫通孔 2に、上記 (4)で作製した ZnOノくリスタ材料ペースト 13を 充填することにより Zn〇バリスタ材料ペースト充填シート 1 (lc)を作製した。  Further, as shown in FIG. 1 (d), the through-hole 2 of the ceramic green sheet (insulating sheet) 1 for forming an insulator prepared in (1) above was formed in the above-described (4). A Zn〇 varistor material paste-filled sheet 1 (lc) was prepared by filling the ZnO paste material paste 13.
[0047] (6)セラミックグリーンシートへの内部電極印刷  (6) Internal electrode printing on ceramic green sheet
図 1(e), (f)に示すように、上記 (5)で作製した ZnOペースト充填シート 1 (la)および LSMOペースト充填シート l (lb)のうち、所定のシートの表面に、貫通孔 2に充填さ れた ZnOペースト 3および LSMOペースト 4と導通するように、 Ptペースト(内部電極 形成用の導体パターン) 5をスクリーン印刷法にて印刷し、乾燥した。  As shown in Figs. 1 (e) and (f), of the ZnO paste-filled sheet 1 (la) and LSMO paste-filled sheet l (lb) prepared in (5) above, A Pt paste (conductor pattern for forming internal electrodes) 5 was printed by a screen printing method so as to be electrically connected to the ZnO paste 3 and the LSMO paste 4 filled in 2, and dried.
また、図 1(g)に示すように、上記 (5)で作製した Zn〇バリスタ材料ペースト充填シート 1 (lc)のうち、所定のシートの表面に、貫通孔 2に充填された Zn〇バリスタ材料ぺー スト 13と導通するように、 Ptペースト(内部電極形成用の導体パターン) 5をスクリーン 印刷法にて印刷し、乾燥した。  Further, as shown in FIG. 1 (g), of the Zn ス タ varistor material paste-filled sheet 1 (lc) prepared in (5) above, the Zn〇 varistor filled in the through hole 2 was provided on the surface of a predetermined sheet. A Pt paste (conductor pattern for forming internal electrodes) 5 was printed by a screen printing method so as to be electrically connected to the material paste 13 and dried.
[0048] (7)積層  [0048] (7) Lamination
それから、図 2(a)に示すように、下から上に向かって、貫通孔の形成されていない 絶縁シート 1,導体パターンが形成された LSMOペースト充填シート 1 (lb)、 Zn〇ぺ 一スト充填シート 1 (la)、導体パターンが形成された LSMOペースト充填シート 1 (1 b)、貫通孔の形成されていない絶縁シート 1の順に積み重ねて積層し、 1. 96 X 106 Paの圧力で圧着して、図 2(b)に示すような圧着ブロック(マザ一積層体) 6を作製した また、図 5(a)に示すように、下から上に向かって、貫通孔の形成されていない絶縁 シート 1,貫通孔 2に Zn〇バリスタ材料ペースト 13を充填した Zn〇バリスタ材料ペース ト充填シート 1 (lc)、貫通孔の形成されていない絶縁シート 1の順に積み重ねて積層 し、 1. 96 X 106Paの圧力で圧着して、図 5(b)に示すような圧着ブロック(マザ一積層 体)) 16を作製した。 Then, as shown in Fig. 2 (a), from the bottom to the top, an insulating sheet 1 with no through holes, an LSMO paste-filled sheet 1 (lb) with a conductive pattern, and a Zn〇 ぺ1.96 x 10 6 is filled and stacked in the following order: Filling sheet 1 (la), LSMO paste filling sheet 1 (1 b) with conductor pattern, and insulating sheet 1 without through holes A crimping block (mother laminated body) 6 as shown in FIG. 2 (b) was prepared by crimping at a pressure of Pa. Also, as shown in FIG. Insulation sheet 1 with no holes, Zn 貫通 varistor material paste filling sheet 1 with through holes 2 filled with Zn〇 varistor material paste 1 (lc), and insulation sheet 1 without through holes 1 Then, pressure bonding was performed at a pressure of 1.96 × 10 6 Pa to produce a pressure-bonded block (mother-laminate) 16 as shown in FIG. 5 (b).
[0049] (8)カット [0049] (8) Cut
上記 (7)で作製した圧着ブロック 6および 16を、図 2(b)および図 5(b)に示すように、 積層面に対して垂直に、ダイサ一にてカットし、個々の素子 (焼成前駆体) 7 (図 3)お よび 17 (図 6)に分割した。  As shown in FIGS. 2 (b) and 5 (b), the crimping blocks 6 and 16 prepared in (7) are cut perpendicularly to the lamination surface by a dicer, and the individual elements (fired) are cut. (Precursor) 7 (Fig. 3) and 17 (Fig. 6).
図 3に示す素子 7は、絶縁体 21の内部に、 ZnOを主成分とする半導体セラミック体 22と、 ZnOと電位障壁を形成する金属酸化化合物体 23が面で接合された接合体( セラミック素子) 24と、接合体 24の接合面を導電経路が通過するような態様で配設さ れた内部電極 25a, 25bとを備えた構造を有している。  The element 7 shown in FIG. 3 is a bonded body (a ceramic element) in which a semiconductor ceramic body 22 containing ZnO as a main component and a metal oxide compound body 23 forming a potential barrier with ZnO are bonded inside a insulator 21. ) And internal electrodes 25a and 25b arranged in such a manner that the conductive path passes through the joint surface of the joined body 24.
また、図 6に示す素子 17は、絶縁体 21の内部に、 ZnOを主成分としバリスタ特性を 有する半導体セラミック体 27と、半導体セラミック体 27を導電経路が通過するような 態様で配設された内部電極 25a, 25bとを備えた構造を有してレ、る。  The element 17 shown in FIG. 6 is disposed inside an insulator 21 in such a manner that a semiconductor ceramic body 27 mainly composed of ZnO and having varistor characteristics and a conductive path passes through the semiconductor ceramic body 27. It has a structure having internal electrodes 25a and 25b.
[0050] (9)焼成 [0050] (9) Firing
上記 (8)で切断、分割した、図 3の素子 (焼成前駆体) 7および図 6の素子 (焼成前駆 体) 17を 600°Cで脱脂した後、図 3の素子(焼成前駆体) 7は 1300°Cで、図 6の素子 (焼成前駆体) 17は 1200°Cで 3時間焼成した。  The element (firing precursor) 7 in FIG. 3 and the element (firing precursor) 17 in FIG. 6 cut and divided in (8) above were degreased at 600 ° C., and then the element (firing precursor) 7 in FIG. Was fired at 1300 ° C, and the device (firing precursor) 17 in FIG. 6 was fired at 1200 ° C for 3 hours.
[0051] (10)外部電極の形成 (10) Formation of external electrode
上記 (9)で焼成した素子(焼結体) 7 (7a)の、内部電極 25a, 25bが引き出された互 いに対向する端面を含む両端部に、 Ag— Pd (Ag/Pd重量比率 9/1)ペーストを塗 布し、 900°Cで 10分焼き付けることにより、図 4に示すように、内部電極 25a, 25bと 導通する外部電極 26a, 26bを形成した。  Ag—Pd (Ag / Pd weight ratio: 9) was added to both ends of the element (sintered body) fired in (9) above (7a) including the end faces facing each other from which the internal electrodes 25a and 25b were drawn out. / 1) The paste was applied and baked at 900 ° C for 10 minutes to form external electrodes 26a and 26b that are electrically connected to the internal electrodes 25a and 25b, as shown in FIG.
また、上記 (9)で焼成した素子(焼結体) 17 (17a)の、内部電極 25a, 25bが引き出 された互いに対向する端面を含む両端部に、 Ag-Pd (Ag/Pd重量比率 9/1)ベー ストを塗布し、 900°Cで 10分焼き付けることにより、図 7に示すように、内部電極 25a, 25bと導通する外部電極 26a, 26bを形成した。 The internal electrodes 25a and 25b of the element (sintered body) 17 (17a) fired in the above (9) are drawn out. Ag-Pd (Ag / Pd weight ratio 9/1) base is applied to both ends including the opposing end surfaces, and baked at 900 ° C for 10 minutes, as shown in Fig. 7. External electrodes 26a and 26b, which are electrically connected to 25a and 25b, were formed.
[0052] (11)比較試料 Xの作製  (11) Preparation of Comparative Sample X
上記 (2)で作製した作成した Zn〇を主成分とする半導体セラミック粉末に、エタノー ルとトルエン、分散材を加え分散させ、バインダー、可塑剤をカ卩ぇスラリーとした後、ド クタ一ブレード法により 50 μ πι厚みのシート(ZnOシート)を作製するとともに、上記 (3 )で作製した金属酸化化合物の粉末に、エタノールとトルエン、分散材を加え分散さ せ、バインダー、可塑剤をカ卩ぇスラリーとした後、ドクターブレード法により 50 z m厚み のシート(LSMOシート)を作製した。  Ethanol, toluene, and a dispersing agent are added to the Zn-based semiconductor ceramic powder prepared in (2) above to form a slurry, and a binder and a plasticizer are formed into a slurry. A 50 μπι thick sheet (ZnO sheet) is prepared by the method, and ethanol, toluene and a dispersing agent are added to the powder of the metal oxide compound prepared in the above (3), and the mixture is dispersed.と し た After the slurry, a 50-zm-thick sheet (LSMO sheet) was prepared by the doctor blade method.
[0053] そして、下から上に、 LSMOシート(10枚) _Zn〇シート(10枚)—LSMOシート(10 枚)の順に積層、圧着し、厚み 1. 18mmの厚みのブロックを作成し、平面形状が 0. 5 8mm X 0. 58mmの大きさにカツ卜した。それ力ら、 600。Cで脱月旨し、 1250。Cで 3B寺 Γ 焼成した後、焼結後の上下両面側の LSMO材料が露出した部分 (上下両端部)に A g/Pd (9/1)からなる外部電極ペーストを塗布し、 900°Cで 10分焼き付けることによ り外部電極を形成した後、外部電極が形成されていない領域に、ホウケィ酸ビスマス を主成分としたガラスペーストを塗布し、 700°Cで 10分焼き付けることにより、図 8に 示すように、 ZnO半導体セラミック 31の両側に、 Zn〇と電位障壁を形成する金属酸 化化合物体 (LSMO) 32が接合、配設された構造を有し、両端側の金属酸化化合物 体(LSMO) 32の露出面に外部電極 33a, 33bが形成され、外部電極 33a, 33b力 S 形成されていない部分が、ガラス層 34により被覆された比較用の試料 Xを作製した。  [0053] Then, from the bottom to the top, LSMO sheet (10 sheets) _Zn (sheet (10 sheets)-LSMO sheet (10 sheets) are laminated and crimped in this order, and a block having a thickness of 1.18 mm is formed. The shape was cut to a size of 0.58mm X 0.58mm. That power, 600. C to escape from the moon, 1250. 3B temple with C Γ After firing, apply external electrode paste consisting of Ag / Pd (9/1) to the exposed LSMO material (upper and lower ends) on both upper and lower surfaces after sintering, 900 ° C After forming the external electrodes by baking for 10 minutes, apply a glass paste containing bismuth borosilicate as a main component to the area where the external electrodes are not formed, and bake at 700 ° C for 10 minutes. As shown in FIG. 8, on both sides of a ZnO semiconductor ceramic 31, a metal oxide compound (LSMO) 32 that forms a potential barrier with Zn〇 has a structure in which the metal oxide compound (LSMO) 32 is bonded and disposed. A sample X for comparison was prepared in which the external electrodes 33a and 33b were formed on the exposed surface of the (LSMO) 32, and the portion where the external electrodes 33a and 33b had no force S was covered with the glass layer.
[0054] (12)比較試料 Yの作製  (12) Preparation of Comparative Sample Y
Zn〇に Al O 0. 005mol%、 Pr O lmol%、 CaCO 0. lmol%、 K (OH) 0. Olmol  0.005 mol% of Al O in Zn〇, 1 mol% of PrO, 0.1 mol% of CaCO, 0.1 Olmol of K (OH)
2 3 6 11 3  2 3 6 11 3
%を添加し、純水を加えた後、直径 2mmの PSZビーズを用いてボールミルで 50時間 粉砕、混合した。このスラリーの水分を蒸発させ乾燥した後、 1000°Cで 2時間仮焼し た。この仮焼原料に 1 : 1の割合で純水をカ卩え、直径 2mmの PSZビーズを用い平均粒 径約が 0. 5 x mになるまで粉砕した後、得られたスラリーを脱水、乾燥した。この原料 粉末にエタノールとトルエン、分散材を加えて分散させ、バインダー、可塑剤を加え てスラリーとした後、ドクターブレード法により 50 /i m厚みのシートを作製した。このシ ートに所定のパターンで Ptペーストを印刷した後、積層、圧着し、所定の大きさにカツ トし、 600°Cで脱脂した後、 1200°Cで 3時間焼成することにより、図 9に示すように、 Z n〇を主成分としバリスタ特性を有する半導体セラミック体 41中に、 Pt内部電極 42が 半導体セラミック層 43を介して互いに対向するように配設された素子 (焼結体) 44を 得た。そして、素子(焼結体) 44の、 Pt内部電極 42が引き出された互いに対向する 端面を含む両端部に、 Ag_Pdペースト (Ag/Pd (重量比) =9Zl)を塗布し、 900 °Cで 10分焼き付けることにより、図 9に示すように、内部電極 42と導通する外部電極 45a, 45bを形成した。それから、外部電極 45a, 45bが形成されていない領域に、ホ ゥケィ酸ビスマスを主成分としたガラスペーストを塗布し、 700°Cで 10分焼き付けて、 ガラス層 46を形成することにより、比較用の試料 Yを得た。 %, Pure water was added, and the mixture was pulverized and mixed in a ball mill using PSZ beads having a diameter of 2 mm for 50 hours. After the water in the slurry was evaporated and dried, it was calcined at 1000 ° C for 2 hours. Pure water was added to the calcined material at a ratio of 1: 1 and pulverized using PSZ beads having a diameter of 2 mm until the average particle diameter became about 0.5 xm.The obtained slurry was dewatered and dried. . Ethanol, toluene and a dispersant are added to the raw material powder to disperse, and a binder and a plasticizer are added. Then, a sheet having a thickness of 50 / im was produced by a doctor blade method. After printing Pt paste in a predetermined pattern on this sheet, laminating and pressing, cutting to a predetermined size, degreased at 600 ° C, and baked at 1200 ° C for 3 hours, As shown in FIG. 9, an element (sintered body) in which a Pt internal electrode 42 is disposed in a semiconductor ceramic body 41 having Zn〇 as a main component and having varistor characteristics so as to face each other via a semiconductor ceramic layer 43. ) 44 was obtained. Then, an Ag_Pd paste (Ag / Pd (weight ratio) = 9Zl) is applied to both ends of the element (sintered body) 44, including the end faces facing each other from which the Pt internal electrodes 42 are drawn out, and heated at 900 ° C. By baking for 10 minutes, external electrodes 45a and 45b electrically connected to the internal electrode 42 were formed as shown in FIG. Then, a glass paste containing bismuth phosphate as a main component is applied to a region where the external electrodes 45a and 45b are not formed, and baked at 700 ° C. for 10 minutes to form a glass layer 46 for comparison. A sample Y was obtained.
なお、本発明の試料の大きさは 0. 6 X 0. 3 X 0. 3mmであった。  The size of the sample of the present invention was 0.6 × 0.3 × 0.3 mm.
また、比較例 X及び比較例 Yの試料の大きさは 1. 0 X 0. 5 X 0. 5mmであった。  The size of each of the samples of Comparative Example X and Comparative Example Y was 1.0 X 0.5 X 0.5 mm.
[0055] [特性の評価] [Evaluation of Characteristics]
上述のようにして作製した実施例および比較例の試料について以下の特性を調べ た。  The following characteristics were examined for the samples of Examples and Comparative Examples manufactured as described above.
(1)ブレークダウン電圧: V  (1) Breakdown voltage: V
1mA  1mA
(2)電圧非直線係数: α (2) Voltage nonlinear coefficient: α
(3) 1 μ Αの DC電流を流したときの試料両端電圧と、ブレークダウン電圧 V との比  (3) The ratio of the voltage across the sample when a 1 μΑ DC current is applied to the breakdown voltage V
1mA 1mA
: V /V : V / V
1 μ A 1mA  1 μA 1mA
(4)静電容量(1 MHz)  (4) Capacitance (1 MHz)
(5)耐フラックス性  (5) Flux resistance
(6)制限電圧比: V /V  (6) Limit voltage ratio: V / V
1A 1mA  1A 1mA
(7) ESD耐性  (7) ESD resistance
(8)寿命変化  (8) Life change
各特性の測定結果を表 1,表 2に示す。なお、表 1の比較試料 X, Yのデータと表 2 の比較試料 X, Yのデータは同じデータである。  Tables 1 and 2 show the measurement results for each characteristic. The data of Comparative Samples X and Y in Table 1 and the data of Comparative Samples X and Y in Table 2 are the same data.
[0056] [表 1] i0057 高抵抗 耐フラックス制限電圧 寿命 特性素子 VlmA 静電容量 [Table 1] i0057 High resistance Flux resistant voltage Lifetime Characteristic element VlmA Capacitance
No. 材料 構造 a 性 比 変化 材料 (V)  No. Material Structure a Property ratio change Material (V)
Sr/W比 /VlraA ( F)  Sr / W ratio / VlraA (F)
(¾) lA lmA (¾) (¾) lA lmA (¾)
1 1.0/1.0 LSMO/ZnO A 4.22 35.9 0.83 10.2 +0.3 1.83 -2.5 -0.91 1.0 / 1.0 LSMO / ZnO A 4.22 35.9 0.83 10.2 +0.3 1.83 -2.5 -0.9
2 1.0/1.1 LSMO/ZnO A 4.25 34.7 0.85 10.1 -0.5 1.78 -2.9 +0.22 1.0 / 1.1 LSMO / ZnO A 4.25 34.7 0.85 10.1 -0.5 1.78 -2.9 +0.2
3 1.0/1.2 LSMO/ZnO A 4.24 34.1 0.85 10.2 + 1.0 1.82 - 2.1 - 0.63 1.0 / 1.2 LSMO / ZnO A 4.24 34.1 0.85 10.2 + 1.0 1.82-2.1-0.6
4 1.0/1.0 ZnOA"リスタ B 25.6 28.2 0.76 3.7 +1.6 1.75 -6.8 -3.54 1.0 / 1.0 ZnOA "Lister B 25.6 28.2 0.76 3.7 +1.6 1.75 -6.8 -3.5
5 1.0/1.1 ΖηθΛ'リスタ B 25.8 31.6 0.78 3.6 +1.5 1.71 -6.5 -3.25 1.0 / 1.1 ΖηθΛ 'Lister B 25.8 31.6 0.78 3.6 +1.5 1.71 -6.5 -3.2
6 1.0/1.2 ΖηΟΛ'リスタ B 24.9 30.8 0.77 3.7 +1.8 1.73 -5.3 -3.2 比較試料 6 1.0 / 1.2 ΖηΟΛ 'Lister B 24.9 30.8 0.77 3.7 +1.8 1.73 -5.3 -3.2 Comparative sample
7 LSMO/ZnO C 4.02 34.5 0.35 40.5 -45.7 1.68 -65.4 -6.8 X  7 LSMO / ZnO C 4.02 34.5 0.35 40.5 -45.7 1.68 -65.4 -6.8 X
比較試料  Comparative sample
8 ZnOA'リスタ D 7.66 19.8 0.32 109.8 -23.6 1.68 -25.9 -8.9 8 ZnOA 'Lister D 7.66 19.8 0.32 109.8 -23.6 1.68 -25.9 -8.9
Y Y
oo σ¾ oo σ¾
Figure imgf000025_0001
Figure imgf000025_0001
[0058] 表 1 , 2において、「構造」は、非直線抵抗体が図 4に示す構造のものを A、図 7に示 す構造のものを B、図 8に示す構造のものを C、図 9に示す構造のものを Dとして示し ている。 [0058] In Tables 1 and 2, "structure" means A for the non-linear resistor having the structure shown in FIG. 4, B for the structure shown in FIG. 7, C for the structure shown in FIG. The structure shown in FIG.
[0059] ブレークダウン電圧: V は、 1mAの DC電流を流したときの試料両端電圧を測定  [0059] Breakdown voltage: V measures the voltage across the sample when a DC current of 1 mA flows
1mA  1mA
した値である。 [0060] 電圧非直線係数: αは、 0. 1mAの DC電流を流した時の試料両端電圧とブレーク ダウン電圧から、下記の式で求めた値である。
Figure imgf000026_0001
Value. [0060] Voltage nonlinear coefficient: α is a value obtained by the following equation from the voltage across the sample and the breakdown voltage when a DC current of 0.1 mA flows.
Figure imgf000026_0001
[0061] V /V は、 1 μ Aの DC電流を流したときのの試料両端電圧を測定し、ブレーク  [0061] V / V measures the voltage across the sample when a DC current of 1 μA flows,
1 a A 1mA  1 a A 1mA
ダウン電圧 V との比(V /V )を求めたものものである。  The ratio (V / V) to the down voltage V is obtained.
1mA 1 μ A 1mA  1mA 1 μA 1mA
静電容量は、 1MHzにおける静電容量を LCRメーターにより測定した値である。  Capacitance is the value measured at 1 MHz using an LCR meter.
[0062] 耐フラックス性は、はんだ付け時の劣化の有無を調べるため、実際に PbZSnはん だおよび、 Br2%を含有するフラックスを用レ、、 300°Cのはんだ槽に 30秒浸漬し、浸 漬前と浸漬後の V の変化を調べたものであり、この変化率 (浸漬前の V /浸漬 後の V -1) X 100 (%)を耐フラックス性として表 1および 2に示している。  [0062] The flux resistance was measured using a flux containing PbZSn solder and Br2% in order to check for deterioration during soldering. The change in V before and after immersion was examined.The rate of change (V before immersion / V -1 after immersion) x 100 (%) is shown in Tables 1 and 2 as flux resistance. I have.
Ι β Α  Ι β Α
[0063] 制限電圧比: V /V は、 8 X 20 μ秒の三角波形で、かつ、 1 Αの電流ピークを有  [0063] The limiting voltage ratio: V / V has a triangular waveform of 8 X 20 µs and a current peak of 1 mm.
1A 1mA  1A 1mA
する電流サージを試料に印加して試料両端電圧を測定した場合の、ピーク電圧: V  Peak voltage when applying a current surge to the sample and measuring the voltage across the sample
1A と、ブレークダウン電圧: V の比: V /V である。  1A and breakdown voltage: V ratio: V / V.
1mA 1A 1mA  1mA 1A 1mA
[0064] ESD耐性は、接触放電式 ESD発生器を用レ、、 30kVの静電気ノ^レスを試料両端 に各 100回印加し、印加前と印加後の V の変化を調べたものであり、この変化率(  [0064] The ESD resistance was measured by applying a contact discharge type ESD generator, applying a static electricity of 30kV to both ends of the sample 100 times each, and examining the change in V before and after the application. This rate of change (
Ι μ Α  Ι μ Α
印加前の V /印加後の V -1) Χ 100 (%)を ESD耐性として表 1および 2に示し  Tables 1 and 2 show the value of V before application / V -1 after application) Χ 100 (%) as ESD resistance.
1 A 1 A  1 A 1 A
ている。  ing.
[0065] 寿命変化は、温度 85°C湿度 90%の高温湿中雰囲気下で V の 80%の DC電圧を  [0065] The change in life is as follows: DC voltage 80% of V
1mA  1mA
印加して寿命試験を行い、 1000時間印加前後の V の変化を調べたものであり、こ  A life test was performed by applying a voltage, and the change in V before and after 1000 hours of application was examined.
Ι μ Α  Ι μ Α
の変化率(印加前の V /印加後の V -1) χ ιοο (%)を寿命変化(%)として表 1  Change rate (V before application / V -1 after application) と し て ιοο (%) as life change (%)
Ι μ Α Ι μ Α  Ι μ Α Ι μ Α
および 2に示している。  And shown in 2.
[0066] なお、 Zn、 Ti酸化化合物の比率は、焼成後に X線回折を用いてその比率を求めた ものである。また、表 2において、 Zn TiO /ZnTiO /その他の比率は X線回折強  [0066] The ratios of the Zn and Ti oxide compounds were obtained by using X-ray diffraction after firing. In Table 2, the ratio of Zn TiO / ZnTiO /
2 4 3  2 4 3
度より求めたものであり、「その他」にあたる物質は、 Zn〇や TiOなどが主体であるが  The substances that correspond to "others" are mainly Zn〇 and TiO.
2  2
、これらの物質の割合は、調合時の組成比および仮焼温度(900 1100°Cの範囲 で調整)により変動する。ただし、その他の物質として、 ZrOを含有させることも可能  The proportion of these substances varies depending on the composition ratio at the time of preparation and the calcining temperature (adjusted in the range of 900 to 1100 ° C). However, ZrO can be included as another substance
2  2
である。  It is.
[0067] 表 1 , 2より、本願発明の実施例に力かる試料である、 No. 1 6 (表 1)および No. 9 一 18 (表 2)の試料においては、ブレークダウン電圧: V 電圧非直線係数: a、ブ [0067] Tables 1 and 2 show that samples No. 16 (Table 1) and No. 9 which are samples that are useful for the examples of the present invention. For 18 samples (Table 2), breakdown voltage: V voltage nonlinear coefficient: a,
1mA,  1mA,
レークダウン電圧 V との比: V /V 、静電容量(1MHz)、耐フラックス性、制限  Ratio to breakdown voltage V: V / V, capacitance (1MHz), flux resistance, limit
1mA 1 μ A 1mA  1mA 1 μA 1mA
電圧比: V /V ESD耐性、寿命変化の各特性に関し、実用上問題のない結果  Voltage ratio: V / V ESD immunity, lifetime change characteristics, no practical problem
1A 1mA,  1A 1mA,
が得られていることがわかる。しかし、比較試料 X, Yについては、測定項目によって は好ましくない特性しか得ることができていないことがわかる。  It can be seen that is obtained. However, for the comparative samples X and Y, it was found that only unfavorable characteristics could be obtained depending on the measurement items.
また、 Zn TiOと ZnTiOの合計含有率が 90mol%未満の No. 16, 17の試料にお  No. 16 and No. 17 samples with a total content of Zn TiO and ZnTiO of less than 90 mol%
2 4 3  2 4 3
いては、耐フラックス性、 ESD耐性、寿命変化率などがやや好ましくない結果となつ ており、 Zn TiOと ZnTiOの合計含有率を 90mol%以上とすることが望ましことがわ  However, the flux resistance, ESD resistance, life change rate, and the like are slightly unfavorable, and it is desirable that the total content of ZnTiO and ZnTiO should be 90 mol% or more.
2 4 3  2 4 3
かる。  Call
[0068] このように、本願発明によれば、積層工法により形成した積層体を一体焼成すること により、耐環境性やはんだ付の際に用いられるフラックスに対する耐性が大きい非直 線抵抗体(半導体セラミック電子部品)を効率よく製造することが可能になる。  As described above, according to the present invention, a non-linear resistor (semiconductor) having a high environmental resistance and a high resistance to a flux used in soldering is obtained by integrally firing the laminate formed by the lamination method. Ceramic electronic components) can be manufactured efficiently.
[0069] また、絶縁体として、 Srおよび Wを含む酸化物、 Znおよび Tiを含む酸化物のうち少 なくとも一方を含有する絶縁体を形成するようにしているので、積層体の焼結の際や 、内部の素子に電流 ·電圧をカ卩えた場合にも相互拡散が生じず、特性が良好で信頼 性の高い非直線抵抗体を製造することが可能になることがわかる。なお、本願発明の 実施例に力かる試料である、 No. 1— 6 (表 1)および No. 9— 18 (表 2)の試料にお いて、 ESD耐性が良好になっているのは、上記の相互拡散が抑制、防止されたこと によるものと考えられる。  [0069] Further, since an insulator containing at least one of an oxide containing Sr and W and an oxide containing Zn and Ti is formed as an insulator, the sintering of the laminate is performed. At this time, even when current and voltage are applied to the internal elements, no mutual diffusion occurs, and it is understood that a highly reliable nonlinear resistor having good characteristics and high reliability can be manufactured. In the samples of Nos. 1-6 (Table 1) and Nos. 9-18 (Table 2), which are examples of the present invention, the ESD resistance is good. It is considered that the above-mentioned mutual diffusion was suppressed and prevented.
また、絶縁体を構成する材料として、 Srおよび Wを含む酸化物、 Znおよび Tiを含 む酸化物のうち少なくとも一方を含有する材料を用いた場合、 ZnOと電位障壁を形 成する、例えば、 Ptなどの金属や、一般式: M A BOで表される金属酸化化合物(  Further, when a material containing at least one of an oxide containing Sr and W and an oxide containing Zn and Ti is used as a material forming the insulator, a potential barrier is formed with ZnO, for example, Metals such as Pt and metal oxide compounds represented by the general formula: MA BO (
l 3  l 3
Mが希土類元素、 Aが Srおよび Baのうち少なくとも一方、 Bが Mnおよび Coのうち少 なくとも一方で、 Xが 0よりも大きぐ 0. 4以下であるような金属酸化化合物)などの材 料系とも接合しやすぐクラックも発生しにくい絶縁体を形成することができるため、信 頼性の高い非直線抵抗体を得ることが可能になる。  M is a rare earth element, A is at least one of Sr and Ba, B is at least one of Mn and Co, and X is a metal oxide compound that is larger than 0 and 0.4 or less. Since it is possible to form an insulator which is not easily cracked immediately after bonding with the material system, a highly reliable non-linear resistor can be obtained.
[0070] また、素子が確実に絶縁層(絶縁体)で被覆されることになるため、リフローなどのは んだ付け時におけるフラックスによる還元、フラックスの残留や浸透による電気特性の 低下などを防止することが可能になるとともに、耐候性などの耐環境性を向上させる ことが可能になる。 [0070] Further, since the element is surely covered with an insulating layer (insulator), reduction by flux at the time of soldering such as reflow and reduction of electrical characteristics due to residual or permeated flux. It is possible to prevent a decrease and the like, and it is possible to improve environmental resistance such as weather resistance.
また、素子が一体焼結された絶縁層で覆われているため、表面電流を抑制して、漏 れ電流を小さくすることが可能になるとともに、耐候性を向上させることが可能になる  In addition, since the element is covered with an insulating layer that is integrally sintered, surface current can be suppressed, leakage current can be reduced, and weather resistance can be improved.
[0071] さらに、従来のようにガラス層などの欠陥の多い材料で被覆するようにした場合には 、表面に一部析出した半導体により、表面放電を起こしやすぐ静電気による劣化を 起こしやすいが、本願発明のように、 SrWOと WOを含有する混晶を絶縁体材料と [0071] Furthermore, in the case of coating with a material having a lot of defects such as a glass layer as in the related art, a semiconductor which is partially deposited on the surface easily causes a surface discharge or is easily deteriorated by static electricity. As in the present invention, a mixed crystal containing SrWO and WO is referred to as an insulator material.
4 3  4 3
して用いた場合、 Zn〇を主成分とする半導体セラミックや LSMOなどの金属酸化化 合物、 Zn〇バリスタ材料などとの密着性が良好で、界面の空孔も WOの液相で坦め  When used in combination, it has good adhesion to metal oxides such as semiconductor ceramics and LSMO containing Zn〇 as the main component, varistor material, etc., and the pores at the interface are filled with the liquid phase of WO.
3  Three
られるため、表面放電を確実に抑制して、静電気による劣化を抑制することが可能に なる。特に、 ZnO系の半導体セラミック体と LSMOなどの金属酸化化合物の界面で 特性を得るようにした素子の場合にはその効果は大きい。  Therefore, it is possible to reliably suppress surface discharge and suppress deterioration due to static electricity. In particular, the effect is great in the case of a device in which characteristics are obtained at the interface between a ZnO-based semiconductor ceramic and a metal oxide compound such as LSMO.
[0072] なお、絶縁体材料として、 SrWOを用いた場合、浮遊容量が小さくなり、絶縁体の [0072] When SrWO is used as the insulator material, the stray capacitance is reduced, and the insulator material is used.
4  Four
誘電率が実測 8以下となるため、低電圧で、かつ静電容量の小さな素子を設計する ことが可能になり、回路の高周波ィ匕にも対応することが可能になる。 Since the dielectric constant is less than or equal to 8 measured, it is possible to design a low-voltage and small-capacitance element, and it is possible to cope with a high-frequency circuit in a circuit.
また、このような浮遊容量の少ない材料構成とした場合、クロストークのない(少ない )、多連の素子(例えば、図 2(b)に示すような構成の素子)を形成することも可能であ る。  In addition, when such a material configuration having a small floating capacitance is used, it is possible to form a multiple element having no (low) crosstalk (for example, an element having a configuration as shown in FIG. 2B). is there.
産業上の利用可能性  Industrial applicability
[0073] 本願発明は、半導体セラミック体を用いたセラミック素子と、セラミック素子と導通す る電極と、セラミック素子のうち、少なくとも電極が形成されていない部分が覆われるよ うに配設された絶縁体とを備えた半導体セラミック電子部品におレ、て、絶縁体として、 Srおよび Wを含む酸化物、 Znおよび Tiを含む酸化物のうち少なくとも一方を含有す る材料を用いているので、確実な表面絶縁性を有し、耐環境性やはんだ付の際に用 レ、られるフラックスに対する耐性が大きい半導体セラミック電子部品を得ることが可能 になる。 The invention of the present application is directed to a ceramic element using a semiconductor ceramic body, an electrode electrically connected to the ceramic element, and an insulator provided so as to cover at least a portion of the ceramic element where no electrode is formed. In the semiconductor ceramic electronic component having the above, a material containing at least one of an oxide containing Sr and W and an oxide containing Zn and Ti is used as an insulator. It is possible to obtain a semiconductor ceramic electronic component having a surface insulating property and having high environmental resistance and high resistance to flux used during soldering.
また、本願発明の半導体セラミック電子部品の製造方法によれば、絶縁体内に半 導体セラミック体を用いたセラミック素子を配設し、積層工法および一体焼成工法を 用いて、例えば、非直線抵抗体などの半導体セラミック電子部品を製造することがで きるようにしているので、小型、高性能で信頼性の高い非直線抵抗体などの半導体 セラミック電子部品を効率よく製造することが可能になる。 Further, according to the method for manufacturing a semiconductor ceramic electronic component of the present invention, a half of A ceramic element using a conductive ceramic body is provided, and for example, a semiconductor ceramic electronic component such as a non-linear resistor can be manufactured using a laminating method and an integrated firing method. Semiconductor ceramic electronic components such as nonlinear resistors with high performance and high reliability can be manufactured efficiently.
したがって、本願発明により得られる半導体セラミック電子部品、例えば、被直線抵 抗体は、携帯電話やその他の通信技術分野、それらの用途に用いられる電子機器 の分野などの種々の用途に広く適用することが可能である。  Therefore, the semiconductor ceramic electronic component obtained by the present invention, for example, a linearly-coupled antibody, can be widely applied to various uses such as the field of mobile phones and other communication technologies, and the field of electronic devices used for such purposes. It is possible.

Claims

請求の範囲 The scope of the claims
[1] 半導体セラミック体を用いたセラミック素子と、前記セラミック素子と導通する電極と、 前記セラミック素子のうち、少なくとも前記電極が形成されていない部分が覆われるよ うに配設された絶縁体とを備えた半導体セラミック電子部品であって、  [1] A ceramic element using a semiconductor ceramic body, an electrode electrically connected to the ceramic element, and an insulator disposed so as to cover at least a portion of the ceramic element where the electrode is not formed. A semiconductor ceramic electronic component comprising:
前記絶縁体が、 Srおよび Wを含む酸化物、 Znおよび Tiを含む酸化物のうち少なく とも一方を含有することを特徴とする半導体セラミック電子部品。  A semiconductor ceramic electronic component, wherein the insulator contains at least one of an oxide containing Sr and W and an oxide containing Zn and Ti.
[2] 前記半導体セラミック体が、 Zn〇を主成分とする半導体セラミック体であることを特 徴とする請求項 1に記載の半導体セラミック電子部品。  2. The semiconductor ceramic electronic component according to claim 1, wherein the semiconductor ceramic body is a semiconductor ceramic body containing Zn セ ラ ミ ッ ク as a main component.
[3] Srおよび Wを含む酸化物、 Znおよび Tiを含む酸化物のうち少なくとも一方を含有 する絶縁体と、  [3] an insulator containing at least one of an oxide containing Sr and W, and an oxide containing Zn and Ti;
前記絶縁体の内部に配設された、 Zn〇を主成分とする半導体セラミック体と、 ZnO と電位障壁を形成する金属酸化化合物体とが面で接合された接合体と、  A semiconductor body comprising Zn〇 as a main component and a metal oxide compound body forming a potential barrier with ZnO, which are disposed inside the insulator,
前記接合体の接合面を導電経路が通過するように前記絶縁体の内部に配設され た内部電極と、  An internal electrode disposed inside the insulator so that a conductive path passes through a joint surface of the joined body;
前記絶縁体の表面に配設された、前記内部電極と導通する外部電極と を具備することを特徴とする請求項 1または 2に記載の半導体セラミック電子部品。  3. The semiconductor ceramic electronic component according to claim 1, further comprising: an external electrode provided on a surface of the insulator, the external electrode being electrically connected to the internal electrode.
[4] Srおよび Wを含む酸化物、 Znおよび Tiを含む酸化物のうち少なくとも一方を含有 する絶縁体と、 [4] an insulator containing at least one of an oxide containing Sr and W, and an oxide containing Zn and Ti;
前記絶縁体の内部に配設された、 Zn〇を主成分とレ リスタ特性を有する半導体 セラミック体と、  A semiconductor ceramic body disposed inside the insulator, having Zn〇 as a main component and having a resistor property;
前記半導体セラミック体を導電経路が通過するように前記絶縁体の内部に配設さ れた内部電極と、  An internal electrode disposed inside the insulator so that a conductive path passes through the semiconductor ceramic body;
前記絶縁体の表面に配設された、前記内部電極と導通する外部電極と を具備することを特徴とする請求項 1または 2に記載の半導体セラミック電子部品。  3. The semiconductor ceramic electronic component according to claim 1, further comprising: an external electrode provided on a surface of the insulator, the external electrode being electrically connected to the internal electrode.
[5] 前記 Srおよび Wを含む酸化物が、 SrWO、または SrWOと WOとの混晶であり、 前記 Znおよび Tiを含む酸化物が Zn TiOおよび ZnTiOの少なくとも一方であるこ と [5] The oxide containing Sr and W is SrWO or a mixed crystal of SrWO and WO, and the oxide containing Zn and Ti is at least one of ZnTiO and ZnTiO.
を特徴とする請求項 1一 4のいずれかに記載の半導体セラミック電子部品。 The semiconductor ceramic electronic component according to any one of claims 14 to 15, wherein:
[6] 前記絶縁体が、 Zn TiOと ZnTiOの両方を含有している場合には、 Zn TiOおよ [6] When the insulator contains both ZnTiO and ZnTiO, ZnTiO
2 4 3 2 4 び ZnTiOの合計含有率が 90mol%以上であり、 Zn TiOおよび ZnTiOのいずれか  The total content of 2 4 3 2 4 and ZnTiO is 90 mol% or more, and either ZnTiO or ZnTiO
3 2 4 3 一方を含有している場合には、 Zn TiOおよび ZnTiOのいずれか一方の含有率が  3 2 4 3 When one of them is contained, the content of either Zn TiO or ZnTiO
2 4 3  2 4 3
90mol%以上であることを特徴とする請求項 1一 5のいずれかに記載の半導体セラミ ック電子部品。  16. The semiconductor ceramic electronic component according to claim 15, wherein the content is 90 mol% or more.
[7] Srおよび Wを含む酸化物、 Znおよび Tiを含む酸化物のうち少なくとも一方を含有 する絶縁体の内部に、 ZnOを主成分とする半導体セラミック体と、 ZnOと電位障壁を 形成する金属酸化化合物体とが面で接合された接合体が配設されているとともに、 該接合体の接合面を導電経路が通過するような態様で内部電極が配設され、かつ、 絶縁体の表面に該内部電極と導通する外部電極が配設された構造を有する半導体 セラミック電子部品の製造方法であって、  [7] Inside an insulator containing at least one of an oxide containing Sr and W and an oxide containing Zn and Ti, a semiconductor ceramic body containing ZnO as a main component and a metal forming a potential barrier with ZnO A joined body in which the oxidized compound body is joined by a surface is provided, and an internal electrode is arranged in such a manner that a conductive path passes through the joining surface of the joined body, and on the surface of the insulator. A method for manufacturing a semiconductor ceramic electronic component having a structure in which an external electrode that is electrically connected to the internal electrode is provided,
(a)前記絶縁体となるセラミックグリーンシートとして、 Srおよび Wを含む酸化物、 Zn および Tiを含む酸化物のうち少なくとも一方を含有する絶縁体材料を主成分とする、 所定の位置に貫通孔が形成されたセラミックグリーンシートおよび貫通孔が形成され ていないセラミックグリーンシートを用意する工程と、  (a) The ceramic green sheet serving as the insulator, which mainly includes an insulator material containing at least one of oxides containing Sr and W, and oxides containing Zn and Ti, has through holes at predetermined positions. A step of preparing a ceramic green sheet in which is formed and a ceramic green sheet in which a through hole is not formed;
(b)前記貫通孔が形成されたセラミックグリーンシートの貫通孔に、 Zn〇を主成分と する半導体セラミック粉末をペースト化した半導体セラミックペーストを充填する工程 と、  (b) filling a through-hole of the ceramic green sheet having the through-hole formed therein with a semiconductor ceramic paste obtained by converting a semiconductor ceramic powder containing Zn〇 as a main component into a paste;
(c)貫通孔が形成されたセラミックグリーンシートの貫通孔に、 Zn〇と電位障壁を形 成する金属酸化化合物の粉体を主成分とする金属酸化化合物粉末をペースト化し た金属酸化化合物ペーストを充填する工程と、  (c) A metal oxide compound paste in which a metal oxide compound powder mainly composed of a powder of a metal oxide compound forming a potential barrier with Zn〇 is pasted into a through hole of a ceramic green sheet having a through hole formed therein. Filling step;
(d)内部電極形成用の導体パターンが配設されたセラミックグリーンシートを用意す る工程と、  (d) preparing a ceramic green sheet provided with a conductor pattern for forming an internal electrode;
(e)貫通孔に半導体セラミックペーストが充填されたセラミックグリーンシートと、貫通 孔に前記金属酸化化合物ペーストが充填されたセラミックグリーンシートと、導体バタ ーンが配設されたセラミックグリーンシートと、貫通孔が形成されてレ、なレ、セラミックグ リ一ンシートを積層して積層体を形成する工程と、  (e) a ceramic green sheet having a through hole filled with a semiconductor ceramic paste, a ceramic green sheet having a through hole filled with the metal oxide compound paste, and a ceramic green sheet having a conductor pattern disposed therein. Forming a laminate by laminating a ceramic green sheet having holes formed therein;
(f)前記積層体を焼成して、内部に、 Zn〇を主成分とする半導体セラミック体と、 Zn oと電位障壁を形成する金属酸化化合物体とが面で接合された接合体と、接合体の 接合面を導電経路が通過するような態様で配設された内部電極とを備えた絶縁体を 形成する工程と、 (f) firing the laminated body, inside, a semiconductor ceramic body containing Zn〇 as a main component, Zn o and a metal oxide compound that forms a potential barrier are bonded together by a surface, and an insulator including an internal electrode arranged in such a manner that a conductive path passes through the bonding surface of the bonded body. Forming,
(g)前記絶縁体の表面に前記内部電極と導通するように外部電極を形成する工程と を具備することを特徴とする半導体セラミック電子部品の製造方法。  (g) forming an external electrode on the surface of the insulator so as to conduct with the internal electrode.
[8] Srおよび Wを含む酸化物、 Znおよび Tiを含む酸化物のうち少なくとも一方を含有 する絶縁体の内部に、 ZnOを主成分とレ リスタ特性を有する半導体セラミック体が 配設されているとともに、該半導体セラミック体を導電経路が通過するような態様で内 部電極が配設され、かつ、絶縁体の表面に該内部電極と導通する外部電極が配設 された構造を有する半導体セラミック電子部品の製造方法であって、  [8] Inside an insulator containing at least one of an oxide containing Sr and W, and an oxide containing Zn and Ti, a semiconductor ceramic body having ZnO as a main component and having a relister characteristic is disposed. In addition, a semiconductor ceramic electronic device having a structure in which an internal electrode is disposed in such a manner that a conductive path passes through the semiconductor ceramic body, and an external electrode that is electrically connected to the internal electrode is disposed on a surface of an insulator. A method of manufacturing a part,
(a)前記絶縁体となるセラミックグリーンシートとして、 Srおよび Wを含む酸化物、 Zn および Tiを含む酸化物のうち少なくとも一方を含有する絶縁体材料を主成分とする、 所定の位置に貫通孔が形成されたセラミックグリーンシートおよび貫通孔が形成され ていないセラミックグリーンシートを用意する工程と、  (a) The ceramic green sheet serving as the insulator, which mainly includes an insulator material containing at least one of oxides containing Sr and W, and oxides containing Zn and Ti, has through holes at predetermined positions. A step of preparing a ceramic green sheet in which is formed and a ceramic green sheet in which a through hole is not formed;
(b)前記貫通孔が形成されたセラミックグリーンシートの貫通孔に、バリスタ特性を有 する半導体セラミック粉末をペースト化した半導体セラミックペーストを充填する工程 と、  (b) filling a through-hole of the ceramic green sheet having the through-hole formed therein with a semiconductor ceramic paste obtained by converting a semiconductor ceramic powder having varistor characteristics into a paste;
(c)内部電極形成用の導体パターンが配設されたセラミックグリーンシートを用意す る工程と、  (c) a step of preparing a ceramic green sheet provided with a conductor pattern for forming an internal electrode;
(d)貫通孔に半導体セラミックペーストが充填されたセラミックグリーンシートと、導体 パターンが配設されたセラミックグリーンシートと、貫通孔が形成されてレ、なレ、セラミツ タグリーンシートを積層して積層体を形成する工程と、  (d) Laminating and laminating a ceramic green sheet in which a through hole is filled with a semiconductor ceramic paste, a ceramic green sheet in which a conductor pattern is provided, and a ceramic green sheet in which a through hole is formed. Forming a body;
(e)前記積層体を焼成して、内部に、バリスタ特性を有する半導体セラミック体と、該 半導体セラミック体を導電経路が通過するような態様で配設された内部電極とを備え た絶縁体を形成する工程と、  (e) firing the laminate to form an insulator having a semiconductor ceramic body having varistor characteristics and an internal electrode disposed in such a manner that a conductive path passes through the semiconductor ceramic body; Forming,
(f)前記絶縁体の表面に前記内部電極と導通するように外部電極を形成する工程と を具備することを特徴とする半導体セラミック電子部品の製造方法。  (f) forming an external electrode on the surface of the insulator so as to be electrically connected to the internal electrode.
[9] 前記 Srおよび Wを含む酸化物が、 SrWO、または SrW〇と W〇との混晶であり、 前記 Znおよび Tiを含む酸化物が Zn TiOおよび ZnTiOの少なくとも一方であるこ と [9] The oxide containing Sr and W is SrWO or a mixed crystal of SrW〇 and W〇, The oxide containing Zn and Ti is at least one of ZnTiO and ZnTiO.
を特徴とする請求項 7または 8記載の半導体セラミック電子部品の製造方法。  9. The method for producing a semiconductor ceramic electronic component according to claim 7, wherein:
[10] 前記絶縁体となるセラミックグリーンシートを構成する前記絶縁体材料として、 Srお よび Wを含む酸化物、 Znおよび Tiを含む酸化物を予め 900°C 1100°Cで仮焼し た仮焼粉を用い、 [10] An oxide containing Sr and W and an oxide containing Zn and Ti were calcined in advance at 900 ° C. and 1100 ° C. as the insulator material constituting the ceramic green sheet serving as the insulator. Using roasted powder,
前記貫通孔に充填される半導体セラミックペーストおよび金属酸化化合物ペースト を構成する半導体セラミック粉末および金属酸化化合物粉末として、半導体セラミツ ク粉末および金属酸化化合物粉末を予め 900°C— 1100°Cで仮焼した仮焼粉を用 レ、ること  The semiconductor ceramic powder and the metal oxide compound powder constituting the semiconductor ceramic paste and the metal oxide compound paste to be filled in the through holes were preliminarily calcined at 900 ° C to 1100 ° C as the semiconductor ceramic powder and the metal oxide compound powder. Using calcined powder
を特徴とする請求項 7 9のいずれかに記載の半導体セラミック電子部品の製造方 法。  A method for producing a semiconductor ceramic electronic component according to any one of claims 79, characterized by the following:
[11] 前記絶縁体が、 Zn TiOと ZnTiOの両方を含有している場合には、 Zn TiOおよ び ZnTiOの合計含有率が 90mol%以上であり、 Zn TiOおよび ZnTiOのいずれか 一方を含有している場合には、 Zn TiOおよび ZnTiOのいずれか一方の含有率が [11] When the insulator contains both ZnTiO and ZnTiO, the total content of ZnTiO and ZnTiO is 90 mol% or more, and the insulator contains one of ZnTiO and ZnTiO. The content of either Zn TiO or ZnTiO
90mol%以上であることを特徴とする請求項 7— 10のいずれかに記載の半導体セラ ミック電子部品の製造方法。 11. The method for producing a semiconductor ceramic electronic component according to claim 7, wherein the content is 90 mol% or more.
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JP2008147323A (en) * 2006-12-08 2008-06-26 Murata Mfg Co Ltd Thermoelectric conversion module and manufacturing method thereof
JP2010524384A (en) * 2007-04-11 2010-07-15 イノチップ テクノロジー シーオー エルティディー Circuit protection element and manufacturing method thereof
US8493704B2 (en) 2007-04-11 2013-07-23 Innochips Technology Co., Ltd. Circuit protection device and method of manufacturing the same
US8865480B2 (en) 2007-04-11 2014-10-21 Innochips Technology Co., Ltd. Circuit protection device and method of manufacturing the same
US9318256B2 (en) 2007-04-11 2016-04-19 Innochips Technology Co., Ltd. Circuit protection device and method of manufacturing the same

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