WO2005017988A1 - Substrate processing apparatus and method for manufacturing semiconductor device - Google Patents

Substrate processing apparatus and method for manufacturing semiconductor device Download PDF

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Publication number
WO2005017988A1
WO2005017988A1 PCT/JP2004/011470 JP2004011470W WO2005017988A1 WO 2005017988 A1 WO2005017988 A1 WO 2005017988A1 JP 2004011470 W JP2004011470 W JP 2004011470W WO 2005017988 A1 WO2005017988 A1 WO 2005017988A1
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WO
WIPO (PCT)
Prior art keywords
substrate
susceptor
wafer
processing apparatus
quartz
Prior art date
Application number
PCT/JP2004/011470
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French (fr)
Japanese (ja)
Inventor
Mitsuro Tanabe
Original Assignee
Hitachi Kokusai Electric Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Kokusai Electric Inc. filed Critical Hitachi Kokusai Electric Inc.
Priority to JP2005513162A priority Critical patent/JPWO2005017988A1/en
Publication of WO2005017988A1 publication Critical patent/WO2005017988A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67115Apparatus for thermal treatment mainly by radiation

Definitions

  • the present invention relates to a substrate processing apparatus, and more particularly, to a semiconductor manufacturing apparatus having a susceptor that suppresses taking in the direct radiation intensity of a wafer heater from the outer periphery of a wafer when measuring the temperature of the wafer with a radiation thermometer. It is about.
  • the susceptor 217 uses (1) a quartz susceptor 501 with a Si film 502 coded on its surface (see FIG. 1), and (2) a susceptor 504 made of Si / Poly—Si. (See Fig. 2) and (3) a Si / Poly-Si plate 506 combined with a quartz susceptor 505 (see Fig. 3).
  • Si can suppress the transmission of light in the measurement wavelength range (0.9-1 ⁇ ⁇ ) of the radiation thermometer 261 and the control temperature range (350 ° C-1200 ° C), and the lamp energy It is commonly used to prevent the transmission of light.
  • SiC and carbon coated with SiC are also used.
  • the quartz plate 505 and the Si plate 506 have a double structure.
  • 500 is divided into several zones so that the temperature inside the surface of the wafer 200 can be controlled to a uniform temperature
  • the outer peripheral range of the wafer 200 on which the Si plate 505 is mounted is not a uniform temperature rise / fall range, so temperature unevenness may occur. Deformation and breakage will occur. Further, there is a problem that the lamp light leaks due to the deformation, and the detection error of the temperature taken by the radiation thermometer 261 becomes large.
  • a main object of the present invention is to solve the problems of the prior art such as peeling of the Si film due to insufficient strength against thermal stress, an increase in heat capacity, and transmission of lamp light, and more reliable temperature detection and long life. It is an object of the present invention to provide a substrate processing apparatus provided with a susceptor capable of achieving a high performance.
  • a processing chamber forming a space for processing a substrate
  • a substrate mounting member for mounting the substrate for mounting the substrate
  • a substrate processing apparatus wherein a member that does not transmit light emitted from the heating member is provided inside at least a part of the substrate mounting member.
  • a processing chamber forming a space for processing a substrate
  • a substrate mounting member for mounting the substrate for mounting the substrate
  • a method of manufacturing a semiconductor device comprising a step of processing a substrate using a substrate processing apparatus provided with a member that does not transmit radiation emitted from the heating member inside at least a part of the substrate mounting member.
  • FIG. 1 is a schematic cross-sectional view for explaining an example of a susceptor of a conventional substrate processing apparatus.
  • FIG. 2 is a schematic cross-sectional view for explaining another example of a susceptor of a conventional substrate processing apparatus.
  • FIG. 3 is a schematic sectional view for explaining still another example of the susceptor of the conventional substrate processing apparatus.
  • FIG. 4 is a schematic cross-sectional view for explaining a susceptor of the substrate processing apparatus according to the first and second embodiments of the present invention.
  • FIG. 5A is a partially enlarged schematic exploded sectional view for illustrating a manufacturing process of a susceptor of the substrate processing apparatus according to the first embodiment of the present invention.
  • FIG. 5B is a partially enlarged schematic cross-sectional view for explaining a state after the susceptor of the substrate processing apparatus according to the first embodiment of the present invention is manufactured.
  • FIG. 6A is a partially enlarged schematic exploded sectional view for illustrating a manufacturing process of a susceptor of the substrate processing apparatus according to the second embodiment of the present invention.
  • FIG. 6B is a partially enlarged schematic cross-sectional view for explaining a state after the susceptor of the substrate processing apparatus according to the second embodiment of the present invention is manufactured.
  • Garden 7 is a schematic cross-sectional view of an example of a substrate processing apparatus to which the present invention is suitably applied.
  • Garden 8 is a schematic longitudinal sectional view for explaining a processing chamber of the substrate processing apparatus suitably used in the present invention.
  • the susceptor 217 must be replaced with a quartz susceptor to achieve the four points of being a high-purity material (not a source of particles, organic contamination, and metal contamination).
  • the 510 has a structure in which a member that does not transmit as much as 500 lamps of radiated light is provided as an internal susceptor 520.
  • the wafer 200 has a structure in which it is mounted on a transparent quartz plate 503 provided at the center of the susceptor 217.
  • FIGS. 5A, 5B, 6A, and 6B are partial enlarged schematic cross-sectional views of a portion B in FIG.
  • a hole is dug in the transparent quartz susceptor member 511 to form a concave portion 514, and a Si plate as an internal susceptor 520 is provided in the concave portion 514.
  • 530 was dropped and sealed again with the transparent quartz plate 512.
  • the Si plate 530 prevents light emitted from the lamp 500 from being transmitted.
  • the joint 513 between the transparent quartz susceptor member 511 and the transparent quartz plate 512 has a structure in which these two members are simply combined or a structure in which these two members are welded. In the case of welding, it is preferable to make the inside vacuum to avoid the influence of thermal expansion of air.
  • the susceptor 217 has a structure in which the transparent quartz susceptor member 511, the transparent quartz plate 512, and the quartz susceptor 510, which is a powerful susceptor, are provided with the Si plate 530.
  • an opaque quartz susceptor member may be used instead of the transparent quartz susceptor member 511, and an opaque quartz plate may be used instead of the transparent quartz plate 512.
  • the Si plate 530 is a split type that is divided into a plurality of sub-Si plates 531 and has a structure that suppresses warpage of the Si plate 530 and damage due to repeated thermal stress.
  • FIG. 5A is an exploded view showing a manufacturing process of the susceptor 217
  • FIG. 5B shows the susceptor 217 after the manufacturing.
  • Example 2 of the present invention as an alternative to Si, metal Nb (niobium) was kneaded into quartz and melted (melted and mixed) to produce Nb quartz. Is used as a light transmission preventing material. This material has almost the same coefficient of thermal expansion, heat resistance, and heat capacity as quartz, and is not damaged by thermal stress / coefficient of thermal expansion. Since metal material is kneaded, it is embedded in quartz and sealed by welding to prevent diffusion of Nb metal. However, it is not divided like Si in the first embodiment.
  • a hole is dug in the transparent quartz susceptor member 511 to form a concave portion 514, and an Nb quartz plate 540 as an internal susceptor 520 is dropped into the concave portion 514, and the transparent quartz plate 512 And sealed.
  • the joint 513 between the transparent quartz susceptor member 511 and the transparent quartz plate 512 has a structure welded all around. When welding, it is preferable to create a vacuum inside to avoid the effects of thermal expansion of the air.
  • the susceptor 217 has a structure in which the Nb quartz plate 540 is provided inside the quartz susceptor 510 including the transparent quartz susceptor member 511 and the transparent quartz plate 512.
  • FIG. 6A is an exploded view showing a manufacturing process of the susceptor 217
  • FIG. 6B shows the susceptor 217 after the manufacturing.
  • the inner end 537 of the internal susceptor 520 is configured such that the wafer 200 is placed on a transparent quartz plate 503 provided at the center of the susceptor 217. When mounted (see FIG. 4), it is provided inside the quartz susceptor 510 so as to overlap the outer peripheral portion of the wafer 200 when viewed from a direction perpendicular to the main surface of the wafer 200.
  • a FOUP front opening unified pod; hereinafter, referred to as a pod
  • a pod front opening unified pod
  • FIG. That is, the front is below the paper, the rear is above the paper, and the left and right are the left and right of the paper with respect to the paper shown in FIG.
  • the substrate processing apparatus includes a first transfer chamber 103 having a load lock chamber structure that can withstand a pressure (negative pressure) below atmospheric pressure such as a vacuum state.
  • the casing 101 of the first transfer chamber 103 is formed in a box shape having a hexagonal plan view and closed at both upper and lower ends.
  • a first wafer transfer machine 112 for transferring the wafer 200 under negative pressure is installed in the first transfer chamber 103.
  • the first wafer transfer device 112 is configured to be able to move up and down by the elevator 115 while maintaining the airtightness of the first transfer chamber 103.
  • a spare room 122 for carrying in and a spare room 123 for carrying out via gate valves 244 and 127, respectively.
  • the load lock chambers are configured to be able to withstand a negative pressure.
  • a substrate holder 140 for a carry-in room is installed in the spare room 122
  • a substrate holder 141 for a carry-out room is installed in the spare room 123.
  • a second transfer chamber 121 used under substantially atmospheric pressure is connected to the front sides of the preliminary chamber 122 and the preliminary chamber 123 via gate valves 128 and 129.
  • a second wafer transfer machine 124 for transferring the wafer 200 is installed in the second transfer chamber 121.
  • the second wafer transfer machine 124 is configured to be moved up and down by an elevator 126 installed in the second transfer chamber 121, and is reciprocated in the left-right direction by a linear actuator 132. Is configured.
  • an orientation flat aligning device 106 is provided on the left side of the second transfer chamber 121.
  • a clean unit (not shown) for supplying clean air is installed above the second transfer chamber 121.
  • the housing 125 of the second transfer chamber 121 includes a wafer transfer port 134 for transferring the wafer 200 into and out of the second transfer chamber 121, A lid 142 for closing the wafer loading / unloading port and a pod orbner 108 are provided.
  • the pod orbner 108 includes a cap for the pod 100 placed on the 1 ⁇ stage 105 and a cap opening / closing mechanism 136 for opening and closing a lid 142 for closing the wafer loading / unloading port 134, and is mounted on the 1 ⁇ stage 105.
  • the pod 100 can take in / out the wafer.
  • the pod 100 is supplied to and discharged from the IO stage 105 by an in-process transfer device (RGV) (not shown).
  • RUV in-process transfer device
  • first processing furnace 202 for performing desired processing on the wafer
  • Second processing furnaces 137 are connected adjacent to each other.
  • Each of the first processing furnace 202 and the second processing furnace 137 is configured by a cold wall processing furnace.
  • the remaining two side walls facing each other among the six side walls of the casing 101 are provided with a first cooling unit 138 as a third processing furnace and a second cooling unit 138 as a fourth processing furnace.
  • the first cooling unit 138 and the second cooling unit 139 are configured so as to cool the processed wafer 200 even if the first cooling unit 138 and the second cooling unit 139 are shifted.
  • the processing step is performed with 25 unprocessed wafers 200 stored in the pod 100. Transported by the in-process transport device to the substrate processing apparatus. As shown in FIG. 7, the transported pod 100 is delivered from the in-process transport device and placed on the 1 ⁇ ⁇ stage 105. The cap of the pod 100 and the lid 142 for opening and closing the wafer loading / unloading port 134 are removed by the cap opening / closing mechanism 136, and the wafer loading / unloading port of the pod 100 is opened.
  • the second wafer transfer device 124 installed in the second transfer chamber 121 picks up the wafer 200 with the pod 100 force, and carries the wafer 200 into the spare chamber 122. 200 is transferred to the substrate holder 140. During this transfer operation, the gate valve 244 on the first transfer chamber 103 side is closed, and the negative pressure in the first transfer chamber 103 is maintained. When the transfer of the wafer 200 to the substrate holder 140 is completed, the gate valve 128 is closed, and the preliminary chamber 122 is evacuated to a negative pressure by an exhaust device (not shown).
  • the gate valves 244 and 130 are opened, and the preliminary chamber 122, the first transfer chamber 103, and the first processing furnace 202 are communicated.
  • the first wafer transfer device 112 in the first transfer chamber 103 picks up the wafer 200 from the substrate holder 140 and carries it into the first processing furnace 202.
  • a processing gas is supplied into the first processing furnace 202, and desired processing is performed on the wafer 200.
  • one processed wafer 200 is unloaded to the first transfer chamber 103 by the first wafer transfer device 112 in the first transfer chamber 103. You.
  • first wafer transfer device 112 carries wafer 200 carried out of first processing furnace 202 into first cooling unit 138, and cools the processed wafer.
  • the first wafer transfer device 112 transfers the wafer 200 prepared in advance to the substrate holder 140 in the preliminary chamber 122 to the first processing furnace.
  • the wafer 200 is transferred by the operation described above in FIG. 202, a processing gas is supplied into the first processing furnace 202, and a desired processing is performed on the wafer 200.
  • the cooled wafer 200 is transferred from the first cooling unit 138 to the first transfer chamber 103 by the first wafer transfer device 112. It is carried out.
  • the cooled wafer 200 is unloaded from the first cooling unit 138 to the first transfer chamber 103. After that, the gate valve 127 is opened. Then, the first wafer transfer device 112 transports the wafer 200 unloaded from the first cooling unit 138 to the preliminary chamber 123, and after transferring the wafer 200 to the substrate mounting table 141, the preliminary chamber 123 is closed by the gate vane rev 127. .
  • the inside of the preliminary exhaust chamber 123 is returned to substantially the atmospheric pressure by the inert gas.
  • the gate valve 129 is opened, and the lid 142 closing the wafer loading / unloading port 134 corresponding to the preliminary chamber 123 of the second transfer chamber 121 and the IO stage 105
  • the cap of the empty pod 100 on which it is placed is opened by the pod opener 108.
  • the second wafer transfer device 124 in the second transfer chamber 121 picks up the wafer 200 from the substrate table 141 and unloads the wafer 200 to the second transfer chamber 121, and transfers the wafer 200 to the second transfer chamber 121.
  • the pod 100 It is stored in the pod 100 through the loading / unloading port 134.
  • the cap of the pod 100 and the lid 142 for closing the wafer loading / unloading port 134 are closed by the pod opener 108.
  • the closed pod 100 is transported from above the IO stage 105 to the next process by the in-process transport device.
  • the wafers are sequentially processed.
  • the above operation has been described by taking as an example the case where the first processing furnace 202 and the first cooling unit 138 are used.However, the case where the second processing furnace 137 and the second cooling unit 139 are used is described. The same operation is also performed for.
  • the spare room 122 is used for carrying in and the spare room 123 is used for carrying out.
  • the spare room 123 may be used for carrying in and the spare room 122 may be used for carrying out.
  • the first processing furnace 202 and the second processing furnace 137 may perform the same processing, or may perform different processing.
  • the processing is separately performed in the second processing furnace 137. May be performed.
  • the first cooling unit 138 (or the second cooling unit 139) is used. You may make it go through.
  • the processing furnace is indicated generally by reference numeral 202.
  • the processing furnace 202 is a single-wafer processing furnace suitable for performing various processing steps on a substrate 200 (hereinafter, referred to as a wafer) such as a semiconductor wafer.
  • the processing furnace 202 is particularly suitable for heat treatment of a semiconductor wafer.
  • heat treatment examples include the thermal annealing of semiconductor wafers, the thermal reflow of glass made of boron-phosphorus, the high-temperature oxide film, the low-temperature oxide film, the high-temperature nitride film, doped polysilicon, and undoped polysilicon in the processing of semiconductor devices.
  • the processing furnace 202 includes a heater assembly 500 composed of an upper lamp 207 and a lower lamp 223 surrounded by a rotating cylinder 279.
  • the heater assembly 500 supplies radiant heat to the wafer 200 so that the substrate temperature becomes substantially uniform.
  • the heater assembly 500 illuminates at an emission peak of 0.95 microns, forms multiple heating zones, and provides a focused heating profile that applies more heat to the substrate periphery than the center of the wafer.
  • a heating element such as a tungsten-halogen linear lamp 207, 223.
  • An electrode 224 is connected to each of the upper lamp 207 and the lower lamp 223 to supply electric power to each lamp, and the degree of heating of each lamp is controlled by a heating controller 301 controlled by a main controller 300. Being done.
  • the heater assembly 500 is housed in a rotating cylinder 279 mechanically connected to a spur gear 277.
  • the rotary cylinder 279 is made of ceramic, graphite, more preferably graphite coated with silicon graphite.
  • the heater assembly and the rotary cylinder 279 are housed in the chamber main body 227, are vacuum-sealed, and are held on the chamber bottom 228 of the chamber main body 227.
  • the chamber body 227 can be formed from various metal materials. For example, aluminum is suitable for some applications and stainless steel for other applications. The choice of materials will depend on the type of chemical used in the deposition process and the reactivity of these chemicals with the selected metal, as will be appreciated by those skilled in the art.
  • the chamber walls are water cooled to about 45-47 degrees Fahrenheit by a well-known circulating chilled water flow system, as is well known in the art.
  • the rotary cylinder 279 is rotatably held on the chamber bottom 228. Specifically, The gears 276, 277 and the power S Bouno bearing 278 are rotatably held on the channel base 228, and the spur gear 276 and the spur gear 277 are arranged so as to mesh with each other. Further, the spur gear 276 is rotated by a susceptor drive mechanism 267 controlled by a drive control unit 304 controlled by the main control unit 300, and rotates the rotary cylinder 279 via the spur gear 276 and the spur gear 277. ing.
  • the rotational speed of the rotary base 18 is preferably between 5 and 60 rpm depending on the particular process, as will be appreciated by those skilled in the art.
  • the processing furnace 202 has a chamber 225 composed of a chamber main body 227, a chamber lid 226, and a chamber bottom 228, and forms a processing chamber 201 in a space surrounded by the chamber 225.
  • Wafer 200 is held on susceptor 217, which is a substrate holding means.
  • the susceptor 217 has a donut shape and is supported by a rotating cylinder 279.
  • a gas supply pipe 232 is provided through the chamber lid 226 so that a processing gas 230 can be supplied to the processing chamber 201.
  • the gas supply pipe 232 is connected to gas sources of gas A and gas B via an on-off valve 243 and a mass flow controller (hereinafter, referred to as MFC) 241 as a flow control means.
  • MFC mass flow controller
  • the gas used here is an inert gas such as nitrogen, or a desired gas such as hydrogen, argon, or tungsten hexafluoride, and is used to form a desired film on the wafer 200 to form a semiconductor device. It is.
  • the open / close valve 243 and the MFC 241 are controlled by the gas control unit 302 controlled by the main control unit 300, and supply and stop of the gas and the flow rate of the gas are controlled.
  • the processing gas 230 supplied from the gas supply pipe 232 reacts with the wafer 200 in the processing chamber 201, and the remaining gas flows from the gas exhaust port 235 which is an exhaust port provided in the chamber main body 227. It is discharged out of the processing chamber via an exhaust device including a vacuum pump and the like as shown.
  • the processing furnace 202 also includes non-contact emissivity measurement means for measuring the emissivity (emissivity) of the wafer 200 in various manufacturing processes and calculating the temperature.
  • the emissivity measuring means mainly includes an emissivity measuring probe 260, an emissivity measuring reference lamp (reference light) 265, a temperature detecting section, and an optical fiber-to-communication cable connecting the probe 260 and the temperature detecting section.
  • the cable preferably comprises a sapphire optical fiber-to-communication cable.
  • the probe 260 is rotatably provided by a probe rotation mechanism 274, and one end of the probe 260 is directed toward the wafer 200 or the reference lamp 265 serving as reference light. Further, since the probe 260 is connected to the optical fiber-to-communication cable by slip connection, the connection state is maintained even if the probe 260 rotates as described above.
  • the probe rotation mechanism 274 rotates the emissivity measurement probe 260, whereby the tip of the probe 260 is directed substantially upward to the emissivity measurement reference lamp 265, and the probe 260
  • the probe 260 is turned around with respect to the second position, which is directed substantially downward toward the wafer 200. Therefore, it is preferable that the tip of the probe 260 is oriented in a direction perpendicular to the rotation axis of the probe 260. In this way, the probe 260 can detect the density of photons emitted from the reference lamp 265 and the density of photons reflected from the wafer 200.
  • the reference lamp 265 preferably comprises a white light source that emits light having a wavelength at which light transmittance in the wafer 200 is minimized, preferably a wavelength of 0.95 microns.
  • the emissivity measuring means described above measures the emissivity of the wafer 200 by comparing the radiation from the reference lamp 265 with the radiation of the wafer 200 power.
  • the heater assembly 500 Since the heater assembly 500 is completely surrounded by the rotating cylinder 279, the susceptor 217, and the wafer 200, the heater assembly 500 which can affect reading by the emissivity measurement probe 260 is supplied to the processing chamber 201. There is no light leakage.
  • the gate valve 244 which is a gate valve, is opened, the wafer (substrate) 200 is loaded into the processing chamber 201 through the wafer loading / unloading port 247 provided in the chamber main body 227, and the wafer 200 is loaded into the susceptor 217.
  • the susceptor rotating mechanism (rotating means) 267 rotates the rotating cylinder 279 and the susceptor 217 during processing.
  • the probe 260 rotates so as to face the reference lamp 265 directly above the wafer 200, and the reference lamp 265 is turned on. Then, the probe 260 measures the incident photon density from the reference lamp 265.
  • the probe 260 While the reference lamp 265 is on, the probe 260 rotates from the first position to the second position, and while rotating, faces the wafer 200 directly below the reference lamp 265. In this position, probe 260 measures the reflected photon density on the device side of wafer 200 (the surface of wafer 200). Subsequently, the reference lamp 265 is turned off. . While directly facing the wafer 200, the probe 260 measures the emitted photons from the heated wafer 200. According to Planck's law, the energy released to a particular surface is related to the fourth power of the surface temperature. The proportionality constant is also the product of the Stefan's Boltzmann constant and the surface emissivity.
  • the surface emissivity when determining the surface temperature in the non-contact method, it is preferable to use the surface emissivity.
  • the total hemispherical reflectivity of the device surface of the wafer 200 is calculated using the following equation, and subsequently the emissivity is obtained according to Kirchhoff's law.
  • Wafer reflectance reflected light intensity / incident light intensity
  • the wafer temperature is obtained from Planck's equation. This technique is also used when the wafers are hot and in such applications the base heat radiation is subtracted before performing the above calculations.
  • the probe 260 remains in the second position, ie, the position facing the wafer, and always provides emissivity data when the reference lamp 265 is turned on.
  • the probe 260 measures the density of photons reflected from the device surface of the wafer 200 during its rotation, providing a variable device structure that will be lithographically printed on the substrate. Measure the reflection from the average surface topology.
  • emissivity measurement is performed over a processing cycle including a thin film deposition process, instantaneous changes in emissivity are monitored and temperature correction is performed dynamically and continuously.
  • the processing furnace 202 further includes a plurality of temperature measuring probes 261 as temperature detecting means. These probes 261 are fixed to the chamber lid 226 and constantly measure the photon density emitted from the wafer 200 and the device surface under all processing conditions. Based on the photon density measured by the probe 261, the wafer temperature is calculated by the temperature detection unit 303 and compared with the set temperature by the main control unit 300. As a result of the comparison, the main control unit 300 calculates all deviations, and via the heating control unit 301, determines the amount of power supply to the plurality of zones of the upper lamp 207 and the lower lamp 223, which are heating means in the heater assembly. Control. Preferably, it includes three probes 261 positioned to measure the temperature of different portions of the wafer 200. This ensures temperature uniformity during the processing cycle.
  • the wafer temperature calculated by the temperature measurement probe 261 is By correcting the wafer emissivity calculated by the probe 260, it is possible to detect the wafer temperature more accurately.
  • the wafer 200 is lifted from the susceptor other than the center together with the susceptor in the center of the susceptor 217 by a plurality of push-up pins 266, and the wafer 200 is automatically loaded and unloaded in the processing furnace 202.
  • a space is formed below the wafer 200 so that it can be dated.
  • the push-up pin 266 is moved up and down by an elevating mechanism 275 under the control of the drive control unit.
  • the processing conditions in the processing furnace 202 of the present embodiment are as follows: in forming a silicon oxide film, the wafer temperature is 1000 ° C., the gas supply amount is 5 SLM, and the processing pressure is
  • a susceptor capable of withstanding mass production by suppressing damage due to insufficient strength against thermal stress, deterioration of temperature control due to an increase in heat capacity, and erroneous temperature detection due to transmission of lamp light.
  • the present invention can be particularly suitably applied to a substrate processing apparatus provided with the susceptor, which processes a semiconductor wafer, and a method of manufacturing a device using the same.

Abstract

A substrate processing apparatus is disclosed which comprises a process chamber (225) for processing a wafer (200), a susceptor (217) on which the wafer (200) is placed, and a lamp (500) for heating the substrate. The susceptor (217) has a structure wherein an inner susceptor (520) made of a material which does not transmit the light emitted from the lamp (500) is arranged inside a transparent quartz susceptor (510).

Description

明 細 書  Specification
基板処理装置および半導体デバイスの製造方法  Substrate processing apparatus and semiconductor device manufacturing method
技術分野  Technical field
[0001] 本発明は、基板処理装置に関し、特に、放射温度計によるウェハの温度計測にお レ、てウェハ外周からウェハ加熱体の直接放射強度を取り込むことを抑制するサセプ タを有する半導体製造装置に関するものである。  The present invention relates to a substrate processing apparatus, and more particularly, to a semiconductor manufacturing apparatus having a susceptor that suppresses taking in the direct radiation intensity of a wafer heater from the outer periphery of a wafer when measuring the temperature of the wafer with a radiation thermometer. It is about.
背景技術  Background art
[0002] 従来この種の装置において、サセプタ 217は(1)石英製サセプタ 501表面に Si膜 5 02をコーディングしたもの(図 1参照)、 (2) Si/Poly— Si製のサセプタ 504を使用し たもの(図 2参照)や(3) Si/Poly— Si製の板 506を石英製サセプタ 505上に組み合 わせたもの(図 3参照)などが存在している。 Siは放射温度計 261の測定波長範囲(0 . 9—1 · Ι μ ΐη)と制御温度範囲(350°C— 1200°C)における光の透過を抑制するこ とが可能であり、ランプエネルギの透過防止のため一般的使用されている。 SiCや Si Cをコーティングしたカーボンなども同様に使用されている。  Conventionally, in this type of apparatus, the susceptor 217 uses (1) a quartz susceptor 501 with a Si film 502 coded on its surface (see FIG. 1), and (2) a susceptor 504 made of Si / Poly—Si. (See Fig. 2) and (3) a Si / Poly-Si plate 506 combined with a quartz susceptor 505 (see Fig. 3). Si can suppress the transmission of light in the measurement wavelength range (0.9-1 · Ιμΐη) of the radiation thermometer 261 and the control temperature range (350 ° C-1200 ° C), and the lamp energy It is commonly used to prevent the transmission of light. SiC and carbon coated with SiC are also used.
[0003] しかしながら、図 1に示す(1)の場合には、石英の熱膨張係数が Siの熱膨張係数と 異なるために昇降温を繰り返すと石英製サセプタ 501と Si膜 602の間に亀裂が生じ Si膜 602が剥がれ落ちる (A部参照)という問題がある。  [0003] However, in the case of (1) shown in FIG. 1, since the thermal expansion coefficient of quartz is different from the thermal expansion coefficient of Si, a crack is generated between the quartz susceptor 501 and the Si film 602 when the temperature is repeatedly increased and decreased. As a result, there is a problem that the Si film 602 peels off (see section A).
[0004] 図 2に示す(2)の場合には、 SiZPoly— Si製サセプタ 504の熱容量が大きいため、 連続処理が開始されると外周に位置するサセプタ 504自体が高温安定化し、常温の ウェハがサセプタ 217に搬送されると、ウェハ 200中央とウェハ 200外周との間の温 度差でウェハ 200にスリップまたは熱変形による位置ずれが生じるという問題がある。  [0004] In the case of (2) shown in Fig. 2, the heat capacity of the SiZPoly-Si susceptor 504 is large, so that when continuous processing is started, the susceptor 504 itself located on the outer periphery is stabilized at a high temperature, and a wafer at room temperature is discharged. When the wafer 200 is transported to the susceptor 217, there is a problem that the temperature difference between the center of the wafer 200 and the outer periphery of the wafer 200 causes the wafer 200 to be displaced by slip or thermal deformation.
[0005] 図 3に示す(3)の場合には、サセプタ 217の熱容量を抑え冷却効果を高めるため に、石英プレート 505と Siプレート 506との 2重構造とし、ウエノヽ 200の面内はランプ 5 00を数ゾーンに分けウェハ 200の面内を均一な温度に制御できるようにしているが、 Siプレート 505を載置するウェハ 200の外周範囲は均一昇降温範囲ではないため、 温度ムラが生じ変形、破損が生じてしまう。また変形によりランプ光が漏れ放射温度 計 261による取り込み温度検知誤差が大きくなるという問題点がある。 [0006] 本発明の主な目的は、従来技術の問題点の熱ストレス対する強度不足による Si膜 剥がれと熱容量の増大とランプ光の透過の問題点を解決し、より確実な温度検知と 長寿命化を図れるサセプタを備える基板処理装置を提供することにある。 [0005] In the case of (3) shown in FIG. 3, in order to suppress the heat capacity of the susceptor 217 and enhance the cooling effect, the quartz plate 505 and the Si plate 506 have a double structure. Although 500 is divided into several zones so that the temperature inside the surface of the wafer 200 can be controlled to a uniform temperature, the outer peripheral range of the wafer 200 on which the Si plate 505 is mounted is not a uniform temperature rise / fall range, so temperature unevenness may occur. Deformation and breakage will occur. Further, there is a problem that the lamp light leaks due to the deformation, and the detection error of the temperature taken by the radiation thermometer 261 becomes large. [0006] A main object of the present invention is to solve the problems of the prior art such as peeling of the Si film due to insufficient strength against thermal stress, an increase in heat capacity, and transmission of lamp light, and more reliable temperature detection and long life. It is an object of the present invention to provide a substrate processing apparatus provided with a susceptor capable of achieving a high performance.
発明の開示  Disclosure of the invention
[0007] 本発明の一態様によれば、 [0007] According to one aspect of the present invention,
基板を処理する空間を形成する処理チャンバと、  A processing chamber forming a space for processing a substrate;
前記基板を載置する基板載置部材と、  A substrate mounting member for mounting the substrate,
前記基板を加熱する加熱部材とを有し、  Having a heating member for heating the substrate,
前記基板載置部材の少なくとも一部の内部に、前記加熱部材からの放射光を透過 させない部材を設けたことを特徴とする基板処理装置が提供される。  A substrate processing apparatus is provided, wherein a member that does not transmit light emitted from the heating member is provided inside at least a part of the substrate mounting member.
[0008] 本発明の他の態様によれば、 [0008] According to another aspect of the present invention,
基板を処理する空間を形成する処理チャンバと、  A processing chamber forming a space for processing a substrate;
前記基板を載置する基板載置部材と、  A substrate mounting member for mounting the substrate,
前記基板を加熱する加熱部材とを有し、  Having a heating member for heating the substrate,
前記基板載置部材の少なくとも一部の内部に、前記加熱部材からの放射光を透過 させない部材を設けた基板処理装置を使用して基板を処理する工程を備える半導 体デバイスの製造方法であって、  A method of manufacturing a semiconductor device, comprising a step of processing a substrate using a substrate processing apparatus provided with a member that does not transmit radiation emitted from the heating member inside at least a part of the substrate mounting member. hand,
前記基板を前記加熱部材により加熱する工程と、  Heating the substrate by the heating member,
所望のガスを前記処理チャンバに供給する工程と、  Supplying a desired gas to the processing chamber;
前記基板のデバイス面の温度を測定する工程と、  Measuring the temperature of the device surface of the substrate,
前記基板の温度測定結果に基づき、前記加熱部材を制御する工程と、を備えるこ とを特徴とする半導体デバイスの製造方法が提供される。  Controlling the heating member based on the result of measuring the temperature of the substrate.
図面の簡単な説明  Brief Description of Drawings
[0009] [図 1]従来の基板処理装置のサセプタの一例を説明するための概略断面図である。  FIG. 1 is a schematic cross-sectional view for explaining an example of a susceptor of a conventional substrate processing apparatus.
[図 2]従来の基板処理装置のサセプタの他の例を説明するための概略断面図である  FIG. 2 is a schematic cross-sectional view for explaining another example of a susceptor of a conventional substrate processing apparatus.
[図 3]従来の基板処理装置のサセプタのさらに他の例を説明するための概略断面図 である。 [図 4]本発明の実施例 1および実施例 2の基板処理装置のサセプタを説明するため の概略断面図である。 FIG. 3 is a schematic sectional view for explaining still another example of the susceptor of the conventional substrate processing apparatus. FIG. 4 is a schematic cross-sectional view for explaining a susceptor of the substrate processing apparatus according to the first and second embodiments of the present invention.
[図 5A]本発明の実施例 1の基板処理装置のサセプタの製造工程を説明するための 部分拡大概略分解断面図である。  FIG. 5A is a partially enlarged schematic exploded sectional view for illustrating a manufacturing process of a susceptor of the substrate processing apparatus according to the first embodiment of the present invention.
園 5B]本発明の実施例 1の基板処理装置のサセプタを製造した後の状態を説明す るための部分拡大概略断面図である。  FIG. 5B is a partially enlarged schematic cross-sectional view for explaining a state after the susceptor of the substrate processing apparatus according to the first embodiment of the present invention is manufactured.
園 6A]本発明の実施例 2の基板処理装置のサセプタの製造工程を説明するための 部分拡大概略分解断面図である。  FIG. 6A is a partially enlarged schematic exploded sectional view for illustrating a manufacturing process of a susceptor of the substrate processing apparatus according to the second embodiment of the present invention.
園 6B]本発明の実施例 2の基板処理装置のサセプタを製造した後の状態を説明す るための部分拡大概略断面図である。  FIG. 6B is a partially enlarged schematic cross-sectional view for explaining a state after the susceptor of the substrate processing apparatus according to the second embodiment of the present invention is manufactured.
園 7]本発明が好適に適用される基板処理装置の一例の概略横断面図である。 園 8]本発明で好適に用いられる基板処理装置の処理室を説明するための概略縦断 面図である。  Garden 7] is a schematic cross-sectional view of an example of a substrate processing apparatus to which the present invention is suitably applied. Garden 8] is a schematic longitudinal sectional view for explaining a processing chamber of the substrate processing apparatus suitably used in the present invention.
発明を実施するための好ましい形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0010] 次に、図面を参照して本発明の好ましレ、実施例を説明する。  Next, preferred embodiments and examples of the present invention will be described with reference to the drawings.
[0011] 本発明の実施例 1および実施例 2におレ、ては、 [0011] In Examples 1 and 2 of the present invention,
(1)ランプ光(0. 9-1. 1 111)の透過を0. 01%以下に抑制すること、 (1) To suppress the transmission of the lamp light (0.9-1.111) to 0.01% or less;
(2)常温一 1200°Cの使用雰囲気及び熱サイクルに耐える強度であること、 (2) It must be strong enough to withstand the use atmosphere and heat cycle at normal temperature and 1200 ° C.
(3)ランプ ON— OFFに追随し昇降温可能なように熱容量が低いこと、 (3) Low heat capacity so that the temperature rises and falls following lamp ON-OFF;
(4)純度の高い材料であること (パーディクル、有機物汚染、金属汚染の供給源で はないこと)の 4点を達成するために、図 4に示すように、サセプタ 217を、石英製サセ プタ 510の内部にランプ 500力もの放射光を透過させない部材を内部サセプタ 520 として設けた構造とした。なお、ウェハ 200は、サセプタ 217の中央部に設けた透明 石英板 503上に載置する構造となっている。 (4) As shown in Fig. 4, the susceptor 217 must be replaced with a quartz susceptor to achieve the four points of being a high-purity material (not a source of particles, organic contamination, and metal contamination). The 510 has a structure in which a member that does not transmit as much as 500 lamps of radiated light is provided as an internal susceptor 520. Note that the wafer 200 has a structure in which it is mounted on a transparent quartz plate 503 provided at the center of the susceptor 217.
[0012] 次に、図 4の B部の部分拡大概略断面図である図 5A、 5B、 6A、 6Bを参照して、本 発明の実施例 1および実施例 2をより詳細にそれぞれ説明する。  Next, Embodiments 1 and 2 of the present invention will be described in more detail with reference to FIGS. 5A, 5B, 6A, and 6B, which are partial enlarged schematic cross-sectional views of a portion B in FIG.
[0013] 図 5A、 5Bに示すように、本発明の実施例 1では、透明石英サセプタ部材 511に穴 を掘り込んで凹部 514を設け、この凹部 514内に内部サセプタ 520としての Siプレー ト 530を落とし込み、再度透明石英プレート 512にて封をする構造とした。 Siプレート 530によって、ランプ 500からの放射光が透過するのを防いでいる。透明石英サセプ タ部材 511と透明石英プレート 512との接合部 513は、単にこれらの 2つの部材を組 み合わせた構造とするか、またはこれらの 2つの部材を溶接した構造とする。溶接す る場合は、空気の熱膨張の影響を避けるために内部を真空にすることが好ましい。こ のようにして、サセプタ 217は、透明石英サセプタ部材 511と透明石英プレート 512と 力 なる石英製サセプタ 510の内部に Siプレート 530を設けた構造となっている。な お、透明石英サセプタ部材 511に代えて、不透明石英サセプタ部材を使用してもよく 、透明石英プレート 512に代えて、不透明石英プレートを使用してもよレ、。 Siプレート 530は複数の副 Siプレート 531に分割した分割タイプとして、 Siプレート 530の反りを 抑制し熱ストレスの繰返しによる破損を抑える構造とした。また、副 Siプレート 531の 反りによってランプ 500からの放射光が透過するのを防ぐために、隣接する副 Siプレ ート 531の上端部 532と下端部 533とを重ね合わせる構造としている。さらに、 Siと石 英との間の熱膨張係数の差と Siプレート 530の反りとを考慮して、 Siプレート 530と石 英製サセプタ 510との間に横方向のクリアランス 535と上下方向のクリアランス 536と を設けている。なお、図 5Aはサセプタ 217の製造工程を示す分解図であり、図 5Bは 製造した後のサセプタ 217を示している。 As shown in FIGS. 5A and 5B, in Embodiment 1 of the present invention, a hole is dug in the transparent quartz susceptor member 511 to form a concave portion 514, and a Si plate as an internal susceptor 520 is provided in the concave portion 514. 530 was dropped and sealed again with the transparent quartz plate 512. The Si plate 530 prevents light emitted from the lamp 500 from being transmitted. The joint 513 between the transparent quartz susceptor member 511 and the transparent quartz plate 512 has a structure in which these two members are simply combined or a structure in which these two members are welded. In the case of welding, it is preferable to make the inside vacuum to avoid the influence of thermal expansion of air. In this manner, the susceptor 217 has a structure in which the transparent quartz susceptor member 511, the transparent quartz plate 512, and the quartz susceptor 510, which is a powerful susceptor, are provided with the Si plate 530. Note that an opaque quartz susceptor member may be used instead of the transparent quartz susceptor member 511, and an opaque quartz plate may be used instead of the transparent quartz plate 512. The Si plate 530 is a split type that is divided into a plurality of sub-Si plates 531 and has a structure that suppresses warpage of the Si plate 530 and damage due to repeated thermal stress. Further, in order to prevent the radiation light from the lamp 500 from being transmitted due to the warpage of the sub Si plate 531, the upper end portion 532 and the lower end portion 533 of the adjacent sub Si plate 531 are superposed. Further, taking into account the difference in the coefficient of thermal expansion between Si and Seiyu and the warpage of Si plate 530, a lateral clearance 535 and a vertical clearance between Si plate 530 and Seiyu susceptor 510 are provided. 536 and are provided. FIG. 5A is an exploded view showing a manufacturing process of the susceptor 217, and FIG. 5B shows the susceptor 217 after the manufacturing.
[0014] また、図 6A、 6Bに示すように、本発明の実施例 2では、 Siの代替として石英に金属 Nb (ニオブ)を練り込み溶融して (溶かし合せて混ぜて)製作した Nb石英からなるプ レート 540を光の透過防止材料として使用している。当該材料は石英とほぼ同等の 熱膨張率、耐熱性、熱容量を備えており、熱ストレス/熱膨張係数差による破損はな レ、。し力 金属材が練り込んであるため Nb金属の拡散防止のため石英に埋め込み 溶接し封印している。但し、第 1の実施の形態における Siのように分割はしていない。  Further, as shown in FIGS. 6A and 6B, in Example 2 of the present invention, as an alternative to Si, metal Nb (niobium) was kneaded into quartz and melted (melted and mixed) to produce Nb quartz. Is used as a light transmission preventing material. This material has almost the same coefficient of thermal expansion, heat resistance, and heat capacity as quartz, and is not damaged by thermal stress / coefficient of thermal expansion. Since metal material is kneaded, it is embedded in quartz and sealed by welding to prevent diffusion of Nb metal. However, it is not divided like Si in the first embodiment.
[0015] 本発明の実施例 2では、透明石英サセプタ部材 511に穴を掘り込んで凹部 514を 設け、この凹部 514内に内部サセプタ 520としての Nb石英プレート 540を落とし込み 、再度透明石英プレート 512にて封をする構造とした。透明石英サセプタ部材 511と 透明石英プレート 512との接合部 513は、全周にわたって溶接した構造としている。 溶接する場合には、空気の熱膨張の影響を避けるために内部を真空にすることが好 ましレ、。このようにして、サセプタ 217は、透明石英サセプタ部材 511と透明石英プレ ート 512とからなる石英製サセプタ 510の内部に Nb石英プレート 540を設けた構造と なっている。 Nb石英の場合、 Nb含有量によって反り量が左右され、 Nbが多い程、反 り量が多くなるので、 Nb石英プレート 540と石英製サセプタ 510との間に横方向のク リアランス 535と上下方向のクリアランス 536とを設けてレ、る。なお、図 6Aはサセプタ 217の製造工程を示す分解図であり、図 6Bは製造した後のサセプタ 217を示してい る。 In the second embodiment of the present invention, a hole is dug in the transparent quartz susceptor member 511 to form a concave portion 514, and an Nb quartz plate 540 as an internal susceptor 520 is dropped into the concave portion 514, and the transparent quartz plate 512 And sealed. The joint 513 between the transparent quartz susceptor member 511 and the transparent quartz plate 512 has a structure welded all around. When welding, it is preferable to create a vacuum inside to avoid the effects of thermal expansion of the air. Masire, Thus, the susceptor 217 has a structure in which the Nb quartz plate 540 is provided inside the quartz susceptor 510 including the transparent quartz susceptor member 511 and the transparent quartz plate 512. In the case of Nb quartz, the amount of warpage depends on the Nb content, and the more Nb, the greater the amount of warpage.Therefore, there is a horizontal clearance 535 and a vertical direction between the Nb quartz plate 540 and the quartz susceptor 510. A clearance of 536 is provided. FIG. 6A is an exploded view showing a manufacturing process of the susceptor 217, and FIG. 6B shows the susceptor 217 after the manufacturing.
[0016] 図 5B、図 6Bを参照すれば、本発明の実施例 1、 2では、内部サセプタ 520の内側 端部 537は、ウェハ 200をサセプタ 217の中央部に設けた透明石英板 503上に載置 した場合(図 4参照)に、ウェハ 200の主面に垂直な方向から見て、ウェハ 200のの 外周部分に重なるように、石英製サセプタ 510の内部に設けられている。  Referring to FIGS. 5B and 6B, in the first and second embodiments of the present invention, the inner end 537 of the internal susceptor 520 is configured such that the wafer 200 is placed on a transparent quartz plate 503 provided at the center of the susceptor 217. When mounted (see FIG. 4), it is provided inside the quartz susceptor 510 so as to overlap the outer peripheral portion of the wafer 200 when viewed from a direction perpendicular to the main surface of the wafer 200.
[0017] 次に、図 7を参照して、本発明が適用される基板処理装置の概要を説明する。 Next, an outline of a substrate processing apparatus to which the present invention is applied will be described with reference to FIG.
[0018] なお、本発明が適用される基板処理装置においてはウェハなどの基板を搬送する キヤリャとしては、 FOUP (front opening unified pod。以下、ポッドとレヽう。 )力 S 使用されている。また、以下の説明において、前後左右は図 Aを基準とする。すなわ ち、図 7が示されている紙面に対して、前は紙面の下、後ろは紙面の上、左右は紙面 の左右とする。 In the substrate processing apparatus to which the present invention is applied, a FOUP (front opening unified pod; hereinafter, referred to as a pod) force S is used as a carrier for transporting a substrate such as a wafer. In the following description, FIG. That is, the front is below the paper, the rear is above the paper, and the left and right are the left and right of the paper with respect to the paper shown in FIG.
[0019] 図 7に示されているように、基板処理装置は真空状態などの大気圧未満の圧力(負 圧)に耐えるロードロックチャンバ構造に構成された第 1の搬送室 103を備えており、 第 1の搬送室 103の筐体 101は平面視が六角形で上下両端が閉塞した箱形状に形 成されている。第 1の搬送室 103には負圧下でウェハ 200を移載する第 1のウェハ移 載機 112が設置されている。前記第 1のウェハ移載機 112は、エレベータ 115によつ て、第 1の搬送室 103の気密性を維持しつつ昇降できるように構成されている。  As shown in FIG. 7, the substrate processing apparatus includes a first transfer chamber 103 having a load lock chamber structure that can withstand a pressure (negative pressure) below atmospheric pressure such as a vacuum state. The casing 101 of the first transfer chamber 103 is formed in a box shape having a hexagonal plan view and closed at both upper and lower ends. In the first transfer chamber 103, a first wafer transfer machine 112 for transferring the wafer 200 under negative pressure is installed. The first wafer transfer device 112 is configured to be able to move up and down by the elevator 115 while maintaining the airtightness of the first transfer chamber 103.
[0020] 筐体 101の六枚の側壁のうち前側に位置する 2枚の側壁には、搬入用の予備室 1 22と搬出用の予備室 123とがそれぞれゲートバルブ 244、 127を介して連結されて おり、それぞれ負圧に耐え得るロードロックチャンバ構造に構成されている。さらに、 予備室 122には搬入室用の基板置き台 140が設置され、予備室 123には搬出室用 の基板置き台 141が設置されている。 [0021] 予備室 122および予備室 123の前側には、略大気圧下で用いられる第 2の搬送室 121がゲートバルブ 128、 129を介して連結されている。第 2の搬送室 121にはゥェ ハ 200を移載する第 2のウェハ移載機 124が設置されている。第 2のウェハ移載機 1 24は第 2の搬送室 121に設置されたエレベータ 126によって昇降されるように構成さ れているとともに、リニアァクチユエータ 132によって左右方向に往復移動されるよう に構成されている。 [0020] Of the six side walls of the casing 101, two of the side walls located on the front side are connected with a spare room 122 for carrying in and a spare room 123 for carrying out via gate valves 244 and 127, respectively. The load lock chambers are configured to be able to withstand a negative pressure. Further, a substrate holder 140 for a carry-in room is installed in the spare room 122, and a substrate holder 141 for a carry-out room is installed in the spare room 123. A second transfer chamber 121 used under substantially atmospheric pressure is connected to the front sides of the preliminary chamber 122 and the preliminary chamber 123 via gate valves 128 and 129. In the second transfer chamber 121, a second wafer transfer machine 124 for transferring the wafer 200 is installed. The second wafer transfer machine 124 is configured to be moved up and down by an elevator 126 installed in the second transfer chamber 121, and is reciprocated in the left-right direction by a linear actuator 132. Is configured.
[0022] 図 7に示されているように、第 2の搬送室 121の左側にはオリフラ合わせ装置 106が 設置されている。また、第 2の搬送室 121の上部にはクリーンエアを供給するクリーン ユニット(図示せず)が設置されている。  As shown in FIG. 7, an orientation flat aligning device 106 is provided on the left side of the second transfer chamber 121. A clean unit (not shown) for supplying clean air is installed above the second transfer chamber 121.
[0023] 図 7に示されているように、第 2の搬送室 121の筐体 125には、ウェハ 200を第 2の 搬送室 121に対して搬入搬出するためのウェハ搬入搬出口 134と、前記ウェハ搬入 搬出口を閉塞する蓋 142と、ポッドオーブナ 108がそれぞれ設置されている。ポッド オーブナ 108は、 1〇ステージ 105に載置されたポッド 100のキャップ及びウェハ搬入 搬出口 134を閉塞する蓋 142を開閉するキャップ開閉機構 136とを備えており、 1〇ス テージ 105に載置されたポッド 100のキャップ及びウェハ搬入搬出口 134を閉塞す る蓋 142をキャップ開閉機構 136によって開閉することにより、ポッド 100のウェハ出 し入れを可能にする。また、ポッド 100は図示しない工程内搬送装置 (RGV)によつ て、前記 IOステージ 105に、供給および排出されるようになっている。  As shown in FIG. 7, the housing 125 of the second transfer chamber 121 includes a wafer transfer port 134 for transferring the wafer 200 into and out of the second transfer chamber 121, A lid 142 for closing the wafer loading / unloading port and a pod orbner 108 are provided. The pod orbner 108 includes a cap for the pod 100 placed on the 1〇 stage 105 and a cap opening / closing mechanism 136 for opening and closing a lid 142 for closing the wafer loading / unloading port 134, and is mounted on the 1〇 stage 105. By opening and closing the cap of the pod 100 and the lid 142 that closes the wafer loading / unloading port 134 by the cap opening / closing mechanism 136, the pod 100 can take in / out the wafer. The pod 100 is supplied to and discharged from the IO stage 105 by an in-process transfer device (RGV) (not shown).
[0024] 図 7に示されているように、筐体 101の六枚の側壁のうち背面側に位置する 2枚の 側壁には、ウェハに所望の処理を行う第 1の処理炉 202と、第 2の処理炉 137とがそ れぞれ隣接して連結されている。第 1の処理炉 202および第 2の処理炉 137はいず れもコールドウォール式の処理炉によってそれぞれ構成されている。また、筐体 101 における六枚の側壁のうちの残りの互いに対向する 2枚の側壁には、第 3の処理炉と しての第 1のクーリングユニット 138と、第 4の処理炉としての第 2のクーリングユニット 139とがそれぞれ連結されており、第 1のクーリングユニット 138および第 2のクーリン グユニット 139はレ、ずれも処理済みのウェハ 200を冷却するように構成されてレ、る。  As shown in FIG. 7, of the six side walls of the housing 101, two side walls located on the back side are provided with a first processing furnace 202 for performing desired processing on the wafer, Second processing furnaces 137 are connected adjacent to each other. Each of the first processing furnace 202 and the second processing furnace 137 is configured by a cold wall processing furnace. Further, the remaining two side walls facing each other among the six side walls of the casing 101 are provided with a first cooling unit 138 as a third processing furnace and a second cooling unit 138 as a fourth processing furnace. The first cooling unit 138 and the second cooling unit 139 are configured so as to cool the processed wafer 200 even if the first cooling unit 138 and the second cooling unit 139 are shifted.
[0025] 以下、前記構成をもつ基板処理装置を使用した処理工程を説明する。 Hereinafter, processing steps using the substrate processing apparatus having the above configuration will be described.
[0026] 未処理のウェハ 200は 25枚がポッド 100に収納された状態で、処理工程を実施す る基板処理装置へ工程内搬送装置によって搬送されて来る。図 7に示されているよう に、搬送されて来たポッド 100は 1〇ステージ 105の上に工程内搬送装置から受け渡 されて載置される。ポッド 100のキャップ及びウェハ搬入搬出口 134を開閉する蓋 14 2がキャップ開閉機構 136によって取り外され、ポッド 100のウェハ出し入れ口が開放 される。 [0026] The processing step is performed with 25 unprocessed wafers 200 stored in the pod 100. Transported by the in-process transport device to the substrate processing apparatus. As shown in FIG. 7, the transported pod 100 is delivered from the in-process transport device and placed on the 1 の 上 stage 105. The cap of the pod 100 and the lid 142 for opening and closing the wafer loading / unloading port 134 are removed by the cap opening / closing mechanism 136, and the wafer loading / unloading port of the pod 100 is opened.
[0027] ポッド 100がポッドオーブナ 108により開放されると、第 2の搬送室 121に設置され た第 2のウェハ移載機 124はポッド 100力もウェハ 200をピックアップし、予備室 122 に搬入し、ウェハ 200を基板置き台 140に移載する。この移載作業中には、第 1の搬 送室 103側のゲートバルブ 244は閉じられており、第 1の搬送室 103の負圧は維持さ れている。ウェハ 200の基板置き台 140への移載が完了すると、ゲートバルブ 128が 閉じられ、予備室 122が排気装置(図示せず)によって負圧に排気される。  When the pod 100 is opened by the pod opener 108, the second wafer transfer device 124 installed in the second transfer chamber 121 picks up the wafer 200 with the pod 100 force, and carries the wafer 200 into the spare chamber 122. 200 is transferred to the substrate holder 140. During this transfer operation, the gate valve 244 on the first transfer chamber 103 side is closed, and the negative pressure in the first transfer chamber 103 is maintained. When the transfer of the wafer 200 to the substrate holder 140 is completed, the gate valve 128 is closed, and the preliminary chamber 122 is evacuated to a negative pressure by an exhaust device (not shown).
[0028] 予備室 122が予め設定された圧力値に減圧されると、ゲートバルブ 244、 130が開 かれ、予備室 122、第 1の搬送室 103、第 1の処理炉 202が連通される。続いて、第 1 の搬送室 103の第 1のウェハ移載機 112は基板置き台 140からウェハ 200をピックァ ップして第 1の処理炉 202に搬入する。そして、第 1の処理炉 202内に処理ガスが供 給され、所望の処理がウェハ 200に行われる。  [0028] When the pressure in the preliminary chamber 122 is reduced to a preset pressure value, the gate valves 244 and 130 are opened, and the preliminary chamber 122, the first transfer chamber 103, and the first processing furnace 202 are communicated. Subsequently, the first wafer transfer device 112 in the first transfer chamber 103 picks up the wafer 200 from the substrate holder 140 and carries it into the first processing furnace 202. Then, a processing gas is supplied into the first processing furnace 202, and desired processing is performed on the wafer 200.
[0029] 第 1の処理炉 202で前記処理が完了すると、処理済みの 1枚のウェハ 200は第 1の 搬送室 103の第 1のウェハ移載機 112によって第 1の搬送室 103に搬出される。  When the above-described processing is completed in the first processing furnace 202, one processed wafer 200 is unloaded to the first transfer chamber 103 by the first wafer transfer device 112 in the first transfer chamber 103. You.
[0030] そして、第 1のウェハ移載機 112は第 1の処理炉 202から搬出したウェハ 200を第 1 のクーリングユニット 138へ搬入し、処理済みのウェハを冷却する。  [0030] Then, first wafer transfer device 112 carries wafer 200 carried out of first processing furnace 202 into first cooling unit 138, and cools the processed wafer.
[0031] 第 1のクーリングユニット 138に 2枚のウェハ 200を移載すると、第 1のウェハ移載機 112は予備室 122の基板置き台 140に予め準備されたウェハ 200を第 1の処理炉 2 02に前述した作動によって移載し、第 1の処理炉 202内に処理ガスが供給され、所 望の処理がウェハ 200に行われる。  When the two wafers 200 are transferred to the first cooling unit 138, the first wafer transfer device 112 transfers the wafer 200 prepared in advance to the substrate holder 140 in the preliminary chamber 122 to the first processing furnace. The wafer 200 is transferred by the operation described above in FIG. 202, a processing gas is supplied into the first processing furnace 202, and a desired processing is performed on the wafer 200.
[0032] 第 1のクーリングユニット 138において予め設定された冷却時間が経過すると、冷却 済みのウェハ 200は第 1のウェハ移載機 112によって第 1のクーリングユニット 138か ら第 1の搬送室 103に搬出される。  After a predetermined cooling time in the first cooling unit 138 elapses, the cooled wafer 200 is transferred from the first cooling unit 138 to the first transfer chamber 103 by the first wafer transfer device 112. It is carried out.
[0033] 冷却済みのウェハ 200が第 1のクーリングユニット 138から第 1の搬送室 103に搬出 されたのち、ゲートバルブ 127が開かれる。そして、第 1のウェハ移載機 112は第 1の クーリングユニット 138から搬出したウェハ 200を予備室 123へ搬送し、基板置き台 1 41に移載した後、予備室 123はゲートバノレブ 127によって閉じられる。 [0033] The cooled wafer 200 is unloaded from the first cooling unit 138 to the first transfer chamber 103. After that, the gate valve 127 is opened. Then, the first wafer transfer device 112 transports the wafer 200 unloaded from the first cooling unit 138 to the preliminary chamber 123, and after transferring the wafer 200 to the substrate mounting table 141, the preliminary chamber 123 is closed by the gate vane rev 127. .
[0034] 予備室 123がゲートバルブ 127によって閉じられると、前記排出用予備室 123内が 不活性ガスにより略大気圧に戻される。前記予備室 123内が略大気圧に戻されると、 ゲートバルブ 129が開かれ、第 2の搬送室 121の予備室 123に対応したウェハ搬入 搬出口 134を閉塞する蓋 142と、 IOステージ 105に載置された空のポッド 100のキヤ ップがポッドオーブナ 108によって開かれる。続いて、第 2の搬送室 121の第 2のゥェ ハ移載機 124は基板置き台 141からウェハ 200をピックアップして第 2の搬送室 121 に搬出し、第 2の搬送室 121のウェハ搬入搬出口 134を通じてポッド 100に収納して 行く。処理済みの 25枚のウェハ 200のポッド 100への収納が完了すると、ポッド 100 のキャップとウェハ搬入搬出口 134を閉塞する蓋 142がポッドオーブナ 108によって 閉じられる。閉じられたポッド 100は IOステージ 105の上から次の工程へ工程内搬送 装置によって搬送されて行く。  When the preliminary chamber 123 is closed by the gate valve 127, the inside of the preliminary exhaust chamber 123 is returned to substantially the atmospheric pressure by the inert gas. When the pressure in the preliminary chamber 123 is returned to substantially the atmospheric pressure, the gate valve 129 is opened, and the lid 142 closing the wafer loading / unloading port 134 corresponding to the preliminary chamber 123 of the second transfer chamber 121 and the IO stage 105 The cap of the empty pod 100 on which it is placed is opened by the pod opener 108. Subsequently, the second wafer transfer device 124 in the second transfer chamber 121 picks up the wafer 200 from the substrate table 141 and unloads the wafer 200 to the second transfer chamber 121, and transfers the wafer 200 to the second transfer chamber 121. It is stored in the pod 100 through the loading / unloading port 134. When the storage of the 25 processed wafers 200 in the pod 100 is completed, the cap of the pod 100 and the lid 142 for closing the wafer loading / unloading port 134 are closed by the pod opener 108. The closed pod 100 is transported from above the IO stage 105 to the next process by the in-process transport device.
[0035] 以上の作動が繰り返されることにより、ウェハが、順次、処理されて行く。以上の作 動は第 1の処理炉 202および第 1のクーリングユニット 138が使用される場合を例にし て説明したが、第 2の処理炉 137および第 2のクーリングユニット 139が使用される場 合についても同様の作動が実施される。  By repeating the above operation, the wafers are sequentially processed. The above operation has been described by taking as an example the case where the first processing furnace 202 and the first cooling unit 138 are used.However, the case where the second processing furnace 137 and the second cooling unit 139 are used is described. The same operation is also performed for.
[0036] なお、上述の基板処理装置では、予備室 122を搬入用、予備室 123を搬出用とし たが、予備室 123を搬入用、予備室 122を搬出用としてもよい。また、第 1の処理炉 2 02と第 2の処理炉 137は、それぞれ同じ処理を行ってもよいし、別の処理を行っても よレ、。第 1の処理炉 202と第 2の処理炉 137で別の処理を行う場合、例えば第 1の処 理炉 202でウェハ 200にある処理を行った後、続けて第 2の処理炉 137で別の処理 を行わせてもよレ、。また、第 1の処理炉 202でウェハ 200にある処理を行った後、第 2 の処理炉 137で別の処理を行わせる場合、第 1のクーリングユニット 138 (又は第 2の クーリングユニット 139)を経由するようにしてもよい。  In the above-described substrate processing apparatus, the spare room 122 is used for carrying in and the spare room 123 is used for carrying out. However, the spare room 123 may be used for carrying in and the spare room 122 may be used for carrying out. Further, the first processing furnace 202 and the second processing furnace 137 may perform the same processing, or may perform different processing. When different processing is performed in the first processing furnace 202 and the second processing furnace 137, for example, after performing the processing on the wafer 200 in the first processing furnace 202, the processing is separately performed in the second processing furnace 137. May be performed. In addition, if the first processing furnace 202 performs the processing on the wafer 200 and then performs another processing in the second processing furnace 137, the first cooling unit 138 (or the second cooling unit 139) is used. You may make it go through.
[0037] 次に、図 8を参照し、本発明が適用される基板処理装置で好適に用いられる処理 炉を詳細に説明する。 [0038] 処理炉はその全体が符号 202で示される。例示の様態においては、処理炉 202は 、半導体ウェハ等の基板 200 (以下、ウェハという。)の様々な処理工程を実行するの に適した枚葉式の処理炉である。また処理炉 202は、特に半導体ウェハの熱処理に 適している。こうした熱処理の例としては、半導体デバイスの処理における、半導体ゥ ェハの熱ァニール、ホウ素—リンから成るガラスの熱リフロー、高温酸化膜、低温酸化 膜、高温窒化膜、ドープポリシリコン、未ドープポリシリコン、シリコンェピタキシャル、 タングステン金属、又はケィ化タングステン力 成る薄膜を形成するための化学蒸着 が挙げられる。 Next, a processing furnace suitably used in the substrate processing apparatus to which the present invention is applied will be described in detail with reference to FIG. [0038] The processing furnace is indicated generally by reference numeral 202. In the illustrated embodiment, the processing furnace 202 is a single-wafer processing furnace suitable for performing various processing steps on a substrate 200 (hereinafter, referred to as a wafer) such as a semiconductor wafer. The processing furnace 202 is particularly suitable for heat treatment of a semiconductor wafer. Examples of such heat treatment include the thermal annealing of semiconductor wafers, the thermal reflow of glass made of boron-phosphorus, the high-temperature oxide film, the low-temperature oxide film, the high-temperature nitride film, doped polysilicon, and undoped polysilicon in the processing of semiconductor devices. Chemical vapor deposition to form thin films of silicon, silicon epitaxial, tungsten metal, or tungsten silicide.
[0039] 処理炉 202は、回転筒 279に囲まれた上側ランプ 207および下側ランプ 223から 成るヒータアッセンブリ 500を含む。このヒータアッセンブリ 500は、基板温度がほぼ 均一になるように放射熱をウェハ 200に供給する。好ましい形態においては、ヒータ アッセンブリ 500は、放射ピーク 0. 95ミクロンで照射し、複数の加熱ゾーンを形成し、 ウェハ中心部より多くの熱を基板周辺部に加える集中的加熱プロファイルを提供する 一連のタングステン一ハロゲン直線ランプ 207、 223等の加熱要素を、含む。  The processing furnace 202 includes a heater assembly 500 composed of an upper lamp 207 and a lower lamp 223 surrounded by a rotating cylinder 279. The heater assembly 500 supplies radiant heat to the wafer 200 so that the substrate temperature becomes substantially uniform. In a preferred form, the heater assembly 500 illuminates at an emission peak of 0.95 microns, forms multiple heating zones, and provides a focused heating profile that applies more heat to the substrate periphery than the center of the wafer. Includes a heating element, such as a tungsten-halogen linear lamp 207, 223.
[0040] 上側ランプ 207および下側ランプ 223にはそれぞれ電極 224が接続され、各ランプ に電力を供給するとともに、各ランプの加熱具合は主制御部 300に支配される加熱 制御部 301にて制御されてレ、る。  An electrode 224 is connected to each of the upper lamp 207 and the lower lamp 223 to supply electric power to each lamp, and the degree of heating of each lamp is controlled by a heating controller 301 controlled by a main controller 300. Being done.
[0041] ヒータアッセンプリ 500は、平ギア 277に機械的に接続された回転筒 279内に収容 されている。この回転筒 279は、セラミック、グラフアイト、より好ましくはシリコングラフ アイトで被覆したグラフアイト等から成る。ヒータアッセンプリ、回転筒 279は、チャンバ 本体 227内に収容されて真空密封され、更にチャンバ本体 227のチャンバ底 228の 上に保持される。チャンバ本体 227は様々な金属材料から形成することができる。例 えば、幾つかのアプリケーションではアルミニウムが適しており、他のアプリケーション ではステンレス鋼が適している。材料の選択は、当業者であれば分かるように、蒸着 処理に用いられる化学物質の種類、及び選択された金属に対するこれら化学物質の 反応性に左右される。通常前記チャンバ壁は、本技術分野では周知であるように、周 知の循環式冷水フローシステムにより華氏約 45— 47度まで水冷される。  The heater assembly 500 is housed in a rotating cylinder 279 mechanically connected to a spur gear 277. The rotary cylinder 279 is made of ceramic, graphite, more preferably graphite coated with silicon graphite. The heater assembly and the rotary cylinder 279 are housed in the chamber main body 227, are vacuum-sealed, and are held on the chamber bottom 228 of the chamber main body 227. The chamber body 227 can be formed from various metal materials. For example, aluminum is suitable for some applications and stainless steel for other applications. The choice of materials will depend on the type of chemical used in the deposition process and the reactivity of these chemicals with the selected metal, as will be appreciated by those skilled in the art. Typically, the chamber walls are water cooled to about 45-47 degrees Fahrenheit by a well-known circulating chilled water flow system, as is well known in the art.
[0042] 回転筒 279は、チャンバ底 228の上に回転自在に保持される。具体的には、平ギ ァ 276、 277と力 Sボーノレべアリング 278によりチャンノく底 228に回転自在に保持され 、平ギア 276と平ギア 277とは嚙み合うように配置されている。更に、平ギア 276は主 制御部 300にて支配される駆動制御部 304にて制御されるサセプタ駆動機構 267に て回転せしめられ、平ギア 276、平ギア 277を介して回転筒 279を回転させている。 回転ベース 18の回転速度は、当業者であれば分かるように、個々の処理に応じて 5 一 60rpmであることが好ましい。 [0042] The rotary cylinder 279 is rotatably held on the chamber bottom 228. Specifically, The gears 276, 277 and the power S Bouno bearing 278 are rotatably held on the channel base 228, and the spur gear 276 and the spur gear 277 are arranged so as to mesh with each other. Further, the spur gear 276 is rotated by a susceptor drive mechanism 267 controlled by a drive control unit 304 controlled by the main control unit 300, and rotates the rotary cylinder 279 via the spur gear 276 and the spur gear 277. ing. The rotational speed of the rotary base 18 is preferably between 5 and 60 rpm depending on the particular process, as will be appreciated by those skilled in the art.
[0043] 処理炉 202は、チャンバ本体 227、チャンバ蓋 226およびチャンバ底 228から成る チャンバ 225を有し、チャンバ 225にて囲われた空間にて処理室 201を形成している  The processing furnace 202 has a chamber 225 composed of a chamber main body 227, a chamber lid 226, and a chamber bottom 228, and forms a processing chamber 201 in a space surrounded by the chamber 225.
[0044] ウェハ 200は、基板保持手段であるサセプタ 217の上に保持される。なお、サセプ タ 217はドーナッツ形の平板形状であって、回転筒 279にて支持されている。 [0044] Wafer 200 is held on susceptor 217, which is a substrate holding means. The susceptor 217 has a donut shape and is supported by a rotating cylinder 279.
[0045] チャンバ蓋 226にはガス供給管 232が貫通して設けられ、処理室 201に処理ガス 2 30を供給し得るようになつている。ガス供給管 232は、開閉バルブ 243、流量制御手 段であるマスフローコントローラ(以下、 MFCという。)241を介し、ガス A、ガス Bのガ ス源に接続されている。ここで使用されるガスは、窒素等の不活性ガスや水素、アル ゴン、六フッ化タングステン等の所望のガスが用いられ、ウェハ 200上に所望の膜を 形成させて半導体装置を形成するものである。  A gas supply pipe 232 is provided through the chamber lid 226 so that a processing gas 230 can be supplied to the processing chamber 201. The gas supply pipe 232 is connected to gas sources of gas A and gas B via an on-off valve 243 and a mass flow controller (hereinafter, referred to as MFC) 241 as a flow control means. The gas used here is an inert gas such as nitrogen, or a desired gas such as hydrogen, argon, or tungsten hexafluoride, and is used to form a desired film on the wafer 200 to form a semiconductor device. It is.
[0046] また、開閉バルブ 243および MFC241は、主制御部 300にて支配されるガス制御 部 302にて制御され、ガスの供給、停止およびガスの流量が制御される。  The open / close valve 243 and the MFC 241 are controlled by the gas control unit 302 controlled by the main control unit 300, and supply and stop of the gas and the flow rate of the gas are controlled.
[0047] なお、ガス供給管 232から供給された処理ガス 230は処理室 201内にてウェハ 20 0と反応し、残余ガスはチャンバ本体 227に設けられた排気口であるガス排気口 235 から図示しなレ、真空ポンプ等からなる排気装置を介し、処理室外へ排出される。  [0047] The processing gas 230 supplied from the gas supply pipe 232 reacts with the wafer 200 in the processing chamber 201, and the remaining gas flows from the gas exhaust port 235 which is an exhaust port provided in the chamber main body 227. It is discharged out of the processing chamber via an exhaust device including a vacuum pump and the like as shown.
[0048] 処理炉 202は、様々な製造工程においてウェハ 200の放射率(エミシビティ)を測 定し、その温度を計算するための非接触式の放射率測定手段をも含む。この放射率 測定手段は、主として放射率測定用プローブ 260、放射率測定用リファレンスランプ (参照光) 265、温度検出部およびプローブ 260と温度検出部とを結ぶ光ファイバ一 通信ケーブルを含む。このケーブルはサファイア製の光ファイバ一通信ケーブルから 成ることが好ましい。 [0049] プローブ 260はプローブ回転機構 274により回転自在に設けられ、プローブ 260の 一端をウェハ 200または参照光であるリファレンスランプ 265の方向に方向付けられ る。また、プローブ 260は光ファイバ一通信ケーブルとスリップ結合にて結合されてい るので、前述したようにプローブ 260が回転しても接続状態は維持される。 [0048] The processing furnace 202 also includes non-contact emissivity measurement means for measuring the emissivity (emissivity) of the wafer 200 in various manufacturing processes and calculating the temperature. The emissivity measuring means mainly includes an emissivity measuring probe 260, an emissivity measuring reference lamp (reference light) 265, a temperature detecting section, and an optical fiber-to-communication cable connecting the probe 260 and the temperature detecting section. The cable preferably comprises a sapphire optical fiber-to-communication cable. [0049] The probe 260 is rotatably provided by a probe rotation mechanism 274, and one end of the probe 260 is directed toward the wafer 200 or the reference lamp 265 serving as reference light. Further, since the probe 260 is connected to the optical fiber-to-communication cable by slip connection, the connection state is maintained even if the probe 260 rotates as described above.
[0050] 即ち、プローブ回転機構 274は放射率測定用プローブ 260を回転させ、これにより プローブ 260の先端が放射率測定用リファレンスランプ 265に向けてほぼ上側に向 けられる第 1ポジションと、プローブ 260がウェハ 200に向けてほぼ下側に向けられる 第 2ポジションとのプローブ 260の向きが変えられる。従って、プローブ 260の先端は 、プローブ 260の回転軸に対し直角方向に向けられていることが好ましレ、。このように して、プローブ 260はリファレンスランプ 265から放射された光子の密度とウェハ 200 力 反射された光子の密度を検知することができる。リファレンスランプ 265は、ゥェ ハ 200における光の透過率が最小となる波長、好ましくは 0. 95ミクロンの波長の光を 放射する白色光源から成ることが好ましい。上述の放射率測定手段は、リファレンス ランプ 265からの放射とウェハ 200力 の放射を比較することにより、ウェハ 200の放 射率を測定する。  That is, the probe rotation mechanism 274 rotates the emissivity measurement probe 260, whereby the tip of the probe 260 is directed substantially upward to the emissivity measurement reference lamp 265, and the probe 260 The probe 260 is turned around with respect to the second position, which is directed substantially downward toward the wafer 200. Therefore, it is preferable that the tip of the probe 260 is oriented in a direction perpendicular to the rotation axis of the probe 260. In this way, the probe 260 can detect the density of photons emitted from the reference lamp 265 and the density of photons reflected from the wafer 200. The reference lamp 265 preferably comprises a white light source that emits light having a wavelength at which light transmittance in the wafer 200 is minimized, preferably a wavelength of 0.95 microns. The emissivity measuring means described above measures the emissivity of the wafer 200 by comparing the radiation from the reference lamp 265 with the radiation of the wafer 200 power.
[0051] ヒータアッセンブリ 500は回転筒 279、サセプタ 217およびウェハ 200に完全に包 囲されているので、放射率測定用プローブ 260による読み取りに影響を与え得るヒー タアッセンブリ 500力ら処理室 201への光の漏れはない。  [0051] Since the heater assembly 500 is completely surrounded by the rotating cylinder 279, the susceptor 217, and the wafer 200, the heater assembly 500 which can affect reading by the emissivity measurement probe 260 is supplied to the processing chamber 201. There is no light leakage.
[0052] 仕切弁であるゲートバルブ 244を開放し、チャンバ本体 227に設けられたウェハ搬 入搬出口 247を通ってウェハ(基板) 200を処理室 201内に搬入し、ウェハ 200をサ セプタ 217上に配置後、サセプタ回転機構(回転手段) 267は処理中に回転筒 279 とサセプタ 217を回転させる。ウェハ 200の放射率の測定時には、プローブ 260はゥ ェハ 200の真上のリファレンスランプ 265に向くように回転し、リファレンスランプ 265 が点灯する。そして、プローブ 260はリファレンスランプ 265からの入射光子密度を測 定する。リファレンスランプ 265が点灯している間、プローブ 260は第 1ポジションから 第 2ポジションへと回転し、回転している間にリファレンスランプ 265真下のウェハ 20 0に向く。このポジションにおいて、プローブ 260はウェハ 200のデバイス面(ウェハ 2 00の表面)の反射光子密度を測定する。続いてリファレンスランプ 265が消灯される 。ウェハ 200に直接向いている間、プローブ 260は、加熱されたウェハ 200からの放 射光子を測定する。プランクの法則によれば、特定の表面に放出されたエネルギー は表面温度の四乗に関係する。その比例定数はシュテフアン'ボルツマン定数と表面 放射率との積力も成る。従って、非接触法における表面温度の決定時には、表面放 射率を使用するのが好ましい。以下の式を用いてウェハ 200のデバイス面の全半球 反射率を計算し、引き続きキルヒホッフの法則により放射率が得られる。 [0052] The gate valve 244, which is a gate valve, is opened, the wafer (substrate) 200 is loaded into the processing chamber 201 through the wafer loading / unloading port 247 provided in the chamber main body 227, and the wafer 200 is loaded into the susceptor 217. After being disposed above, the susceptor rotating mechanism (rotating means) 267 rotates the rotating cylinder 279 and the susceptor 217 during processing. When measuring the emissivity of the wafer 200, the probe 260 rotates so as to face the reference lamp 265 directly above the wafer 200, and the reference lamp 265 is turned on. Then, the probe 260 measures the incident photon density from the reference lamp 265. While the reference lamp 265 is on, the probe 260 rotates from the first position to the second position, and while rotating, faces the wafer 200 directly below the reference lamp 265. In this position, probe 260 measures the reflected photon density on the device side of wafer 200 (the surface of wafer 200). Subsequently, the reference lamp 265 is turned off. . While directly facing the wafer 200, the probe 260 measures the emitted photons from the heated wafer 200. According to Planck's law, the energy released to a particular surface is related to the fourth power of the surface temperature. The proportionality constant is also the product of the Stefan's Boltzmann constant and the surface emissivity. Therefore, when determining the surface temperature in the non-contact method, it is preferable to use the surface emissivity. The total hemispherical reflectivity of the device surface of the wafer 200 is calculated using the following equation, and subsequently the emissivity is obtained according to Kirchhoff's law.
(1)ウェハ反射率 =反射光強度/入射光強度  (1) Wafer reflectance = reflected light intensity / incident light intensity
(2)放射率 = (1一ウェハ反射率)  (2) Emissivity = (1 wafer reflectivity)
[0053] 一旦ウェハの放射率が得られると、プランクの式からウェハ温度が得られる。この技 法は、ウェハが高温で、且つこのような適用において上記計算の実行前に基本熱放 射が減算される場合にも用いられる。プローブ 260は、第 2ポジション即ちウェハに向 けられるポジションに留まって、リファレンスランプ 265の点灯時には常に放射率デー タを提供し続けることが好ましレ、。  [0053] Once the emissivity of the wafer is obtained, the wafer temperature is obtained from Planck's equation. This technique is also used when the wafers are hot and in such applications the base heat radiation is subtracted before performing the above calculations. Preferably, the probe 260 remains in the second position, ie, the position facing the wafer, and always provides emissivity data when the reference lamp 265 is turned on.
[0054] ウェハ 200は回転しているので、プローブ 260は、その回転中にウェハ 200のデバ イス面から反射される光子密度を測定し、基板にリトグラフされるであろう変化するデ バイス構造の平均表面トポロジーからの反射を測定する。また放射率測定は薄膜蒸 着過程を含む処理サイクルにわたって行われるので、放射率の瞬時の変化がモニタ 一され、温度補正が動的且つ連続的に行われる。  [0054] As the wafer 200 is rotating, the probe 260 measures the density of photons reflected from the device surface of the wafer 200 during its rotation, providing a variable device structure that will be lithographically printed on the substrate. Measure the reflection from the average surface topology. In addition, since emissivity measurement is performed over a processing cycle including a thin film deposition process, instantaneous changes in emissivity are monitored and temperature correction is performed dynamically and continuously.
[0055] 処理炉 202は更に温度検出手段である複数の温度測定用プローブ 261を含む。こ れらのプローブ 261はチャンバ蓋 226に固定され、すべての処理条件においてゥェ ハ 200びデバイス面から放射される光子密度を常に測定する。プローブ 261によって 測定された光子密度に基づき温度検出部 303にてウェハ温度に算出され、主制御 部 300にて設定温度と比較される。主制御部 300は比較の結果、あらゆる偏差を計 算し、加熱制御部 301を介してヒータアッセンブリ内の加熱手段である上側ランプ 20 7、下側ランプ 223の複数のゾーンへの電力供給量を制御する。好ましくは、ウェハ 2 00の異なる部分の温度を測定するために位置決めされた 3個のプローブ 261を含む 。これによつて処理サイクル中の温度の均一性が確保される。  [0055] The processing furnace 202 further includes a plurality of temperature measuring probes 261 as temperature detecting means. These probes 261 are fixed to the chamber lid 226 and constantly measure the photon density emitted from the wafer 200 and the device surface under all processing conditions. Based on the photon density measured by the probe 261, the wafer temperature is calculated by the temperature detection unit 303 and compared with the set temperature by the main control unit 300. As a result of the comparison, the main control unit 300 calculates all deviations, and via the heating control unit 301, determines the amount of power supply to the plurality of zones of the upper lamp 207 and the lower lamp 223, which are heating means in the heater assembly. Control. Preferably, it includes three probes 261 positioned to measure the temperature of different portions of the wafer 200. This ensures temperature uniformity during the processing cycle.
[0056] なお、温度測定用プローブ 261にて算出されたウェハ温度は、放射率測定用プロ ーブ 260にて算出されたウェハ放射率により、補正されることでより正確なウェハ温 度の検出を可能としている。 Note that the wafer temperature calculated by the temperature measurement probe 261 is By correcting the wafer emissivity calculated by the probe 260, it is possible to detect the wafer temperature more accurately.
[0057] ウェハ 200の処理後、ウェハ 200は、複数の突上げピン 266によりサセプタ 217の 真中にあるサセプタとともに真中以外のサセプタから持ち上げられ、処理炉 202内で ウェハ 200を自動的にローデイング及びアンローデイングできるようにするために、ゥ ェハ 200の下に空間を形成する。突上げピン 266は駆動制御部の制御のもと、昇降 機構 275によって上下する。 After the processing of the wafer 200, the wafer 200 is lifted from the susceptor other than the center together with the susceptor in the center of the susceptor 217 by a plurality of push-up pins 266, and the wafer 200 is automatically loaded and unloaded in the processing furnace 202. A space is formed below the wafer 200 so that it can be dated. The push-up pin 266 is moved up and down by an elevating mechanism 275 under the control of the drive control unit.
[0058] なお、一例まで、本実施の形態の処理炉 202にて処理される処理条件は、酸化シリ コン膜の成膜において、ウェハ温度 1000°C、〇ガスの供給量 5SLM、処理圧力は Note that, to one example, the processing conditions in the processing furnace 202 of the present embodiment are as follows: in forming a silicon oxide film, the wafer temperature is 1000 ° C., the gas supply amount is 5 SLM, and the processing pressure is
2  2
lOOOPaである。  lOOOPa.
[0059] 明細書、特許請求の範囲、図面および要約書を含む 2003年 8月 15日提出の日本 国特許出願 2003—293905号の開示内容全体は、そのまま引用してここに組み込ま れる。  [0059] The entire disclosure content of Japanese Patent Application No. 2003-293905 filed on August 15, 2003, including the specification, claims, drawings and abstract, is incorporated herein by reference in its entirety.
[0060] 種々の典型的な実施の形態を示しかつ説明してきた力 本発明はそれらの実施の 形態に限定されない。従って、本発明の範囲は、次の請求の範囲によってのみ限定 されるものである。  [0060] Forces Shown and Described in Various Typical Embodiments The present invention is not limited to those embodiments. Therefore, the scope of the present invention is limited only by the following claims.
産業上の利用可能性  Industrial applicability
[0061] 以上説明したように、本発明の好ましい形態によれば、熱ストレス対する強度不足 による破損と熱容量の増大による温度制御悪化とランプ光の透過による温度誤検知 を抑制し量産に耐えうるサセプタが提供され、その結果、本発明は、このサセプタを 備えた基板処理装置であって半導体ウェハを処理する基板処理装置およびそれを 使用するデバイスの製造方法に特に好適に利用できる。 As described above, according to the preferred embodiment of the present invention, a susceptor capable of withstanding mass production by suppressing damage due to insufficient strength against thermal stress, deterioration of temperature control due to an increase in heat capacity, and erroneous temperature detection due to transmission of lamp light. As a result, the present invention can be particularly suitably applied to a substrate processing apparatus provided with the susceptor, which processes a semiconductor wafer, and a method of manufacturing a device using the same.

Claims

請求の範囲 The scope of the claims
[1] 基板を処理する空間を形成する処理チャンバと、  [1] a processing chamber for forming a space for processing a substrate,
前記基板を載置する基板載置部材と、  A substrate mounting member for mounting the substrate,
前記基板を加熱する加熱部材とを有し、  Having a heating member for heating the substrate,
前記基板載置部材の少なくとも一部の内部に、前記加熱部材からの放射光を透過 させなレ、部材を設けたことを特徴とする基板処理装置。  A substrate processing apparatus, wherein a member is provided inside at least a part of the substrate mounting member so as not to transmit light emitted from the heating member.
[2] 前記放射光を透過させなレ、部材が、前記基板の外側部分に対応する部分に設けら れていることを特徴とする請求項 1記載の基板処理装置。  2. The substrate processing apparatus according to claim 1, wherein a member that does not transmit the radiation light is provided at a portion corresponding to an outer portion of the substrate.
[3] 前記基板載置部材は、石英製サセプタとその内部に設けられる内部サセプタとを備 え、該内部サセプタが、前記加熱部材からの放射光を透過させない部材であって、 前記基板の外側部分に対応する部分に設けられていることを特徴とする請求項 1記 載の基板処理装置。  [3] The substrate mounting member includes a quartz susceptor and an internal susceptor provided inside the quartz susceptor, wherein the internal susceptor is a member that does not transmit radiation emitted from the heating member, 2. The substrate processing apparatus according to claim 1, wherein the substrate processing apparatus is provided in a portion corresponding to the portion.
[4] 前記石英製サセプタが凹部を有する石英部材と石英プレートとを備え、該凹部内に 前記内部サセプタを挿入した状態で該凹部を該石英プレートにて封止し、該凹部内 が真空状態とされていることを特徴とする請求項 3記載の基板処理装置。  [4] The quartz susceptor includes a quartz member having a recess and a quartz plate, and the recess is sealed with the quartz plate in a state where the internal susceptor is inserted into the recess, and the inside of the recess is in a vacuum state. 4. The substrate processing apparatus according to claim 3, wherein:
[5] 前記内部サセプタが、前記石英製サセプタとの間で所定のクリアランスをもって前記 石英製サセプタの内部に設けられていることを特徴とする請求項 3記載の基板処理  5. The substrate processing method according to claim 3, wherein the internal susceptor is provided inside the quartz susceptor with a predetermined clearance between the internal susceptor and the quartz susceptor.
[6] 前記内部サセプタが、 Siから成るプレートであることを特徴とする請求項 3記載の基 板処理装置。 6. The substrate processing apparatus according to claim 3, wherein the internal susceptor is a plate made of Si.
[7] 前記 Siプレートが、複数の副プレートから構成されていることを特徴とする請求項 6記  7. The method according to claim 6, wherein the Si plate includes a plurality of sub-plates.
[8] 前記複数の副プレートのうちの一つの副プレートの一部分が、前記複数の副プレート のうちの少なくとも他の一つの副プレートの一部分と重ね合った状態で前記石英製 サセプタの内部に設けられていることを特徴とする請求項 7記載の基板処理装置。 [8] A part of one sub-plate of the plurality of sub-plates is provided inside the quartz susceptor in a state of being overlapped with a part of at least another sub-plate of the plurality of sub-plates. 8. The substrate processing apparatus according to claim 7, wherein the substrate is processed.
[9] 前記内部サセプタカ 石英に Nbが溶融された Nb石英から成るプレートであることを 特徴とする請求項 3記載の基板処理装置。  9. The substrate processing apparatus according to claim 3, wherein the inner susceptor is a plate made of Nb quartz in which Nb is fused to quartz.
[10] 前記石英製サセプタが、不透明石英から成ることを特徴とする請求項 3記載の基板 10. The substrate according to claim 3, wherein the quartz susceptor is made of opaque quartz.
[11] 前記内部サセプタの一部が、前記基板の主面に垂直な方向から見て、前記基板の 外周部分に重なるように、前記石英製サセプタの内部に設けられていることを特徴と する請求項 3記載の基板処理装置。 [11] A feature is that a part of the internal susceptor is provided inside the quartz susceptor so as to overlap with an outer peripheral portion of the substrate when viewed from a direction perpendicular to a main surface of the substrate. The substrate processing apparatus according to claim 3.
[12] 基板のデバイス面の温度を測定する少なくとも 1つの放射温度計を更に備え、  [12] further comprising at least one radiation thermometer for measuring the temperature of the device side of the substrate,
前記少なくとも 1つの放射温度計は、前記基板載置部材に前記基板を載置した際 に、前記基板のデバイス面と面するように設けられ、前記加熱部材は、前記基板載置 部材に前記基板を載置した際の前記基板に対して前記少なくとも 1つの放射温度計 と反対側に設けられていることを特徴とする請求項 1記載の基板処理装置。  The at least one radiation thermometer is provided so as to face a device surface of the substrate when the substrate is mounted on the substrate mounting member, and the heating member is provided on the substrate mounting member. 2. The substrate processing apparatus according to claim 1, wherein the substrate processing apparatus is provided on a side opposite to the at least one radiation thermometer with respect to the substrate when the substrate is mounted.
[13] 請求項 1記載の基板処理装置を使用して基板を処理する工程を備える半導体デバ イスの製造方法であって、  [13] A method for manufacturing a semiconductor device comprising a step of processing a substrate using the substrate processing apparatus according to claim 1,
前記基板を前記加熱部材により加熱する工程と、  Heating the substrate by the heating member,
所望のガスを前記処理チャンバに供給する工程と、  Supplying a desired gas to the processing chamber;
前記基板のデバイス面の温度を測定する工程と、  Measuring the temperature of the device surface of the substrate,
前記基板の温度測定結果に基づき、前記加熱部材を制御する工程と、を備えるこ とを特徴とする半導体デバイスの製造方法。  Controlling the heating member based on a result of the temperature measurement of the substrate.
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JP4710255B2 (en) * 2004-03-26 2011-06-29 ウシオ電機株式会社 Heating stage
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JP2015502055A (en) * 2011-12-15 2015-01-19 ソイテック Deposition system having reaction chamber configured for in-situ metrology and related method
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JP2018032758A (en) * 2016-08-25 2018-03-01 株式会社Screenホールディングス Thermal treatment device

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