WO2018037630A1 - Heat treatment device - Google Patents

Heat treatment device Download PDF

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Publication number
WO2018037630A1
WO2018037630A1 PCT/JP2017/017682 JP2017017682W WO2018037630A1 WO 2018037630 A1 WO2018037630 A1 WO 2018037630A1 JP 2017017682 W JP2017017682 W JP 2017017682W WO 2018037630 A1 WO2018037630 A1 WO 2018037630A1
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WO
WIPO (PCT)
Prior art keywords
light
substrate
holding plate
heat treatment
semiconductor wafer
Prior art date
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PCT/JP2017/017682
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French (fr)
Japanese (ja)
Inventor
雅志 古川
Original Assignee
株式会社Screenホールディングス
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Publication of WO2018037630A1 publication Critical patent/WO2018037630A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping

Definitions

  • the present invention relates to a heat treatment apparatus for heating a substrate by irradiating light onto a thin plate-shaped precision electronic substrate (hereinafter simply referred to as “substrate”) such as a semiconductor wafer.
  • substrate such as a semiconductor wafer.
  • impurity introduction is an essential step for forming a pn junction in a semiconductor wafer.
  • impurities are generally introduced by ion implantation and subsequent annealing.
  • the ion implantation method is a technique in which impurity elements such as boron (B), arsenic (As), and phosphorus (P) are ionized and collided with a semiconductor wafer at a high acceleration voltage to physically perform impurity implantation.
  • the implanted impurities are activated by annealing. At this time, if the annealing time is about several seconds or more, the implanted impurities are deeply diffused by heat, and as a result, the junction depth becomes deeper than required, and there is a possibility that good device formation may be hindered.
  • Flash lamp annealing is a semiconductor wafer in which impurities are implanted by irradiating the surface of the semiconductor wafer with flash light using a xenon flash lamp (hereinafter, simply referred to as “flash lamp” means xenon flash lamp). Is a heat treatment technique for raising the temperature of only the surface of the material in a very short time (several milliseconds or less).
  • Xenon flash lamp radiation spectral distribution is from the ultraviolet to the near infrared, shorter in wavelength than conventional halogen lamps, and almost coincides with the fundamental absorption band of silicon semiconductor wafers. Therefore, when the semiconductor wafer is irradiated with flash light from the xenon flash lamp, the semiconductor wafer can be rapidly heated with little transmitted light. Further, it has been found that if the flash light irradiation is performed for a very short time of several milliseconds or less, only the vicinity of the surface of the semiconductor wafer can be selectively heated. For this reason, if the temperature is raised for a very short time by the xenon flash lamp, only the impurity activation can be performed without deeply diffusing the impurities.
  • Patent Document 1 As a heat treatment apparatus using such a xenon flash lamp, in Patent Document 1, a plurality of bumps (support pins) are formed on the upper surface of a quartz susceptor, and flash is applied to a semiconductor wafer that is supported by point contact with these support pins. A technique for heating is disclosed. In the apparatus disclosed in Patent Document 1, after a halogen lamp irradiates light from the lower surface of a semiconductor wafer placed on a susceptor and preheats, flash light is irradiated from the flash lamp to the wafer surface to perform flash heating.
  • a halogen lamp irradiates light from the lower surface of a semiconductor wafer placed on a susceptor and preheats
  • flash light is irradiated from the flash lamp to the wafer surface to perform flash heating.
  • Patent Document 2 the laser light emitted from the laser light source is guided to the support pin by the reflection portion, and the vicinity of the contact point between the support pin and the semiconductor wafer, where the temperature is likely to be lowered, is auxiliaryly heated. It has been proposed to prevent a relative temperature drop.
  • JP 2009-164451 A Japanese Patent Laid-Open No. 2015-18909
  • Patent Document 2 it is necessary to install a plurality (the same number as the support pins) of laser light sources in the chamber. From the viewpoint of suppressing the consumption of atmospheric gas, it is required to reduce the volume in the chamber as much as possible, and it may be difficult to install a large number of laser light sources in the chamber. In addition, it is preferable to minimize the installation of equipment that may become a contamination source in the chamber that accommodates the semiconductor wafer.
  • the present invention has been made in view of the above problems, and an object of the present invention is to provide a heat treatment apparatus capable of making the temperature distribution in the substrate surface uniform during light irradiation with a simple configuration.
  • a first aspect of the present invention is a heat treatment apparatus for heating a substrate by irradiating the substrate with light.
  • a quartz flat plate-shaped holding plate that supports the substrate through the plurality of support pins, and a light irradiation unit that irradiates light through the holding plate to the substrate supported by the holding plate,
  • the plurality of support pins are formed of a light absorbing material that absorbs light irradiated from the light irradiation unit.
  • a chamber for accommodating the substrate and a plurality of support pins erected on the upper surface in the chamber are provided.
  • a light absorption film formed of a light absorbing material that absorbs light irradiated from the light irradiation unit is provided.
  • a chamber for accommodating the substrate and a plurality of support pins erected on the upper surface in the chamber are provided.
  • a quartz plate-shaped holding plate that supports the substrate, and a light irradiation unit that irradiates the substrate with the light supported by the holding plate through the holding plate, the plurality of support pins and the holding plate A light-absorbing film formed of a light-absorbing material that absorbs light irradiated from the light irradiation unit is sandwiched between the two.
  • a chamber for accommodating the substrate and a plurality of support pins erected on the upper surface in the chamber are provided.
  • a light absorption film formed of a light absorbing material that absorbs light emitted from the light irradiation unit is provided in a region facing the plurality of support pins.
  • a chamber for accommodating the substrate and a plurality of support pins erected on the upper surface in the chamber are provided.
  • a quartz flat plate-shaped holding plate that supports the substrate, and a light irradiation unit that irradiates light through the holding plate to the substrate supported by the holding plate, and the plurality of the holding plates The portion where the support pin is erected is formed of a light absorbing material that absorbs light irradiated from the light irradiation section.
  • the light absorbing material is opaque quartz.
  • the opaque quartz is black synthetic quartz.
  • the light absorbing material is silicon carbide.
  • the shape of the light absorbing material projected onto a horizontal plane is a circle having a diameter of 4 mm or less.
  • the plurality of support pins absorb the light from the light irradiation unit and raise the temperature, so that the temperature drop in the vicinity of the contact point between the support pin and the substrate
  • the temperature distribution in the substrate surface at the time of light irradiation can be made uniform with a simple configuration.
  • the light absorption film provided on the surfaces of the plurality of support pins absorbs light from the light irradiation unit and raises the temperature.
  • the temperature distribution in the vicinity of the contact point with the substrate can be suppressed, and the temperature distribution in the substrate surface during light irradiation can be made uniform with a simple configuration.
  • the light absorption film sandwiched between the plurality of support pins and the holding plate absorbs the light from the light irradiation unit and raises the temperature. Since heat transfer from the light absorption film to the support pins occurs, the temperature distribution in the vicinity of the contact point between the support pins and the substrate can be suppressed, and the temperature distribution in the substrate surface during light irradiation can be made uniform with a simple configuration. it can.
  • the light absorption film provided in the region facing the plurality of support pins on the lower surface of the holding plate absorbs light from the light irradiation unit. Since the temperature rises and heat transfer from the light absorption film to the support pins occurs, temperature drop in the vicinity of the contact area between the support pins and the substrate is suppressed, and the temperature distribution in the substrate surface during light irradiation is uniform with a simple configuration Can be.
  • the portion of the holding plate on which the plurality of support pins are erected absorbs the light from the light irradiation unit and rises in temperature. Therefore, the temperature distribution in the vicinity of the contact portion between the support pin and the substrate can be suppressed, and the temperature distribution in the substrate surface during light irradiation can be made uniform with a simple configuration.
  • black synthetic quartz has a high light absorptance, it is possible to more effectively suppress a temperature decrease in the vicinity of the contact portion between the support pin and the substrate.
  • the shape of the light absorption material projected onto the horizontal plane is a circle having a diameter of 4 mm or less, the light absorption effect can be obtained while suppressing the influence of light shielding of the light absorption material. it can.
  • FIG. 1 is a longitudinal sectional view showing a configuration of a heat treatment apparatus 1 according to the present invention.
  • the heat treatment apparatus 1 of the present embodiment is a flash lamp annealing apparatus that heats a semiconductor wafer W by irradiating a disk-shaped semiconductor wafer W as a substrate with flash light irradiation.
  • the size of the semiconductor wafer W to be processed is not particularly limited, and is, for example, ⁇ 300 mm or ⁇ 450 mm. In FIG. 1 and the subsequent drawings, the size and number of each part are exaggerated or simplified as necessary for easy understanding.
  • the heat treatment apparatus 1 includes a chamber 6 that accommodates a semiconductor wafer W, a flash heating unit 5 that houses a plurality of flash lamps FL, and a halogen heating unit 4 that houses a plurality of halogen lamps HL.
  • a flash heating unit 5 is provided on the upper side of the chamber 6, and a halogen heating unit 4 is provided on the lower side.
  • the heat treatment apparatus 1 includes a holding unit 7 that holds the semiconductor wafer W in a horizontal posture inside the chamber 6, and a transfer mechanism 10 that transfers the semiconductor wafer W between the holding unit 7 and the outside of the apparatus, Is provided.
  • the heat treatment apparatus 1 includes a control unit 3 that controls the operation mechanisms provided in the halogen heating unit 4, the flash heating unit 5, and the chamber 6 to perform the heat treatment of the semiconductor wafer W.
  • the chamber 6 is configured by mounting quartz chamber windows on the upper and lower sides of the cylindrical chamber side portion 61.
  • the chamber side portion 61 has a substantially cylindrical shape with upper and lower openings.
  • the upper opening is closed by an upper chamber window 63 and the lower opening is closed by a lower chamber window 64.
  • the upper chamber window 63 constituting the ceiling of the chamber 6 is a disk-shaped member made of quartz and functions as a quartz window that transmits the flash light emitted from the flash heating unit 5 into the chamber 6.
  • the lower chamber window 64 constituting the floor portion of the chamber 6 is also a disk-shaped member made of quartz and functions as a quartz window that transmits light from the halogen heating unit 4 into the chamber 6.
  • a reflection ring 68 is attached to the upper part of the inner wall surface of the chamber side part 61, and a reflection ring 69 is attached to the lower part.
  • the reflection rings 68 and 69 are both formed in an annular shape.
  • the upper reflecting ring 68 is attached by fitting from above the chamber side portion 61.
  • the lower reflection ring 69 is mounted by being fitted from the lower side of the chamber side portion 61 and fastened with a screw (not shown). That is, the reflection rings 68 and 69 are both detachably attached to the chamber side portion 61.
  • An inner space of the chamber 6, that is, a space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side portion 61, and the reflection rings 68 and 69 is defined as a heat treatment space 65.
  • the recesses 62 are formed on the inner wall surface of the chamber 6 by attaching the reflection rings 68 and 69 to the chamber side portion 61. That is, a recess 62 surrounded by a central portion of the inner wall surface of the chamber side portion 61 where the reflection rings 68 and 69 are not mounted, a lower end surface of the reflection ring 68, and an upper end surface of the reflection ring 69 is formed. .
  • the recess 62 is formed in an annular shape along the horizontal direction on the inner wall surface of the chamber 6, and surrounds the holding portion 7 that holds the semiconductor wafer W.
  • the chamber side portion 61 and the reflection rings 68 and 69 are formed of a metal material (for example, stainless steel) having excellent strength and heat resistance.
  • the chamber side portion 61 is formed with a transfer opening (furnace port) 66 for carrying the semiconductor wafer W into and out of the chamber 6.
  • the transfer opening 66 can be opened and closed by a gate valve 185.
  • the transport opening 66 is connected to the outer peripheral surface of the recess 62. Therefore, when the gate valve 185 opens the transfer opening 66, the semiconductor wafer W is carried into the heat treatment space 65 through the recess 62 from the transfer opening 66 and the semiconductor wafer W is carried out from the heat treatment space 65. It can be performed. Further, when the gate valve 185 closes the transfer opening 66, the heat treatment space 65 in the chamber 6 becomes a sealed space.
  • a gas supply hole 81 for supplying a processing gas to the heat treatment space 65 is formed in the upper portion of the inner wall of the chamber 6.
  • the gas supply hole 81 is formed at a position above the recess 62 and may be provided in the reflection ring 68.
  • the gas supply hole 81 is connected to a gas supply pipe 83 through a buffer space 82 formed in an annular shape inside the side wall of the chamber 6.
  • the gas supply pipe 83 is connected to a processing gas supply source 85.
  • a valve 84 is inserted in the middle of the path of the gas supply pipe 83. When the valve 84 is opened, the processing gas is supplied from the processing gas supply source 85 to the buffer space 82.
  • the processing gas flowing into the buffer space 82 flows so as to expand in the buffer space 82 having a smaller fluid resistance than the gas supply hole 81 and is supplied from the gas supply hole 81 into the heat treatment space 65.
  • an inert gas such as nitrogen (N 2 ) or a reactive gas such as hydrogen (H 2 ) or ammonia (NH 3 ) can be used (nitrogen in this embodiment).
  • a gas exhaust hole 86 for exhausting the gas in the heat treatment space 65 is formed in the lower portion of the inner wall of the chamber 6.
  • the gas exhaust hole 86 is formed at a position lower than the recess 62 and may be provided in the reflection ring 69.
  • the gas exhaust hole 86 is connected to a gas exhaust pipe 88 through a buffer space 87 formed in an annular shape inside the side wall of the chamber 6.
  • the gas exhaust pipe 88 is connected to the exhaust unit 190.
  • a valve 89 is inserted in the middle of the path of the gas exhaust pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas exhaust hole 86 to the gas exhaust pipe 88 through the buffer space 87.
  • a plurality of gas supply holes 81 and gas exhaust holes 86 may be provided along the circumferential direction of the chamber 6 or may be slit-shaped. Further, the processing gas supply source 85 and the exhaust unit 190 may be a mechanism provided in the heat treatment apparatus 1 or may be a utility of a factory where the heat treatment apparatus 1 is installed.
  • a gas exhaust pipe 191 for discharging the gas in the heat treatment space 65 is connected to the tip of the transfer opening 66.
  • the gas exhaust pipe 191 is connected to the exhaust unit 190 via a valve 192. By opening the valve 192, the gas in the chamber 6 is exhausted through the transfer opening 66.
  • FIG. 2 is a perspective view showing the overall appearance of the holding unit 7.
  • the holding part 7 includes a base ring 71, a connecting part 72, and a susceptor 74.
  • the base ring 71, the connecting portion 72, and the susceptor 74 are all made of quartz. That is, the whole holding part 7 is made of quartz.
  • the base ring 71 is an arc-shaped quartz member in which a part is omitted from the annular shape. This missing portion is provided to prevent interference between a transfer arm 11 and a base ring 71 of the transfer mechanism 10 described later.
  • the base ring 71 is supported on the wall surface of the chamber 6 by being placed on the bottom surface of the recess 62 (see FIG. 1).
  • On the upper surface of the base ring 71 a plurality of connecting portions 72 (four in this embodiment) are erected along the annular circumferential direction.
  • the connecting portion 72 is also a quartz member, and is fixed to the base ring 71 by welding.
  • FIG. 3 is a plan view of the susceptor 74.
  • FIG. 4 is a cross-sectional view of the susceptor 74.
  • the susceptor 74 includes a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77.
  • the holding plate 75 is a substantially circular flat plate member made of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. That is, the holding plate 75 has a larger planar size than the semiconductor wafer W.
  • a guide ring 76 is installed on the periphery of the upper surface of the holding plate 75.
  • the guide ring 76 is an annular member having an inner diameter larger than the diameter of the semiconductor wafer W. For example, when the diameter of the semiconductor wafer W is ⁇ 300 mm, the inner diameter of the guide ring 76 is ⁇ 320 mm.
  • the inner periphery of the guide ring 76 has a tapered surface that widens upward from the holding plate 75.
  • the guide ring 76 is formed of quartz similar to the holding plate 75.
  • the guide ring 76 may be welded to the upper surface of the holding plate 75, or may be fixed to the holding plate 75 with a separately processed pin or the like. Alternatively, the holding plate 75 and the guide ring 76 may be processed as an integral member.
  • the region inside the guide ring 76 on the upper surface of the holding plate 75 is a flat holding surface 75a for holding the semiconductor wafer W.
  • a plurality of substrate support pins 77 are provided upright on the holding surface 75 a of the holding plate 75.
  • a total of twelve substrate support pins 77 are erected every 30 ° along a circumference concentric with the outer circumference of the holding surface 75a (the inner circumference of the guide ring 76).
  • the diameter of the circle on which the 12 substrate support pins 77 are arranged is smaller than the diameter of the semiconductor wafer W.
  • each substrate support pin 77 is made of opaque quartz.
  • Opaque quartz is obtained, for example, by including a large number of fine bubbles in a quartz material.
  • the opaque quartz for example, OM-100 manufactured by Shin-Etsu Quartz Co., Ltd., OP-3 manufactured by Tosoh Quartz Co., Ltd., or the like can be used.
  • the four connecting portions 72 erected on the base ring 71 and the peripheral portion of the holding plate 75 of the susceptor 74 are fixed by welding. That is, the susceptor 74 and the base ring 71 are fixedly connected by the connecting portion 72.
  • the holding unit 7 is attached to the chamber 6.
  • the holding plate 75 of the susceptor 74 is in a horizontal posture (a posture in which the normal line matches the vertical direction). That is, the holding surface 75a of the holding plate 75 is a horizontal plane.
  • the shape of each of the 12 substrate support pins 77 erected on the upper surface of the holding plate 75 is projected on a horizontal plane is a circle having a diameter of 4 mm or less.
  • the semiconductor wafer W carried into the chamber 6 is placed and held in a horizontal posture on the susceptor 74 of the holding unit 7 attached to the chamber 6.
  • the semiconductor wafer W is supported by twelve substrate support pins 77 erected on the holding plate 75 and held by the susceptor 74. More precisely, the upper ends of the twelve substrate support pins 77 are in contact with the lower surface of the semiconductor wafer W to support the semiconductor wafer W. Since the height of the 12 substrate support pins 77 (the distance from the upper end of the substrate support pin 77 to the holding surface 75a of the holding plate 75) is uniform, the semiconductor wafer W is placed in a horizontal posture by the 12 substrate support pins 77. Can be supported.
  • the semiconductor wafer W is supported by the plurality of substrate support pins 77 at a predetermined interval from the holding surface 75a of the holding plate 75.
  • the thickness of the guide ring 76 is greater than the height of the substrate support pins 77. Accordingly, the horizontal displacement of the semiconductor wafer W supported by the plurality of substrate support pins 77 is prevented by the guide ring 76.
  • the holding plate 75 of the susceptor 74 has an opening 78 penetrating vertically.
  • the opening 78 is provided for the radiation thermometer 120 (see FIG. 1) to receive radiated light (infrared light) emitted from the lower surface of the semiconductor wafer W held by the susceptor 74. That is, the radiation thermometer 120 receives light emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78, and the temperature of the semiconductor wafer W is measured by a separate detector.
  • the holding plate 75 of the susceptor 74 is provided with four through holes 79 through which lift pins 12 of the transfer mechanism 10 to be described later penetrate for the delivery of the semiconductor wafer W.
  • FIG. 5 is a plan view of the transfer mechanism 10.
  • FIG. 6 is a side view of the transfer mechanism 10.
  • the transfer mechanism 10 includes two transfer arms 11.
  • the transfer arm 11 has an arc shape that follows the generally annular recess 62.
  • Two lift pins 12 are erected on each transfer arm 11.
  • Each transfer arm 11 can be rotated by a horizontal movement mechanism 13.
  • the horizontal movement mechanism 13 includes a transfer operation position (a position indicated by a solid line in FIG. 5) for transferring the pair of transfer arms 11 to the holding unit 7 and the semiconductor wafer W held by the holding unit 7. It is moved horizontally between the retracted positions (two-dot chain line positions in FIG. 5) that do not overlap in plan view.
  • each transfer arm 11 may be rotated by an individual motor, or a pair of transfer arms 11 may be interlocked by a single motor using a link mechanism. It may be moved.
  • the pair of transfer arms 11 is moved up and down together with the horizontal moving mechanism 13 by the lifting mechanism 14.
  • the elevating mechanism 14 raises the pair of transfer arms 11 at the transfer operation position, a total of four lift pins 12 pass through the through holes 79 (see FIGS. 2 and 3) formed in the susceptor 74, and the lift pins The upper end of 12 protrudes from the upper surface of the susceptor 74.
  • the elevating mechanism 14 lowers the pair of transfer arms 11 at the transfer operation position, the lift pins 12 are extracted from the through holes 79, and the horizontal movement mechanism 13 moves the pair of transfer arms 11 so as to open each of them.
  • the transfer arm 11 moves to the retracted position.
  • the retracted position of the pair of transfer arms 11 is directly above the base ring 71 of the holding unit 7. Since the base ring 71 is placed on the bottom surface of the recess 62, the retracted position of the transfer arm 11 is inside the recess 62. Note that an exhaust mechanism (not shown) is also provided in the vicinity of a portion where the drive unit (the horizontal movement mechanism 13 and the lifting mechanism 14) of the transfer mechanism 10 is provided, and the atmosphere around the drive unit of the transfer mechanism 10 is provided. Is discharged to the outside of the chamber 6.
  • the flash heating unit 5 provided above the chamber 6 includes a light source including a plurality of (30 in the present embodiment) xenon flash lamps FL inside the housing 51, and an upper part of the light source. And a reflector 52 provided so as to cover.
  • a lamp light emission window 53 is mounted on the bottom of the casing 51 of the flash heating unit 5.
  • the lamp light emission window 53 constituting the floor of the flash heating unit 5 is a plate-like quartz window made of quartz.
  • Each of the plurality of flash lamps FL is a rod-shaped lamp having a long cylindrical shape, and the longitudinal direction of each of the flash lamps FL is along the main surface of the semiconductor wafer W held by the holding unit 7 (that is, along the horizontal direction). They are arranged in a plane so as to be parallel to each other. Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane.
  • the xenon flash lamp FL has a rod-shaped glass tube (discharge tube) in which xenon gas is sealed and an anode and a cathode connected to a capacitor at both ends thereof, and an outer peripheral surface of the glass tube. And a triggered electrode. Since xenon gas is an electrical insulator, electricity does not flow into the glass tube under normal conditions even if electric charges are accumulated in the capacitor. However, when the insulation is broken by applying a high voltage to the trigger electrode, the electricity stored in the capacitor flows instantaneously in the glass tube, and light is emitted by excitation of atoms or molecules of xenon at that time.
  • the electrostatic energy previously stored in the capacitor is converted into an extremely short light pulse of 0.1 to 100 milliseconds, so that the continuous lighting such as the halogen lamp HL is possible. It has the characteristic that it can irradiate extremely strong light compared with a light source. That is, the flash lamp FL is a pulse light emitting lamp that emits light instantaneously in an extremely short time of less than 1 second. The light emission time of the flash lamp FL can be adjusted by the coil constant of the lamp power source that supplies power to the flash lamp FL.
  • the reflector 52 is provided above the plurality of flash lamps FL so as to cover the whole.
  • the basic function of the reflector 52 is to reflect the flash light emitted from the plurality of flash lamps FL toward the heat treatment space 65.
  • the reflector 52 is formed of an aluminum alloy plate, and the surface (the surface facing the flash lamp FL) is roughened by blasting.
  • the halogen heating unit 4 provided below the chamber 6 incorporates a plurality (40 in the present embodiment) of halogen lamps HL inside the housing 41.
  • the halogen heating unit 4 is a light irradiation unit that heats the semiconductor wafer W by irradiating the heat treatment space 65 from below the chamber 6 through the lower chamber window 64 with a plurality of halogen lamps HL.
  • FIG. 7 is a plan view showing the arrangement of a plurality of halogen lamps HL.
  • Forty halogen lamps HL are arranged in two upper and lower stages. Twenty halogen lamps HL are arranged on the upper stage close to the holding unit 7, and twenty halogen lamps HL are arranged on the lower stage farther from the holding unit 7 than the upper stage.
  • Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape.
  • the 20 halogen lamps HL in both the upper and lower stages are arranged so that their longitudinal directions are parallel to each other along the main surface of the semiconductor wafer W held by the holding unit 7 (that is, along the horizontal direction). Yes. Therefore, the plane formed by the arrangement of the halogen lamps HL in both the upper stage and the lower stage is a horizontal plane.
  • the arrangement density of the halogen lamps HL in the region facing the peripheral portion is higher than the region facing the central portion of the semiconductor wafer W held by the holding portion 7 in both the upper stage and the lower stage. Yes. That is, in both the upper and lower stages, the arrangement pitch of the halogen lamps HL is shorter in the peripheral part than in the central part of the lamp array. For this reason, it is possible to irradiate a larger amount of light to the peripheral portion of the semiconductor wafer W where the temperature is likely to decrease during heating by light irradiation from the halogen heating unit 4.
  • the lamp group composed of the upper halogen lamp HL and the lamp group composed of the lower halogen lamp HL are arranged so as to intersect in a lattice pattern. That is, a total of 40 halogen lamps HL are arranged so that the longitudinal direction of the 20 halogen lamps HL arranged in the upper stage and the longitudinal direction of the 20 halogen lamps HL arranged in the lower stage are orthogonal to each other. Yes.
  • the halogen lamp HL is a filament-type light source that emits light by making the filament incandescent by energizing the filament disposed inside the glass tube. Inside the glass tube, a gas obtained by introducing a trace amount of a halogen element (iodine, bromine, etc.) into an inert gas such as nitrogen or argon is enclosed. By introducing a halogen element, it is possible to set the filament temperature to a high temperature while suppressing breakage of the filament. Therefore, the halogen lamp HL has a characteristic that it has a longer life than a normal incandescent bulb and can continuously radiate strong light. That is, the halogen lamp HL is a continuous lighting lamp that emits light continuously for at least one second. Further, since the halogen lamp HL is a rod-shaped lamp, it has a long life, and by arranging the halogen lamp HL along the horizontal direction, the radiation efficiency to the upper semiconductor wafer W becomes excellent.
  • a halogen element io
  • a reflector 43 is also provided in the housing 41 of the halogen heating unit 4 below the two-stage halogen lamp HL (FIG. 1). The reflector 43 reflects the light emitted from the plurality of halogen lamps HL toward the heat treatment space 65.
  • the control unit 3 controls the various operation mechanisms provided in the heat treatment apparatus 1.
  • the configuration of the control unit 3 as hardware is the same as that of a general computer. That is, the control unit 3 includes a CPU that is a circuit that performs various arithmetic processes, a ROM that is a read-only memory that stores basic programs, a RAM that is a readable and writable memory that stores various information, control software, data, and the like. It has a magnetic disk to store.
  • the processing in the heat treatment apparatus 1 proceeds as the CPU of the control unit 3 executes a predetermined processing program.
  • the heat treatment apparatus 1 prevents an excessive temperature rise in the halogen heating unit 4, the flash heating unit 5, and the chamber 6 due to thermal energy generated from the halogen lamp HL and the flash lamp FL during the heat treatment of the semiconductor wafer W. Therefore, various cooling structures are provided.
  • the wall of the chamber 6 is provided with a water-cooled tube (not shown).
  • the halogen heating unit 4 and the flash heating unit 5 have an air cooling structure in which a gas flow is formed inside to exhaust heat. Air is also supplied to the gap between the upper chamber window 63 and the lamp light emission window 53 to cool the flash heating unit 5 and the upper chamber window 63.
  • the semiconductor wafer W to be processed here is a semiconductor substrate to which impurities (ions) are added by an ion implantation method.
  • the activation of the impurities is performed by flash light irradiation heat treatment (annealing) by the heat treatment apparatus 1.
  • the processing procedure of the heat treatment apparatus 1 described below proceeds by the control unit 3 controlling each operation mechanism of the heat treatment apparatus 1.
  • the gate valve 185 is opened to open the transfer opening 66, and the semiconductor wafer W is transferred into the heat treatment space 65 in the chamber 6 through the transfer opening 66 by a transfer robot outside the apparatus.
  • the semiconductor wafer W carried in by the carrying robot advances to a position directly above the holding unit 7 and stops.
  • the lift pin 12 protrudes from the upper surface of the holding plate 75 of the susceptor 74 through the through hole 79.
  • the semiconductor wafer W is received.
  • the lift pins 12 ascend above the upper ends of the substrate support pins 77.
  • the transfer robot leaves the heat treatment space 65 and the transfer opening 66 is closed by the gate valve 185.
  • the semiconductor wafer W is transferred from the transfer mechanism 10 to the susceptor 74 of the holding unit 7 and held from below in a horizontal posture.
  • the semiconductor wafer W is supported by a plurality of substrate support pins 77 erected on the holding plate 75 and held by the susceptor 74.
  • the semiconductor wafer W is held by the holding unit 7 with the surface on which the pattern is formed and the impurities are implanted as the upper surface.
  • a predetermined gap is formed between the back surface (main surface opposite to the front surface) of the semiconductor wafer W supported by the plurality of substrate support pins 77 and the holding surface 75 a of the holding plate 75.
  • the pair of transfer arms 11 lowered to below the susceptor 74 is retracted to the retracted position, that is, inside the recess 62 by the horizontal movement mechanism 13.
  • the atmosphere in the chamber 6 is adjusted. Specifically, the valve 84 is opened and the processing gas is supplied from the gas supply hole 81 to the heat treatment space 65. In the present embodiment, nitrogen is supplied as a processing gas to the heat treatment space 65 in the chamber 6. Further, the valve 89 is opened, and the gas in the chamber 6 is exhausted from the gas exhaust hole 86. Thereby, the processing gas supplied from the upper part of the heat treatment space 65 in the chamber 6 flows downward and is exhausted from the lower part of the heat treatment space 65, whereby the heat treatment space 65 is replaced with a nitrogen atmosphere. Further, when the valve 192 is opened, the gas in the chamber 6 is also exhausted from the transfer opening 66. Further, the atmosphere around the drive unit of the transfer mechanism 10 is also exhausted by an exhaust mechanism (not shown).
  • halogen lamps HL of the halogen heating unit 4 are turned on all at once. Heating (assist heating) is started.
  • the halogen light emitted from the halogen lamp HL passes through the lower chamber window 64 and the susceptor 74 made of quartz and is irradiated from the back surface of the semiconductor wafer W.
  • the semiconductor wafer W is preheated and the temperature rises.
  • the transfer arm 11 of the transfer mechanism 10 is retracted to the inside of the recess 62, there is no obstacle to heating by the halogen lamp HL.
  • the temperature of the semiconductor wafer W is measured by the radiation thermometer 120. That is, the infrared thermometer 120 receives infrared light emitted from the back surface of the semiconductor wafer W held by the susceptor 74 through the opening 78, and measures the temperature of the wafer being heated. The measured temperature of the semiconductor wafer W is transmitted to the control unit 3.
  • the controller 3 controls the output of the halogen lamp HL while monitoring whether or not the temperature of the semiconductor wafer W that is heated by light irradiation from the halogen lamp HL has reached a predetermined preheating temperature T1.
  • control unit 3 feedback-controls the output of the halogen lamp HL based on the measurement value by the radiation thermometer 120 so that the temperature of the semiconductor wafer W becomes the preheating temperature T1.
  • the preheating temperature T1 is about 200 ° C. to 800 ° C., preferably about 350 ° C. to 600 ° C. (in this embodiment, 600 ° C.).
  • the control unit 3 After the temperature of the semiconductor wafer W reaches the preheating temperature T1, the control unit 3 maintains the semiconductor wafer W at the preheating temperature T1 for a while. Specifically, when the temperature of the semiconductor wafer W measured by the radiation thermometer 120 reaches the preheating temperature T1, the control unit 3 adjusts the output of the halogen lamp HL so that the temperature of the semiconductor wafer W is almost preliminarily set. The heating temperature is maintained at T1.
  • the preliminary heating by the halogen lamp HL is performed in a state where the semiconductor wafer W is supported by the twelve substrate support pins 77.
  • the substrate support pin 77 is made of quartz as in the conventional case, the substrate support pin 77 transmits the light irradiated from the halogen lamp HL with little absorption. Therefore, at the time of preheating, the semiconductor wafer W absorbs light from the halogen lamp HL and rises in temperature, while the susceptor 74 including the substrate support pins 77 does not rise so much and is relatively cooler than the semiconductor wafer W. It becomes.
  • twelve substrate support pins 77 erected on the upper surface of the holding plate 75 are formed of opaque quartz.
  • Opaque quartz is a light-absorbing material that absorbs light irradiated from the halogen lamp HL and raises the temperature. That is, in the first embodiment, the twelve substrate support pins 77 are formed of a light absorbing material that absorbs light irradiated from the halogen lamp HL and raises the temperature.
  • FIG. 8 is an enlarged view of the vicinity of the substrate support pins 77 of the first embodiment.
  • Light emitted from the halogen lamp HL is irradiated from the lower surface of the holding plate 75. Since the holding plate 75 is formed of normal transparent quartz, it transmits the light emitted from the halogen lamp HL. The light transmitted through the holding plate 75 is applied to the back surface of the semiconductor wafer W. Further, part of the light transmitted through the holding plate 75 is also irradiated to the substrate support pins 77. Since the substrate support pins 77 are made of opaque quartz, the temperature of the substrate support pins 77 is increased by absorbing light transmitted through the holding plate 75.
  • the shape of the substrate support pin 77 projected onto the horizontal plane is a circle, and its diameter d is 4 mm or less. If the circular diameter d of the substrate support pins 77 projected onto the horizontal plane is larger than 4 mm, the light shielding effect is larger than the light absorption effect by the substrate support pins 77, and a shadow is formed on the back surface of the semiconductor wafer W by the substrate support pins 77. In other words, the temperature drop near the contact point of the semiconductor wafer W with the substrate support pins 77 becomes large. For this reason, the circular diameter d obtained by projecting the substrate support pins 77 on the horizontal plane is limited to 4 mm or less.
  • the flash lamp FL of the flash heating unit 5 irradiates the surface of the semiconductor wafer W with flash light when a predetermined time elapses after the temperature of the semiconductor wafer W reaches the preheating temperature T1. At this time, a part of the flash light emitted from the flash lamp FL goes directly into the chamber 6, and the other part is once reflected by the reflector 52 and then goes into the chamber 6. Flash heating of the semiconductor wafer W is performed by irradiation.
  • the surface temperature of the semiconductor wafer W can be increased in a short time. That is, the flash light irradiated from the flash lamp FL is converted into a light pulse in which the electrostatic energy stored in the capacitor in advance is extremely short, and the irradiation time is extremely short, about 0.1 milliseconds to 100 milliseconds. It is a strong flash. Then, the surface temperature of the semiconductor wafer W that is flash-heated by flash light irradiation from the flash lamp FL instantaneously rises to a processing temperature T2 of 1000 ° C. or more, and the impurities injected into the semiconductor wafer W are activated.
  • a processing temperature T2 1000 ° C. or more
  • the surface temperature of the semiconductor wafer W can be raised and lowered in a very short time, so that the impurities are activated while suppressing diffusion of the impurities injected into the semiconductor wafer W due to heat. Can do. Since the time required for the activation of impurities is extremely short compared to the time required for the thermal diffusion, the activation is possible even in a short time in which diffusion of about 0.1 millisecond to 100 millisecond does not occur. Complete.
  • twelve substrate support pins 77 are formed of opaque quartz that absorbs light irradiated from the halogen lamp HL and raises the temperature, and the temperature in the vicinity of the contact point between the substrate support pins 77 and the semiconductor wafer W is formed.
  • the in-plane temperature distribution of the semiconductor wafer W in the preheating stage is made uniform by suppressing the decrease. As a result, the in-plane temperature distribution on the surface of the semiconductor wafer W at the time of flash light irradiation can be made uniform.
  • the halogen lamp HL is turned off after a predetermined time has elapsed. Thereby, the temperature of the semiconductor wafer W is rapidly lowered from the preheating temperature T1.
  • the temperature of the semiconductor wafer W during the temperature drop is measured by the radiation thermometer 120, and the measurement result is transmitted to the control unit 3.
  • the controller 3 monitors whether or not the temperature of the semiconductor wafer W has dropped to a predetermined temperature from the measurement result of the radiation thermometer 120. Then, after the temperature of the semiconductor wafer W is lowered to a predetermined temperature or lower, the pair of transfer arms 11 of the transfer mechanism 10 is again moved horizontally from the retracted position to the transfer operation position and lifted, whereby the lift pins 12 are moved to the susceptor.
  • the semiconductor wafer W protruding from the upper surface of 74 and subjected to the heat treatment is received from the susceptor 74. Subsequently, the transfer opening 66 closed by the gate valve 185 is opened, and the semiconductor wafer W placed on the lift pins 12 is unloaded by the transfer robot outside the apparatus, and the heat treatment of the semiconductor wafer W in the heat treatment apparatus 1 is performed. Is completed.
  • twelve substrate support pins 77 erected on the upper surface of the holding plate 75 are formed of a light absorbing material that absorbs light emitted from the halogen lamp HL and raises the temperature.
  • the 12 substrate support pins 77 absorb the light from the halogen lamp HL and raise the temperature, so that the temperature drop near the contact point between the substrate support pins 77 and the semiconductor wafer W is reduced.
  • the in-plane temperature distribution of the semiconductor wafer W during preheating can be made uniform by suppressing the above. As a result, the in-plane temperature distribution on the surface of the semiconductor wafer W during flash heating can be made uniform.
  • the in-plane temperature distribution of the semiconductor wafer W is made uniform simply by forming the twelve substrate support pins 77 with a light absorbing material. That is, no special mechanism or design change for heating the contact portion between the substrate support pins 77 and the semiconductor wafer W is required, and the in-plane temperature distribution of the semiconductor wafer W during light irradiation is made uniform with a simple configuration. can do.
  • the overall configuration of the heat treatment apparatus 1 of the second embodiment is substantially the same as that of the first embodiment.
  • the processing procedure for the semiconductor wafer W in the heat treatment apparatus 1 of the second embodiment is the same as that of the first embodiment.
  • the second embodiment is different from the first embodiment in that a light absorbing material is provided.
  • FIG. 9 is an enlarged view of the vicinity of the substrate support pins 77 of the second embodiment.
  • a light absorption film formed on the surface of 12 substrate support pins 77 erected on the upper surface of the holding plate 75 with a light absorption material that absorbs light emitted from the halogen lamp HL. 21 is provided.
  • the substrate support pins 77 themselves are made of quartz.
  • a light absorption film 21 made of a light absorption material is formed on the surface of the quartz substrate support pins 77.
  • silicon carbide SiC
  • the light absorption film 21 is formed by coating silicon carbide on the surface of the quartz substrate support pins 77 by sputtering, vapor deposition, coating, or the like.
  • membrane 21 on the horizontal surface is circular with a diameter of 4 mm or less.
  • the light absorption film 21 provided on the surface of the 12 substrate support pins 77 absorbs light from the halogen lamp HL and raises the temperature.
  • the in-plane temperature distribution of the semiconductor wafer W during preheating is suppressed by suppressing the temperature drop in the vicinity of the contact area between the pin 77 and the semiconductor wafer W (strictly, in the vicinity of the contact area between the light absorption film 21 and the semiconductor wafer W). It can be made uniform. As a result, as in the first embodiment, the in-plane temperature distribution on the surface of the semiconductor wafer W during flash heating can be made uniform.
  • the in-plane temperature distribution of the semiconductor wafer W is made uniform simply by providing the light absorption film 21 on the surface of the twelve substrate support pins 77. That is, no special mechanism or design change for heating the contact portion between the substrate support pins 77 and the semiconductor wafer W is required, and the in-plane temperature distribution of the semiconductor wafer W during light irradiation is made uniform with a simple configuration. can do.
  • the overall configuration of the heat treatment apparatus 1 of the third embodiment is substantially the same as that of the first embodiment. Further, the processing procedure of the semiconductor wafer W in the heat treatment apparatus 1 of the third embodiment is the same as that of the first embodiment.
  • the third embodiment is different from the first embodiment in that a light absorbing material is provided.
  • FIG. 10 is an enlarged view of the vicinity of the substrate support pins 77 of the third embodiment.
  • a light absorbing film 21 formed of a light absorbing material that absorbs light emitted from the halogen lamp HL is interposed between 12 substrate support pins 77 and a holding plate 75.
  • the twelve substrate support pins 77 erected on the upper surface of the holding plate 75 are formed of quartz.
  • silicon carbide is used as the light absorbing material as in the second embodiment.
  • the region where the 12 substrate support pins 77 are to be erected is coated with silicon carbide by a technique such as sputtering, vapor deposition, or coating to form the light absorption film 21.
  • a film is being formed.
  • the light absorption film 21 is sandwiched between the substrate support pin 77 and the holding plate 75 by erecting the substrate support pin 77 on the light absorption film 21.
  • the thickness of the light absorption film 21 is 0.1 mm to 0.5 mm.
  • the shape of the light absorption film 21 projected onto the horizontal plane is a circle having a diameter of 4 mm or less (that is, the diameter of the disk-shaped light absorption film 21 is 4 mm or less).
  • the light absorption film 21 sandwiched between the 12 substrate support pins 77 and the holding plate 75 absorbs the light from the halogen lamp HL during the preliminary heating by the halogen lamp HL. Raise the temperature. Since heat is transferred from the light-absorbing film 21 whose temperature has risen to the substrate support pins 77 and the substrate support pins 77 themselves also rise in temperature, preheating is performed while suppressing a temperature drop in the vicinity of the contact point between the substrate support pins 77 and the semiconductor wafer W.
  • the in-plane temperature distribution of the semiconductor wafer W at the time can be made uniform. As a result, as in the first embodiment, the in-plane temperature distribution on the surface of the semiconductor wafer W during flash heating can be made uniform.
  • the in-plane temperature distribution of the semiconductor wafer W is made uniform simply by providing the light absorption film 21 between the twelve substrate support pins 77 and the holding plate 75. That is, no special mechanism or design change for heating the contact portion between the substrate support pins 77 and the semiconductor wafer W is required, and the in-plane temperature distribution of the semiconductor wafer W during light irradiation is made uniform with a simple configuration. can do.
  • the overall configuration of the heat treatment apparatus 1 of the fourth embodiment is substantially the same as that of the first embodiment. Further, the processing procedure of the semiconductor wafer W in the heat treatment apparatus 1 of the fourth embodiment is the same as that of the first embodiment.
  • the fourth embodiment is different from the first embodiment in that a light absorbing material is provided.
  • FIG. 11 is an enlarged view of the vicinity of the substrate support pins 77 of the fourth embodiment.
  • the light absorbing film 21 formed of a light absorbing material that absorbs light emitted from the halogen lamp HL is formed in a region facing the 12 substrate support pins 77 in the lower surface of the holding plate 75.
  • the twelve substrate support pins 77 erected on the upper surface of the holding plate 75 are made of quartz. Further, silicon carbide is used as the light absorbing material as in the second embodiment.
  • light absorption is achieved by coating silicon carbide with a technique such as sputtering, vapor deposition, coating, etc. on a region of the lower surface of the holding plate 75 facing the twelve substrate support pins 77 erected on the upper surface.
  • a film 21 is formed.
  • the thickness of the light absorption film 21 is 0.1 mm to 0.5 mm.
  • the shape of the light absorption film 21 projected onto the horizontal plane is a circle having a diameter of 4 mm or less (that is, the diameter of the disk-shaped light absorption film 21 is 4 mm or less).
  • the light absorbing film 21 provided in the region facing the 12 substrate support pins 77 in the lower surface of the holding plate 75 absorbs the light from the halogen lamp HL during the preliminary heating by the halogen lamp HL. Then raise the temperature. Since the heat is transferred from the heated light absorption film 21 to the upper holding plate 75 and the substrate support pin 77 to raise the temperature of the substrate support pin 77 itself, the temperature drop in the vicinity of the contact point between the substrate support pin 77 and the semiconductor wafer W is reduced.
  • the in-plane temperature distribution of the semiconductor wafer W during preheating can be made uniform by suppressing the above. As a result, as in the first embodiment, the in-plane temperature distribution on the surface of the semiconductor wafer W during flash heating can be made uniform.
  • the in-plane temperature distribution of the semiconductor wafer W is made uniform simply by providing the light absorption film 21 on the lower surface of the holding plate 75. That is, no special mechanism or design change for heating the contact portion between the substrate support pins 77 and the semiconductor wafer W is required, and the in-plane temperature distribution of the semiconductor wafer W during light irradiation is made uniform with a simple configuration. can do.
  • the overall configuration of the heat treatment apparatus 1 of the fifth embodiment is substantially the same as that of the first embodiment. Further, the processing procedure of the semiconductor wafer W in the heat treatment apparatus 1 of the fifth embodiment is the same as that of the first embodiment.
  • the fifth embodiment is different from the first embodiment in that a light absorbing material is provided.
  • FIG. 12 is an enlarged view of the vicinity of the substrate support pins 77 of the fifth embodiment.
  • the portion of the holding plate 75 where the 12 substrate support pins 77 are erected is formed of a light absorbing material that absorbs light emitted from the halogen lamp HL.
  • the twelve substrate support pins 77 erected on the upper surface of the holding plate 75 are made of quartz. Further, as the light absorbing material, opaque quartz is used as in the first embodiment.
  • a hole is formed by vertically penetrating a portion of the holding plate 75 where twelve substrate support pins 77 are to be erected, and the cylindrical portion 22 of opaque quartz is formed in the hole by welding or the like. Is embedded.
  • a substrate support pin 77 is erected on the cylindrical portion 22.
  • the height of the cylindrical portion 22 of opaque quartz is the same as the thickness of the holding plate 75.
  • the shape of the opaque quartz cylindrical portion 22 projected onto the horizontal plane is a circle having a diameter of 4 mm or less (that is, the cylindrical portion 22 has a diameter of 4 mm or less).
  • the cylindrical portion 22 of opaque quartz provided under the twelve substrate support pins 77 absorbs light from the halogen lamp HL and raises the temperature. Since heat is transferred from the heated cylindrical portion 22 to the substrate support pin 77 and the substrate support pin 77 itself also rises in temperature, the temperature drop in the vicinity of the contact portion between the substrate support pin 77 and the semiconductor wafer W is suppressed and preheating is performed.
  • the in-plane temperature distribution of the semiconductor wafer W can be made uniform. As a result, as in the first embodiment, the in-plane temperature distribution on the surface of the semiconductor wafer W during flash heating can be made uniform.
  • the in-plane temperature distribution of the semiconductor wafer W is made uniform only by forming a part of the holding plate 75 with a light absorbing material. That is, no special mechanism or design change for heating the contact portion between the substrate support pins 77 and the semiconductor wafer W is required, and the in-plane temperature distribution of the semiconductor wafer W during light irradiation is made uniform with a simple configuration. can do.
  • silicon carbide may be used as the light absorbing material in the first and fifth embodiments
  • opaque quartz may be employed as the light absorbing material in the second to fourth embodiments.
  • the opaque quartz used as the light absorbing material in each embodiment may be black synthetic quartz. Since black synthetic quartz has a higher light absorption rate than white opaque quartz, it absorbs light from the halogen lamp HL and rises to a higher temperature, so that the substrate support pins 77 and the semiconductor wafer W It is possible to more effectively suppress the temperature decrease in the vicinity of the contact location.
  • the first embodiment may be combined with the third embodiment, and the light absorption film 21 may be provided between the opaque quartz substrate support pins 77 and the holding plate 75.
  • the first embodiment and the fifth embodiment may be combined, and the opaque quartz substrate support pins 77 may be provided on the opaque quartz cylindrical portion 22.
  • the surface of the quartz substrate support pin 77 may be made opaque by roughening treatment such as sandblasting. In this manner, the surface of the substrate support pin 77 absorbs the light from the halogen lamp HL and raises the temperature in the same manner as the substrate support pin 77 is formed of opaque quartz. A temperature drop in the vicinity of the contact point with the wafer W can be suppressed.
  • the flash heating unit 5 is provided with 30 flash lamps FL.
  • the present invention is not limited to this, and the number of flash lamps FL can be any number.
  • the flash lamp FL is not limited to a xenon flash lamp, and may be a krypton flash lamp.
  • the number of halogen lamps HL provided in the halogen heating unit 4 is not limited to 40, and may be an arbitrary number.
  • the substrate to be processed by the heat treatment apparatus according to the present invention is not limited to a semiconductor wafer, and may be a glass substrate or a solar cell substrate used for a flat panel display such as a liquid crystal display device. Further, the technique according to the present invention may be applied to bonding of metal and silicon or crystallization of polysilicon.
  • the heat treatment technique according to the present invention is not limited to the flash lamp annealing apparatus, but is also applied to a heat source apparatus other than a flash lamp such as a single wafer type lamp annealing apparatus or a CVD apparatus using a halogen lamp. be able to.
  • the technology according to the present invention is suitable for a backside annealing apparatus in which a halogen lamp is disposed below a chamber and heat treatment is performed by irradiating light from the back surface of a semiconductor wafer supported by a plurality of substrate support pins on a quartz susceptor. Can be applied to.

Abstract

Disclosed is a heat treatment device wherein substrate supporting pins are formed of a light absorbing material that increases temperature by absorbing light applied from a halogen lamp, said substrate supporting pins being provided upright on an upper surface of a holding plate formed of quartz, and directly supporting a semiconductor wafer. When heating using a halogen lamp, light outputted from the halogen lamp passes through the holding plate, a part of the light is absorbed by the substrate supporting pins, and the temperature of the substrate supporting pins is increased. Consequently, a temperature reduction in the vicinities of areas where the substrate supporting pins and the semiconductor wafer are in contact with each other is suppressed, thereby uniformizing temperature distribution within a semiconductor wafer surface when heating using the halogen lamp.

Description

熱処理装置Heat treatment equipment
 本発明は、半導体ウェハー等の薄板状精密電子基板(以下、単に「基板」と称する)に光を照射することによって該基板を加熱する熱処理装置に関する。 The present invention relates to a heat treatment apparatus for heating a substrate by irradiating light onto a thin plate-shaped precision electronic substrate (hereinafter simply referred to as “substrate”) such as a semiconductor wafer.
 半導体デバイスの製造プロセスにおいて、不純物導入は半導体ウェハー内にpn接合を形成するための必須の工程である。現在、不純物導入は、イオン打ち込み法とその後のアニール法によってなされるのが一般的である。イオン打ち込み法は、ボロン(B)、ヒ素(As)、リン(P)といった不純物の元素をイオン化させて高加速電圧で半導体ウェハーに衝突させて物理的に不純物注入を行う技術である。注入された不純物はアニール処理によって活性化される。この際に、アニール時間が数秒程度以上であると、打ち込まれた不純物が熱によって深く拡散し、その結果接合深さが要求よりも深くなり過ぎて良好なデバイス形成に支障が生じるおそれがある。 In the semiconductor device manufacturing process, impurity introduction is an essential step for forming a pn junction in a semiconductor wafer. Currently, impurities are generally introduced by ion implantation and subsequent annealing. The ion implantation method is a technique in which impurity elements such as boron (B), arsenic (As), and phosphorus (P) are ionized and collided with a semiconductor wafer at a high acceleration voltage to physically perform impurity implantation. The implanted impurities are activated by annealing. At this time, if the annealing time is about several seconds or more, the implanted impurities are deeply diffused by heat, and as a result, the junction depth becomes deeper than required, and there is a possibility that good device formation may be hindered.
 そこで、極めて短時間で半導体ウェハーを加熱するアニール技術として、近年フラッシュランプアニール(FLA)が注目されている。フラッシュランプアニールは、キセノンフラッシュランプ(以下、単に「フラッシュランプ」とするときにはキセノンフラッシュランプを意味する)を使用して半導体ウェハーの表面にフラッシュ光を照射することにより、不純物が注入された半導体ウェハーの表面のみを極めて短時間(数ミリ秒以下)に昇温させる熱処理技術である。 Therefore, flash lamp annealing (FLA) has recently attracted attention as an annealing technique for heating a semiconductor wafer in an extremely short time. Flash lamp annealing is a semiconductor wafer in which impurities are implanted by irradiating the surface of the semiconductor wafer with flash light using a xenon flash lamp (hereinafter, simply referred to as “flash lamp” means xenon flash lamp). Is a heat treatment technique for raising the temperature of only the surface of the material in a very short time (several milliseconds or less).
 キセノンフラッシュランプの放射分光分布は紫外域から近赤外域であり、従来のハロゲンランプよりも波長が短く、シリコンの半導体ウェハーの基礎吸収帯とほぼ一致している。よって、キセノンフラッシュランプから半導体ウェハーにフラッシュ光を照射したときには、透過光が少なく半導体ウェハーを急速に昇温することが可能である。また、数ミリ秒以下の極めて短時間のフラッシュ光照射であれば、半導体ウェハーの表面近傍のみを選択的に昇温できることも判明している。このため、キセノンフラッシュランプによる極短時間の昇温であれば、不純物を深く拡散させることなく、不純物活性化のみを実行することができるのである。 Xenon flash lamp radiation spectral distribution is from the ultraviolet to the near infrared, shorter in wavelength than conventional halogen lamps, and almost coincides with the fundamental absorption band of silicon semiconductor wafers. Therefore, when the semiconductor wafer is irradiated with flash light from the xenon flash lamp, the semiconductor wafer can be rapidly heated with little transmitted light. Further, it has been found that if the flash light irradiation is performed for a very short time of several milliseconds or less, only the vicinity of the surface of the semiconductor wafer can be selectively heated. For this reason, if the temperature is raised for a very short time by the xenon flash lamp, only the impurity activation can be performed without deeply diffusing the impurities.
 このようなキセノンフラッシュランプを使用した熱処理装置として、特許文献1には、石英製のサセプタの上面に複数のバンプ(支持ピン)を形成し、それら支持ピンによって点接触で支持した半導体ウェハーにフラッシュ加熱を行う技術が開示されている。特許文献1に開示の装置では、サセプタ上に載置した半導体ウェハーの下面からハロゲンランプが光照射を行って予備加熱した後、ウェハー表面にフラッシュランプからフラッシュ光を照射してフラッシュ加熱を行う。 As a heat treatment apparatus using such a xenon flash lamp, in Patent Document 1, a plurality of bumps (support pins) are formed on the upper surface of a quartz susceptor, and flash is applied to a semiconductor wafer that is supported by point contact with these support pins. A technique for heating is disclosed. In the apparatus disclosed in Patent Document 1, after a halogen lamp irradiates light from the lower surface of a semiconductor wafer placed on a susceptor and preheats, flash light is irradiated from the flash lamp to the wafer surface to perform flash heating.
 特許文献1に開示されるように、複数の支持ピンによって点接触で半導体ウェハーを支持すると、その接触箇所にて半導体ウェハーと支持ピンとの間に熱伝導が生じる。ハロゲンランプからの光照射によって予備加熱を行うときには、石英がほとんど光を吸収しないため、半導体ウェハーが石英のサセプタよりも高温となり、半導体ウェハーから支持ピンへの熱の移動が発生する。その結果、半導体ウェハー面内の複数の支持ピンとの接触箇所近傍において他の領域よりも相対的に温度が低くなっていた。 As disclosed in Patent Document 1, when a semiconductor wafer is supported by point contact with a plurality of support pins, heat conduction occurs between the semiconductor wafer and the support pins at the contact location. When preheating is performed by light irradiation from a halogen lamp, quartz hardly absorbs light, so that the temperature of the semiconductor wafer becomes higher than that of the quartz susceptor, and heat transfer from the semiconductor wafer to the support pins occurs. As a result, the temperature was relatively lower in the vicinity of the contact point with the plurality of support pins in the semiconductor wafer surface than in other regions.
 そこで、特許文献2には、レーザー光源から出射されたレーザー光を反射部によって支持ピンへと導き、温度低下が生じやすい支持ピンと半導体ウェハーとの接触箇所近傍を補助的に加熱して当該箇所の相対的な温度低下を防止することが提案されている。 Therefore, in Patent Document 2, the laser light emitted from the laser light source is guided to the support pin by the reflection portion, and the vicinity of the contact point between the support pin and the semiconductor wafer, where the temperature is likely to be lowered, is auxiliaryly heated. It has been proposed to prevent a relative temperature drop.
特開2009-164451号公報JP 2009-164451 A 特開2015-18909号公報Japanese Patent Laid-Open No. 2015-18909
 しかしながら、特許文献2に開示される装置においては、複数(支持ピンと同数)のレーザー光源をチャンバー内に設置する必要があった。雰囲気ガスの消費量を抑制する観点からは、チャンバー内の容量をなるべく少なくすることが求められており、多数のレーザー光源をチャンバー内に設置することが困難なこともある。また、半導体ウェハーを収容するチャンバー内には、汚染源となるおそれのある機器の設置を最小限に留めることが好ましい。 However, in the apparatus disclosed in Patent Document 2, it is necessary to install a plurality (the same number as the support pins) of laser light sources in the chamber. From the viewpoint of suppressing the consumption of atmospheric gas, it is required to reduce the volume in the chamber as much as possible, and it may be difficult to install a large number of laser light sources in the chamber. In addition, it is preferable to minimize the installation of equipment that may become a contamination source in the chamber that accommodates the semiconductor wafer.
 本発明は、上記課題に鑑みてなされたものであり、簡易な構成にて光照射時の基板面内の温度分布を均一にすることができる熱処理装置を提供することを目的とする。 The present invention has been made in view of the above problems, and an object of the present invention is to provide a heat treatment apparatus capable of making the temperature distribution in the substrate surface uniform during light irradiation with a simple configuration.
 上記課題を解決するため、この発明の第1の態様は、基板に光を照射することによって該基板を加熱する熱処理装置において、基板を収容するチャンバーと、前記チャンバー内にて、上面に立設された複数の支持ピンを介して基板を支持する石英の平板形状の保持プレートと、前記保持プレートに支持された基板に前記保持プレートを透過して光を照射する光照射部と、を備え、前記複数の支持ピンは、前記光照射部から照射された光を吸収する光吸収材料にて形成される。 In order to solve the above problems, a first aspect of the present invention is a heat treatment apparatus for heating a substrate by irradiating the substrate with light. A quartz flat plate-shaped holding plate that supports the substrate through the plurality of support pins, and a light irradiation unit that irradiates light through the holding plate to the substrate supported by the holding plate, The plurality of support pins are formed of a light absorbing material that absorbs light irradiated from the light irradiation unit.
 また、第2の態様は、基板に光を照射することによって該基板を加熱する熱処理装置において、基板を収容するチャンバーと、前記チャンバー内にて、上面に立設された複数の支持ピンを介して基板を支持する石英の平板形状の保持プレートと、前記保持プレートに支持された基板に前記保持プレートを透過して光を照射する光照射部と、を備え、前記複数の支持ピンの表面に前記光照射部から照射された光を吸収する光吸収材料にて形成された光吸収膜を設ける。 According to a second aspect, in a heat treatment apparatus for heating a substrate by irradiating the substrate with light, a chamber for accommodating the substrate and a plurality of support pins erected on the upper surface in the chamber are provided. A quartz plate-shaped holding plate that supports the substrate, and a light irradiating unit that irradiates the substrate with the light supported by the holding plate. A light absorption film formed of a light absorbing material that absorbs light irradiated from the light irradiation unit is provided.
 また、第3の態様は、基板に光を照射することによって該基板を加熱する熱処理装置において、基板を収容するチャンバーと、前記チャンバー内にて、上面に立設された複数の支持ピンを介して基板を支持する石英の平板形状の保持プレートと、前記保持プレートに支持された基板に前記保持プレートを透過して光を照射する光照射部と、を備え、前記複数の支持ピンと前記保持プレートとの間に前記光照射部から照射された光を吸収する光吸収材料にて形成された光吸収膜を挟み込む。 According to a third aspect, in a heat treatment apparatus for heating a substrate by irradiating the substrate with light, a chamber for accommodating the substrate and a plurality of support pins erected on the upper surface in the chamber are provided. A quartz plate-shaped holding plate that supports the substrate, and a light irradiation unit that irradiates the substrate with the light supported by the holding plate through the holding plate, the plurality of support pins and the holding plate A light-absorbing film formed of a light-absorbing material that absorbs light irradiated from the light irradiation unit is sandwiched between the two.
 また、第4の態様は、基板に光を照射することによって該基板を加熱する熱処理装置において、基板を収容するチャンバーと、前記チャンバー内にて、上面に立設された複数の支持ピンを介して基板を支持する石英の平板形状の保持プレートと、前記保持プレートに支持された基板に前記保持プレートを透過して光を照射する光照射部と、を備え、前記保持プレートの下面のうち前記複数の支持ピンと対向する領域に前記光照射部から照射された光を吸収する光吸収材料にて形成された光吸収膜を設ける。 According to a fourth aspect, in a heat treatment apparatus for heating a substrate by irradiating the substrate with light, a chamber for accommodating the substrate and a plurality of support pins erected on the upper surface in the chamber are provided. A quartz flat plate-shaped holding plate that supports the substrate, and a light irradiation unit that irradiates light through the holding plate to the substrate supported by the holding plate, and among the lower surfaces of the holding plate, A light absorption film formed of a light absorbing material that absorbs light emitted from the light irradiation unit is provided in a region facing the plurality of support pins.
 また、第5の態様は、基板に光を照射することによって該基板を加熱する熱処理装置において、基板を収容するチャンバーと、前記チャンバー内にて、上面に立設された複数の支持ピンを介して基板を支持する石英の平板形状の保持プレートと、前記保持プレートに支持された基板に前記保持プレートを透過して光を照射する光照射部と、を備え、前記保持プレートのうち前記複数の支持ピンが立設された部位を前記光照射部から照射された光を吸収する光吸収材料にて形成する。 According to a fifth aspect, in a heat treatment apparatus for heating a substrate by irradiating the substrate with light, a chamber for accommodating the substrate and a plurality of support pins erected on the upper surface in the chamber are provided. A quartz flat plate-shaped holding plate that supports the substrate, and a light irradiation unit that irradiates light through the holding plate to the substrate supported by the holding plate, and the plurality of the holding plates The portion where the support pin is erected is formed of a light absorbing material that absorbs light irradiated from the light irradiation section.
 また、第6の態様は、第1から第5のいずれかの態様に係る熱処理装置において、前記光吸収材料は不透明石英である。 Further, according to a sixth aspect, in the heat treatment apparatus according to any one of the first to fifth aspects, the light absorbing material is opaque quartz.
 また、第7の態様は、第6の態様に係る熱処理装置において、前記不透明石英は黒色合成石英である。 Further, according to a seventh aspect, in the heat treatment apparatus according to the sixth aspect, the opaque quartz is black synthetic quartz.
 また、第8の態様は、第1から第5のいずれかの態様に係る熱処理装置において、前記光吸収材料は炭化ケイ素である。 Further, according to an eighth aspect, in the heat treatment apparatus according to any one of the first to fifth aspects, the light absorbing material is silicon carbide.
 また、第9の態様は、第1から第8のいずれかの態様に係る熱処理装置において、前記光吸収材料を水平面に投影した形状は直径4mm以下の円形である。 Further, according to a ninth aspect, in the heat treatment apparatus according to any one of the first to eighth aspects, the shape of the light absorbing material projected onto a horizontal plane is a circle having a diameter of 4 mm or less.
 第1の態様に係る熱処理装置によれば、光照射部による加熱時には、複数の支持ピンが光照射部からの光を吸収して昇温するため、支持ピンと基板との接触箇所近傍における温度低下を抑制し、簡易な構成にて光照射時の基板面内の温度分布を均一にすることができる。 According to the heat treatment apparatus according to the first aspect, at the time of heating by the light irradiation unit, the plurality of support pins absorb the light from the light irradiation unit and raise the temperature, so that the temperature drop in the vicinity of the contact point between the support pin and the substrate The temperature distribution in the substrate surface at the time of light irradiation can be made uniform with a simple configuration.
 第2の態様に係る熱処理装置によれば、光照射部による加熱時には、複数の支持ピンの表面に設けられた光吸収膜が光照射部からの光を吸収して昇温するため、支持ピンと基板との接触箇所近傍における温度低下を抑制して簡易な構成にて光照射時の基板面内の温度分布を均一にすることができる。 According to the heat treatment apparatus according to the second aspect, at the time of heating by the light irradiation unit, the light absorption film provided on the surfaces of the plurality of support pins absorbs light from the light irradiation unit and raises the temperature. The temperature distribution in the vicinity of the contact point with the substrate can be suppressed, and the temperature distribution in the substrate surface during light irradiation can be made uniform with a simple configuration.
 第3の態様に係る熱処理装置によれば、光照射部による加熱時には、複数の支持ピンと保持プレートとの間に挟み込まれた光吸収膜が光照射部からの光を吸収して昇温し、光吸収膜から支持ピンへの伝熱が生じるため、支持ピンと基板との接触箇所近傍における温度低下を抑制して簡易な構成にて光照射時の基板面内の温度分布を均一にすることができる。 According to the heat treatment apparatus according to the third aspect, at the time of heating by the light irradiation unit, the light absorption film sandwiched between the plurality of support pins and the holding plate absorbs the light from the light irradiation unit and raises the temperature. Since heat transfer from the light absorption film to the support pins occurs, the temperature distribution in the vicinity of the contact point between the support pins and the substrate can be suppressed, and the temperature distribution in the substrate surface during light irradiation can be made uniform with a simple configuration. it can.
 第4の態様に係る熱処理装置によれば、光照射部による加熱時には、保持プレートの下面のうち複数の支持ピンと対向する領域に設けられた光吸収膜が光照射部からの光を吸収して昇温し、光吸収膜から支持ピンへの伝熱が生じるため、支持ピンと基板との接触箇所近傍における温度低下を抑制して簡易な構成にて光照射時の基板面内の温度分布を均一にすることができる。 According to the heat treatment apparatus according to the fourth aspect, at the time of heating by the light irradiation unit, the light absorption film provided in the region facing the plurality of support pins on the lower surface of the holding plate absorbs light from the light irradiation unit. Since the temperature rises and heat transfer from the light absorption film to the support pins occurs, temperature drop in the vicinity of the contact area between the support pins and the substrate is suppressed, and the temperature distribution in the substrate surface during light irradiation is uniform with a simple configuration Can be.
 第5の態様に係る熱処理装置によれば、光照射部による加熱時には、保持プレートのうち複数の支持ピンが立設された部位が光照射部からの光を吸収して昇温し、当該部位から支持ピンへの伝熱が生じるため、支持ピンと基板との接触箇所近傍における温度低下を抑制して簡易な構成にて光照射時の基板面内の温度分布を均一にすることができる。 According to the heat treatment apparatus according to the fifth aspect, at the time of heating by the light irradiation unit, the portion of the holding plate on which the plurality of support pins are erected absorbs the light from the light irradiation unit and rises in temperature. Therefore, the temperature distribution in the vicinity of the contact portion between the support pin and the substrate can be suppressed, and the temperature distribution in the substrate surface during light irradiation can be made uniform with a simple configuration.
 第7の態様に係る熱処理装置によれば、黒色合成石英は光の吸収率が高いため、支持ピンと基板との接触箇所近傍における温度低下をより効果的に抑制することができる。 According to the heat treatment apparatus according to the seventh aspect, since black synthetic quartz has a high light absorptance, it is possible to more effectively suppress a temperature decrease in the vicinity of the contact portion between the support pin and the substrate.
 第9の態様に係る熱処理装置によれば、光吸収材料を水平面に投影した形状は直径4mm以下の円形であるため、光吸収材料の遮光による影響を抑制しつつ、光吸収効果を得ることができる。 According to the heat treatment apparatus according to the ninth aspect, since the shape of the light absorption material projected onto the horizontal plane is a circle having a diameter of 4 mm or less, the light absorption effect can be obtained while suppressing the influence of light shielding of the light absorption material. it can.
本発明に係る熱処理装置の構成を示す縦断面図である。It is a longitudinal cross-sectional view which shows the structure of the heat processing apparatus which concerns on this invention. 保持部の全体外観を示す斜視図である。It is a perspective view which shows the whole external appearance of a holding | maintenance part. サセプタの平面図である。It is a top view of a susceptor. サセプタの断面図である。It is sectional drawing of a susceptor. 移載機構の平面図である。It is a top view of a transfer mechanism. 移載機構の側面図である。It is a side view of a transfer mechanism. 複数のハロゲンランプの配置を示す平面図である。It is a top view which shows arrangement | positioning of a some halogen lamp. 第1実施形態の基板支持ピンの近傍を拡大した図である。It is the figure which expanded the vicinity of the board | substrate support pin of 1st Embodiment. 第2実施形態の基板支持ピンの近傍を拡大した図である。It is the figure which expanded the vicinity of the board | substrate support pin of 2nd Embodiment. 第3実施形態の基板支持ピンの近傍を拡大した図である。It is the figure which expanded the vicinity of the board | substrate support pin of 3rd Embodiment. 第4実施形態の基板支持ピンの近傍を拡大した図である。It is the figure which expanded the vicinity of the board | substrate support pin of 4th Embodiment. 第5実施形態の基板支持ピンの近傍を拡大した図である。It is the figure which expanded the vicinity of the board | substrate support pin of 5th Embodiment.
 以下、図面を参照しつつ本発明の実施の形態について詳細に説明する。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
  <第1実施形態>
 図1は、本発明に係る熱処理装置1の構成を示す縦断面図である。本実施形態の熱処理装置1は、基板として円板形状の半導体ウェハーWに対してフラッシュ光照射を行うことによってその半導体ウェハーWを加熱するフラッシュランプアニール装置である。処理対象となる半導体ウェハーWのサイズは特に限定されるものではないが、例えばφ300mmやφ450mmである。なお、図1および以降の各図においては、理解容易のため、必要に応じて各部の寸法や数を誇張または簡略化して描いている。
<First Embodiment>
FIG. 1 is a longitudinal sectional view showing a configuration of a heat treatment apparatus 1 according to the present invention. The heat treatment apparatus 1 of the present embodiment is a flash lamp annealing apparatus that heats a semiconductor wafer W by irradiating a disk-shaped semiconductor wafer W as a substrate with flash light irradiation. The size of the semiconductor wafer W to be processed is not particularly limited, and is, for example, φ300 mm or φ450 mm. In FIG. 1 and the subsequent drawings, the size and number of each part are exaggerated or simplified as necessary for easy understanding.
 熱処理装置1は、半導体ウェハーWを収容するチャンバー6と、複数のフラッシュランプFLを内蔵するフラッシュ加熱部5と、複数のハロゲンランプHLを内蔵するハロゲン加熱部4と、を備える。チャンバー6の上側にフラッシュ加熱部5が設けられるとともに、下側にハロゲン加熱部4が設けられている。また、熱処理装置1は、チャンバー6の内部に、半導体ウェハーWを水平姿勢に保持する保持部7と、保持部7と装置外部との間で半導体ウェハーWの受け渡しを行う移載機構10と、を備える。さらに、熱処理装置1は、ハロゲン加熱部4、フラッシュ加熱部5およびチャンバー6に設けられた各動作機構を制御して半導体ウェハーWの熱処理を実行させる制御部3を備える。 The heat treatment apparatus 1 includes a chamber 6 that accommodates a semiconductor wafer W, a flash heating unit 5 that houses a plurality of flash lamps FL, and a halogen heating unit 4 that houses a plurality of halogen lamps HL. A flash heating unit 5 is provided on the upper side of the chamber 6, and a halogen heating unit 4 is provided on the lower side. The heat treatment apparatus 1 includes a holding unit 7 that holds the semiconductor wafer W in a horizontal posture inside the chamber 6, and a transfer mechanism 10 that transfers the semiconductor wafer W between the holding unit 7 and the outside of the apparatus, Is provided. Furthermore, the heat treatment apparatus 1 includes a control unit 3 that controls the operation mechanisms provided in the halogen heating unit 4, the flash heating unit 5, and the chamber 6 to perform the heat treatment of the semiconductor wafer W.
 チャンバー6は、筒状のチャンバー側部61の上下に石英製のチャンバー窓を装着して構成されている。チャンバー側部61は上下が開口された概略筒形状を有しており、上側開口には上側チャンバー窓63が装着されて閉塞され、下側開口には下側チャンバー窓64が装着されて閉塞されている。チャンバー6の天井部を構成する上側チャンバー窓63は、石英により形成された円板形状部材であり、フラッシュ加熱部5から出射されたフラッシュ光をチャンバー6内に透過する石英窓として機能する。また、チャンバー6の床部を構成する下側チャンバー窓64も、石英により形成された円板形状部材であり、ハロゲン加熱部4からの光をチャンバー6内に透過する石英窓として機能する。 The chamber 6 is configured by mounting quartz chamber windows on the upper and lower sides of the cylindrical chamber side portion 61. The chamber side portion 61 has a substantially cylindrical shape with upper and lower openings. The upper opening is closed by an upper chamber window 63 and the lower opening is closed by a lower chamber window 64. ing. The upper chamber window 63 constituting the ceiling of the chamber 6 is a disk-shaped member made of quartz and functions as a quartz window that transmits the flash light emitted from the flash heating unit 5 into the chamber 6. The lower chamber window 64 constituting the floor portion of the chamber 6 is also a disk-shaped member made of quartz and functions as a quartz window that transmits light from the halogen heating unit 4 into the chamber 6.
 また、チャンバー側部61の内側の壁面の上部には反射リング68が装着され、下部には反射リング69が装着されている。反射リング68,69は、ともに円環状に形成されている。上側の反射リング68は、チャンバー側部61の上側から嵌め込むことによって装着される。一方、下側の反射リング69は、チャンバー側部61の下側から嵌め込んで図示省略のビスで留めることによって装着される。すなわち、反射リング68,69は、ともに着脱自在にチャンバー側部61に装着されるものである。チャンバー6の内側空間、すなわち上側チャンバー窓63、下側チャンバー窓64、チャンバー側部61および反射リング68,69によって囲まれる空間が熱処理空間65として規定される。 Further, a reflection ring 68 is attached to the upper part of the inner wall surface of the chamber side part 61, and a reflection ring 69 is attached to the lower part. The reflection rings 68 and 69 are both formed in an annular shape. The upper reflecting ring 68 is attached by fitting from above the chamber side portion 61. On the other hand, the lower reflection ring 69 is mounted by being fitted from the lower side of the chamber side portion 61 and fastened with a screw (not shown). That is, the reflection rings 68 and 69 are both detachably attached to the chamber side portion 61. An inner space of the chamber 6, that is, a space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side portion 61, and the reflection rings 68 and 69 is defined as a heat treatment space 65.
 チャンバー側部61に反射リング68,69が装着されることによって、チャンバー6の内壁面に凹部62が形成される。すなわち、チャンバー側部61の内壁面のうち反射リング68,69が装着されていない中央部分と、反射リング68の下端面と、反射リング69の上端面とで囲まれた凹部62が形成される。凹部62は、チャンバー6の内壁面に水平方向に沿って円環状に形成され、半導体ウェハーWを保持する保持部7を囲繞する。チャンバー側部61および反射リング68,69は、強度と耐熱性に優れた金属材料(例えば、ステンレススチール)にて形成されている。 The recesses 62 are formed on the inner wall surface of the chamber 6 by attaching the reflection rings 68 and 69 to the chamber side portion 61. That is, a recess 62 surrounded by a central portion of the inner wall surface of the chamber side portion 61 where the reflection rings 68 and 69 are not mounted, a lower end surface of the reflection ring 68, and an upper end surface of the reflection ring 69 is formed. . The recess 62 is formed in an annular shape along the horizontal direction on the inner wall surface of the chamber 6, and surrounds the holding portion 7 that holds the semiconductor wafer W. The chamber side portion 61 and the reflection rings 68 and 69 are formed of a metal material (for example, stainless steel) having excellent strength and heat resistance.
 また、チャンバー側部61には、チャンバー6に対して半導体ウェハーWの搬入および搬出を行うための搬送開口部(炉口)66が形設されている。搬送開口部66は、ゲートバルブ185によって開閉可能とされている。搬送開口部66は凹部62の外周面に連通接続されている。このため、ゲートバルブ185が搬送開口部66を開放しているときには、搬送開口部66から凹部62を通過して熱処理空間65への半導体ウェハーWの搬入および熱処理空間65からの半導体ウェハーWの搬出を行うことができる。また、ゲートバルブ185が搬送開口部66を閉鎖するとチャンバー6内の熱処理空間65が密閉空間とされる。 Further, the chamber side portion 61 is formed with a transfer opening (furnace port) 66 for carrying the semiconductor wafer W into and out of the chamber 6. The transfer opening 66 can be opened and closed by a gate valve 185. The transport opening 66 is connected to the outer peripheral surface of the recess 62. Therefore, when the gate valve 185 opens the transfer opening 66, the semiconductor wafer W is carried into the heat treatment space 65 through the recess 62 from the transfer opening 66 and the semiconductor wafer W is carried out from the heat treatment space 65. It can be performed. Further, when the gate valve 185 closes the transfer opening 66, the heat treatment space 65 in the chamber 6 becomes a sealed space.
 また、チャンバー6の内壁上部には熱処理空間65に処理ガスを供給するガス供給孔81が形設されている。ガス供給孔81は、凹部62よりも上側位置に形設されており、反射リング68に設けられていても良い。ガス供給孔81はチャンバー6の側壁内部に円環状に形成された緩衝空間82を介してガス供給管83に連通接続されている。ガス供給管83は処理ガス供給源85に接続されている。また、ガス供給管83の経路途中にはバルブ84が介挿されている。バルブ84が開放されると、処理ガス供給源85から緩衝空間82に処理ガスが送給される。緩衝空間82に流入した処理ガスは、ガス供給孔81よりも流体抵抗の小さい緩衝空間82内を拡がるように流れてガス供給孔81から熱処理空間65内へと供給される。処理ガスとしては、窒素(N)等の不活性ガス、または、水素(H)、アンモニア(NH)等の反応性ガスを用いることができる(本実施形態では窒素)。 A gas supply hole 81 for supplying a processing gas to the heat treatment space 65 is formed in the upper portion of the inner wall of the chamber 6. The gas supply hole 81 is formed at a position above the recess 62 and may be provided in the reflection ring 68. The gas supply hole 81 is connected to a gas supply pipe 83 through a buffer space 82 formed in an annular shape inside the side wall of the chamber 6. The gas supply pipe 83 is connected to a processing gas supply source 85. A valve 84 is inserted in the middle of the path of the gas supply pipe 83. When the valve 84 is opened, the processing gas is supplied from the processing gas supply source 85 to the buffer space 82. The processing gas flowing into the buffer space 82 flows so as to expand in the buffer space 82 having a smaller fluid resistance than the gas supply hole 81 and is supplied from the gas supply hole 81 into the heat treatment space 65. As the processing gas, an inert gas such as nitrogen (N 2 ) or a reactive gas such as hydrogen (H 2 ) or ammonia (NH 3 ) can be used (nitrogen in this embodiment).
 一方、チャンバー6の内壁下部には熱処理空間65内の気体を排気するガス排気孔86が形設されている。ガス排気孔86は、凹部62よりも下側位置に形設されており、反射リング69に設けられていても良い。ガス排気孔86はチャンバー6の側壁内部に円環状に形成された緩衝空間87を介してガス排気管88に連通接続されている。ガス排気管88は排気部190に接続されている。また、ガス排気管88の経路途中にはバルブ89が介挿されている。バルブ89が開放されると、熱処理空間65の気体がガス排気孔86から緩衝空間87を経てガス排気管88へと排出される。なお、ガス供給孔81およびガス排気孔86は、チャンバー6の周方向に沿って複数設けられていても良いし、スリット状のものであっても良い。また、処理ガス供給源85および排気部190は、熱処理装置1に設けられた機構であっても良いし、熱処理装置1が設置される工場のユーティリティであっても良い。 On the other hand, a gas exhaust hole 86 for exhausting the gas in the heat treatment space 65 is formed in the lower portion of the inner wall of the chamber 6. The gas exhaust hole 86 is formed at a position lower than the recess 62 and may be provided in the reflection ring 69. The gas exhaust hole 86 is connected to a gas exhaust pipe 88 through a buffer space 87 formed in an annular shape inside the side wall of the chamber 6. The gas exhaust pipe 88 is connected to the exhaust unit 190. A valve 89 is inserted in the middle of the path of the gas exhaust pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas exhaust hole 86 to the gas exhaust pipe 88 through the buffer space 87. A plurality of gas supply holes 81 and gas exhaust holes 86 may be provided along the circumferential direction of the chamber 6 or may be slit-shaped. Further, the processing gas supply source 85 and the exhaust unit 190 may be a mechanism provided in the heat treatment apparatus 1 or may be a utility of a factory where the heat treatment apparatus 1 is installed.
 また、搬送開口部66の先端にも熱処理空間65内の気体を排出するガス排気管191が接続されている。ガス排気管191はバルブ192を介して排気部190に接続されている。バルブ192を開放することによって、搬送開口部66を介してチャンバー6内の気体が排気される。 Also, a gas exhaust pipe 191 for discharging the gas in the heat treatment space 65 is connected to the tip of the transfer opening 66. The gas exhaust pipe 191 is connected to the exhaust unit 190 via a valve 192. By opening the valve 192, the gas in the chamber 6 is exhausted through the transfer opening 66.
 図2は、保持部7の全体外観を示す斜視図である。保持部7は、基台リング71、連結部72およびサセプタ74を備えて構成される。基台リング71、連結部72およびサセプタ74はいずれも石英にて形成されている。すなわち、保持部7の全体が石英にて形成されている。 FIG. 2 is a perspective view showing the overall appearance of the holding unit 7. The holding part 7 includes a base ring 71, a connecting part 72, and a susceptor 74. The base ring 71, the connecting portion 72, and the susceptor 74 are all made of quartz. That is, the whole holding part 7 is made of quartz.
 基台リング71は円環形状から一部が欠落した円弧形状の石英部材である。この欠落部分は、後述する移載機構10の移載アーム11と基台リング71との干渉を防ぐために設けられている。基台リング71は凹部62の底面に載置されることによって、チャンバー6の壁面に支持されることとなる(図1参照)。基台リング71の上面に、その円環形状の周方向に沿って複数の連結部72(本実施形態では4個)が立設される。連結部72も石英の部材であり、溶接によって基台リング71に固着される。 The base ring 71 is an arc-shaped quartz member in which a part is omitted from the annular shape. This missing portion is provided to prevent interference between a transfer arm 11 and a base ring 71 of the transfer mechanism 10 described later. The base ring 71 is supported on the wall surface of the chamber 6 by being placed on the bottom surface of the recess 62 (see FIG. 1). On the upper surface of the base ring 71, a plurality of connecting portions 72 (four in this embodiment) are erected along the annular circumferential direction. The connecting portion 72 is also a quartz member, and is fixed to the base ring 71 by welding.
 サセプタ74は基台リング71に設けられた4個の連結部72によって支持される。図3は、サセプタ74の平面図である。また、図4は、サセプタ74の断面図である。サセプタ74は、保持プレート75、ガイドリング76および複数の基板支持ピン77を備える。保持プレート75は、石英にて形成された略円形の平板状部材である。保持プレート75の直径は半導体ウェハーWの直径よりも大きい。すなわち、保持プレート75は、半導体ウェハーWよりも大きな平面サイズを有する。 The susceptor 74 is supported by four connecting portions 72 provided on the base ring 71. FIG. 3 is a plan view of the susceptor 74. FIG. 4 is a cross-sectional view of the susceptor 74. The susceptor 74 includes a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77. The holding plate 75 is a substantially circular flat plate member made of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. That is, the holding plate 75 has a larger planar size than the semiconductor wafer W.
 保持プレート75の上面周縁部にガイドリング76が設置されている。ガイドリング76は、半導体ウェハーWの直径よりも大きな内径を有する円環形状の部材である。例えば、半導体ウェハーWの直径がφ300mmの場合、ガイドリング76の内径はφ320mmである。ガイドリング76の内周は、保持プレート75から上方に向けて広くなるようなテーパ面とされている。ガイドリング76は、保持プレート75と同様の石英にて形成される。ガイドリング76は、保持プレート75の上面に溶着するようにしても良いし、別途加工したピンなどによって保持プレート75に固定するようにしても良い。或いは、保持プレート75とガイドリング76とを一体の部材として加工するようにしても良い。 A guide ring 76 is installed on the periphery of the upper surface of the holding plate 75. The guide ring 76 is an annular member having an inner diameter larger than the diameter of the semiconductor wafer W. For example, when the diameter of the semiconductor wafer W is φ300 mm, the inner diameter of the guide ring 76 is φ320 mm. The inner periphery of the guide ring 76 has a tapered surface that widens upward from the holding plate 75. The guide ring 76 is formed of quartz similar to the holding plate 75. The guide ring 76 may be welded to the upper surface of the holding plate 75, or may be fixed to the holding plate 75 with a separately processed pin or the like. Alternatively, the holding plate 75 and the guide ring 76 may be processed as an integral member.
 保持プレート75の上面のうちガイドリング76よりも内側の領域が半導体ウェハーWを保持する平面状の保持面75aとされる。保持プレート75の保持面75aには、複数の基板支持ピン77が立設されている。本実施形態においては、保持面75aの外周円(ガイドリング76の内周円)と同心円の周上に沿って30°毎に計12個の基板支持ピン77が立設されている。12個の基板支持ピン77を配置した円の径(対向する基板支持ピン77間の距離)は半導体ウェハーWの径よりも小さく、半導体ウェハーWの径がφ300mmであればφ270mm~φ280mm(本実施形態ではφ280mm)である。第1実施形態においては、それぞれの基板支持ピン77は不透明石英にて形成されている。不透明石英は、例えば、石英材料内に多数の微細な気泡を含有させることによって得られる。不透明石英としては、例えば、信越石英株式会社製のOM-100、東ソー・クォーツ株式会社製のOP-3等を用いることができる。 The region inside the guide ring 76 on the upper surface of the holding plate 75 is a flat holding surface 75a for holding the semiconductor wafer W. A plurality of substrate support pins 77 are provided upright on the holding surface 75 a of the holding plate 75. In the present embodiment, a total of twelve substrate support pins 77 are erected every 30 ° along a circumference concentric with the outer circumference of the holding surface 75a (the inner circumference of the guide ring 76). The diameter of the circle on which the 12 substrate support pins 77 are arranged (distance between the opposing substrate support pins 77) is smaller than the diameter of the semiconductor wafer W. If the diameter of the semiconductor wafer W is 300 mm, then 270 mm to 280 mm (this embodiment) In the form, φ280 mm). In the first embodiment, each substrate support pin 77 is made of opaque quartz. Opaque quartz is obtained, for example, by including a large number of fine bubbles in a quartz material. As the opaque quartz, for example, OM-100 manufactured by Shin-Etsu Quartz Co., Ltd., OP-3 manufactured by Tosoh Quartz Co., Ltd., or the like can be used.
 図2に戻り、基台リング71に立設された4個の連結部72とサセプタ74の保持プレート75の周縁部とが溶接によって固着される。すなわち、サセプタ74と基台リング71とは連結部72によって固定的に連結されている。このような保持部7の基台リング71がチャンバー6の壁面に支持されることによって、保持部7がチャンバー6に装着される。保持部7がチャンバー6に装着された状態においては、サセプタ74の保持プレート75は水平姿勢(法線が鉛直方向と一致する姿勢)となる。すなわち、保持プレート75の保持面75aは水平面となる。また、保持プレート75の上面に立設された12本の基板支持ピン77のそれぞれを水平面に投影した形状は直径4mm以下の円形である。 Referring back to FIG. 2, the four connecting portions 72 erected on the base ring 71 and the peripheral portion of the holding plate 75 of the susceptor 74 are fixed by welding. That is, the susceptor 74 and the base ring 71 are fixedly connected by the connecting portion 72. When the base ring 71 of the holding unit 7 is supported on the wall surface of the chamber 6, the holding unit 7 is attached to the chamber 6. In a state where the holding unit 7 is mounted on the chamber 6, the holding plate 75 of the susceptor 74 is in a horizontal posture (a posture in which the normal line matches the vertical direction). That is, the holding surface 75a of the holding plate 75 is a horizontal plane. Further, the shape of each of the 12 substrate support pins 77 erected on the upper surface of the holding plate 75 is projected on a horizontal plane is a circle having a diameter of 4 mm or less.
 チャンバー6に搬入された半導体ウェハーWは、チャンバー6に装着された保持部7のサセプタ74の上に水平姿勢にて載置されて保持される。このとき、半導体ウェハーWは保持プレート75上に立設された12個の基板支持ピン77によって支持されてサセプタ74に保持される。より厳密には、12個の基板支持ピン77の上端部が半導体ウェハーWの下面に接触して当該半導体ウェハーWを支持する。12個の基板支持ピン77の高さ(基板支持ピン77の上端から保持プレート75の保持面75aまでの距離)は均一であるため、12個の基板支持ピン77によって半導体ウェハーWを水平姿勢に支持することができる。 The semiconductor wafer W carried into the chamber 6 is placed and held in a horizontal posture on the susceptor 74 of the holding unit 7 attached to the chamber 6. At this time, the semiconductor wafer W is supported by twelve substrate support pins 77 erected on the holding plate 75 and held by the susceptor 74. More precisely, the upper ends of the twelve substrate support pins 77 are in contact with the lower surface of the semiconductor wafer W to support the semiconductor wafer W. Since the height of the 12 substrate support pins 77 (the distance from the upper end of the substrate support pin 77 to the holding surface 75a of the holding plate 75) is uniform, the semiconductor wafer W is placed in a horizontal posture by the 12 substrate support pins 77. Can be supported.
 また、半導体ウェハーWは複数の基板支持ピン77によって保持プレート75の保持面75aから所定の間隔を隔てて支持されることとなる。基板支持ピン77の高さよりもガイドリング76の厚さの方が大きい。従って、複数の基板支持ピン77によって支持された半導体ウェハーWの水平方向の位置ずれはガイドリング76によって防止される。 Further, the semiconductor wafer W is supported by the plurality of substrate support pins 77 at a predetermined interval from the holding surface 75a of the holding plate 75. The thickness of the guide ring 76 is greater than the height of the substrate support pins 77. Accordingly, the horizontal displacement of the semiconductor wafer W supported by the plurality of substrate support pins 77 is prevented by the guide ring 76.
 また、図2および図3に示すように、サセプタ74の保持プレート75には、上下に貫通して開口部78が形成されている。開口部78は、放射温度計120(図1参照)がサセプタ74に保持された半導体ウェハーWの下面から放射される放射光(赤外光)を受光するために設けられている。すなわち、放射温度計120が開口部78を介してサセプタ74に保持された半導体ウェハーWの下面から放射された光を受光し、別置のディテクタによってその半導体ウェハーWの温度が測定される。さらに、サセプタ74の保持プレート75には、後述する移載機構10のリフトピン12が半導体ウェハーWの受け渡しのために貫通する4個の貫通孔79が穿設されている。 As shown in FIGS. 2 and 3, the holding plate 75 of the susceptor 74 has an opening 78 penetrating vertically. The opening 78 is provided for the radiation thermometer 120 (see FIG. 1) to receive radiated light (infrared light) emitted from the lower surface of the semiconductor wafer W held by the susceptor 74. That is, the radiation thermometer 120 receives light emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78, and the temperature of the semiconductor wafer W is measured by a separate detector. Further, the holding plate 75 of the susceptor 74 is provided with four through holes 79 through which lift pins 12 of the transfer mechanism 10 to be described later penetrate for the delivery of the semiconductor wafer W.
 図5は、移載機構10の平面図である。また、図6は、移載機構10の側面図である。移載機構10は、2本の移載アーム11を備える。移載アーム11は、概ね円環状の凹部62に沿うような円弧形状とされている。それぞれの移載アーム11には2本のリフトピン12が立設されている。各移載アーム11は水平移動機構13によって回動可能とされている。水平移動機構13は、一対の移載アーム11を保持部7に対して半導体ウェハーWの移載を行う移載動作位置(図5の実線位置)と保持部7に保持された半導体ウェハーWと平面視で重ならない退避位置(図5の二点鎖線位置)との間で水平移動させる。水平移動機構13としては、個別のモータによって各移載アーム11をそれぞれ回動させるものであっても良いし、リンク機構を用いて1個のモータによって一対の移載アーム11を連動させて回動させるものであっても良い。 FIG. 5 is a plan view of the transfer mechanism 10. FIG. 6 is a side view of the transfer mechanism 10. The transfer mechanism 10 includes two transfer arms 11. The transfer arm 11 has an arc shape that follows the generally annular recess 62. Two lift pins 12 are erected on each transfer arm 11. Each transfer arm 11 can be rotated by a horizontal movement mechanism 13. The horizontal movement mechanism 13 includes a transfer operation position (a position indicated by a solid line in FIG. 5) for transferring the pair of transfer arms 11 to the holding unit 7 and the semiconductor wafer W held by the holding unit 7. It is moved horizontally between the retracted positions (two-dot chain line positions in FIG. 5) that do not overlap in plan view. As the horizontal movement mechanism 13, each transfer arm 11 may be rotated by an individual motor, or a pair of transfer arms 11 may be interlocked by a single motor using a link mechanism. It may be moved.
 また、一対の移載アーム11は、昇降機構14によって水平移動機構13とともに昇降移動される。昇降機構14が一対の移載アーム11を移載動作位置にて上昇させると、計4本のリフトピン12がサセプタ74に穿設された貫通孔79(図2,3参照)を通過し、リフトピン12の上端がサセプタ74の上面から突き出る。一方、昇降機構14が一対の移載アーム11を移載動作位置にて下降させてリフトピン12を貫通孔79から抜き取り、水平移動機構13が一対の移載アーム11を開くように移動させると各移載アーム11が退避位置に移動する。一対の移載アーム11の退避位置は、保持部7の基台リング71の直上である。基台リング71は凹部62の底面に載置されているため、移載アーム11の退避位置は凹部62の内側となる。なお、移載機構10の駆動部(水平移動機構13および昇降機構14)が設けられている部位の近傍にも図示省略の排気機構が設けられており、移載機構10の駆動部周辺の雰囲気がチャンバー6の外部に排出されるように構成されている。 Also, the pair of transfer arms 11 is moved up and down together with the horizontal moving mechanism 13 by the lifting mechanism 14. When the elevating mechanism 14 raises the pair of transfer arms 11 at the transfer operation position, a total of four lift pins 12 pass through the through holes 79 (see FIGS. 2 and 3) formed in the susceptor 74, and the lift pins The upper end of 12 protrudes from the upper surface of the susceptor 74. On the other hand, when the elevating mechanism 14 lowers the pair of transfer arms 11 at the transfer operation position, the lift pins 12 are extracted from the through holes 79, and the horizontal movement mechanism 13 moves the pair of transfer arms 11 so as to open each of them. The transfer arm 11 moves to the retracted position. The retracted position of the pair of transfer arms 11 is directly above the base ring 71 of the holding unit 7. Since the base ring 71 is placed on the bottom surface of the recess 62, the retracted position of the transfer arm 11 is inside the recess 62. Note that an exhaust mechanism (not shown) is also provided in the vicinity of a portion where the drive unit (the horizontal movement mechanism 13 and the lifting mechanism 14) of the transfer mechanism 10 is provided, and the atmosphere around the drive unit of the transfer mechanism 10 is provided. Is discharged to the outside of the chamber 6.
 図1に戻り、チャンバー6の上方に設けられたフラッシュ加熱部5は、筐体51の内側に、複数本(本実施形態では30本)のキセノンフラッシュランプFLからなる光源と、その光源の上方を覆うように設けられたリフレクタ52と、を備えて構成される。また、フラッシュ加熱部5の筐体51の底部にはランプ光放射窓53が装着されている。フラッシュ加熱部5の床部を構成するランプ光放射窓53は、石英により形成された板状の石英窓である。フラッシュ加熱部5がチャンバー6の上方に設置されることにより、ランプ光放射窓53が上側チャンバー窓63と相対向することとなる。フラッシュランプFLはチャンバー6の上方からランプ光放射窓53および上側チャンバー窓63を介して熱処理空間65にフラッシュ光を照射する。 Returning to FIG. 1, the flash heating unit 5 provided above the chamber 6 includes a light source including a plurality of (30 in the present embodiment) xenon flash lamps FL inside the housing 51, and an upper part of the light source. And a reflector 52 provided so as to cover. A lamp light emission window 53 is mounted on the bottom of the casing 51 of the flash heating unit 5. The lamp light emission window 53 constituting the floor of the flash heating unit 5 is a plate-like quartz window made of quartz. By installing the flash heating unit 5 above the chamber 6, the lamp light emission window 53 faces the upper chamber window 63. The flash lamp FL irradiates the heat treatment space 65 with flash light from above the chamber 6 through the lamp light emission window 53 and the upper chamber window 63.
 複数のフラッシュランプFLは、それぞれが長尺の円筒形状を有する棒状ランプであり、それぞれの長手方向が保持部7に保持される半導体ウェハーWの主面に沿って(つまり水平方向に沿って)互いに平行となるように平面状に配列されている。よって、フラッシュランプFLの配列によって形成される平面も水平面である。 Each of the plurality of flash lamps FL is a rod-shaped lamp having a long cylindrical shape, and the longitudinal direction of each of the flash lamps FL is along the main surface of the semiconductor wafer W held by the holding unit 7 (that is, along the horizontal direction). They are arranged in a plane so as to be parallel to each other. Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane.
 キセノンフラッシュランプFLは、その内部にキセノンガスが封入されその両端部にコンデンサーに接続された陽極および陰極が配設された棒状のガラス管(放電管)と、該ガラス管の外周面上に付設されたトリガー電極とを備える。キセノンガスは電気的には絶縁体であることから、コンデンサーに電荷が蓄積されていたとしても通常の状態ではガラス管内に電気は流れない。しかしながら、トリガー電極に高電圧を印加して絶縁を破壊した場合には、コンデンサーに蓄えられた電気がガラス管内に瞬時に流れ、そのときのキセノンの原子あるいは分子の励起によって光が放出される。このようなキセノンフラッシュランプFLにおいては、予めコンデンサーに蓄えられていた静電エネルギーが0.1ミリセカンドないし100ミリセカンドという極めて短い光パルスに変換されることから、ハロゲンランプHLの如き連続点灯の光源に比べて極めて強い光を照射し得るという特徴を有する。すなわち、フラッシュランプFLは、1秒未満の極めて短い時間で瞬間的に発光するパルス発光ランプである。なお、フラッシュランプFLの発光時間は、フラッシュランプFLに電力供給を行うランプ電源のコイル定数によって調整することができる。 The xenon flash lamp FL has a rod-shaped glass tube (discharge tube) in which xenon gas is sealed and an anode and a cathode connected to a capacitor at both ends thereof, and an outer peripheral surface of the glass tube. And a triggered electrode. Since xenon gas is an electrical insulator, electricity does not flow into the glass tube under normal conditions even if electric charges are accumulated in the capacitor. However, when the insulation is broken by applying a high voltage to the trigger electrode, the electricity stored in the capacitor flows instantaneously in the glass tube, and light is emitted by excitation of atoms or molecules of xenon at that time. In such a xenon flash lamp FL, the electrostatic energy previously stored in the capacitor is converted into an extremely short light pulse of 0.1 to 100 milliseconds, so that the continuous lighting such as the halogen lamp HL is possible. It has the characteristic that it can irradiate extremely strong light compared with a light source. That is, the flash lamp FL is a pulse light emitting lamp that emits light instantaneously in an extremely short time of less than 1 second. The light emission time of the flash lamp FL can be adjusted by the coil constant of the lamp power source that supplies power to the flash lamp FL.
 また、リフレクタ52は、複数のフラッシュランプFLの上方にそれら全体を覆うように設けられている。リフレクタ52の基本的な機能は、複数のフラッシュランプFLから出射されたフラッシュ光を熱処理空間65の側に反射するというものである。リフレクタ52はアルミニウム合金板にて形成されており、その表面(フラッシュランプFLに臨む側の面)はブラスト処理により粗面化加工が施されている。 Further, the reflector 52 is provided above the plurality of flash lamps FL so as to cover the whole. The basic function of the reflector 52 is to reflect the flash light emitted from the plurality of flash lamps FL toward the heat treatment space 65. The reflector 52 is formed of an aluminum alloy plate, and the surface (the surface facing the flash lamp FL) is roughened by blasting.
 チャンバー6の下方に設けられたハロゲン加熱部4は、筐体41の内側に複数本(本実施形態では40本)のハロゲンランプHLを内蔵している。ハロゲン加熱部4は、複数のハロゲンランプHLによってチャンバー6の下方から下側チャンバー窓64を介して熱処理空間65への光照射を行って半導体ウェハーWを加熱する光照射部である。 The halogen heating unit 4 provided below the chamber 6 incorporates a plurality (40 in the present embodiment) of halogen lamps HL inside the housing 41. The halogen heating unit 4 is a light irradiation unit that heats the semiconductor wafer W by irradiating the heat treatment space 65 from below the chamber 6 through the lower chamber window 64 with a plurality of halogen lamps HL.
 図7は、複数のハロゲンランプHLの配置を示す平面図である。40本のハロゲンランプHLは上下2段に分けて配置されている。保持部7に近い上段に20本のハロゲンランプHLが配設されるとともに、上段よりも保持部7から遠い下段にも20本のハロゲンランプHLが配設されている。各ハロゲンランプHLは、長尺の円筒形状を有する棒状ランプである。上段、下段ともに20本のハロゲンランプHLは、それぞれの長手方向が保持部7に保持される半導体ウェハーWの主面に沿って(つまり水平方向に沿って)互いに平行となるように配列されている。よって、上段、下段ともにハロゲンランプHLの配列によって形成される平面は水平面である。 FIG. 7 is a plan view showing the arrangement of a plurality of halogen lamps HL. Forty halogen lamps HL are arranged in two upper and lower stages. Twenty halogen lamps HL are arranged on the upper stage close to the holding unit 7, and twenty halogen lamps HL are arranged on the lower stage farther from the holding unit 7 than the upper stage. Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape. The 20 halogen lamps HL in both the upper and lower stages are arranged so that their longitudinal directions are parallel to each other along the main surface of the semiconductor wafer W held by the holding unit 7 (that is, along the horizontal direction). Yes. Therefore, the plane formed by the arrangement of the halogen lamps HL in both the upper stage and the lower stage is a horizontal plane.
 また、図7に示すように、上段、下段ともに保持部7に保持される半導体ウェハーWの中央部に対向する領域よりも周縁部に対向する領域におけるハロゲンランプHLの配設密度が高くなっている。すなわち、上下段ともに、ランプ配列の中央部よりも周縁部の方がハロゲンランプHLの配設ピッチが短い。このため、ハロゲン加熱部4からの光照射による加熱時に温度低下が生じやすい半導体ウェハーWの周縁部により多い光量の照射を行うことができる。 Further, as shown in FIG. 7, the arrangement density of the halogen lamps HL in the region facing the peripheral portion is higher than the region facing the central portion of the semiconductor wafer W held by the holding portion 7 in both the upper stage and the lower stage. Yes. That is, in both the upper and lower stages, the arrangement pitch of the halogen lamps HL is shorter in the peripheral part than in the central part of the lamp array. For this reason, it is possible to irradiate a larger amount of light to the peripheral portion of the semiconductor wafer W where the temperature is likely to decrease during heating by light irradiation from the halogen heating unit 4.
 また、上段のハロゲンランプHLからなるランプ群と下段のハロゲンランプHLからなるランプ群とが格子状に交差するように配列されている。すなわち、上段に配置された20本のハロゲンランプHLの長手方向と下段に配置された20本のハロゲンランプHLの長手方向とが互いに直交するように計40本のハロゲンランプHLが配設されている。 Further, the lamp group composed of the upper halogen lamp HL and the lamp group composed of the lower halogen lamp HL are arranged so as to intersect in a lattice pattern. That is, a total of 40 halogen lamps HL are arranged so that the longitudinal direction of the 20 halogen lamps HL arranged in the upper stage and the longitudinal direction of the 20 halogen lamps HL arranged in the lower stage are orthogonal to each other. Yes.
 ハロゲンランプHLは、ガラス管内部に配設されたフィラメントに通電することでフィラメントを白熱化させて発光させるフィラメント方式の光源である。ガラス管の内部には、窒素やアルゴン等の不活性ガスにハロゲン元素(ヨウ素、臭素等)を微量導入した気体が封入されている。ハロゲン元素を導入することによって、フィラメントの折損を抑制しつつフィラメントの温度を高温に設定することが可能となる。したがって、ハロゲンランプHLは、通常の白熱電球に比べて寿命が長くかつ強い光を連続的に照射できるという特性を有する。すなわち、ハロゲンランプHLは少なくとも1秒以上連続して発光する連続点灯ランプである。また、ハロゲンランプHLは棒状ランプであるため長寿命であり、ハロゲンランプHLを水平方向に沿わせて配置することにより上方の半導体ウェハーWへの放射効率が優れたものとなる。 The halogen lamp HL is a filament-type light source that emits light by making the filament incandescent by energizing the filament disposed inside the glass tube. Inside the glass tube, a gas obtained by introducing a trace amount of a halogen element (iodine, bromine, etc.) into an inert gas such as nitrogen or argon is enclosed. By introducing a halogen element, it is possible to set the filament temperature to a high temperature while suppressing breakage of the filament. Therefore, the halogen lamp HL has a characteristic that it has a longer life than a normal incandescent bulb and can continuously radiate strong light. That is, the halogen lamp HL is a continuous lighting lamp that emits light continuously for at least one second. Further, since the halogen lamp HL is a rod-shaped lamp, it has a long life, and by arranging the halogen lamp HL along the horizontal direction, the radiation efficiency to the upper semiconductor wafer W becomes excellent.
 また、ハロゲン加熱部4の筐体41内にも、2段のハロゲンランプHLの下側にリフレクタ43が設けられている(図1)。リフレクタ43は、複数のハロゲンランプHLから出射された光を熱処理空間65の側に反射する。 Further, a reflector 43 is also provided in the housing 41 of the halogen heating unit 4 below the two-stage halogen lamp HL (FIG. 1). The reflector 43 reflects the light emitted from the plurality of halogen lamps HL toward the heat treatment space 65.
 制御部3は、熱処理装置1に設けられた上記の種々の動作機構を制御する。制御部3のハードウェアとしての構成は一般的なコンピュータと同様である。すなわち、制御部3は、各種演算処理を行う回路であるCPU、基本プログラムを記憶する読み出し専用のメモリであるROM、各種情報を記憶する読み書き自在のメモリであるRAMおよび制御用ソフトウェアやデータなどを記憶しておく磁気ディスクを備えている。制御部3のCPUが所定の処理プログラムを実行することによって熱処理装置1における処理が進行する。 The control unit 3 controls the various operation mechanisms provided in the heat treatment apparatus 1. The configuration of the control unit 3 as hardware is the same as that of a general computer. That is, the control unit 3 includes a CPU that is a circuit that performs various arithmetic processes, a ROM that is a read-only memory that stores basic programs, a RAM that is a readable and writable memory that stores various information, control software, data, and the like. It has a magnetic disk to store. The processing in the heat treatment apparatus 1 proceeds as the CPU of the control unit 3 executes a predetermined processing program.
 上記の構成以外にも熱処理装置1は、半導体ウェハーWの熱処理時にハロゲンランプHLおよびフラッシュランプFLから発生する熱エネルギーによるハロゲン加熱部4、フラッシュ加熱部5およびチャンバー6の過剰な温度上昇を防止するため、様々な冷却用の構造を備えている。例えば、チャンバー6の壁体には水冷管(図示省略)が設けられている。また、ハロゲン加熱部4およびフラッシュ加熱部5は、内部に気体流を形成して排熱する空冷構造とされている。また、上側チャンバー窓63とランプ光放射窓53との間隙にも空気が供給され、フラッシュ加熱部5および上側チャンバー窓63を冷却する。 In addition to the above configuration, the heat treatment apparatus 1 prevents an excessive temperature rise in the halogen heating unit 4, the flash heating unit 5, and the chamber 6 due to thermal energy generated from the halogen lamp HL and the flash lamp FL during the heat treatment of the semiconductor wafer W. Therefore, various cooling structures are provided. For example, the wall of the chamber 6 is provided with a water-cooled tube (not shown). Further, the halogen heating unit 4 and the flash heating unit 5 have an air cooling structure in which a gas flow is formed inside to exhaust heat. Air is also supplied to the gap between the upper chamber window 63 and the lamp light emission window 53 to cool the flash heating unit 5 and the upper chamber window 63.
 次に、熱処理装置1における半導体ウェハーWの処理手順について説明する。ここで処理対象となる半導体ウェハーWはイオン注入法により不純物(イオン)が添加された半導体基板である。その不純物の活性化が熱処理装置1によるフラッシュ光照射加熱処理(アニール)により実行される。以下に説明する熱処理装置1の処理手順は、制御部3が熱処理装置1の各動作機構を制御することにより進行する。 Next, a processing procedure for the semiconductor wafer W in the heat treatment apparatus 1 will be described. The semiconductor wafer W to be processed here is a semiconductor substrate to which impurities (ions) are added by an ion implantation method. The activation of the impurities is performed by flash light irradiation heat treatment (annealing) by the heat treatment apparatus 1. The processing procedure of the heat treatment apparatus 1 described below proceeds by the control unit 3 controlling each operation mechanism of the heat treatment apparatus 1.
 まず、ゲートバルブ185が開いて搬送開口部66が開放され、装置外部の搬送ロボットにより搬送開口部66を介して半導体ウェハーWがチャンバー6内の熱処理空間65に搬入される。搬送ロボットによって搬入された半導体ウェハーWは保持部7の直上位置まで進出して停止する。そして、移載機構10の一対の移載アーム11が退避位置から移載動作位置に水平移動して上昇することにより、リフトピン12が貫通孔79を通ってサセプタ74の保持プレート75の上面から突き出て半導体ウェハーWを受け取る。このとき、リフトピン12は基板支持ピン77の上端よりも上方にまで上昇する。 First, the gate valve 185 is opened to open the transfer opening 66, and the semiconductor wafer W is transferred into the heat treatment space 65 in the chamber 6 through the transfer opening 66 by a transfer robot outside the apparatus. The semiconductor wafer W carried in by the carrying robot advances to a position directly above the holding unit 7 and stops. Then, when the pair of transfer arms 11 of the transfer mechanism 10 moves horizontally from the retracted position to the transfer operation position and rises, the lift pin 12 protrudes from the upper surface of the holding plate 75 of the susceptor 74 through the through hole 79. The semiconductor wafer W is received. At this time, the lift pins 12 ascend above the upper ends of the substrate support pins 77.
 半導体ウェハーWがリフトピン12に載置された後、搬送ロボットが熱処理空間65から退出し、ゲートバルブ185によって搬送開口部66が閉鎖される。そして、一対の移載アーム11が下降することにより、半導体ウェハーWは移載機構10から保持部7のサセプタ74に受け渡されて水平姿勢にて下方より保持される。半導体ウェハーWは、保持プレート75上に立設された複数の基板支持ピン77によって支持されてサセプタ74に保持される。また、半導体ウェハーWは、パターン形成がなされて不純物が注入された表面を上面として保持部7に保持される。複数の基板支持ピン77によって支持された半導体ウェハーWの裏面(表面とは反対側の主面)と保持プレート75の保持面75aとの間には所定の間隔が形成される。サセプタ74の下方にまで下降した一対の移載アーム11は水平移動機構13によって退避位置、すなわち凹部62の内側に退避する。 After the semiconductor wafer W is placed on the lift pins 12, the transfer robot leaves the heat treatment space 65 and the transfer opening 66 is closed by the gate valve 185. When the pair of transfer arms 11 are lowered, the semiconductor wafer W is transferred from the transfer mechanism 10 to the susceptor 74 of the holding unit 7 and held from below in a horizontal posture. The semiconductor wafer W is supported by a plurality of substrate support pins 77 erected on the holding plate 75 and held by the susceptor 74. The semiconductor wafer W is held by the holding unit 7 with the surface on which the pattern is formed and the impurities are implanted as the upper surface. A predetermined gap is formed between the back surface (main surface opposite to the front surface) of the semiconductor wafer W supported by the plurality of substrate support pins 77 and the holding surface 75 a of the holding plate 75. The pair of transfer arms 11 lowered to below the susceptor 74 is retracted to the retracted position, that is, inside the recess 62 by the horizontal movement mechanism 13.
 また、ゲートバルブ185によって搬送開口部66が閉鎖されて熱処理空間65が密閉空間とされた後、チャンバー6内の雰囲気調整が行われる。具体的にはバルブ84が開放されてガス供給孔81から熱処理空間65に処理ガスが供給される。本実施形態では、処理ガスとして窒素がチャンバー6内の熱処理空間65に供給される。また、バルブ89が開放されてガス排気孔86からチャンバー6内の気体が排気される。これにより、チャンバー6内の熱処理空間65の上部から供給された処理ガスが下方へと流れて熱処理空間65の下部から排気され、熱処理空間65が窒素雰囲気に置換される。また、バルブ192が開放されることによって、搬送開口部66からもチャンバー6内の気体が排気される。さらに、図示省略の排気機構によって移載機構10の駆動部周辺の雰囲気も排気される。 Further, after the transfer opening 66 is closed by the gate valve 185 and the heat treatment space 65 is closed, the atmosphere in the chamber 6 is adjusted. Specifically, the valve 84 is opened and the processing gas is supplied from the gas supply hole 81 to the heat treatment space 65. In the present embodiment, nitrogen is supplied as a processing gas to the heat treatment space 65 in the chamber 6. Further, the valve 89 is opened, and the gas in the chamber 6 is exhausted from the gas exhaust hole 86. Thereby, the processing gas supplied from the upper part of the heat treatment space 65 in the chamber 6 flows downward and is exhausted from the lower part of the heat treatment space 65, whereby the heat treatment space 65 is replaced with a nitrogen atmosphere. Further, when the valve 192 is opened, the gas in the chamber 6 is also exhausted from the transfer opening 66. Further, the atmosphere around the drive unit of the transfer mechanism 10 is also exhausted by an exhaust mechanism (not shown).
 チャンバー6内が窒素雰囲気に置換され、半導体ウェハーWが保持部7のサセプタ74によって水平姿勢にて下方より保持された後、ハロゲン加熱部4の40本のハロゲンランプHLが一斉に点灯して予備加熱(アシスト加熱)が開始される。ハロゲンランプHLから出射されたハロゲン光は、石英にて形成された下側チャンバー窓64およびサセプタ74を透過して半導体ウェハーWの裏面から照射される。ハロゲンランプHLからの光照射を受けることによって半導体ウェハーWが予備加熱されて温度が上昇する。なお、移載機構10の移載アーム11は凹部62の内側に退避しているため、ハロゲンランプHLによる加熱の障害となることは無い。 After the inside of the chamber 6 is replaced with a nitrogen atmosphere and the semiconductor wafer W is held in a horizontal posture by the susceptor 74 of the holding unit 7 from below, 40 halogen lamps HL of the halogen heating unit 4 are turned on all at once. Heating (assist heating) is started. The halogen light emitted from the halogen lamp HL passes through the lower chamber window 64 and the susceptor 74 made of quartz and is irradiated from the back surface of the semiconductor wafer W. By receiving light from the halogen lamp HL, the semiconductor wafer W is preheated and the temperature rises. In addition, since the transfer arm 11 of the transfer mechanism 10 is retracted to the inside of the recess 62, there is no obstacle to heating by the halogen lamp HL.
 ハロゲンランプHLによる予備加熱を行うときには、半導体ウェハーWの温度が放射温度計120によって測定されている。すなわち、サセプタ74に保持された半導体ウェハーWの裏面から開口部78を介して放射された赤外光を放射温度計120が受光して昇温中のウェハー温度を測定する。測定された半導体ウェハーWの温度は制御部3に伝達される。制御部3は、ハロゲンランプHLからの光照射によって昇温する半導体ウェハーWの温度が所定の予備加熱温度T1に到達したか否かを監視しつつ、ハロゲンランプHLの出力を制御する。すなわち、制御部3は、放射温度計120による測定値に基づいて、半導体ウェハーWの温度が予備加熱温度T1となるようにハロゲンランプHLの出力をフィードバック制御する。予備加熱温度T1は、200℃ないし800℃程度、好ましくは350℃ないし600℃程度とされる(本実施の形態では600℃)。 When performing preliminary heating with the halogen lamp HL, the temperature of the semiconductor wafer W is measured by the radiation thermometer 120. That is, the infrared thermometer 120 receives infrared light emitted from the back surface of the semiconductor wafer W held by the susceptor 74 through the opening 78, and measures the temperature of the wafer being heated. The measured temperature of the semiconductor wafer W is transmitted to the control unit 3. The controller 3 controls the output of the halogen lamp HL while monitoring whether or not the temperature of the semiconductor wafer W that is heated by light irradiation from the halogen lamp HL has reached a predetermined preheating temperature T1. That is, the control unit 3 feedback-controls the output of the halogen lamp HL based on the measurement value by the radiation thermometer 120 so that the temperature of the semiconductor wafer W becomes the preheating temperature T1. The preheating temperature T1 is about 200 ° C. to 800 ° C., preferably about 350 ° C. to 600 ° C. (in this embodiment, 600 ° C.).
 半導体ウェハーWの温度が予備加熱温度T1に到達した後、制御部3は半導体ウェハーWをその予備加熱温度T1に暫時維持する。具体的には、放射温度計120によって測定される半導体ウェハーWの温度が予備加熱温度T1に到達した時点にて制御部3がハロゲンランプHLの出力を調整し、半導体ウェハーWの温度をほぼ予備加熱温度T1に維持している。 After the temperature of the semiconductor wafer W reaches the preheating temperature T1, the control unit 3 maintains the semiconductor wafer W at the preheating temperature T1 for a while. Specifically, when the temperature of the semiconductor wafer W measured by the radiation thermometer 120 reaches the preheating temperature T1, the control unit 3 adjusts the output of the halogen lamp HL so that the temperature of the semiconductor wafer W is almost preliminarily set. The heating temperature is maintained at T1.
 ところで、上述の如く、ハロゲンランプHLによる予備加熱は、半導体ウェハーWを12本の基板支持ピン77によって支持した状態で行われる。従来のように、基板支持ピン77が石英にて形成されていた場合には、基板支持ピン77はハロゲンランプHLから照射された光をほとんど吸収せずに透過する。このため、予備加熱時には、半導体ウェハーWがハロゲンランプHLからの光を吸収して昇温する一方で基板支持ピン77を含むサセプタ74はあまり昇温せず、相対的に半導体ウェハーWよりも低温となる。よって、半導体ウェハーWから直接に接触する基板支持ピン77への熱伝導が生じ、12本の基板支持ピン77による接触箇所近傍のウェハー温度が他の領域よりも相対的に低下することとなる。その結果、半導体ウェハーWの面内温度分布が不均一となる傾向が生じる。 Incidentally, as described above, the preliminary heating by the halogen lamp HL is performed in a state where the semiconductor wafer W is supported by the twelve substrate support pins 77. When the substrate support pin 77 is made of quartz as in the conventional case, the substrate support pin 77 transmits the light irradiated from the halogen lamp HL with little absorption. Therefore, at the time of preheating, the semiconductor wafer W absorbs light from the halogen lamp HL and rises in temperature, while the susceptor 74 including the substrate support pins 77 does not rise so much and is relatively cooler than the semiconductor wafer W. It becomes. Therefore, heat conduction from the semiconductor wafer W to the substrate support pins 77 that are in direct contact occurs, and the wafer temperature in the vicinity of the contact point by the 12 substrate support pins 77 is relatively lowered as compared with other regions. As a result, the in-plane temperature distribution of the semiconductor wafer W tends to be non-uniform.
 このため、第1実施形態においては、保持プレート75の上面に立設された12本の基板支持ピン77を不透明石英にて形成している。不透明石英は、ハロゲンランプHLから照射された光を吸収して昇温する光吸収材料である。すなわち、第1実施形態では、12本の基板支持ピン77がハロゲンランプHLから照射された光を吸収して昇温する光吸収材料にて形成されている。 For this reason, in the first embodiment, twelve substrate support pins 77 erected on the upper surface of the holding plate 75 are formed of opaque quartz. Opaque quartz is a light-absorbing material that absorbs light irradiated from the halogen lamp HL and raises the temperature. That is, in the first embodiment, the twelve substrate support pins 77 are formed of a light absorbing material that absorbs light irradiated from the halogen lamp HL and raises the temperature.
 図8は、第1実施形態の基板支持ピン77の近傍を拡大した図である。ハロゲンランプHLから出射された光は保持プレート75の下面から照射される。保持プレート75は、通常の透明な石英にて形成されているため、ハロゲンランプHLから出射された光を透過する。保持プレート75を透過した光は半導体ウェハーWの裏面に照射される。また、保持プレート75を透過した光の一部は基板支持ピン77にも照射される。基板支持ピン77は不透明石英にて形成されているため、保持プレート75を透過した光を吸収して昇温する。このため、上述した半導体ウェハーWの基板支持ピン77との接触箇所近傍における相対的な温度低下が抑制されることとなり、その結果、当該接触箇所近傍と周辺領域との温度差を最小にすることができ、予備加熱時における半導体ウェハーWの面内温度分布を均一にすることができる。 FIG. 8 is an enlarged view of the vicinity of the substrate support pins 77 of the first embodiment. Light emitted from the halogen lamp HL is irradiated from the lower surface of the holding plate 75. Since the holding plate 75 is formed of normal transparent quartz, it transmits the light emitted from the halogen lamp HL. The light transmitted through the holding plate 75 is applied to the back surface of the semiconductor wafer W. Further, part of the light transmitted through the holding plate 75 is also irradiated to the substrate support pins 77. Since the substrate support pins 77 are made of opaque quartz, the temperature of the substrate support pins 77 is increased by absorbing light transmitted through the holding plate 75. For this reason, the relative temperature drop in the vicinity of the contact portion of the semiconductor wafer W with the substrate support pin 77 is suppressed, and as a result, the temperature difference between the vicinity of the contact portion and the peripheral region is minimized. It is possible to make the in-plane temperature distribution of the semiconductor wafer W uniform during preheating.
 また、基板支持ピン77を水平面に投影した形状は円形であり、その直径dは4mm以下である。基板支持ピン77を水平面に投影した円形の直径dが4mmより大きいと、基板支持ピン77による光吸収効果よりも遮光効果が大きくなり、基板支持ピン77によって半導体ウェハーWの裏面に影が形成されることとなり、却って半導体ウェハーWの基板支持ピン77との接触箇所近傍における温度低下が大きくなる。このため、基板支持ピン77を水平面に投影した円形の直径dは4mm以下に限定される。 Further, the shape of the substrate support pin 77 projected onto the horizontal plane is a circle, and its diameter d is 4 mm or less. If the circular diameter d of the substrate support pins 77 projected onto the horizontal plane is larger than 4 mm, the light shielding effect is larger than the light absorption effect by the substrate support pins 77, and a shadow is formed on the back surface of the semiconductor wafer W by the substrate support pins 77. In other words, the temperature drop near the contact point of the semiconductor wafer W with the substrate support pins 77 becomes large. For this reason, the circular diameter d obtained by projecting the substrate support pins 77 on the horizontal plane is limited to 4 mm or less.
 半導体ウェハーWの温度が予備加熱温度T1に到達して所定時間が経過した時点にてフラッシュ加熱部5のフラッシュランプFLが半導体ウェハーWの表面にフラッシュ光照射を行う。このとき、フラッシュランプFLから放射されるフラッシュ光の一部は直接にチャンバー6内へと向かい、他の一部は一旦リフレクタ52により反射されてからチャンバー6内へと向かい、これらのフラッシュ光の照射により半導体ウェハーWのフラッシュ加熱が行われる。 The flash lamp FL of the flash heating unit 5 irradiates the surface of the semiconductor wafer W with flash light when a predetermined time elapses after the temperature of the semiconductor wafer W reaches the preheating temperature T1. At this time, a part of the flash light emitted from the flash lamp FL goes directly into the chamber 6, and the other part is once reflected by the reflector 52 and then goes into the chamber 6. Flash heating of the semiconductor wafer W is performed by irradiation.
 フラッシュ加熱は、フラッシュランプFLからのフラッシュ光(閃光)照射により行われるため、半導体ウェハーWの表面温度を短時間で上昇することができる。すなわち、フラッシュランプFLから照射されるフラッシュ光は、予めコンデンサーに蓄えられていた静電エネルギーが極めて短い光パルスに変換された、照射時間が0.1ミリセカンド以上100ミリセカンド以下程度の極めて短く強い閃光である。そして、フラッシュランプFLからのフラッシュ光照射によりフラッシュ加熱される半導体ウェハーWの表面温度は、瞬間的に1000℃以上の処理温度T2まで上昇し、半導体ウェハーWに注入された不純物が活性化された後、表面温度が急速に下降する。このように、熱処理装置1では、半導体ウェハーWの表面温度を極めて短時間で昇降することができるため、半導体ウェハーWに注入された不純物の熱による拡散を抑制しつつ不純物の活性化を行うことができる。なお、不純物の活性化に必要な時間はその熱拡散に必要な時間に比較して極めて短いため、0.1ミリセカンドないし100ミリセカンド程度の拡散が生じない短時間であっても活性化は完了する。 Since the flash heating is performed by flash light (flash light) irradiation from the flash lamp FL, the surface temperature of the semiconductor wafer W can be increased in a short time. That is, the flash light irradiated from the flash lamp FL is converted into a light pulse in which the electrostatic energy stored in the capacitor in advance is extremely short, and the irradiation time is extremely short, about 0.1 milliseconds to 100 milliseconds. It is a strong flash. Then, the surface temperature of the semiconductor wafer W that is flash-heated by flash light irradiation from the flash lamp FL instantaneously rises to a processing temperature T2 of 1000 ° C. or more, and the impurities injected into the semiconductor wafer W are activated. Later, the surface temperature drops rapidly. As described above, in the heat treatment apparatus 1, the surface temperature of the semiconductor wafer W can be raised and lowered in a very short time, so that the impurities are activated while suppressing diffusion of the impurities injected into the semiconductor wafer W due to heat. Can do. Since the time required for the activation of impurities is extremely short compared to the time required for the thermal diffusion, the activation is possible even in a short time in which diffusion of about 0.1 millisecond to 100 millisecond does not occur. Complete.
 本実施形態では、ハロゲンランプHLから照射された光を吸収して昇温する不透明石英にて12本の基板支持ピン77を形成し、基板支持ピン77と半導体ウェハーWとの接触箇所近傍における温度低下を抑制して予備加熱段階での半導体ウェハーWの面内温度分布を均一にしている。その結果、フラッシュ光照射時における半導体ウェハーW表面の面内温度分布も均一にすることができる。 In this embodiment, twelve substrate support pins 77 are formed of opaque quartz that absorbs light irradiated from the halogen lamp HL and raises the temperature, and the temperature in the vicinity of the contact point between the substrate support pins 77 and the semiconductor wafer W is formed. The in-plane temperature distribution of the semiconductor wafer W in the preheating stage is made uniform by suppressing the decrease. As a result, the in-plane temperature distribution on the surface of the semiconductor wafer W at the time of flash light irradiation can be made uniform.
 フラッシュ加熱処理が終了した後、所定時間経過後にハロゲンランプHLが消灯する。これにより、半導体ウェハーWが予備加熱温度T1から急速に降温する。降温中の半導体ウェハーWの温度は放射温度計120によって測定され、その測定結果は制御部3に伝達される。制御部3は、放射温度計120の測定結果より半導体ウェハーWの温度が所定温度まで降温したか否かを監視する。そして、半導体ウェハーWの温度が所定以下にまで降温した後、移載機構10の一対の移載アーム11が再び退避位置から移載動作位置に水平移動して上昇することにより、リフトピン12がサセプタ74の上面から突き出て熱処理後の半導体ウェハーWをサセプタ74から受け取る。続いて、ゲートバルブ185により閉鎖されていた搬送開口部66が開放され、リフトピン12上に載置された半導体ウェハーWが装置外部の搬送ロボットにより搬出され、熱処理装置1における半導体ウェハーWの加熱処理が完了する。 After the flash heat treatment is completed, the halogen lamp HL is turned off after a predetermined time has elapsed. Thereby, the temperature of the semiconductor wafer W is rapidly lowered from the preheating temperature T1. The temperature of the semiconductor wafer W during the temperature drop is measured by the radiation thermometer 120, and the measurement result is transmitted to the control unit 3. The controller 3 monitors whether or not the temperature of the semiconductor wafer W has dropped to a predetermined temperature from the measurement result of the radiation thermometer 120. Then, after the temperature of the semiconductor wafer W is lowered to a predetermined temperature or lower, the pair of transfer arms 11 of the transfer mechanism 10 is again moved horizontally from the retracted position to the transfer operation position and lifted, whereby the lift pins 12 are moved to the susceptor. The semiconductor wafer W protruding from the upper surface of 74 and subjected to the heat treatment is received from the susceptor 74. Subsequently, the transfer opening 66 closed by the gate valve 185 is opened, and the semiconductor wafer W placed on the lift pins 12 is unloaded by the transfer robot outside the apparatus, and the heat treatment of the semiconductor wafer W in the heat treatment apparatus 1 is performed. Is completed.
 第1実施形態においては、保持プレート75の上面に立設された12本の基板支持ピン77がハロゲンランプHLから照射された光を吸収して昇温する光吸収材料にて形成されている。これにより、ハロゲンランプHLによる予備加熱時には、12本の基板支持ピン77がハロゲンランプHLからの光を吸収して昇温するため、基板支持ピン77と半導体ウェハーWとの接触箇所近傍における温度低下を抑制して予備加熱時における半導体ウェハーWの面内温度分布を均一にすることができる。その結果、フラッシュ加熱時における半導体ウェハーW表面の面内温度分布も均一にすることができる。 In the first embodiment, twelve substrate support pins 77 erected on the upper surface of the holding plate 75 are formed of a light absorbing material that absorbs light emitted from the halogen lamp HL and raises the temperature. As a result, during the preliminary heating by the halogen lamp HL, the 12 substrate support pins 77 absorb the light from the halogen lamp HL and raise the temperature, so that the temperature drop near the contact point between the substrate support pins 77 and the semiconductor wafer W is reduced. The in-plane temperature distribution of the semiconductor wafer W during preheating can be made uniform by suppressing the above. As a result, the in-plane temperature distribution on the surface of the semiconductor wafer W during flash heating can be made uniform.
 また、第1実施形態においては、12本の基板支持ピン77を光吸収材料で形成するだけで半導体ウェハーWの面内温度分布を均一にしている。すなわち、基板支持ピン77と半導体ウェハーWとの接触箇所を加熱するための特別な機構や設計変更は不要であり、簡易な構成にて光照射時の半導体ウェハーWの面内温度分布を均一にすることができる。 Further, in the first embodiment, the in-plane temperature distribution of the semiconductor wafer W is made uniform simply by forming the twelve substrate support pins 77 with a light absorbing material. That is, no special mechanism or design change for heating the contact portion between the substrate support pins 77 and the semiconductor wafer W is required, and the in-plane temperature distribution of the semiconductor wafer W during light irradiation is made uniform with a simple configuration. can do.
  <第2実施形態>
 次に、本発明の第2実施形態について説明する。第2実施形態の熱処理装置1の全体構成は第1実施形態と概ね同じである。また、第2実施形態の熱処理装置1における半導体ウェハーWの処理手順も第1実施形態と同様である。第2実施形態が第1実施形態と相違するのは、光吸収材料を設ける形態である。
Second Embodiment
Next, a second embodiment of the present invention will be described. The overall configuration of the heat treatment apparatus 1 of the second embodiment is substantially the same as that of the first embodiment. The processing procedure for the semiconductor wafer W in the heat treatment apparatus 1 of the second embodiment is the same as that of the first embodiment. The second embodiment is different from the first embodiment in that a light absorbing material is provided.
 図9は、第2実施形態の基板支持ピン77の近傍を拡大した図である。第2実施形態においては、保持プレート75の上面に立設された12本の基板支持ピン77の表面に、ハロゲンランプHLから照射された光を吸収する光吸収材料にて形成された光吸収膜21を設けている。第2実施形態では、基板支持ピン77自体は石英にて形成されている。その石英の基板支持ピン77の表面に光吸収材料にて形成された光吸収膜21を成膜しているのである。 FIG. 9 is an enlarged view of the vicinity of the substrate support pins 77 of the second embodiment. In the second embodiment, a light absorption film formed on the surface of 12 substrate support pins 77 erected on the upper surface of the holding plate 75 with a light absorption material that absorbs light emitted from the halogen lamp HL. 21 is provided. In the second embodiment, the substrate support pins 77 themselves are made of quartz. A light absorption film 21 made of a light absorption material is formed on the surface of the quartz substrate support pins 77.
 また、第2実施形態では、光吸収材料として炭化ケイ素(SiC)を用いている。炭化ケイ素をスパッタリング、蒸着、塗布等の手法によって石英の基板支持ピン77の表面にコーティングすることにより光吸収膜21を成膜する。また、光吸収膜21を水平面に投影した形状は直径4mm以下の円形である。 In the second embodiment, silicon carbide (SiC) is used as the light absorbing material. The light absorption film 21 is formed by coating silicon carbide on the surface of the quartz substrate support pins 77 by sputtering, vapor deposition, coating, or the like. Moreover, the shape which projected the light absorption film | membrane 21 on the horizontal surface is circular with a diameter of 4 mm or less.
 第2実施形態においては、ハロゲンランプHLによる予備加熱時に、12本の基板支持ピン77の表面に設けられた光吸収膜21がハロゲンランプHLからの光を吸収して昇温するため、基板支持ピン77と半導体ウェハーWとの接触箇所近傍(厳密には、光吸収膜21と半導体ウェハーWとの接触箇所近傍)における温度低下を抑制して予備加熱時における半導体ウェハーWの面内温度分布を均一にすることができる。その結果、第1実施形態と同様に、フラッシュ加熱時における半導体ウェハーW表面の面内温度分布も均一にすることができる。 In the second embodiment, during the preliminary heating by the halogen lamp HL, the light absorption film 21 provided on the surface of the 12 substrate support pins 77 absorbs light from the halogen lamp HL and raises the temperature. The in-plane temperature distribution of the semiconductor wafer W during preheating is suppressed by suppressing the temperature drop in the vicinity of the contact area between the pin 77 and the semiconductor wafer W (strictly, in the vicinity of the contact area between the light absorption film 21 and the semiconductor wafer W). It can be made uniform. As a result, as in the first embodiment, the in-plane temperature distribution on the surface of the semiconductor wafer W during flash heating can be made uniform.
 また、第2実施形態においては、12本の基板支持ピン77の表面に光吸収膜21を設けるだけで半導体ウェハーWの面内温度分布を均一にしている。すなわち、基板支持ピン77と半導体ウェハーWとの接触箇所を加熱するための特別な機構や設計変更は不要であり、簡易な構成にて光照射時の半導体ウェハーWの面内温度分布を均一にすることができる。 In the second embodiment, the in-plane temperature distribution of the semiconductor wafer W is made uniform simply by providing the light absorption film 21 on the surface of the twelve substrate support pins 77. That is, no special mechanism or design change for heating the contact portion between the substrate support pins 77 and the semiconductor wafer W is required, and the in-plane temperature distribution of the semiconductor wafer W during light irradiation is made uniform with a simple configuration. can do.
  <第3実施形態>
 次に、本発明の第3実施形態について説明する。第3実施形態の熱処理装置1の全体構成は第1実施形態と概ね同じである。また、第3実施形態の熱処理装置1における半導体ウェハーWの処理手順も第1実施形態と同様である。第3実施形態が第1実施形態と相違するのは、光吸収材料を設ける形態である。
<Third Embodiment>
Next, a third embodiment of the present invention will be described. The overall configuration of the heat treatment apparatus 1 of the third embodiment is substantially the same as that of the first embodiment. Further, the processing procedure of the semiconductor wafer W in the heat treatment apparatus 1 of the third embodiment is the same as that of the first embodiment. The third embodiment is different from the first embodiment in that a light absorbing material is provided.
 図10は、第3実施形態の基板支持ピン77の近傍を拡大した図である。第3実施形態においては、12本の基板支持ピン77と保持プレート75との間にハロゲンランプHLから照射された光を吸収する光吸収材料にて形成された光吸収膜21を挟み込んで設けている。第3実施形態においても、保持プレート75の上面に立設された12本の基板支持ピン77自体は石英にて形成されている。また、光吸収材料としては第2実施形態と同様に炭化ケイ素を用いている。 FIG. 10 is an enlarged view of the vicinity of the substrate support pins 77 of the third embodiment. In the third embodiment, a light absorbing film 21 formed of a light absorbing material that absorbs light emitted from the halogen lamp HL is interposed between 12 substrate support pins 77 and a holding plate 75. Yes. Also in the third embodiment, the twelve substrate support pins 77 erected on the upper surface of the holding plate 75 are formed of quartz. Further, silicon carbide is used as the light absorbing material as in the second embodiment.
 第3実施形態においては、保持プレート75の上面のうち、12本の基板支持ピン77が立設されるべき領域にスパッタリング、蒸着、塗布等の手法によって炭化ケイ素をコーティングして光吸収膜21を成膜している。そして、その光吸収膜21の上に基板支持ピン77を立設することにより、基板支持ピン77と保持プレート75との間に光吸収膜21を挟み込んでいる。光吸収膜21の膜厚は0.1mm~0.5mmである。また、光吸収膜21を水平面に投影した形状は直径4mm以下の円形である(つまり、円板形状の光吸収膜21の直径は4mm以下)。 In the third embodiment, on the upper surface of the holding plate 75, the region where the 12 substrate support pins 77 are to be erected is coated with silicon carbide by a technique such as sputtering, vapor deposition, or coating to form the light absorption film 21. A film is being formed. Then, the light absorption film 21 is sandwiched between the substrate support pin 77 and the holding plate 75 by erecting the substrate support pin 77 on the light absorption film 21. The thickness of the light absorption film 21 is 0.1 mm to 0.5 mm. The shape of the light absorption film 21 projected onto the horizontal plane is a circle having a diameter of 4 mm or less (that is, the diameter of the disk-shaped light absorption film 21 is 4 mm or less).
 第3実施形態においては、ハロゲンランプHLによる予備加熱時に、12本の基板支持ピン77と保持プレート75との間に挟み込んで設けられた光吸収膜21がハロゲンランプHLからの光を吸収して昇温する。昇温した光吸収膜21から基板支持ピン77に熱が伝わって基板支持ピン77自体も昇温するため、基板支持ピン77と半導体ウェハーWとの接触箇所近傍における温度低下を抑制して予備加熱時における半導体ウェハーWの面内温度分布を均一にすることができる。その結果、第1実施形態と同様に、フラッシュ加熱時における半導体ウェハーW表面の面内温度分布も均一にすることができる。 In the third embodiment, the light absorption film 21 sandwiched between the 12 substrate support pins 77 and the holding plate 75 absorbs the light from the halogen lamp HL during the preliminary heating by the halogen lamp HL. Raise the temperature. Since heat is transferred from the light-absorbing film 21 whose temperature has risen to the substrate support pins 77 and the substrate support pins 77 themselves also rise in temperature, preheating is performed while suppressing a temperature drop in the vicinity of the contact point between the substrate support pins 77 and the semiconductor wafer W. The in-plane temperature distribution of the semiconductor wafer W at the time can be made uniform. As a result, as in the first embodiment, the in-plane temperature distribution on the surface of the semiconductor wafer W during flash heating can be made uniform.
 また、第3実施形態においては、12本の基板支持ピン77と保持プレート75との間に光吸収膜21を設けるだけで半導体ウェハーWの面内温度分布を均一にしている。すなわち、基板支持ピン77と半導体ウェハーWとの接触箇所を加熱するための特別な機構や設計変更は不要であり、簡易な構成にて光照射時の半導体ウェハーWの面内温度分布を均一にすることができる。 In the third embodiment, the in-plane temperature distribution of the semiconductor wafer W is made uniform simply by providing the light absorption film 21 between the twelve substrate support pins 77 and the holding plate 75. That is, no special mechanism or design change for heating the contact portion between the substrate support pins 77 and the semiconductor wafer W is required, and the in-plane temperature distribution of the semiconductor wafer W during light irradiation is made uniform with a simple configuration. can do.
  <第4実施形態>
 次に、本発明の第4実施形態について説明する。第4実施形態の熱処理装置1の全体構成は第1実施形態と概ね同じである。また、第4実施形態の熱処理装置1における半導体ウェハーWの処理手順も第1実施形態と同様である。第4実施形態が第1実施形態と相違するのは、光吸収材料を設ける形態である。
<Fourth embodiment>
Next, a fourth embodiment of the present invention will be described. The overall configuration of the heat treatment apparatus 1 of the fourth embodiment is substantially the same as that of the first embodiment. Further, the processing procedure of the semiconductor wafer W in the heat treatment apparatus 1 of the fourth embodiment is the same as that of the first embodiment. The fourth embodiment is different from the first embodiment in that a light absorbing material is provided.
 図11は、第4実施形態の基板支持ピン77の近傍を拡大した図である。第4実施形態においては、保持プレート75の下面のうち12本の基板支持ピン77と対向する領域にハロゲンランプHLから照射された光を吸収する光吸収材料にて形成された光吸収膜21を設けている。第4実施形態においても、保持プレート75の上面に立設された12本の基板支持ピン77自体は石英にて形成されている。また、光吸収材料としては第2実施形態と同様に炭化ケイ素を用いている。 FIG. 11 is an enlarged view of the vicinity of the substrate support pins 77 of the fourth embodiment. In the fourth embodiment, the light absorbing film 21 formed of a light absorbing material that absorbs light emitted from the halogen lamp HL is formed in a region facing the 12 substrate support pins 77 in the lower surface of the holding plate 75. Provided. Also in the fourth embodiment, the twelve substrate support pins 77 erected on the upper surface of the holding plate 75 are made of quartz. Further, silicon carbide is used as the light absorbing material as in the second embodiment.
 第4実施形態においては、保持プレート75の下面のうち、上面に立設された12本の基板支持ピン77と対向する領域にスパッタリング、蒸着、塗布等の手法によって炭化ケイ素をコーティングして光吸収膜21を成膜している。光吸収膜21の膜厚は0.1mm~0.5mmである。また、光吸収膜21を水平面に投影した形状は直径4mm以下の円形である(つまり、円板形状の光吸収膜21の直径は4mm以下)。 In the fourth embodiment, light absorption is achieved by coating silicon carbide with a technique such as sputtering, vapor deposition, coating, etc. on a region of the lower surface of the holding plate 75 facing the twelve substrate support pins 77 erected on the upper surface. A film 21 is formed. The thickness of the light absorption film 21 is 0.1 mm to 0.5 mm. The shape of the light absorption film 21 projected onto the horizontal plane is a circle having a diameter of 4 mm or less (that is, the diameter of the disk-shaped light absorption film 21 is 4 mm or less).
 第4実施形態においては、ハロゲンランプHLによる予備加熱時に、保持プレート75の下面のうち12本の基板支持ピン77と対向する領域に設けられた光吸収膜21がハロゲンランプHLからの光を吸収して昇温する。昇温した光吸収膜21から上方の保持プレート75および基板支持ピン77に熱が伝わって基板支持ピン77自体も昇温するため、基板支持ピン77と半導体ウェハーWとの接触箇所近傍における温度低下を抑制して予備加熱時における半導体ウェハーWの面内温度分布を均一にすることができる。その結果、第1実施形態と同様に、フラッシュ加熱時における半導体ウェハーW表面の面内温度分布も均一にすることができる。 In the fourth embodiment, the light absorbing film 21 provided in the region facing the 12 substrate support pins 77 in the lower surface of the holding plate 75 absorbs the light from the halogen lamp HL during the preliminary heating by the halogen lamp HL. Then raise the temperature. Since the heat is transferred from the heated light absorption film 21 to the upper holding plate 75 and the substrate support pin 77 to raise the temperature of the substrate support pin 77 itself, the temperature drop in the vicinity of the contact point between the substrate support pin 77 and the semiconductor wafer W is reduced. The in-plane temperature distribution of the semiconductor wafer W during preheating can be made uniform by suppressing the above. As a result, as in the first embodiment, the in-plane temperature distribution on the surface of the semiconductor wafer W during flash heating can be made uniform.
 また、第4実施形態においては、保持プレート75の下面に光吸収膜21を設けるだけで半導体ウェハーWの面内温度分布を均一にしている。すなわち、基板支持ピン77と半導体ウェハーWとの接触箇所を加熱するための特別な機構や設計変更は不要であり、簡易な構成にて光照射時の半導体ウェハーWの面内温度分布を均一にすることができる。 In the fourth embodiment, the in-plane temperature distribution of the semiconductor wafer W is made uniform simply by providing the light absorption film 21 on the lower surface of the holding plate 75. That is, no special mechanism or design change for heating the contact portion between the substrate support pins 77 and the semiconductor wafer W is required, and the in-plane temperature distribution of the semiconductor wafer W during light irradiation is made uniform with a simple configuration. can do.
  <第5実施形態>
 次に、本発明の第5実施形態について説明する。第5実施形態の熱処理装置1の全体構成は第1実施形態と概ね同じである。また、第5実施形態の熱処理装置1における半導体ウェハーWの処理手順も第1実施形態と同様である。第5実施形態が第1実施形態と相違するのは、光吸収材料を設ける形態である。
<Fifth Embodiment>
Next, a fifth embodiment of the present invention will be described. The overall configuration of the heat treatment apparatus 1 of the fifth embodiment is substantially the same as that of the first embodiment. Further, the processing procedure of the semiconductor wafer W in the heat treatment apparatus 1 of the fifth embodiment is the same as that of the first embodiment. The fifth embodiment is different from the first embodiment in that a light absorbing material is provided.
 図12は、第5実施形態の基板支持ピン77の近傍を拡大した図である。第5実施形態においては、保持プレート75のうち12本の基板支持ピン77が立設された部位をハロゲンランプHLから照射された光を吸収する光吸収材料にて形成している。第5実施形態においても、保持プレート75の上面に立設された12本の基板支持ピン77自体は石英にて形成されている。また、光吸収材料としては第1実施形態と同様に不透明石英を用いている。 FIG. 12 is an enlarged view of the vicinity of the substrate support pins 77 of the fifth embodiment. In the fifth embodiment, the portion of the holding plate 75 where the 12 substrate support pins 77 are erected is formed of a light absorbing material that absorbs light emitted from the halogen lamp HL. Also in the fifth embodiment, the twelve substrate support pins 77 erected on the upper surface of the holding plate 75 are made of quartz. Further, as the light absorbing material, opaque quartz is used as in the first embodiment.
 第5実施形態においては、保持プレート75のうち12本の基板支持ピン77が立設されるべき部位に上下に貫通して孔を穿設し、その孔に溶接等によって不透明石英の円柱部22を埋め込んでいる。そして、その円柱部22の上に基板支持ピン77を立設している。不透明石英の円柱部22の高さは保持プレート75の厚さと同じである。また、不透明石英の円柱部22を水平面に投影した形状は直径4mm以下の円形である(つまり、円柱部22の直径は4mm以下)。 In the fifth embodiment, a hole is formed by vertically penetrating a portion of the holding plate 75 where twelve substrate support pins 77 are to be erected, and the cylindrical portion 22 of opaque quartz is formed in the hole by welding or the like. Is embedded. A substrate support pin 77 is erected on the cylindrical portion 22. The height of the cylindrical portion 22 of opaque quartz is the same as the thickness of the holding plate 75. The shape of the opaque quartz cylindrical portion 22 projected onto the horizontal plane is a circle having a diameter of 4 mm or less (that is, the cylindrical portion 22 has a diameter of 4 mm or less).
 第5実施形態においては、ハロゲンランプHLによる予備加熱時に、12本の基板支持ピン77の下に設けられた不透明石英の円柱部22がハロゲンランプHLからの光を吸収して昇温する。昇温した円柱部22から基板支持ピン77に熱が伝わって基板支持ピン77自体も昇温するため、基板支持ピン77と半導体ウェハーWとの接触箇所近傍における温度低下を抑制して予備加熱時における半導体ウェハーWの面内温度分布を均一にすることができる。その結果、第1実施形態と同様に、フラッシュ加熱時における半導体ウェハーW表面の面内温度分布も均一にすることができる。 In the fifth embodiment, during preheating by the halogen lamp HL, the cylindrical portion 22 of opaque quartz provided under the twelve substrate support pins 77 absorbs light from the halogen lamp HL and raises the temperature. Since heat is transferred from the heated cylindrical portion 22 to the substrate support pin 77 and the substrate support pin 77 itself also rises in temperature, the temperature drop in the vicinity of the contact portion between the substrate support pin 77 and the semiconductor wafer W is suppressed and preheating is performed. The in-plane temperature distribution of the semiconductor wafer W can be made uniform. As a result, as in the first embodiment, the in-plane temperature distribution on the surface of the semiconductor wafer W during flash heating can be made uniform.
 また、第5実施形態においては、保持プレート75の一部を光吸収材料にて形成するだけで半導体ウェハーWの面内温度分布を均一にしている。すなわち、基板支持ピン77と半導体ウェハーWとの接触箇所を加熱するための特別な機構や設計変更は不要であり、簡易な構成にて光照射時の半導体ウェハーWの面内温度分布を均一にすることができる。 In the fifth embodiment, the in-plane temperature distribution of the semiconductor wafer W is made uniform only by forming a part of the holding plate 75 with a light absorbing material. That is, no special mechanism or design change for heating the contact portion between the substrate support pins 77 and the semiconductor wafer W is required, and the in-plane temperature distribution of the semiconductor wafer W during light irradiation is made uniform with a simple configuration. can do.
  <変形例>
 以上、本発明の実施の形態について説明したが、この発明はその趣旨を逸脱しない限りにおいて上述したもの以外に種々の変更を行うことが可能である。例えば、第1,5実施形態の光吸収材料として炭化ケイ素を用い、第2~4実施形態の光吸収材料として不透明石英を採用するようにしても良い。また、各実施形態にて光吸収材料として用いる不透明石英を黒色合成石英としても良い。黒色合成石英は白色の不透明石英に比較して高い光吸収率を有しているため、ハロゲンランプHLからの光を吸収してより高温に昇温し、基板支持ピン77と半導体ウェハーWとの接触箇所近傍における温度低下をより効果的に抑制することができる。
<Modification>
While the embodiments of the present invention have been described above, the present invention can be modified in various ways other than those described above without departing from the spirit of the present invention. For example, silicon carbide may be used as the light absorbing material in the first and fifth embodiments, and opaque quartz may be employed as the light absorbing material in the second to fourth embodiments. Further, the opaque quartz used as the light absorbing material in each embodiment may be black synthetic quartz. Since black synthetic quartz has a higher light absorption rate than white opaque quartz, it absorbs light from the halogen lamp HL and rises to a higher temperature, so that the substrate support pins 77 and the semiconductor wafer W It is possible to more effectively suppress the temperature decrease in the vicinity of the contact location.
 また、第1~5実施形態の光吸収材料を設ける形態の2つ以上を適宜に組み合わせるようにしても良い。例えば、第1実施形態と第3実施形態とを組み合わせ、不透明石英の基板支持ピン77と保持プレート75との間に光吸収膜21を挟み込んで設けるようにしても良い。或いは、第1実施形態と第5実施形態とを組み合わせ、不透明石英の円柱部22の上に不透明石英の基板支持ピン77を設けるようにしても良い。 Further, two or more of the forms in which the light absorbing materials of the first to fifth embodiments are provided may be appropriately combined. For example, the first embodiment may be combined with the third embodiment, and the light absorption film 21 may be provided between the opaque quartz substrate support pins 77 and the holding plate 75. Alternatively, the first embodiment and the fifth embodiment may be combined, and the opaque quartz substrate support pins 77 may be provided on the opaque quartz cylindrical portion 22.
 また、石英の基板支持ピン77の表面をサンドブラスト等の粗面化処理によって不透明とするようにしても良い。このようにすれば、基板支持ピン77を不透明石英にて形成したのと同様に、基板支持ピン77の表面がハロゲンランプHLからの光を吸収して昇温するため、基板支持ピン77と半導体ウェハーWとの接触箇所近傍における温度低下を抑制することができる。 Further, the surface of the quartz substrate support pin 77 may be made opaque by roughening treatment such as sandblasting. In this manner, the surface of the substrate support pin 77 absorbs the light from the halogen lamp HL and raises the temperature in the same manner as the substrate support pin 77 is formed of opaque quartz. A temperature drop in the vicinity of the contact point with the wafer W can be suppressed.
 また、上記実施形態においては、フラッシュ加熱部5に30本のフラッシュランプFLを備えるようにしていたが、これに限定されるものではなく、フラッシュランプFLの本数は任意の数とすることができる。また、フラッシュランプFLはキセノンフラッシュランプに限定されるものではなく、クリプトンフラッシュランプであっても良い。また、ハロゲン加熱部4に備えるハロゲンランプHLの本数も40本に限定されるものではなく、任意の数とすることができる。 In the above embodiment, the flash heating unit 5 is provided with 30 flash lamps FL. However, the present invention is not limited to this, and the number of flash lamps FL can be any number. . The flash lamp FL is not limited to a xenon flash lamp, and may be a krypton flash lamp. Further, the number of halogen lamps HL provided in the halogen heating unit 4 is not limited to 40, and may be an arbitrary number.
 また、本発明に係る熱処理装置によって処理対象となる基板は半導体ウェハーに限定されるものではなく、液晶表示装置などのフラットパネルディスプレイに用いるガラス基板や太陽電池用の基板であっても良い。また、本発明に係る技術は、金属とシリコンとの接合、或いはポリシリコンの結晶化に適用するようにしても良い。 The substrate to be processed by the heat treatment apparatus according to the present invention is not limited to a semiconductor wafer, and may be a glass substrate or a solar cell substrate used for a flat panel display such as a liquid crystal display device. Further, the technique according to the present invention may be applied to bonding of metal and silicon or crystallization of polysilicon.
 また、本発明に係る熱処理技術は、フラッシュランプアニール装置に限定されるものではなく、ハロゲンランプを使用した枚葉式のランプアニール装置やCVD装置などのフラッシュランプ以外の熱源の装置にも適用することができる。特に、チャンバーの下方にハロゲンランプを配置し、石英のサセプタ上に複数の基板支持ピンで支持した半導体ウェハーの裏面から光照射を行って熱処理を行うバックサイドアニール装置に本発明に係る技術は好適に適用することができる。 Further, the heat treatment technique according to the present invention is not limited to the flash lamp annealing apparatus, but is also applied to a heat source apparatus other than a flash lamp such as a single wafer type lamp annealing apparatus or a CVD apparatus using a halogen lamp. be able to. In particular, the technology according to the present invention is suitable for a backside annealing apparatus in which a halogen lamp is disposed below a chamber and heat treatment is performed by irradiating light from the back surface of a semiconductor wafer supported by a plurality of substrate support pins on a quartz susceptor. Can be applied to.
 1 熱処理装置
 3 制御部
 4 ハロゲン加熱部
 5 フラッシュ加熱部
 6 チャンバー
 7 保持部
 21 光吸収膜
 22 円柱部
 65 熱処理空間
 74 サセプタ
 75 保持プレート
 77 基板支持ピン
 120 放射温度計
 FL フラッシュランプ
 HL ハロゲンランプ
 W 半導体ウェハー
DESCRIPTION OF SYMBOLS 1 Heat processing apparatus 3 Control part 4 Halogen heating part 5 Flash heating part 6 Chamber 7 Holding part 21 Light absorption film 22 Cylindrical part 65 Heat treatment space 74 Susceptor 75 Holding plate 77 Substrate support pin 120 Radiation thermometer FL Flash lamp HL Halogen lamp W Semiconductor Wafer

Claims (9)

  1.  基板に光を照射することによって該基板を加熱する熱処理装置であって、
     基板を収容するチャンバーと、
     前記チャンバー内にて、上面に立設された複数の支持ピンを介して基板を支持する石英の平板形状の保持プレートと、
     前記保持プレートに支持された基板に前記保持プレートを透過して光を照射する光照射部と、
    を備え、
     前記複数の支持ピンは、前記光照射部から照射された光を吸収する光吸収材料にて形成される熱処理装置。
    A heat treatment apparatus for heating a substrate by irradiating the substrate with light,
    A chamber for housing the substrate;
    In the chamber, a quartz flat plate-like holding plate that supports the substrate via a plurality of support pins erected on the upper surface;
    A light irradiation unit configured to transmit light to the substrate supported by the holding plate through the holding plate;
    With
    The plurality of support pins are heat treatment apparatuses formed of a light absorbing material that absorbs light irradiated from the light irradiation unit.
  2.  基板に光を照射することによって該基板を加熱する熱処理装置であって、
     基板を収容するチャンバーと、
     前記チャンバー内にて、上面に立設された複数の支持ピンを介して基板を支持する石英の平板形状の保持プレートと、
     前記保持プレートに支持された基板に前記保持プレートを透過して光を照射する光照射部と、
    を備え、
     前記複数の支持ピンの表面に前記光照射部から照射された光を吸収する光吸収材料にて形成された光吸収膜を設ける熱処理装置。
    A heat treatment apparatus for heating a substrate by irradiating the substrate with light,
    A chamber for housing the substrate;
    In the chamber, a quartz flat plate-like holding plate that supports the substrate via a plurality of support pins erected on the upper surface;
    A light irradiation unit configured to transmit light to the substrate supported by the holding plate through the holding plate;
    With
    The heat processing apparatus which provides the light absorption film | membrane formed with the light absorption material which absorbs the light irradiated from the said light irradiation part on the surface of these support pins.
  3.  基板に光を照射することによって該基板を加熱する熱処理装置であって、
     基板を収容するチャンバーと、
     前記チャンバー内にて、上面に立設された複数の支持ピンを介して基板を支持する石英の平板形状の保持プレートと、
     前記保持プレートに支持された基板に前記保持プレートを透過して光を照射する光照射部と、
    を備え、
     前記複数の支持ピンと前記保持プレートとの間に前記光照射部から照射された光を吸収する光吸収材料にて形成された光吸収膜を挟み込む熱処理装置。
    A heat treatment apparatus for heating a substrate by irradiating the substrate with light,
    A chamber for housing the substrate;
    In the chamber, a quartz flat plate-like holding plate that supports the substrate via a plurality of support pins erected on the upper surface;
    A light irradiation unit configured to transmit light to the substrate supported by the holding plate through the holding plate;
    With
    A heat treatment apparatus that sandwiches a light absorption film formed of a light absorption material that absorbs light irradiated from the light irradiation unit between the plurality of support pins and the holding plate.
  4.  基板に光を照射することによって該基板を加熱する熱処理装置であって、
     基板を収容するチャンバーと、
     前記チャンバー内にて、上面に立設された複数の支持ピンを介して基板を支持する石英の平板形状の保持プレートと、
     前記保持プレートに支持された基板に前記保持プレートを透過して光を照射する光照射部と、
    を備え、
     前記保持プレートの下面のうち前記複数の支持ピンと対向する領域に前記光照射部から照射された光を吸収する光吸収材料にて形成された光吸収膜を設ける熱処理装置。
    A heat treatment apparatus for heating a substrate by irradiating the substrate with light,
    A chamber for housing the substrate;
    In the chamber, a quartz flat plate-like holding plate that supports the substrate via a plurality of support pins erected on the upper surface;
    A light irradiation unit configured to transmit light to the substrate supported by the holding plate through the holding plate;
    With
    The heat processing apparatus which provides the light absorption film | membrane formed with the light absorption material which absorbs the light irradiated from the said light irradiation part in the area | region facing the said some support pin among the lower surfaces of the said holding plate.
  5.  基板に光を照射することによって該基板を加熱する熱処理装置であって、
     基板を収容するチャンバーと、
     前記チャンバー内にて、上面に立設された複数の支持ピンを介して基板を支持する石英の平板形状の保持プレートと、
     前記保持プレートに支持された基板に前記保持プレートを透過して光を照射する光照射部と、
    を備え、
     前記保持プレートのうち前記複数の支持ピンが立設された部位を前記光照射部から照射された光を吸収する光吸収材料にて形成する熱処理装置。
    A heat treatment apparatus for heating a substrate by irradiating the substrate with light,
    A chamber for housing the substrate;
    In the chamber, a quartz flat plate-like holding plate that supports the substrate via a plurality of support pins erected on the upper surface;
    A light irradiation unit configured to transmit light to the substrate supported by the holding plate through the holding plate;
    With
    The heat processing apparatus which forms the site | part in which the said several support pin was erected among the said holding | maintenance plates with the light absorption material which absorbs the light irradiated from the said light irradiation part.
  6.  請求項1から請求項5のいずれかに記載の熱処理装置において、
     前記光吸収材料は不透明石英である熱処理装置。
    In the heat processing apparatus in any one of Claims 1-5,
    A heat treatment apparatus in which the light absorbing material is opaque quartz.
  7.  請求項6記載の熱処理装置において、
     前記不透明石英は黒色合成石英である熱処理装置。
    The heat treatment apparatus according to claim 6, wherein
    The heat treatment apparatus, wherein the opaque quartz is black synthetic quartz.
  8.  請求項1から請求項5のいずれかに記載の熱処理装置において、
     前記光吸収材料は炭化ケイ素である熱処理装置。
    In the heat processing apparatus in any one of Claims 1-5,
    The heat treatment apparatus, wherein the light absorbing material is silicon carbide.
  9.  請求項1から請求項8のいずれかに記載の熱処理装置において、
     前記光吸収材料を水平面に投影した形状は直径4mm以下の円形である熱処理装置。
    In the heat processing apparatus in any one of Claims 1-8,
    A heat treatment apparatus in which the shape of the light absorbing material projected onto a horizontal plane is a circle having a diameter of 4 mm or less.
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KR20230061543A (en) * 2020-10-28 2023-05-08 교세라 가부시키가이샤 gap pin

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