Classifications

• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
  • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
  • H03D7/14—Balanced arrangements
  • H03D7/1425—Balanced arrangements with transistors
  • H03D7/1433—Balanced arrangements with transistors using bipolar transistors
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
  • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
  • H03D7/14—Balanced arrangements
  • H03D7/1425—Balanced arrangements with transistors
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
  • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
  • H03D7/14—Balanced arrangements
  • H03D7/1425—Balanced arrangements with transistors
  • H03D7/1441—Balanced arrangements with transistors using field-effect transistors
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
  • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
  • H03D7/14—Balanced arrangements
  • H03D7/1425—Balanced arrangements with transistors
  • H03D7/1458—Double balanced arrangements, i.e. where both input signals are differential
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
  • H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
  • H03D2200/0041—Functional aspects of demodulators
  • H03D2200/0043—Bias and operating point
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
  • H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
  • H03D2200/0041—Functional aspects of demodulators
  • H03D2200/0047—Offset of DC voltage or frequency
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
  • H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
  • H03D2200/0041—Functional aspects of demodulators
  • H03D2200/009—Reduction of local oscillator or RF leakage

Definitions

• This invention relates to the field of communications, and in particular to a switching and bias correction system for direct conversion receivers.
• Direct conversion receivers are commonly used in wireless communication devices, such as cellular telephones.
• a particular concern in the design of such devices is the interference that each device may cause to each other device in a local environment.
• LO local oscillator
• RF radio-frequency
• FIG. 1 illustrates an example schematic of a prior art direct conversion receiver system 100.
• a mixer 150 demodulates an RF signal 110 via a local oscillator 120 to produce a baseband output Vout.
• the complementary outputs of the local oscillator 120 are true inversions of each other, if the transistors and load resistors are matched, and if the input transconductance is ideally balanced, there will be no leakage of the local oscillator 120 into the RF signal 110.
• differential circuits are used throughout, thereby cancelling the common-mode leakage or noise. If the complementary outputs, or phases, of the local oscillator 120 are not truly complementary of each other, the switching points of the transistors in the mixer 150 will differ, and a difference signal at the local oscillator frequency will be created.
• this difference signal is a common-mode signal
• an imbalance of the input transconductance at the tail nodes 151, 152 will transform this common-mode signal to a differential-mode signal, which will be propagated back to the RP signal 110, and possibly emanated from the RF antenna at the local oscillator frequency.
• random mismatches of component values within the mixer 150 may affect the DC offset of one or more of the transistors, such that the crossover points in the individual transistor pairs is offset from the instant where the complementary outputs of the local oscillator 120 cross. Such an offset will produce a mark:space ratio that is no longer 1:1, and the signals at the tail nodes 151, 152 will not be matched.
• This mismatch will produce a differential-mode signal at the local oscillator frequency that is propagated to the RF signal 110, and possibly emanated from the RF antenna, regardless of the balance of the input transconductance at the tail nodes 151, 152. It is an object of this invention to reduce the amount of leakage in a local oscillator of a direct conversion receiver. It is a further object of this invention to transform residual leakage in the local oscillator to common-mode leakage.
• the direct conversion mixer demodulates a radio-frequency (RF) input signal via mixing with a local-oscillator (LO) signal to provide a differential baseband output signal.
• a differential peak detector compares the peak signal value at each side of the mixer's differential output, and a differential integrator averages the difference between these peak signal values to provide the measure of bias offset.
• the corrective network adds a correction offset to each of the local oscillator local oscillator paths on each of the switching pairs that provide the differential output, but opposite to the local oscillator connections. By applying the correction offset to the opposing transistor in each pair, the difference in switching time between the pairs is reduced, and, correspondingly, the differential-mode leakage from the local oscillator to the RF input stage is reduced.
• FIG. 1 illustrates an example schematic of a prior art direct conversion receiver.
• FIG. 2 illustrates an example schematic of a direct conversion receiver with bias-offset correction in accordance with this invention.
• FIG. 3 illustrates an example schematic of a bias error detector and corrective network in accordance with this invention.
• the same reference numerals indicate similar or corresponding features or functions.
• FIG. 2 illustrates an example schematic of a direct conversion receiver 200 with bias- offset correction in accordance with this invention.
• the receiver 200 includes a mixer 250, corresponding to the mixer 150 of the prior art FIG.
• the input RF signal is alternately mixed with symmetric half-cycles of the local oscillator, each half cycle being processed by alternate transistors in each differential branch of the mixer. Because of the symmetric structure and processing in the ideal mixer, each side, or phase, VoutA and VoutB, of the differential voltage output Vout will exhibit equal and opposite signal excursions about a common DC level.
• ком ⁇ онент variations in the mixer that affect the bias of the transistors will shift the crossover points in the individual transistor pairs, and cause an imbalance within the transistor pair and/or between the transistor pairs.
• imbalance is used hereinafter to refer to responses that differ from the symmetric responses of an ideal mixer.
• This invention is premised on the observation that imbalances caused by component variations in a mixer cause an imbalance between the phases of the differential output of a direct conversion mixer, and a measure of the imbalance at the differential output can be used to correct the mixer for such imbalances.
• a bias-error detector 230 detects the imbalance within the opposing phases VoutA and VoutB of the differential output Vout.
• the detected imbalance is provided to a bias error corrector 245 in the corrective network 240, to provide correction signals CA and CB for adjusting the bias of each of the transistors T1A, TIB, T2A, and T2B.
• the correction signals CA and CB are directly correlated to the imbalance of VoutA and VoutB, respectively.
• the correction signals CA, CB are applied in opposition to the local oscillator 120. That is, correction signal CA is applied to transistors TIB and T2B, to affect VoutB, and correction signal CB is applied to transistors T1A and T2A, to affect VoutA.
• FIG. 3 illustrates an example schematic of a bias error detector 230 and corrective network 240 in accordance with this invention, although other techniques for detecting an imbalance within and between each phase of a differential output pair, VoutA and VoutB, and for providing a correction signal CA, CB to the mixer 250 to compensate for the imbalance will be evident to one of ordinary skill in the art in view of this disclosure.
• the example bias error detector 230 comprises a differential amplifier, to eliminate the common DC potential of the differential output pair, followed by a pair of rectifier-capacitors, to form a peak-detector pair for measuring the peak excursion of each phase of the differential output pair relative to the common DC potential.
• the corrective network 240 includes a differential integrator 245 that averages the differences between the peak values to produce the correction values CA, CB.
• the summing devices S1A, SIB, S2A, and S2B add the correction values CB, CA to the opposing local oscillator signals LO(A), LO(B) to adjust the bias of the corresponding transistors T1A, TIB, S2A, and S2B, respectively.
• FIG. 3 also illustrates an example summing device SIB.
• the correction signal is applied via a large resistor Rl, relative to a smaller resistor R2 in the local oscillator path. In this manner, the resistor R2 sets the common-mode bias, while the resistor Rl modifies the bias based on the unbalance between the phases of the differential output Vout.
• the local oscillator is also capacitively coupled to the mixing transistor.

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• Engineering & Computer Science (AREA)
• Power Engineering (AREA)
• Superheterodyne Receivers (AREA)
• Radar Systems Or Details Thereof (AREA)

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Publications (1)

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Family Applications (1)

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Cited By (4)

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Citations (4)

• 2003
  • 2003-07-25 DE DE60324204T patent/DE60324204D1/de not_active Expired - Lifetime
  • 2003-07-25 EP EP03817621A patent/EP1652292B1/en not_active Expired - Lifetime
  • 2003-07-25 AU AU2003255876A patent/AU2003255876A1/en not_active Abandoned
  • 2003-07-25 CN CN03826838.8A patent/CN100576721C/zh not_active Expired - Fee Related
  • 2003-07-25 WO PCT/IB2003/003362 patent/WO2005011103A1/en not_active Ceased
  • 2003-07-25 JP JP2005504543A patent/JP4466870B2/ja not_active Expired - Fee Related
  • 2003-07-25 AT AT03817621T patent/ATE411641T1/de not_active IP Right Cessation

Patent Citations (4)

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