WO2005002230A1 - Postfiltre, procede de postfiltrage et decodeur de signal video - Google Patents

Postfiltre, procede de postfiltrage et decodeur de signal video Download PDF

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Publication number
WO2005002230A1
WO2005002230A1 PCT/JP2003/016759 JP0316759W WO2005002230A1 WO 2005002230 A1 WO2005002230 A1 WO 2005002230A1 JP 0316759 W JP0316759 W JP 0316759W WO 2005002230 A1 WO2005002230 A1 WO 2005002230A1
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Prior art keywords
filter
pixel
block
video signal
post
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PCT/JP2003/016759
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English (en)
Japanese (ja)
Inventor
Tomonori Fukuta
Yoshiko Hatano
Junko Shinohara
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Mitsubishi Denki Kabushiki Kaisha
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Publication of WO2005002230A1 publication Critical patent/WO2005002230A1/fr

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/85—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression
    • H04N19/86—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving reduction of coding artifacts, e.g. of blockiness
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/117—Filters, e.g. for pre-processing or post-processing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/80—Details of filtering operations specially adapted for video compression, e.g. for pixel interpolation

Definitions

  • the present invention relates to a boost filter, a boost filter processing method, and a video signal decoding device.
  • the present invention relates to a post filter applied to a decoding device for decoding a video signal.
  • a decoding device for decoding a video signal.
  • block distortion generated at the time of encoding is used. It is a technology that can demonstrate its true value in reducing or eliminating it. Background art
  • the following patent document proposes a technique of filtering a block distortion generated at a block boundary based on information of motion compensation.
  • Non-Patent Document 1 since many adjacent pixels are used as judgment elements in the filter judgment, there is a problem that the amount of calculation for the judgment processing and the filter processing is large. In addition, a large amount of computation inevitably increases power consumption. Increased power consumption is a major problem, especially for devices with small battery capacity such as mobile terminals.
  • the present invention has been made in order to solve the above-mentioned concerns, and has as its object to reduce the circuit scale by reducing the amount of calculation and to reduce power consumption.
  • the post filter of the present invention includes:
  • a boost filter disposed at a subsequent stage of a decoding circuit that outputs a signal obtained by decoding a video signal encoded in units of blocks as a decoded video signal
  • the N-th block and the N-th block included in the decoded video signal are adjacent to each other across a block boundary
  • the pixel amplitude value of the pixel c which is within the N_1st block and which is closest to the block boundary is C, and the pixel amplitude of the pixel b which is on the extension line including the pixel c and is adjacent to the pixel c
  • the value is B
  • the pixel amplitude value of the pixel a adjacent to the pixel b is A
  • the pixel amplitude value of a pixel d adjacent to the pixel c across the block boundary in the Nth block and on the extension line is D
  • the pixel amplitude of a pixel e adjacent to the pixel d is The value is E
  • the pixel adjacent to the pixel e is ⁇
  • F is the pixel amplitude value of
  • a filter determiner that determines whether or not block distortion has occurred at the block boundary based on at least the pixel amplitude values C and D, and outputs the determination result
  • the filter processing is performed on the decoded video signal based on at least the pixel amplitude values C and D, and the processing result is displayed. Filter to output as signal
  • FIG. 1 is a block diagram showing a configuration of a video signal decoding apparatus according to Embodiment 1 of the present invention.
  • FIG. 2 is a diagram showing an input signal of an encoding method according to Embodiment 1 of the present invention.
  • FIG. 3 is a diagram for defining pixel values around a block boundary according to the first embodiment of the present invention.
  • FIG. 4 is a flowchart showing a filter determination procedure according to Embodiment 1 of the present invention.
  • FIG. 5 is a flowchart showing another filter determination procedure according to Embodiment 1 of the present invention.
  • FIG. 6 is a diagram showing processing of the filter A according to Embodiment 1 of the present invention.
  • FIG. 7 is a diagram illustrating another configuration of the Boost filter according to Embodiment 1 of the present invention.
  • FIG. 8 is a diagram showing processing of the filter A according to Embodiment 2 of the present invention.
  • FIG. 9 is a diagram showing a configuration of a post filter according to Embodiment 3 of the present invention.
  • FIG. 10 is a flowchart showing a filter determination procedure according to Embodiment 3 of the present invention.
  • FIG. 11 is a diagram showing processing of a filter according to Embodiment 3 of the present invention.
  • FIG. 12 is a diagram showing a data table according to the fifth embodiment of the present invention. '
  • FIG. 13 is a block diagram showing a configuration of a video signal decoding apparatus according to Embodiment 6 of the present invention.
  • FIG. 14 is a diagram showing a configuration of a post filter according to Embodiment 6 of the present invention.
  • FIG. 15 is a diagram showing a configuration of another Bost filter according to the sixth embodiment of the present invention.
  • FIG. 16 is a flowchart showing a filter determination procedure according to the sixth embodiment of the present invention.
  • FIG. 17 is a flowchart showing another filter determination procedure according to the sixth embodiment of the present invention.
  • FIG. 18 is a block diagram showing a configuration of a video signal decoding device according to Embodiment 7 of the present invention.
  • FIG. 19 is a diagram showing a configuration of a post filter according to Embodiment 7 of the present invention.
  • FIG. 20 is a diagram showing a configuration of another Bost filter according to Embodiment 7 of the present invention.
  • FIG. 21 is a flowchart illustrating a filter determination procedure according to the seventh embodiment of the present invention.
  • FIG. 22 shows another filter determination procedure according to Embodiment 7 of the present invention. It is a flowchart shown.
  • FIG. 23 is a block diagram showing a configuration of a video signal decoding device according to Embodiment 8 of the present invention.
  • FIG. 24 is a diagram illustrating a configuration of a Bost filter according to Embodiment 8 of the present invention.
  • FIG. 25 is a diagram showing a configuration of another Bost filter according to Embodiment 8 of the present invention.
  • FIG. 26 is a flowchart showing a filter determination procedure according to Embodiment 8 of the present invention.
  • FIG. 27 is a flowchart showing another filter determination procedure according to the eighth embodiment of the present invention.
  • FIG. 28 is a diagram showing a configuration of a Bost filter according to Embodiment 9 of the present invention.
  • FIG. 29 is a flowchart showing a filter determination procedure according to Embodiment 9 of the present invention.
  • FIG. 30 is a diagram illustrating processing of the filter A according to the ninth embodiment of the present invention.
  • FIG. 31 is a diagram defining pixel values around a block boundary according to Embodiment 10 of the present invention.
  • FIG. 32 is a diagram showing a configuration of a post filter according to Embodiment 10 of the present invention.
  • FIG. 33 is a flowchart showing a filter determination procedure according to Embodiment 10 of the present invention.
  • FIG. 34 is a diagram showing processing of the filter C according to Embodiment 10 of the present invention.
  • BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described based on illustrated embodiments.
  • FIG. 1 is a block diagram schematically showing a configuration of a video signal decoding apparatus according to Embodiment 1 of the present invention.
  • the MPEG 4 standard is used as a video compression standard of a video signal decoding device
  • the subject of the present invention is applicable to all such video signal decoding devices that decode coded video signals obtained by coding video signals in units of blocks. It is possible.
  • a video signal decoding device using a video compression standard such as MPEG1, 'MPEG2, H.263, or the like.
  • the main part of the video signal decoding apparatus is roughly divided into a decoding circuit 100 and a post-filter 109 arranged at the subsequent stage or on the output side.
  • the post filter 109 serving as a core part of the present embodiment performs a specific filter decision on the decoded video signal output from the decoding circuit 100 and then performs a specific filter determination on the input decoded video signal.
  • filter processing interpolation processing
  • the function of such a post / letter 109 will be described later.
  • the input buffer 101 receives and stores the elementary stream of the MPEG 4. Then, the elementary stream stored in the input buffer 101 is sent to the variable-length decoder 102 for variable-length decoding. As a result, the variable-length decoder 102 Outputs data such as data and motion vector data. Among the outputs of the variable length decoder 102, the coefficient data is sent to the inverse quantizer 103 and inversely quantized. Then, the inverse quantizer 103 transmits its output as an input of the inverse DCT unit 104.
  • the inverse DCT unit 104 performs an inverse DCT transform to obtain a frame image (intra-frame coded image, Generate and output inter-frame prediction coded images and bidirectional prediction coded images).
  • a frame image is provided to the adder 105 for synthesizing the image.
  • the motion vector data is sent to the motion compensator 108. If the frame image is an intra-frame coded image, the adder 105 outputs the frame image as it is to the post filter 109 as a decoded video signal.
  • the adder 105 outputs the result of the addition to the post filter 109 as a Ning signal video signal.
  • the decoded video signal is also input to the previous frame memory 106 and the current frame memory 107 inside the decoding circuit 100.
  • the previous frame memory 106 stores the image of the frame one before the currently decoded image
  • the current frame memory 107 stores the currently decoded image. I have.
  • the output of the previous frame memory 106 and the output of the current frame memory 107 are both supplied to the input of the motion compensator 108, and the output of the inverse DCT unit 104 is interframe predictive coding.
  • the motion compensator 108 uses the output of the previous frame memory 106 and the motion vector from the variable length decoder 102 in the forward direction. Prediction, the backward prediction using the output of the current frame memory 107 and the motion vector of the variable-length decoder 102, and the bidirectional prediction, , Are input to the adder 105.
  • a video signal is divided into macroblocks, and data is compressed in units of subdivided blocks. Therefore, the decoded video signal obtained by decoding the data compressed and encoded based on the MPEG 4 standard has a block boundary that does not exist in the video signal before being encoded. Block distortion is noticeable. Therefore, the decoded video signal is transmitted to the boss located at the subsequent stage of the decoding circuit 100.
  • the filter is converted into a display video signal from which block distortion has been reduced or eliminated by the filter 109, and further converted into a standard video signal by the display buffer 110, and then a display device (not shown), etc. Often sent to.
  • the configuration and operation of the Bost filter 109 which forms the core will be described.
  • the possed filter 109 performs block distortion determination and filter processing using, for example, pixel values B, C, D, and E before and after the block boundary as shown in FIG.
  • Post filter 109 (i) Based on the pixel values of each two pixels before and after the block boundary included in the decoded video signal (B, C, D, E in Fig. 3, a total of four pixel values) It is determined whether or not block distortion has occurred at the block boundary, and a filter determiner 111 that outputs the determination result, and (ii) that the filter determiner 111 determines that block distortion has occurred.
  • the decoded video signal is filtered based on each of the two pixel values before and after the block boundary (B, C, D, and E in Fig. 3).
  • filter A a filter 112 that outputs the processed video signal as a display video signal.
  • the decoded video signal output from the adder 105 is supplied to the post filter 109 as both inputs of the filter determiner 11 ⁇ and the filter A112.
  • the determination method or the determination processing operation in the filter determiner 111 will be described later. If the filter determiner 111 determines that block distortion has occurred by a determination method described later, the filter determiner 111 instructs the filter A 112 to execute filter processing. Sends a control signal that is an ON signal to be commanded. On the other hand, if it is determined that no block distortion has occurred, the filter determiner 111 sends the filter All 2 an OFF signal to instruct the filter All 2 to execute no filtering. Is transmitted.
  • the filter All 2 reduces or removes block distortion from the decoded video signal according to the command of the filter ⁇ N signal.
  • Filter processing (details of which will be described later) is performed, and the display video signal from which block distortion has been reduced or eliminated is output to the display buffer 110.
  • the filter All 2 does not perform the filter processing to reduce or remove the block distortion, and the input decoded video signal is directly used as the display decoded image signal to be displayed in the display buffer. Output to 1 1 0.
  • block distortion means a step-like difference between the amplitude values of pixels before and after the block boundary (hereinafter, the amplitude value of one pixel is referred to as “pixel value”).
  • the pixel values around the block boundary that is, the pixel values of the two pixels before and after the block boundary (a total of four pixel values), as shown in FIG.
  • the pixel value C of the pixel c immediately before the pixel c, the pixel value B of the pixel b immediately before the pixel c, the pixel value D of the pixel d immediately after the block boundary, and the pixel of the pixel e one pixel after the pixel d Define the value E and each.
  • the “pixel value” is a luminance, a color difference signal, an RGB value, or the like.
  • the filter ′ in order to distinguish the case where block distortion has occurred at the block boundary from the original boundary of the image, the filter ′ is not always executed, but the filter shown in FIG.
  • the determiner 111 determines whether or not block distortion has occurred. Therefore, the filter decision unit 111 uses the pixel values B to E of the pixels around the block boundary to determine whether the difference between the two pixel values B and C before and after the boundary is block distortion, Determine if there is any.
  • the filter decision unit 111 uses the pixel values B to E of the pixels around the block boundary to determine whether the difference between the two pixel values B and C before and after the boundary is block distortion, Determine if there is any.
  • a pixel value boundary may accidentally occur on a block boundary. At this time, it is generally considered that the difference between the two pixel values before and after the boundary is relatively large, that is, there is a large color change.
  • the filter judgment unit .111 sets the absolute value of the difference between the two pixel values before and after the block boundary to be less than a predetermined value (hereinafter, referred to as a “first threshold”). If so, it is determined that there is block distortion.
  • the filter determination process in the filter determiner 111 is shown in the flowchart of FIG.
  • the first threshold value for determining the filtering process is represented by K. 'At this time, the filter decision unit 1 1 1
  • step 201 If the first arithmetic expression is satisfied in step 201, and the filter determiner 111 determines that there is a difference in pixel values, the filter determiner 111 proceeds to the next step 202a At
  • the filter determiner 111 determines that there is block distortion, and transmits an ON signal to the filter A 112.
  • the first threshold value K will be described.
  • the value of the first threshold value K is sufficiently large, block distortion is determined up to the boundary of the pixels that should exist.
  • the filter determiner 111 uses Expression (2) (second operation, Expression) as a determination condition. This is because when the amount of information allocated at the time of encoding is small, the decoded block is likely to lose information around the block boundary, and when block distortion occurs, equation (2) may be satisfied. Because it is almost. On the other hand, when Equation (1) is satisfied but Equation (2) is not satisfied, this is almost always a pixel boundary included in the original video signal. For example, in the case of a striped pattern. With this effect, it is possible to improve the accuracy of the block distortion determination. It should be noted that the determination order or the steps 201 and 202a of the equations (1) and (2) shown in FIG. 4 may be exchanged.
  • Equation (2) the determination for detecting a step-like change was made by Equation (2).
  • equation (2) can be replaced with equation (3).
  • the expression (, 3) is defined as the second operation expression. .
  • FIG. 5 shows a flowchart in the case where the equations (1) and ('3) are used.
  • FIG. 5 is different from the flowchart of FIG. 4 in that step 202a is replaced with step 202. '
  • the filter processing of the filter A112 is determined as shown in FIG. That is, the filter processing shown in FIG. 6 performs linear interpolation using equation (4).
  • the pixel value of each of two pixels (for a total of four pixels) before and after the block boundary is used to determine (I) whether or not the pixel is a step and the magnitude of the difference between the pixel values.
  • the filter processing is performed by correcting the pixel values C and D of each one pixel at the boundary by using a straight line.
  • Table 1 shows the environment in which the filter processing time was measured. MPEG4 and a screen size of QVGA (320 pixels x 240 lines) were used.
  • Table 2 shows the measurement time. Table 2 shows the total The measurement time includes the decoding time at a frame rate of 15 fps with a bit rate of 384 kbps.
  • the ONZOFF signal is output from the filter determiner 11 1 to the filter A 1 12, and the filter processing in the filter All 2 is performed based on the received signal.
  • the filter processing is performed by the filter A112, and the output from the filter A112 is performed in response to the switching signal from the filter determiner 111.
  • the configuration may be such that one of the decoded video signals 115 is selected.
  • the post filter 109 is configured as shown in FIG. May be. Second embodiment
  • the second embodiment is to improve the correction method of the filter A112 in the first embodiment, and there is no difference in other points. Therefore, in this embodiment, FIGS. 1 and 5 are referred to. That is, the feature of this embodiment is that, as shown in FIG. 8, smooth interpolation processing using a predetermined function is performed on the pixel values of each of two pixels before and after the block boundary (for a total of four pixels). Therefore, the two pixel values before and after the block boundary are changed so as to be smoothly interpolated.
  • Odor T uses a power of 2, but it may be a natural number or a rational or irrational power, but must be a number greater than 0.
  • equation (7) Part of equations (5) and (6) is defined as in equation (7).
  • the maximum slope of the capturing straight line is the filter determination value KZ3, and therefore, the equation (8) is defined.
  • equation (7) may be a function of a monotonous increase passing through the origin and may be equation (9).
  • a feature of the third embodiment is that the video signal decoding apparatus according to the first or second embodiment determines whether or not to perform filter processing in the post filter 109 (see FIG. 5 '). ) Has been changed. Therefore, also in the present embodiment, the configuration operation of both circuits 100 and 110 in FIG. 1 is used.
  • the filter of the post-filter 109 converts the decoded video signal into () based on the two pixel values before and after the block boundary in response to the reception of the ON signal output from the filter determiner 111a. And (ii) a second filter for the decoded video signal based on the two pixel values before and after the block boundary in response to the reception of the ON signal output by the filter decision unit 111a. And a filter B1113 for performing filter processing.
  • the filter A112 corresponds to the filter A (FIG. 1) in the first embodiment. Therefore, it can be said that the addition of the filter B113 has a feature of the present embodiment. Therefore, the post filter 109 further includes a switch 114 for switching the outputs of the first and second filters 112, 113 according to the switching signal output from the filter determiner 111a. I have. Details are as follows.
  • the decoded video signal output from the adder 105 is input to the filter determiner 111a, the filter A112, and the filter B113.
  • the determination method in the filter determiner 111a will be described later.
  • the filter determiner 111a determines that block distortion has occurred based on the input decoded video signal
  • the filter determiner 111a Fill command to perform filter processing While the filter operation ON signal (control signal) is output, a filter OFF signal (control signal) is sent to the filter Bl13 to instruct not to perform the filter processing.
  • the filter determiner 111a transmits to the switch 114 a switching signal instructing to output the output of the filter A112 as a display decoded video signal.
  • switch 114 is switched to the output of filter A112. In this way, the decoded display video signal from which the block distortion has been reduced or eliminated is output to the display buffer 110 via the output terminal of the filter A112 and the switch 114.
  • the filter determiner 111a determines that block distortion has occurred based on the input decoded video signal
  • the filter determiner 111a A filter OFF signal that instructs not to perform filter processing is sent, and a filter ON signal that instructs that filter processing is performed is sent to filter B113, and conversely, filter B11 is sent.
  • a switch signal for instructing the output of 3 to be output as the final decoded video signal is transmitted to the switch 114.
  • the switch 114 switches its switching terminal to the output terminal side of the filter B 113. Therefore, the decoded video signal is subjected to the second filter processing by the filter B 113 and then sent to the display buffer 110 as a display video signal.
  • the filter discriminator 111a transmits the filter OFF signal to the filter A111.
  • the filter OFF signal is sent to the filters B1 13 and the switch 1 1 4 is switched to the filter A side.
  • any one of the filter A 112 and the filter B 113 is used. Does not perform any filtering on A decoded video signal having the same content as the signal at the time of input to the boost filter 109 is directly supplied to the switch 114 as an input.
  • the decoded video signal is sent as it is to the display buffer 110 as a display decoded video signal.
  • the post filter shown in FIG. 9 selects either the output from filter All 2, the output from filter B 113, or the decoded video signal 1 15. It is good also as composition which performs.
  • FIG. 10 is a flowchart showing a judgment processing operation in the filter judgment unit 11a.
  • the filter decision unit 1 1 1 a determines in step 201 that the block boundary pixels C and D do not satisfy Equation (1), the difference between the block boundary pixel values C and D is It is not regarded as distortion, and as a result, it is determined that no filtering is performed, and the ⁇ FF signal is transmitted to both filters 112, 113. In this case, as described above, the result is the same regardless of whether the switching signal output from the filter decision unit L11a instructs the output of both filters 112 and 113. is there.
  • the filter determiner 1 1 1a determines whether the block boundary 4-pixel values B, C, D, and E satisfy Expression (1) and do not satisfy Expression (3). However, it is determined that the second filter processing is newly performed in the filter B113, and the filter ON signal is transmitted only to one of the filters B113, and the output of the filter B113 is transmitted to the output of the filter B113. It also outputs a switching signal to command the switching of. Note that the filter processing in the filter B 113 will be described later. On the other hand, when the pixel values B, C, D, and E of the block boundary 4 satisfy both the equations (1) and (3), the filter determiner 1 1 1a performs the processing according to the first embodiment.
  • the first filter processing similar to that of the second embodiment is to be executed in the filter A 1 12, and the above-described filter ON signal, the filter OFF signal, and the switching signal 1 1 2, Filter B Sent to 1 1 3 and switch 1 1 4
  • the filter B 113 performs a filtering process as exemplified in FIG.
  • This filter processing performs the interpolation processing given by Expressions (5) and (6) or Expressions (10) and (11).
  • these functions may be any functions that satisfy the conditions described in the second embodiment.
  • both the filter A112 and the filter B113 execute the interpolation processing using the same function. That is, when the first filter processing is performed using the equations (5 ′) and (6) in the filter A 112, the equation (5) and the equation (6) are also applied to the filter B 113. Executing the second filter process defined in (2)) With such a configuration, the process at the block boundary can be made smoother, and the image quality can be further improved. Moreover, the amount of computation does not increase significantly in the decision flow of the Boost filter 109 (see Fig. 10). With a small increase in the amount of computation, finoleta performance can be further improved. There is also the advantage that it can be done.
  • Fourth embodiment performs the interpolation processing given by Expressions (5) and
  • the feature of the fourth embodiment lies in that different functions are used as the functions of the filter A 112 and the filter B 113 in the third embodiment.For example, in the case of the 7-filter A 112, Expressions (5) and (6) are used, and Expression (10) and Expression (11) are used in the filter B113. Alternatively, the opposite usage relationship may be used.
  • the feature of the present embodiment is that the filter in the post filter 109 is described as follows: “In the arithmetic expression used in the filter processing, each of the positions in relation to the function expression using the position data of each of the two pixel values before and after the block boundary as a variable. It has a data table consisting of four values calculated in advance for each data, and the filter processing is executed by referring to this data table for each position data. That is, the fifth embodiment is characterized in that the filtering operation in any one of the first to fourth embodiments is simplified by referring to a table.
  • the distance X from the block boundary is expressed by the following equation (1 2). Since it is fixed, the term (f (x)) related to the distance X from the block boundary is calculated in advance in the arithmetic expression used in the filter processing, and the calculated value for each distance X is configured as table data. It is possible to do so. If such table data is stored in advance in the filter A 112 and the finalizer B 113, the filter refers to the data in the above table when executing the filter processing. As a result, the calculation of the term f (x) relating to the distance X does not need to be performed again. It becomes possible.
  • the part of equation (7) is tabulated and
  • the table is configured as shown in FIG. In FIG. 1.2, ⁇ is set to 0.1 in equation (7), and a value obtained by rounding the calculation result of equation (7) to the third decimal place is used as table data. Since the pixel value is a positive number, a decimal number is used in the table of FIG. 12; however, in general, the arithmetic unit that performs the filtering process has a bit shift function. Can be multiplied by a power of 2, and the final operation result can be obtained by bit shift.
  • the filter determiner sets a threshold based on the encoding parameter output from the decoding circuit. That is, in each of the first to fifth embodiments, the threshold value K for judging the filtering process is a constant value determined prior to decoding.
  • the threshold value K for judging the filtering process is a constant value determined prior to decoding.
  • the encoding parameter is an amount characterizing the encoding step when the video signal is encoded by, for example, the MPEG-4 method.
  • the coding parameters include the quantization parameter Qp, There is an inter-block ratio and the like.
  • the intra-block / inter-block ratio is the ratio between the number of macroblocks coded as intra macroblocks and the number of macroblocks coded with intermacroblocks. When is large, it means that there are many intra macroblocks, and at this time the code amount is large. In other words, the intra-block / inter-block ratio can also be treated as an amount characterizing encoding.
  • a quantization parameter QP hereinafter, referred to as Qp
  • Qp takes a value in the range from '1 to 31. '
  • FIG. 14 or FIG. 14 An example of the configuration of the boost filter 109a is shown in FIG. 14 or FIG.
  • encoding parameters are given as new inputs to the filter determiner 111 or the filter determiner 111a in FIG. 1 or FIG. 9, respectively.
  • Fig. 16 and Fig. 17 show the flow chart of the filter judgment in the filter judgment unit 11b and 11c, respectively.
  • the post filter shown in FIG. 14 may be configured to select either the output from the filter A 112 or the decoded video signal 115 as shown in FIG.
  • the Bost filter shown in FIG. 15 is configured to select one of the output from the filter A.112, the output from the filter B113, and the decoded video signal 115. It is good. Seventh embodiment,
  • a feature of the present embodiment is that the filter determiner sets the above-described threshold based on a control value input from the outside.
  • the control value input from the outside is, for example, a value set by the user.
  • the first threshold value K for filter processing determination in each of Embodiments 1 to 5 is a predetermined value determined in advance prior to decoding.
  • the first threshold value K can be changed based on a control value input from the outside.
  • FIG. 18 shows the overall configuration of the device according to the seventh embodiment.
  • the post finalizer 109b is newly controlled from the outside.
  • FIG. 19 or FIG. 20 shows a detailed configuration example of the post-filter letter 109 b.
  • external control is given as a new input to the filter determiner 111 or the filter determiner 111a in FIG. 1 or FIG. 9, respectively. .
  • This external control amount is defined as an external control value CK.
  • a new filter threshold is defined as a threshold Th-i.
  • Th_i K + ⁇ (14)
  • Th_i ⁇
  • Equation (14) or Equation (15) can be applied.
  • the external control value ⁇ works to adjust the threshold value ⁇ which was originally determined as a fixed value.
  • equation (15) the external control value ⁇ works to replace the original fixed value ⁇ .
  • the filter decision unit may use these equations (1 4) and (15) separately, or may use both equations (1 4) and (1 5) may be used as a combination.
  • -New filter threshold value Th h-i is shown in Fig. 21 or Fig. 22 for each filter judgment slow chart in filter judgment unit 1 lid or filter judgment unit 1 1 1 e, respectively. .
  • the arithmetic expression of step 2 ⁇ 1 b is given by the expression (16) in place of the expression (1) in each of the first to fifth embodiments.
  • the Bost filter shown in FIG. 19 may be configured to select either the output from the filter A 112 or the decoded video signal 115 as shown in FIG.
  • the post filter shown in FIG. 20 is configured such that the output power from the filter A 112, the output from the filter B 113, or the decoded video signal 115 is selected. Is also good. Eighth embodiment.
  • a feature of this embodiment is that the filter determiner sets a threshold value based on an encoding parameter output from the decoding circuit and a control value input from the outside. .
  • the coding parameter is used as the threshold in the sixth embodiment.
  • the threshold value can be changed under external control together with the encoding parameter. ⁇ .
  • FIG. 23 shows the overall configuration of the apparatus according to the eighth embodiment.
  • the post-filter 109c receives the coding parameters from the variable-length decoder 102a as inputs for the filter threshold control, and also receives a new external control signal as input.
  • FIG. 24 or FIG. 25 shows the configuration of the post filter 109c.
  • the coding parameter and the external control value are set to the threshold value for the filter decision unit 111 or the filter decision unit 111a in FIG. 1 or FIG. 9, respectively. Provide as new input for decision.
  • Th—k two Q p + / 3 (17)
  • the filter threshold Th—k is defined as in equation (17).
  • the setting of the threshold value by this equation (17) means that it is possible to perform filter control by controlling the value as the bias, while performing adaptive filter processing based on the Qp value. Which means
  • FIG. 26 or FIG. 27 the flow for providing the filter judgment processing in the filter judgment unit 111 f or the filter judgment unit 111 g is shown in FIG. 26 or FIG. 27, respectively. Shown in the figure.
  • Each step 201c in FIG. 26 or FIG. 27 corresponds to a case where equation (1) in each of the first to fifth embodiments is replaced with equation (18).
  • the post filter shown in FIG. 24 may be configured as shown in FIG. 7 to select either the output from the filter A 112 or the decoded video signal 115. Select the post filter shown in Fig. 25 from the output power from filter A 112, the output power from filter B 113, the output power from these, and the decoded video signal 115. It is good also as composition which performs. Ninth embodiment.
  • Embodiments 1 to 8 describe examples in which the filter discriminator performs block distortion judgment using two pixels before and after a block boundary. However, in the present embodiment, a case will be described where the block distortion is determined using one pixel before and after each block boundary.
  • FIG. 28 shows a configuration example of the post filter 109.
  • the post filter shown in FIG. 28 performs the filter judgment processing in the filter judgment unit 111 shown in FIG. 1 according to the flowchart shown in FIG. . Therefore, FIG. 29 is a flowchart showing the judgment processing operation in the filter judgment unit 111h. If the pixel values C and D do not satisfy Equation (1) in step 201, the filter determiner 1 1 1 h determines that block distortion has occurred, and performs filter processing with the filter A 1 1.2. A signal for performing the above is output, and in step 203, the filter processing is performed by the filter A112. On the other hand, if the pixel values C and D do not satisfy the expression (1) in step 201, it is determined that no block distortion has occurred, and the filter processing in the filter A 112 is not performed.
  • the flowchart shown in FIG. 29 is obtained by omitting step 202 from the flowchart shown in FIG. Equation (19) using the pixel value C and the pixel value D is used for the filter processing in step 203.
  • a post filter as in the present embodiment may be used.
  • the post-filter shown in FIG. 28 may be configured to select either the output from the filter A 112 or the decoded video signal 115 as shown in FIG.
  • the case where threshold value K is used in step 201 has been described, but TH-i, TH_, k quantization parameter Qp may be used as the threshold value. 10th embodiment
  • FIG. 32 shows a configuration example of the post filter 109.
  • the Bost filter shown in FIG. 32 performs the filter determination process in the filter determination unit 111 in FIG. 1 according to the flowchart shown in FIG. Therefore, FIG. 33 is a flowchart showing the judgment processing operation in the filter judgment unit 111 i.
  • the filter determiner 1 1 1 i regards the difference between the block boundary pixel value C and the block as block distortion. Therefore, the filter processing is performed in any one of the filter A112, the filter B113, and the filter C111''6.
  • the pixel values C and D satisfy Expression (1) in step 201, it is determined that no block distortion has occurred, and no filtering is performed. If it is determined in step 201 that block distortion has occurred, the process proceeds to step 206 and the relationship between the pixel values A, B, and C, and the pixel values D, E, and The respective relations of F are determined according to equation (2 0). [Equation 20]
  • FIG. 34 shows the pixel values B, C, D, and E determined according to the equation (21). Note that Y in equation (21) corresponds to a new pixel value. That is, it corresponds to 81, Cl, Dl, and E1 in FIG.
  • step 206 If formula (2 1) is not satisfied in step 206, the process proceeds to step '202, and the relationship between pixel values B and C and the relationship between pixel values D and E are determined according to formula (3).
  • Equation (3) If it is determined that Equation (3) is satisfied, it is considered that there is block distortion due to pixels b and c and pixels d and e.
  • the pixel values C and D are determined according to (4). ',
  • step 202 If equation (3) is not satisfied in step 202, it is considered that the block distortion exists only in pixels C and D, so go to step 205 and determine the pixel value according to equation (19). Determine C and D.
  • the post filter shown in FIG. 32 is, as shown in FIG. 7, any one of the output from the filter A11, the output from the filter B113, and the decoded video signal 115. It is also possible to adopt a configuration in which the selection is made.
  • threshold value K is used in step 201
  • TH-i, TH-k, and quantization parameter Qp may be used as the threshold value.
  • the post filter of the present invention includes:
  • the N-th block and the N-th block included in the decoded video signal are adjacent to each other across a block boundary
  • the pixel amplitude value of the pixel c in the N-th block and closest to the block boundary is C
  • the pixel amplitude value of the pixel b adjacent to the pixel c along one predetermined direction is B
  • the pixel amplitude value of the pixel a adjacent to the pixel b Is A
  • the pixel amplitude value of a pixel d adjacent to the pixel c across the block boundary is D
  • the pixel e of a pixel e adjacent to the pixel d is
  • the amplitude value is E
  • the pixel amplitude value of the pixel f adjacent to the pixel e is F
  • a filter determiner that determines whether or not block distortion has occurred at the block boundary based on at least the pixel amplitude values C and D, and outputs the determination result
  • filter processing is performed on the decoded video signal based on at least the pixel amplitude values C and D, and the processing result is displayed.

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Abstract

Une unité de décision de filtre (111) prend une décision par rapport à la survenue d'une distorsion de bloc au niveau d'une limite de bloc, relative à la non utilisation de la valeur d'amplitude d'au moins un pixel en avant et en arrière de cette limite de bloc, respectivement et, délivre sa décision à un filtre (112). A réception de cette décision précisant qu'une distorsion de bloc survient au niveau de la ligne de bloc, le filtre (112 effectue un filtrage sur un signal vidéo décodé en utilisant la valeur d'amplitude d'au moins un pixel en avant et en arrière de cette limite de bloc, respectivement, et délivre le résultat de filtrage sous forme de signal vidéo d'afficheur. Comme le volume opérationnel peut être réduit, on peut réduire l'échelle de circuit et la puissance de consommation.
PCT/JP2003/016759 2003-06-27 2003-12-25 Postfiltre, procede de postfiltrage et decodeur de signal video WO2005002230A1 (fr)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0346482A (ja) * 1989-07-14 1991-02-27 Kokusai Denshin Denwa Co Ltd <Kdd> 動画像符号化のブロック歪除去方法および装置
JPH04180381A (ja) * 1990-11-14 1992-06-26 Matsushita Electric Ind Co Ltd 画像信号の復号化装置
JPH10191335A (ja) * 1996-12-27 1998-07-21 Sony Corp ブロック歪低減方法及び装置
JPH1198505A (ja) * 1997-09-09 1999-04-09 Lg Semicon Co Ltd 低速伝送での動画像のためのデブロッキングフィルタリング方法
JP2002330436A (ja) * 2001-03-26 2002-11-15 Sharp Corp 選択的な画像フィルタリングを行うための方法、画像の符号化または復号化を実行するための方法およびコーデック

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0346482A (ja) * 1989-07-14 1991-02-27 Kokusai Denshin Denwa Co Ltd <Kdd> 動画像符号化のブロック歪除去方法および装置
JPH04180381A (ja) * 1990-11-14 1992-06-26 Matsushita Electric Ind Co Ltd 画像信号の復号化装置
JPH10191335A (ja) * 1996-12-27 1998-07-21 Sony Corp ブロック歪低減方法及び装置
JPH1198505A (ja) * 1997-09-09 1999-04-09 Lg Semicon Co Ltd 低速伝送での動画像のためのデブロッキングフィルタリング方法
JP2002330436A (ja) * 2001-03-26 2002-11-15 Sharp Corp 選択的な画像フィルタリングを行うための方法、画像の符号化または復号化を実行するための方法およびコーデック

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