WO2004090969A1

WO2004090969A1 - Silicon carbide semiconductor device and method for manufacturing same

Info

Publication number: WO2004090969A1
Application number: PCT/JP2004/004023
Authority: WO
Inventors: Junji Senzaki; Kenji Fukuda
Original assignee: National Institute Of Advanced Industrial Science And Technology
Priority date: 2003-03-24
Filing date: 2004-03-24
Publication date: 2004-10-21
Also published as: JPWO2004090969A1

Abstract

A silicon carbide semiconductor device is disclosed which has a metal-insulating film-semiconductor (MIS) structure composed of a silicon carbide (SiC) semiconductor substrate with excellent characteristics wherein the dielectric breakdown of a silicon oxide film formed on a silicon carbide substrate is improved. The silicon carbide semiconductor device is characterized by having a metal-insulating film-semiconductor (MIS) structure and by comprising an n-type silicon carbide region under a gate insulating film in which region the concentrations of a p-type impurity element and a metal element are respectively not more than 3 × 1014 cm-3. A method for manufacturing a silicon carbide semiconductor device is characterized in that a silicon carbide substrate comprising an n-type silicon carbide region wherein the concentrations of a p-type impurity element and a metal element are respectively not more than 3 × 1014 cm-3 is used and in that an oxide film which is in contact with the silicon carbide substrate is formed through heating in the atmosphere, an oxygen atmosphere or a water vapor atmosphere.

Description

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Description Silicon carbide semiconductor device and method for manufacturing the same

The present invention relates to a silicon carbide semiconductor device fabricated on a silicon carbide (SiC) semiconductor substrate, and more particularly to a silicon carbide semiconductor device having a metal-insulating film-semiconductor (MIS) structure (field effect transistor (MI SFET)). And its manufacturing method.

Compared to silicon (Si), silicon carbide (SiC) has excellent physical properties such as (1) wide band gap, (2) high dielectric breakdown strength, and (3) high electron saturation drift velocity. You. Therefore, by using silicon carbide (SiC) as a substrate material, a power semiconductor element having a high withstand voltage and a low resistance exceeding the limit of silicon (Si) can be manufactured.

Further, the silicon carbide (SiC), as well as silicon (Si), a feature that can be formed of silicon oxide (Si0 ₂₎ which is an insulator by thermal oxidation. For these reasons, it is thought that a high-breakdown-voltage, low-on-resistance MISFET using silicon carbide (SiC) as a substrate material can be realized, and much research and development has been conducted.

However, the realization of the MISFET silicon carbide substrate material, high long-term reliability of silicon oxide to be used as the gate oxide film (Si0 ₂₎ must be guaranteed. As a measure of the long-term reliability of silicon oxide films, the total breakdown charge (Q _BD ) is widely used. This value indicates the total amount of electric charge flowing through the silicon oxide film until the silicon oxide film reaches dielectric breakdown.

However, _D when 50% of the formed by thermal oxidation of silicon carbide on a substrate a silicon oxide film is insulation breakdown is several to several tens mC / cm ² at room temperature, this value is on the Si substrate It has been reported that the thickness is smaller by 10 to 100 than that of a silicon oxide film formed by a thermal oxidation method (for example, see Non-Patent Document 1), which has a serious problem.

[Non-Patent Document 1] J, Anthony et al. "Materials Science and Engineering B61-62, 460 (1999)] Disclosure of the invention

In view of the conventional problems, the present invention improves the dielectric breakdown of a silicon oxide film formed on a silicon carbide substrate, and provides a metal-insulating film-semiconductor (MIS) comprising a silicon carbide (SiC) semiconductor substrate having excellent characteristics. It is an object to obtain a silicon carbide semiconductor device having a structure. The present invention provides a method for forming a silicon oxide film by a thermal oxidation method on a silicon carbide substrate having a low concentration of an impurity element inevitably contained in the substrate, in other words, an impurity element which is not an intentionally doped impurity. It has been found that the formation of a gate insulating film is effective in improving the withstand voltage and long-term reliability of the silicon oxide film.

The present invention has been made based on this finding, and the silicon carbide semiconductor device according to the present invention has an n-type carbide having a p-type impurity element and a metal element having a concentration of 3xl0 ¹⁴ cm- ^{3 or} less, respectively. It has a silicon region.

Further, the silicon carbide semiconductor device according to the present invention has a metal-insulating-film-semiconductor (MIS) structure, and the p-type impurity element and the metal element have a concentration of ³ × 10 ¹⁴ cm ⁻³ or less under the gate insulating film. Metal-insulating film characterized by having a certain n-type silicon carbide region—has a semiconductor (MIS) structure, and the concentration of each of the p-type impurity element and the metal element is 3xlO ^M cm− ³ under the gate insulating film. It has the following n-type silicon carbide region.

The p-type impurity element and the metal element are at least one or two or more of I of Al, B, Ti, Cr, Fe, and Ni, and the total concentration is 5.OxlO ¹⁵ cm " ³ or less. The silicon carbide semiconductor device of the present invention has a DM0SFET, Lateral Resurf M0SFET or UMOSFET.

The MIS structure of a silicon carbide semiconductor device is usually formed on a silicon carbide layer that is epitaxially grown on a silicon carbide substrate. A method of manufacturing a silicon carbide semiconductor device according to the present invention is a method of manufacturing a silicon carbide semiconductor device using a silicon carbide substrate having a silicon carbide layer epitaxially grown on an uppermost layer, wherein the method is intentionally performed during epitaxial growth. The silicon carbide layer is epitaxially grown so that the concentration of each of the impurities other than the doped impurity is ³ × 10 ¹⁴ cm− ³ or less. A method of manufacturing a silicon carbide semiconductor device according to the invention, using a carbonization silicon substrate having n-type silicon carbide region each concentration is less than 3xlO ^w cm_ ³ of p-type impurity element and the metal element, a metal - insulator A method for manufacturing a silicon carbide semiconductor device for forming a gate insulating film having a film-semiconductor (MIS) structure, comprising: forming an oxide film in a portion of the gate insulating film that is in contact with a silicon carbide substrate in the air It is formed by heating in an oxygen atmosphere or a steam atmosphere.

After the oxide film is formed, a silicon oxide film formed by chemical vapor deposition, a silicon nitride film formed by chemical vapor deposition, or a silicon oxynitride film formed by thermally oxidizing a silicon nitride film formed by chemical vapor deposition. Any one or more of them may be formed.

ADVANTAGE OF THE INVENTION According to this invention comprised as mentioned above, it becomes possible to improve the conventional defect and to provide the silicon carbide semiconductor device which has the gate insulating film which has a withstand voltage and long-term reliability. BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a schematic cross-sectional view of the MIS structure used for TDDB measurement.

FIG. 2 is a diagram showing the _QBD dependence of the Weibull plate as a function of the cumulative defect rate P of the silicon oxide film measured by TDDB. BEST MODE FOR CARRYING OUT THE INVENTION

As described above, a silicon carbide semiconductor device having a metal-insulating film-semiconductor (MIS) structure has a structure in which each of the impurity elements that are unintentionally mixed into the silicon carbide (SiC) substrate under the gate insulating film, by setting the concentration and 3xlO ^l cin- ³ below, or by using a silicon carbide substrate concentration of each of the p-type non-pure product elements and metal elements having an n-type silicon carbide region is 3xl0 ¹⁴ cm- ³ or less This significantly improves the dielectric strength and long-term reliability of the silicon oxide film, which is a major feature of the present invention. As the impurity element, Al, B, Ti, Cr , Fe 5 Ni and the like, which easily mixed into the silicon carbide (SiC) substrate, and they are contained in excess of 3X10 ¹⁴ CBT ³ withstand voltage及And long-term reliability. That is, when the above-described impurity element, particularly a metal element, is taken into the silicon oxide film, it acts as a charge trap center, so that electrons injected into the silicon oxide film when stress is applied, or This is because holes generated by impact ionization are trapped, the local electric field in the silicon oxide film is rapidly changed, and the dielectric breakdown life is deteriorated. Therefore, it is extremely important to reduce the impurity element concentration. Such knowledge was first recognized by the present inventors. In particular, the total concentration of these impurity elements is desirably 5.0xl0 ¹⁵ cm- ³ or less.

The present invention uses a silicon carbide (SiC) substrate containing a small amount of impurity elements that are inevitably mixed as a starting material, and forms an oxide film serving as a gate insulating film in a portion in contact with the silicon carbide substrate in the air, The semiconductor device is formed by heating in an atmosphere or a steam atmosphere to constitute a semiconductor device.

Further, any one of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film, or two or more of them can be formed thereon. These single-layer or multiple-layer films can be obtained by chemical vapor deposition and / or thermal oxidation of a silicon nitride film by chemical vapor deposition.

According to the present invention, a silicon carbide (SiC) substrate having excellent characteristics can be used, and a silicon carbide semiconductor device having a gate insulating film having a high withstand voltage and long-term reliability can be manufactured. These silicon carbide semiconductor devices having the MIS structure can be used as silicon carbide semiconductor devices for DM0SFET, Lateral Resurf MOSFET, and UM0SFET. Examples and comparative examples

Hereinafter, examples and comparative examples of the present invention will be described with reference to the drawings and the like.

First, as a substrate, a silicon carbide (SiC) substrate (n-type, that is, donor density (Nd)) obtained by homoepitaxially growing 4H-SiC on a bulk substrate with a surface 8 ° off the silicon (0001) plane —Axep's density (Na) = 5 × 10 ¹⁵ / cm ³ ). For comparison, two types of silicon carbide (SiC) having different impurity concentrations as described below were used. According to the results of the secondary ion mass spectrometry (SIMS), this substrate has the lower impurity concentration in the silicon carbide (SiC) substrate, the A substrate (Example) and the higher impurity concentration in the B substrate Plate (Comparative Example).

As shown in Fig. 1, a thick insulating film 2 is formed on each silicon carbide (SiC) substrate 1, a window is opened in this, a normal RCA cleaning is performed, then a sacrificial oxide film is formed and removed with hydrofluoric acid. did. Then, in an oxygen atmosphere at 1000 ° C or more at atmospheric pressure was formed in 50 dishes silicon oxide (Si0 ₂₎ film 3 of silicon carbide (SiC) substrates.

Thereafter, the sample was heat treated at 1100 ° C. for 30 minutes in a nitrogen gas flow rate of 1 liter / min. Finally, using A1, an A1 electrode 4 and an ohmic electrode 5 for forming an ohmic contact with the substrate were formed on the silicon oxide film 3, thereby producing an M0S structure sample. This sample was connected to a TDDB measurement device 6, and a time-dependent dielectric breakdown (TDDB) measurement was performed in a vacuum-evacuated metal measurement chamber while light was cut off.

In the TDDB measurement, as shown in Fig. 1, an electric field is applied between the A1 electrode 4 and the phantom electrode 5 of the M0S structure, and the gate insulating film (silicon oxide film 3) flows through the insulating film until the breakdown occurs. Leak current was observed. _D was calculated from the product of the leakage current up to the dielectric breakdown and the stress application time.

Figure 2 shows the results of TDDB measurement (stress electric field E, stress = 9 MV / cm). The horizontal axis represents _D that has passed through the silicon oxide film by the time the dielectric breakdown of the silicon oxide film occurred, and the vertical axis represents a Weibull distribution plot as a function of the cumulative defect rate p.

As shown in the figure, dielectric breakdown of the silicon oxide film starts to occur at the same level in both types of silicon carbide substrates. However, the subsequent dielectric breakdown of the silicon oxide film showed a better value for Q _B1) on the A substrate than on the B substrate.

Comparing the _QBDs using the respective silicon carbide substrates at the point where the cumulative failure rate p is 63%, the B substrate of the comparative example is 0.03 C / cm ² , whereas The substrate is 0.16 C / cm ^{2, which} is about an order of magnitude higher. .

As described above, when an impurity element is taken into a silicon oxide film, it acts as a charge trapping center, and thus is generated by electrons injected into the silicon oxide film when a stress is applied or by impact ionization. The trapping holes are trapped, locally accelerating the change in the internal electric field of the silicon oxide film, and causing a deterioration in the dielectric breakdown life.

Therefore, it is important to reduce the concentration of impurity elements. Table 1 shows the secondary ions Shows the concentrations of Ti, Al and B impurity elements in silicon carbide (SiC) substrates (A substrate, B substrate) measured by mass spectrometry (SIMS).

' table 1

On the A board, Ti: lxl0 ¹⁴ cm— ³ , Al: 3xl0 ¹⁴ cm_ ³ , B: 3X10 ¹⁴ CDT ³ , on the B board, Ti: 5xl0 ¹⁴ cm— ³ , Al: lxl0 ¹⁵ cm ^1-3 , B: 3xl0 ¹⁵ cm— ³ . Although long-term reliability of Al and B it it 3xlO ^w cm- ³ in the silicon oxide film of the impurity element is improved, the upper limit of the impurity element concentration from the results in ³ X 10 ¹⁴ cm- 3 I understand that it will be.

In the above, Ti, Al, and B have been described as examples, but the same tendency was observed for other impurities, namely, Cr, Fe, and Ni.

Further, in this embodiment, the case where a silicon oxide (SiO 2) film is formed on a silicon carbide (SiC) substrate by thermal oxidation has been described, but an oxide film is formed on a portion in contact with the silicon carbide substrate by a thermal oxidation method. However, when any one or more of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film were formed thereon, the same tendency as in the above example was observed.

Claims

' The scope of the claims

1. A silicon carbide semiconductor device having an n-type silicon carbide region in which the concentration of each of a p-type impurity element and a metal element is 3xl0 ¹⁴ cm- ³ or less.

5 2.Metal-insulating film-semiconductor (MIS) structure, n-type silicon carbide region with p-type impurity element and metal element concentration of 3xl0 ¹⁴ cnf ³ or less under gate insulating film A silicon carbide semiconductor device, comprising:

3. The silicon carbide semiconductor device according to claim 1, wherein the P-type impurity element and the metal element are any one of Al, B, Ti, Cr, Fe, and Ni.

A silicon carbide semiconductor device, wherein the number is 10 or more.

4. In coal I arsenide silicon semiconductor device according to paragraph 1 or claim 2, and wherein the total concentration of the P-type impurity element and the metal element is 5.0x1ο ¹⁵ cm- ³ or less Silicon carbide semiconductor device.

5. The silicon carbide semiconductor device according to any one of claims 2 to 4, wherein a portion of the gate insulating film that contacts the silicon carbide substrate is formed by a thermal oxidation method. Whether the gate insulating film is an oxide film formed by the thermal oxidation method, or one or more of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film A silicon carbide semiconductor device characterized by being a composite film having:

6. A portion of the gate insulating film which is in contact with the silicon carbide substrate is provided with an oxide 20 film formed by a thermal oxidation method, and whether the gate insulating film is an oxide film formed by the thermal oxidation method 5. The composite film according to claim 2, wherein the composite film has at least one of silicon oxide film, silicon nitride film, and silicon oxynitride film or two or more thereof. A silicon carbide semiconductor device, comprising: a DMOSFET, a Lateral Resurf MOSFET, or a UM0SFET.

25 7. A method for manufacturing a silicon carbide semiconductor device using a silicon carbide substrate having an epitaxially grown silicon carbide layer as an uppermost layer, wherein each of impurities other than impurities intentionally doped during epitaxial growth is used. A method for manufacturing a silicon carbide semiconductor device, comprising epitaxially growing a silicon carbide layer so that the concentration is 3xl0 ¹⁴ cnf ³ or less.

8. Gate insulation of metal-insulator-semiconductor (MIS) structure using a silicon carbide substrate with an n-type silicon carbide region where the respective concentrations of p-type impurity element and metal element are 3xl0 ¹⁴ cm- ³ or less A method for manufacturing a silicon carbide semiconductor device for forming a film, comprising forming an oxidized film in a portion of a gate insulating film in contact with a silicon carbide substrate by heating the air in an air atmosphere, an oxygen atmosphere, or a water vapor atmosphere. A method for manufacturing a silicon carbide semiconductor device.

9. The method for manufacturing a silicon carbide semiconductor device according to claim 8, wherein after forming the oxide film, a silicon oxide film is formed by a chemical vapor deposition method, and a silicon nitride film is formed by a chemical vapor deposition method. A method for manufacturing a silicon carbide semiconductor device, wherein one or more of silicon oxynitride films formed by thermally oxidizing a silicon nitride film by a chemical vapor deposition method are formed.