WO2004077678A1 - High frequency bandpass analogue to digital converters - Google Patents

High frequency bandpass analogue to digital converters Download PDF

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Publication number
WO2004077678A1
WO2004077678A1 PCT/EP2004/050114 EP2004050114W WO2004077678A1 WO 2004077678 A1 WO2004077678 A1 WO 2004077678A1 EP 2004050114 W EP2004050114 W EP 2004050114W WO 2004077678 A1 WO2004077678 A1 WO 2004077678A1
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circuit according
frequency
signal
analogue
resonance
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PCT/EP2004/050114
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French (fr)
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Stephen Anthony Gerard Chandler
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Chandler Stephen Anthony Gerar
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Publication of WO2004077678A1 publication Critical patent/WO2004077678A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/39Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/392Arrangements for selecting among plural operation modes, e.g. for multi-standard operation
    • H03M3/396Arrangements for selecting among plural operation modes, e.g. for multi-standard operation among different frequency bands
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/39Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/402Arrangements specific to bandpass modulators
    • H03M3/404Arrangements specific to bandpass modulators characterised by the type of bandpass filters used
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/39Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/412Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M3/422Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
    • H03M3/43Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a single bit one
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/39Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/436Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type
    • H03M3/438Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a higher order loop filter in the feedforward path

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

A radio frequency analogue to digital converter achieving high accuracy over a limited bandwidth comprises high gain amplifiers (12, 13, 14) incorporating bandpass filters in the form of single tunable resonators (15, 16) tuned so that their resonant frequencies are at substantially the signal frequency, connected to perform the bandpass equivalent of integrators in the forward path of a delta sigma analogue to digital converter. A tuning arrangement comprises means (17) to make the resonators oscillate and for adjusting a variable reactance within the resonators to tune the resonant circuits, together with digital circuitry to implement a phase locked loop to set the resonator frequency to that of the signal that it is desired to receive. Such an analogue to digital converter circuit may be used to digitise signals up to the microwave region with very high precision. This enables a radio receiver to be implemented in an integrated circuit with almost all filtering and frequency conversion performed digitally.

Description

"High Frequency Bandpass Analogue to Digital Converters"
This invention relates to analogue to digital converters which can digitise signals of limited bandwidth with very high accuracy at high frequencies.
The trend in radio receivers it towards digitising the signal as soon as possible and performing filtering and signal processing functions by digital means as far as is possible. The advantages of consistency and performance of digital techniques for these functions are well established. However a key component of such receivers is the analogue to digital converter. The current state of the art consists either of the use of an analogue quadrature demodulator converting the signal from radio frequency or an intermediate frequency to two baseband signals which are then digitised, or for digitisation to take place at an intermediate frequency (usually sub-sampled) with conversion to the baseband signals implemented digitally using a numerical oscillator and complex multiplier. In the latter case, the number of bits of resolution of the analogue to digital converter may be increased by the filtering process which reduces the quantisation noise power, which is generally spread fairly uniformly over the spectrum, in proportion to the reduction in bandwidth below that corresponding to Nyquist sampling. Thus with a sampling rate of 50MHz, the quantisation noise on a signal of 25kHz could be reduced by 30 dB, corresponding to an improvement in resolution of 5 bits. However for GSM (and many other systems) the gain due to this is around lOdB less due to the larger bandwidth. The achievement of the required dynamic range, a requirement enhanced by the requirements to cope with time slotted systems in which signals may be received at very different power levels in successive time slots, even with the improvement due to filtering, requires expensive and power-hungry converters.
At audio frequencies low cost very high accuracy analogue to digital converters can be made using the technique of delta sigma modulation. In this a low precision analogue to digital converter, usually a comparator with just one bit resolution, is inserted into a feedback loop. This converter samples the filtered error signal at a high over-sampling PH.P52551 0
rate. The sampling rate is then reduced to a more normal rate by a decimating digital filter, much as described in the previous paragraph. However the dynamics of the feedback loop reduce the quantisation noise by a factor of (1 + loop gain). Careful design of the loop filter enable the loop gain to be extremely high within the pass-band of the signal to be digitised. This enables precisions of 22 bits or more to be readily obtainable. The idea of implementing a bandpass version of such a system had been proposed though not widely used in practice because of technical difficulties addressed by this invention.
According to the present invention there is provided a high frequency bandpass analogue to digital converter of high accuracy working on the principle of the delta sigma converter but using one or more high Q tunable resonance means (15, 16) and bandpass integrator means, wherein tuning means is provided for automatically tuning the resonant frequency of the resonance means (15, 16) in dependence on the frequency of the signal to be quantized.
A preferred embodiment of the invention comprises an analogue to digital converter of high accuracy within, and close to, the range of frequencies with which the circuit is to be used, the circuit comprising high gain amplifier means, incorporating a bandpass filter in the form of one or more high Q resonance means connected in the forward path of the amplifier means and having their resonant frequencies at substantially the signal frequency, loop compensation means as required, polarity discrimination means to provide pulses whose polarity depends on the polarity of the output of the cascaded filtering amplifier means, feedback means in the form of a linear passive circuit, differencing means subtracting feedback signal from the input, and digital filter means decimating the output of the polarity discrimination means.
Such an analogue to digital converter circuit may be used to achieve very high accuracy when measuring signals of limited bandwidth but at centre frequencies up to the microwave region, at reasonable manufacturing cost, with modest power requirements. The linear passive circuit may be simply a conductive link providing substantially no attenuation, or may be an attenuator comprising resistance and/or capacitance elements.
One possible application of such a radio frequency amplifier circuit is in a distributed circuit switched telecommunication network of a type, such as is disclosed in International Published Patent Application No. WO 97/13333, which does not require a central exchange or interconnecting infrastructure but in which a plurality of transmitting and receiving stations are provided at randomly distributed locations, switching circuitry being provided within the stations themselves for routing of calls between stations in the network utilising other stations in the network for relaying of such calls where necessary. In this case the receiver of the stations within the network may incorporate such analogue to digital converters to digitise the received signals prior to other signal processing and demodulation.
However the analogue to digital converter circuit of the invention may also be used in many other applications in which high accuracy and dynamic range is required over a limited bandwidth at high frequencies.
In order that the invention may be more fully understood, reference will now be made, by way of example, to the accompanying drawings in which:
Figure 1 is a block diagram of a prior art conventional delta sigma converter;
Figure 2 is a block diagram of an embodiment of the invention;
Figure 3 is a block diagram of the digital signal processing to decimate and down- convert the bit stream;
Figure 4 is a schematic diagram of a regenerative circuit to approximate the bandpass equivalent of an integrator. Figure 5 shows a further embodiment of the invention incorporating the preferred method of maintaining the alignment of the centre frequency and regeneration of resonators.
Figure 1 is a block diagram of an embodiment of a prior art second order delta sigma analogue to digital converter in which an input 1 is applied to differencing means 2. The output of this is applied to an amplifying loop filter in which, 5 and 7 are integrators, 6 is an amplifier supplying a compensation signal added to the output of 12 by an adder 18. Other loop compensation means to produce the effect illustrated by such an amplifier are normally used, such as use of a resistor in series with the integrating capacitor, but the amplifier is used here to highlight the signal flow more clearly. 3 is a gain coefficient and 4 the coefficient of the loop compensation means. The output of this is applied to the comparator circuit 8 which, on receipt of clock pulses 10 generates pulses of polarity dependant on the polarity of its input signal. These pulses are fed back to the differencing means 2 as well as to a digital decimating filter 9 to provide the digital output 11. There are many variants on this circuit, but this version has been selected in order to show clearly its relation to the invention.
The invention is a bandpass equivalent of the circuit of such a delta sigma converter. The bandpass equivalent of an integrator is an amplifying filter circuit having a resonant response of infinite Q. A block diagram of an embodiment of the invention is shown in Figure 2. All blocks within this have the same function as in Figure 1 except that 12, 13 and 14 are amplifiers, 15 and 16 are high Q resonators, and 17 is a phase adjustment means to ensure that the phase shift round the loop is 180 degrees at the operating frequency. The latter may be inserted at any point in the feedback loop or distributed around it, and may be either a linear passive network (even just a length of line) or may be part of 8. . Again, also, the effect of amplifier 13 may well be implemented using passive components, but is explicitly included in this diagram to aid understanding.
If a sampling rate of 1GHz were used on a signal of 950 MHz, the samples would be effectively aliased down to 50 MHz. This would permit the use of CIC filters with a RPH.P52S51W0
passband of 50 MHz as the first stage of decimation. Although this would be operating at high speed, the fact that the signal is a 1-bit stream simplifies the design considerably. This would then be followed by a digital complex multiplication by the output of a numerical oscillator to effect down conversion to zero frequency for further decimation. The disadvantage of this method is that at signal at 1050 MHz would also alais to the same frequency, and this would require careful rf filtering to prevent this. A preferable method is shown in Figure 3 in which two quadrature square waves at half the sampling frequency, which in this example would be at 2GHz, are generated by sequential logic 23. These are used as the complex output of a numerical oscillator to perform frequency down-conversion by complex multiplication by simple combinational logic 22 before being filtered by a cascaded integrator comb filter 24 then down-converted by 25 which multiplies the signal by the complex output of the numerical oscillator 26. This is followed by further CIC filtering in 27 followed by transversal or recursive filtering in 28, to produce the decimated output 29. In the example considered, this method would give the nearest frequency which would alias to the same output is at 1950 MHz, which is easy to filter out.
A major practical limitation to the precision of analogue to digital converters operating at high frequencies is the accuracy of the sampling time, as any jitter in this generates a noise voltage proportional to the signal frequency. This is why current intermediate frequency digitisation techniques cannot be used to sub-sample at radio frequencies above around 100 MHz. However the proposed technique inherently overcomes this limitation for the following reason. Unless the timing error is correlated with the signal, the error may be considered as a random error inserted by block 8. This is the same as for the quantisation noise, and it is therefore reduced by the same factor. Since timing error noise is likely to be substantially less then the quantisation noise of a 1 bit quantizer, its contribution is likely to be negligible. This is a major advantage of this technique for digitisation at high frequencies. There is then no reason in principle why the converter could not be used up to microwave frequencies. RPH.P52551W0
The effect of substituting ideal resonators by realizable circuits of finite Q, is to reduce the loop gain at the centre frequency to a finite value. This would reduce the precision at frequencies very close to the centre frequency. However so long as the Q is sufficiently high to give adequate precision at the signal frequencies furthest from the centre, the extra precision for the frequency components nearer in is unlikely to be missed. This means there is little to be gained by raising the Q such that the 3dB bandwidth is much narrower than the signal. However the values of Q which can be usefully used are indeed high. For example for a 200 kHz signal at 1GHz, a Q of 5000 would be desirable.
For fixed frequency applications, such as for intermediate frequency digitisation, crystal, SAW, or ceramic resonators could be used, with the advantage that they are available with close frequency tolerance and therefore would not require adjustment. However for good performance huge gains are required with the costs of group delay in the amplifies and difficulty of isolation etc. Such resonators also tend to have parasitic resonances and zeros which, though they need not cause instability, will nevertheless degrade performance.
For digitisation directly at radio frequency, the use of tunable resonators will usually be required. Such resonators, though, are unlikely to have the required Q. Fortunately it is possible to get round this by the use of regeneration, or positive feedback, which also has the advantage of enhancing the gain. The disadvantages of regeneration are well known: too much can cause the circuit to oscillate, and any non-linearities are enhanced.
However these are not of concern in this application, as the overall negative feedback loop will stabilize the bandpass integrators should they become unstable, like riding a bicycle, and will linearize the non-linearities. The non-linearity of an amplifier will be minute compare to that of that of the pulse generating comparator! The enhancement of gain by regeneration at the resonant frequency has almost no effect on the overall loop stability, which is determined by phase shifts at the frequency offesets at which the loop gain has fallen to around unity. Maximum benefit will occur if the regeneration is such as to maintain the circuit on the verge of oscillation. Too much will degrade performance as much as too little. Uncertainty in gain figures will then limit the benefit obtained by this approach. However improvements on the order of 10 times are quite realistic without adjustment. There will be a degree of uncertainty in the centre frequency of such a regenerative filter, that manual or automatic adjustment of this will almost certainly be required. Methods of adjustment will be considered later.
As mentioned before, the phase shift round the loop at the centre frequency, to which the resonators should be tuned, should be 180 degrees for optimal performance and stability. This phase shift will in general vary with frequency due to the group delay of the elements other than the resonators, i.e. the differencer 2, the amplifiers 12 13 and 14, connections and probably most importantly the sampler, 8. This could restrict the tuning range over which the system would operate effectively. This could be overcome by making the phase adjustment means, 17, a controllable phase shift whose control would be linked to one or both of the resonator frequency control signals.
Figure 4 shows one circuit which has been used to provide the bandpass integration function using regeneration. 32 is a coaxial resonator tuned with a signal applied at 35 by varactors 33 and 34. It is placed in a Butler oscillator configuration in which 31, 37 and 38 are very small capacitors. 38 is the capacitor which supplies the positive feedback to the resonator. Other oscillator configurations could be equally well used, though.
The adjustment of the resonator centre frequencies and levels of regeneration of the resonator circuits, though, provides a considerable challenge. However, there is a solution. For simplicity to start off with consider a first order loop with only one resonator. If the polarity of the pulses from 8 were temporarily reversed, the loop would oscillate at the resonator frequency. The initial decimation and down-concersion of the signal would produce a complex signal rotating at the error frequency of the resonator tuning. This could be used to control the tuning of the resonator as a phase locked loop, preferably implemented digitally using a counter and digital-to-analogue converter rather than an integrator. For a system with two resonators, it should be noted that the frequency will be determined primarily by the resonator with the highest Q. If some means were provided to damp the Q of each of the resonators in turn, each could be adjusted independently..
The method described can be improved and simplifird further. If the level of regeneration for each of the resonator circuits can be varied by, for example, the output of a digital to analogue converter adjusting amplifier gain or attenuation in the positive feedback path, each resonator in turn can be made to just oscillate when the negative feedback path is temporarily disconnected (rather than inverted). As well as adjusting the frequency of the resonance by a phase locked loop using the digital signal processing circuit as described above, a second loop could be used to simultaneously adjust the regeneration level to set the oscillation amplitude to any fixed value. This would set it to the optimal regeneration level as this is that at which the circuit is on the verge of oscillation. As well as this, the method has the advantage of restricting the level of the oscillation to a low value preventing unwanted radiation as well as any errors caused by the overload of the circuit. The principal of adjusting each resonator in turn, and then leaving the adjustment at the same level until the next time the adjustment is performed, would be used as with the first method.
The method described above would be highly suitable for initial adjustment. However it would not be able to be used while the receiver is in use. For this a tracking method may be used as illustrated in figure 5. This shows the block diagram of the same embodiment as in figure 2 apart from the addition of the tracking control of the resonator circuits and wherein 40 represents the entire digitally implemented process of filtering, decimation and frequency translation to base band.
Firstly it should be noted that the regenerative resonator consisting of resonator 15, amplifier 12 and regeneration adjustment 47, is ideally identical to that consisting of 16,14 and 46. The tracking adjustment signal of the centre frequencies of 15 could be derived to a good accuracy by adding the difference previously determined at initial adjustment as above, to the corresponding signal for 16. The same principle can be used to derive the regeneration control signal for 47 from that of 46. By doing this we have reduced the number of adjustment signals from four to two, shown in figure 5 as 48 and 49. This offsetting process described in this paragraph has been omitted from Figure 5 for simplicity.
The baseband equivalent transfer function of the regenerative resonator consisting of 14, 16 and 46 is
Figure imgf000010_0001
where a is a (complex) gain constant and c is a complex number whose real part is proportional to the difference in regeneration from the ideal, and whose imaginary part is the angular centre frequency error of 16. If a signal is injected with a summing means, 41, at frequencies for which the overall loop gain is high, the overall transfer function is approximately given by
1 l ( \ H(s) a
A sinusoidal pilot test signal cos(ftrf) generated by 43 is frequency converted to radio frequency by 45, which performs effectively the inverse of 40, and this causes an output signal 50 of
( — (ω - c) + — (- ω - a)) cos(ωt) = — c cos(ωt) 2a 2a a
where ^.describes the gain and phase shift of 40. The pilot signal source 43 also generated a signal just outside the signal passband
— cos(ωt) which is complex multiplied by the output signal 50 by block 42, to give c(a + cos 2ωt) If this is low pass loop filtered by 44, which also performs digital to analogue conversion of the control signals, this gives a complex error signal comprising 48 and 49 to use in a complex feedback loop to correct errors in both centre frequency and regeneration. This has the great advantage of being a linear control system thus facilitating design and ensuring predictable behaviour.

Claims

CLAIMS:
1. A high frequency bandpass analogue to digital converter of high accuracy working on the principle of the delta sigma converter but using one or more high Q tunable resonance means (15, 16) and bandpass integrator means, wherein tuning means is provided for automatically tuning the resonant frequency of the resonance means (15, 16) in dependence on the frequency of the signal to be quantized.
2. A circuit according to claim 1, wherein phase adjustment means is provided for automatically ensuring that the total loop phase shift is substantially 180 degrees at the resonant frequency of one of the high Q resonance means (15,16) or at a frequency which is an average of some kind of the resonant frequencies of the said resonance means.
3. A circuit according to claim 2, wherein the phase adjustment is controlled by the control signal also used to adjust one of the resonance means (15,16) or a linear or nonlinear combination of such signals.
4. A circuit according to claim 1, 2 or 3, wherein the noise shaping is used to reduce the effects of timing jitter in addition to quantisation and other noise.
5. A circuit according to any preceding claim, wherein the tuning means comprises signal polarity reversal means, resonance damping selection means if more than one resonance means (15,16) is to be adjusted, and phase locked loop means for adjusting a variable reactance within the resonance means (15,16) to tune the resonant circuit, or circuits in turn.
6. A circuit according to any preceding claim, in which positive feedback means is provided to deliberately apply positive feedback in order to increase the effective Q of the resonance means (15, 16).
7. A circuit according to claim 6, wherein adjustment means is provided to automatically adjust the amount of positive feedback.
8. A circuit according to claim 7, wherein the tuning of the resonance means is performed in turn by inhibiting the negative feedback and adjusting the positive feedback for each of the resonance means in turn, if there be more than one, such that oscillation occurs.
9. A circuit according to claim 8, wherein the tuning is performed by incorporating the oscillating resonance means within a phase locked loop.
10. A circuit according to claims 6, 7, 8 or 9, wherein the tuning and adjustment of the amount of positive feedback are performed simultaneously.
11. A circuit according to any preceding claim, wherein loop filtering is performed using two or more resonators which are substantially identical, wherein the same signal is used to control both or all centre frequencies
12. A circuit according to any preceding claim, wherein loop filtering is performed using two or more resonators which are substantially identical, wherein the same signal is used to control the amount of regeneration in each.
13. A circuit according to claim 11 or 12, wherein the adjustment signal is derived using a test signal injected to the input of the second resonator within the feedback loop thereby producing one or more signals which are substantially linearly related to either or both of the real and imaginary parts of the error of the pole positions, these being the errors in regeneration and centre frequency of the first resonator.
14. A circuit according to any preceding claim, wherein a process of frequency down- conversion of the bit stream is performed digitally in two or more stages, the first being a multiplication of the incoming bitstream by a complex signal at one half of the sample rate, this function being implemented by simple logic.
PCT/EP2004/050114 2003-02-11 2004-02-11 High frequency bandpass analogue to digital converters WO2004077678A1 (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2233518A (en) * 1989-06-02 1991-01-09 Gen Electric Co Plc Analogue to digital converters
EP0520617A2 (en) * 1991-06-01 1992-12-30 Gec-Marconi Limited Sigma-delta analogue-to-digital converter with improved stability.
US5729230A (en) * 1996-01-17 1998-03-17 Hughes Aircraft Company Delta-Sigma Δ-Σ modulator having a dynamically tunable continuous time Gm-C architecture
WO2001011786A1 (en) * 1999-08-09 2001-02-15 Atmel Corporation Hybrid bandpass and baseband delta-sigma modulator

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2233518A (en) * 1989-06-02 1991-01-09 Gen Electric Co Plc Analogue to digital converters
EP0520617A2 (en) * 1991-06-01 1992-12-30 Gec-Marconi Limited Sigma-delta analogue-to-digital converter with improved stability.
US5729230A (en) * 1996-01-17 1998-03-17 Hughes Aircraft Company Delta-Sigma Δ-Σ modulator having a dynamically tunable continuous time Gm-C architecture
WO2001011786A1 (en) * 1999-08-09 2001-02-15 Atmel Corporation Hybrid bandpass and baseband delta-sigma modulator

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
SHOAEI O ET AL: "Optimal (bandpass) continuous-time /spl Sigma//spl Delta/ modulator", CIRCUITS AND SYSTEMS, 1994. ISCAS '94., 1994 IEEE INTERNATIONAL SYMPOSIUM ON LONDON, UK 30 MAY-2 JUNE 1994, NEW YORK, NY, USA,IEEE, US, 30 May 1994 (1994-05-30), pages 489 - 492, XP010143432, ISBN: 0-7803-1915-X *

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