GB2378831A

GB2378831A - High accuracy radio frequency analogue to digital converter

Info

Publication number: GB2378831A
Application number: GB0120070A
Authority: GB
Inventors: Stephen Anthony Gerar Chandler
Original assignee: Individual
Current assignee: Individual
Priority date: 2001-08-17
Filing date: 2001-08-17
Publication date: 2003-02-19
Also published as: GB0120070D0

Abstract

A radio frequency analogue to digital converter achieving high accuracy over a limited band-width comprises high gain amplifiers 12,13,14 incorporating bandpass filters in the form of single tunable resonators 15,16 tuned so that their resonant frequencies are at substantially the signal frequency, connected to perform the band-pass equivalent of integrators in the forward path of a delta sigma analogue to digital converter. A tuning arrangement comprises means to make the resonator oscillate and for adjusting a variable reactance within the resonators to tune the resonant circuits, together with digital circuitry to implement a phase locked loop to set the resonator frequency to that of the signal which it is desired to receive. Such an analogue to digital converter circuit may be used to digitize signals up to the microwave region with very high precision. This enables a radio receiver to be implemented on an integrated circuit with almost all filtering and the frequency conversion performed digitally.

Description

"High Accuracy Radio Frequency Analogue to Digital Converters" This invention relates to analogue to digital converters which can digitise signals

of limited bandwidth with very high accuracy at high frequencies. t The trend in radio receivers it towards digitising the signal as soon as possible and performing filtering and signal processing functions by digital means as far as is possible. The advantages of consistency and performance of digital techniques for these functions are well established. However a key component of such receivers is the analogue to digital converter. The current state of the art consists either of the use of an analogue quadrature demodulator converting the signal from radio frequency or an intermediate frequency, to two baseband which are then digitised, or for digitisation to take place at intermediate frequency (usually sub-sampled) with conversion to the baseband signals implemented digitally using a numerical oscillator and complex multiplier. In the latter case, the number of bits of resolution of the digital to analogue converter may be increased by the filtering process which reduces the quantisation noise power, which is generally spread fairly uniformly over the spectrum, in proportion to the reduction in bandwidth below that corresponding to Nyquist sampling. Thus with a sampling rate of 50MHz, the quantisation noise on a signal of 25kHz could be reduced by 30 dB, corresponding to an improvement in resolution of 5 bits. However for GSM (and many other systems) the gain due to this is around 10dB less due to the larger bandwidth. The achievement of the required dynamic range, a requirement enhanced by the requirements to cope with time slotted systems in which signals may be received at very different power levels in successive time slots, even with the improvement due to filtering, requires expensive and power-hungry converters.

At audio frequencies low cost very high accuracy analogue to digital converters can be made using the technique of delta sigma modulation. In this a low precision analogue to digital converter, usually a comparator with just one bit resolution, is inserted into a feedback loop. This converter samples the filtered error signal at a high

over-sampling rate. The sampling rate is then reduced to a more normal rate by a decimating digital filter, much as described in the previous paragraph. However the dynamics of the feedback loop reduce the quantisation noise by a factor of (I + loop gain). Careful design of the loop filter enable the loop gain to be extremely high within the pass-band of the signal to be digitised. This enables precisions of 22 bits or more to be readily obtainable. The idea of implementing a bandpass version of the idea had been proposed though not widely used in practice because of technical difficulties addressed by this invention.

According to the present invention there is provided a digital to analogue converter of high accuracy within, and close to, the range of frequencies with which the circuit is to be used, the circuit comprising high gain amplifier means, incorporating a bandpass filter in the form of one or more high Q resonance means connected in the forward path of the amplifier means and having their resonant frequencies at substantially the signal frequency, loop compensation means as required, polarity discrimination means to provide pulses whose polarity depends on the polarity of the output of the cascaded filtering amplifier means, feedback means in the form of a linear passive circuit, differencing means subtracting feedback signal from the input, and digital filter means decimating the output of the polarity discrimination means.

Such an digital to analogue converter circuit may be used to achieve very high accuracy when measuring signals of limited bandwidth but at centre frequencies up to the microwave region, at reasonable manufacturing cost, with modest power requirements.

The linear passive circuit may be simply a conductive link providing substantially no attenuation, or may be an attenuator comprising resistance and/or capacitance elements.

One possible application of such a radio frequency amplifier circuit is in a distributed circuit switched telecommunication network of a type, such as is disclosed in International Published Patent Application No. WO 97/13333, which does not require a central exchange or interconnecting infrastructure but in which a plurality of transmitting and receiving stations are provided at randomly distributed locations,

switching circuitry being provided within the stations themselves for routing of calls between stations in the network utilising other stations in the network for relaying of such calls where necessary. In this case the receiver of the stations within the network may incorporate the digital to analogue converters to digitise the received signals prior to other signal processing and demodulation However the digital to analogue converter circuit of the invention may also be used in many other applications in which high accuracy and dynamic range is required over a limited bandwidth at high frequencies.

In order that the invention may be more fully understood, preferred embodiments in accordance with the invention will now be described, by way of example, with reference to the accompanying drawings in which: Figure 1 is a block diagram of a prior art conventional delta sigma converter; Figure 2 is a block diagram of an embodiment of the invention; Figure 3 is a block diagram of the digital signal processing to decimate and down-convert the bit stream.

Figure 4 is a schematic diagram of a regenerative circuit to approximate the bandpass equivalent of an integrator.

Figure 1 is a block diagram of an embodiment of a prior art second order delta sigma analogue to digital converter in which an input 1 is applied to differencing means 2. The output of this is applied to an amplifying loop filter in which 6 is an amplifier, 5 and 7 are integrators 3 is a gain coefficient and 4 the coefficient of the loop compensation means. The output of this is applied to the comparator circuit 8 which, on receipt of clock pulses, 10, generates pulses of polarity dependant on the polarity of its input signal. These pulses are fed back to the differencing means, 2, as well as to a digital

decimating filter, 9, to provide the digital output 11. There are many variants on this circuit, but this has been selected in order to show clearly its relation to the invention.

The invention is a bandpass equivalent of the circuit of such a delta sigma converter. The bandpass equivalent of an integrator is an amplifying filter circuit having a resonant response of infinite Q. The block diagram of an embodiment of this is shown in figure 2. All blocks within this have the same function as in figure 1 except that 12, 13 and 14 are amplifiers, 15 and 16 are high Q resonators, and 17 is a phase adjustment means to ensure that the phase shift round the loop is 180 degrees at the operating frequency. The latter may be inserted at any point in the feedback loop or distributed around it, and may be either a linear passive network (even just a length of line) or may be part of 8.

If a sampling rate of 10Hz were used on a signal of 950 MHz, the samples would be effectively aliased down to 50 MHz. This would permit the use of CIC filters with a passband of 50 MHz as the first stage of decimation. Although this would be operating at high speed, the fact that the signal is a 1-bit stream simplifies the design considerably. This would then be followed by a digital complex multiplication by the output of a numerical oscillator to effect down conversion to zero frequency for further decimation. The disadvantage of this methos is that at signal at 1050 MHz would also alais to the same frequency, and this would require careful rf filtering to prevent this. A preferable method is shown in Figure 3 in which two quadrature square waves at half the sampling frequency, which in this example would be at 2GHz, are generated by sequential logic 23. These are used as the complex output of a numerical oscillator to perform frequency down-conversion by complex multiplication by simple combinational logic 22 beforebeing filtered by a cascaded integrator comb filter 24 then down-converted by 25 which multiplies the signal by the complex output of the numerical oscillator 26. This is followed by further CIC filtering in 27 followed by transversal or recursive filtering in 28, to produce the decimated output 29. In the example considered, this method would give the nearest frequency which would alias to the same output is at 1950 MHz, which is easy to filter out.

A major practical limitation to the precision of analogue to digital converters operating at high frequencies is the accuracy of the sampling time, as any jitter in this generates a noise voltage proportional to the signal frequency. This is why current intermediate frequency digitisation techniques cannot be used to sub-sample at radio frequencies above around 100 MHz. However the proposed technique inherently overcomes this limitation for the following reason. Unless the timing error is correlated with the signal, the error may be considered as a random error inserted by block 8. This is the same as for the quantisation noise, and it is therefore reduced by the same factor. Since timing error noise is likely to be substantially less then the quantisation noise of a 1 bit quantizer, its contribution is likely to be negligible. This is a major advantage of this technique for digitisation at high frequencies. There is then no reason in principle why the converter could not be used up to microwave frequencies.

The effect of substituting ideal resonators by realizable circuits of finite Q, is to reduce the loop gain at the centre frequency to a finite value. This would reduce the precision at frequencies very close to the centre frequency. However so long as the Q is sufficiently high to give adequate precision at the signal frequencies furthest from the centre, the extra precision for the frequency components nearer in is unlikely to be missed. This means there is little to be gained by raising the Q such that the 3dB bandwidth is much narrower than the signal. However the values of Q which can be usefully used are indeed high. For example for a 200 kHz signal at I GHz, a Q of 5000 would be desirable.

For fixed frequency applications, such as for intermediate frequency digitisation, crystal, SAW, or ceramic resonators could be used, with the advantage that they are available with close frequency tolerance and therefore would not require adjustment. However for good performance huge gains are required with the costs of group delay in the amplifies and difficulty of isolation etc. Such resonators also tend to have parasitic resonances and zeros which, though they need not cause instability, will nevertheless degrade performance.

For digitisation directly at radio frequency, the use of tunable resonators will usually be required. Such resonators, though, are unlikely to have the required Q.

Fortunately it is possible to get round this by the use of regeneration, or positive feedback, which also has the advantage of enhancing the gain. The disadvantages of regeneration are well known : too much can cause the circuit to oscillate, and any nonlinearities are enhanced. However these are not of concern in this application, as the overall negative feedback loop will stabilize the bandpass integrators should they become unstable, like riding a bicycle, and will linearize the non-linearities. The nonlinearity of an amplifier will be minute compare to that of that of the pulse generating comparator ! The enhancement of gain by regeneration at the resonant frequency has almost no effect on the overall loop stability, which is determined by phase shifts at the frequency offesets at which the loop gain has fallen to around unity. Maximum benefit will occur if the regeneration is such as to maintain the circuit on the verge of oscillation. Too much will degrade performance as much as too little. Uncertainty in gain figures will then limit the benefit obtained by this approach. However improvements on the order of 10 times are quite realistic without adjustment. There will be a degree of uncertainty in the centre frequency of such a regenerative filter, that manual or automatic adjustment of this will almost certainly be required. Methods of adjustment will be considered later.

As mentioned before, the phase shift round the loop at the centre frequency, to which the resonators should be tuned, should be 180 degrees for optimal performance and stability. This phase shift will in general vary with frequency due to the group delay of the elements other than the resonators, i. e. the differencer 2, the amplifiers 12 13 and 14, connections and probably most importantly the sampler, 8. This could restrict the tuning range over which the system would operate effectively. This could be overcome by making the phase adjustment means, 17, a controllable phase shift whose control would be linked to one or both of the resonator frequency control signals.

Figure 4 shows one circuit which has been used to provide the bandpass integration function using regeneration. 32 is a coaxial resonator tuned with a signal

applied at 35 by varactors 33 and 34. It is placed in a Butler oscillator configuration in which 31,37 and 38 are very small capacitors. 38 is the capacitor which supplies the positive feedback to the resonator. Other oscillator configurations could be equally well used, though.

The adjustment of the resonator frequencies, though, provides a considerable challenge. However, there is a solution. For simplicity to start off with consider a first order loop with only one resonator. If the polarity of the pulses from 8 were temporarily reversed, the loop would oscillate at the resonator frequency. The initial decimation and down-concersion of the signal would produce a complex signal rotating at the error frequency of the resonator tuning. This could be used to control the tuning of the resonator as a phase locked loop, preferably implemented digitally using a counter and digital-to-analogue converter rather than an integrator. For a system with two resonators, it should be noted that the frequency will be determined primarily by the resonator with the highest Q. If some means were provided to damp the Q of each of the resonators in turn, each could be adjusted independently. The process of adjusting the resonators would need to be performed before reception on a new frequency, and periodically while receiving on the same frequency to compensate for drift due to thermal or other effects.

The method described can, though be improved further with little increase in complexity. If the level of regeneration for each of the resonator circuits can be varied by the output of a digital to analogue converter adjusting amplifier gain or attenuation in the positive feedback path, each resonator in turn can be made to just oscillate when the negative feedback path is temporarily disconnected (rather than inverted). As well as adjusting the frequency of the resonance by a phase locked loop using the digital signal processing circuit as described above, a second loop could be used to simultaneously adjust the regeneration level to set the oscillation amplitude to any fixed value. This would determine the optimal regeneration level, enhancing loop gain without the disadvantages of multiple gain stages. As well as this, the method has the advantage of restricting the level of the oscillation to a low value preventing unwanted radiation as

well as any errors caused by the overload of the circuit. The principal of adjusting each resonator in turn, and then leaving the adjustment at the same level until the next time the adjustment is performed, would still be used.

The main disadvantage of either approach is the fact that the receiver would have to cease receiving while the adjustment was in process. This need not take more than a microsecond or two, but could be a disadvantage in some systems. In particular it makes the invention difficult to use with fast frequency hopping systems. It is also true that the invention is not well suited to very broad band systems of any type, just due to being based on the sigma delta principle. However there are many applications where it has very great potential to have a major impact.

Claims

CLAIMS: 1. A high frequency bandpass analogue to digital converter of high accuracy working on the principle of the delta sigma converter but using high Q tunable resonators and amplifiers to implement bandpass equivalent of integrators, wherein tuning means is provided for automatically tuning the resonant frequency of the resonance means (15,16) in dependence on the frequency of the signal to be quantized.
2. A circuit according to claim 1 wherein phase adjustment means automatically ensures total loop phase shift to be substantially 180 degrees at the resonant frequency of one of the high Q resonators or at a frequency being an average of some kind of the resonant frequencies of the said resonators.
3. A circuit according to claim 2 wherein the phase adjustment is performed by a control signal being that used to adjust one of the resonators or a linear or nonlinear combination of such signals.
4. A circuit according to claim 1, wherein the noise shaping is used to reduce the effects of timing jitter in addition to quantisation and other noise.

5 A circuit according to claim 1 wherein tuning means comprises signal polarity reversal means, resonance damping selection means if more than one resonator to be adjusted, and phase locked loop means and for adjusting a variable reactance within the resonance means (15,16) to tune the resonant circuit, or circuits in turn.

6 A circuit according to c'-um 1 in which positive feedback means is provided to deliberately apply positive feedback in order to increase the effective Q of the resonator.

7 A circuit according to claim 6 wherein adjustment means is provided to automatically adjust the amount of positive feedback.

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8 A circuit according to claim 7 wherein the tuning of the resonant circuits are performed in turn by inhibiting the negative feedback and adjusting the positive feedback for each of the resonant circuits in turn, if there be more than one, such that oscillation occurs.

9 A circuit according to claim 8 wherein the tuning is performed by incorporating the oscillating resonator within a phase locked loop.

10 A circuit according to claims 6,7, 8 or 9 wherein the tuning and adjustment of the amount of positive feedback are performed simultaneously.

11 A circuit according to any previous claim wherein the process of frequency down-conversion of the bit stream is performed digitally in two or more stages, the first being a multiplication of the incoming bitstream by a complex signal at one half of the sample rate, this function being implemented by simple logic.

12 An analogue to digital converter as herein described and illustrated in the accompanying drawings.