GB2233518A

GB2233518A - Analogue to digital converters

Info

Publication number: GB2233518A
Application number: GB9012233A
Authority: GB
Inventors: Ian Juso Dedic
Original assignee: General Electric Co PLC
Current assignee: General Electric Co PLC
Priority date: 1989-06-02
Filing date: 1990-06-01
Publication date: 1991-01-09
Anticipated expiration: 2010-06-01
Also published as: GB8912780D0; GB2233518B; GB9012233D0

Abstract

Oversampled delta-sigma converters are used to provide high resolution and large dynamic range in zero-IF analogue to digital converters, and narrow-band filters within the delta-sigma loops are used to force quantisation noise away from frequencies of interest. <IMAGE>

Description

Analogue to Digital Converters The present invention relates to analogue to digital converters.

A conventional baseband oversampled analogue-to-digital converter, of which delta-sigma converters form a subset, consists of a subtractor, a low-pass filter, a quantiser and a digital-toanalogue converter. The function of the filter is to shape the quantisation noise so that it is mainly at high frequencies, and can then be removed by digital low-pass filtering performed on the output data.

To perform analogue-to-digital conversion on a signal which is narrowband but not centred on zero frequency the 'zero iF' technique can be used. This consists of multiplying the input signal by two carriers cos wot and sin wot to produce in-phase and quadrature signals which are now centred at zero frequency. The two channels are necessary to allow discrimination between signals above and below the carrier frequency.

To obtain a large dynamic range from such a system, the analogue-to-digital converters must have high resolution and be accurately matched both in amplitude and time, e.g. for 100 dB dynamic range, the gains must match to within 0.001% and the carriers must be 900 +0.006 apart. This is difficult to achieve with conventional analogue-to-digital converters and filters.

According to one aspect of the present invention a zero 1F analogue-to-digital converter utilises over-sampled delta-sigma converters.

As shown in Figure 1 the delta-sigma converters may typically each have a sample rate of 2 x wo, but 900 out of phase, thus providing phase quadrature I and Q signals at the output.

Errors due to gain and timing mismatch can be simply removed by scaling and adding the two outputs I and Q to generate ideal outputs I' and Q' with negligible amplitude and phase errors as shown in Figure 2. To find the required coefficients αssα signal may be applied to one side of the carrier at wo + Gw and the coefficients iteratively adjusted so as to minimise the image at w0 w. I' and Q' are each effectively sampled at 4wo since they both contain components of I and Q.

The data output of a delta-sigma converter consists of only a 1 or 0 for each sample. This means that no multiplications are necessary, since the outputs I' and Q' simply consist of additions or subtractions of#,#, a , t and ~ 6. The DC offsets of the delta-sigma converters may be similarly cancelled out by adjustments to the output data. Because subsequent filtering is performed digitally there is no mechanism for gain and phase mismatch in these filters as there is with a system using analogue filters in front of the analogue-to-digital converters.

According to another aspect of the invention an oversampled converter may have a bandpass filter centred on we within the feedback loop, as shown in Figure 3. This forces the quantisation noise away from the frequencies of interest. The subsequent digital filter may either be a bandpass filter, or consist of digital I and Q modulators followed by low pass filters.

Typically the converter will sample at 4wo, and so the problem is to realise a narrowband filter centred precisely at wo.

One method is to use one or more resonators consisting of 2 sample-and-holds with almost unity positive feedback of value (1 -6) as shown in Figure 4 which will have a gain of 1 at 1-E at exactly wO = fclk . The major disadvantage of this system 4 is that the input is sampled by the feedback loop, and this places extremely stringent requirements on the permissible clock jitter.

For an input signal of Vsin wot, clock jitter is translated into amplitude variations SV according to the slope of the input signal.

i.e. #V = 2'rV cos w0t. & .

For a signal-t#-noise-ratio of 100 dB this implies that clock jitter should be of the order of 10-5 of a clock period.

An alternative architecture is to realise the filter as a continuous-time bandpass filter, with the digital-to-analogue output as either a voltage or a current. Clock jitter now affects the average voltage at the digital-to-analogue output, but this is now spread over the whole spectrum from 0 to 2who.

The digital-to-analogue output consists of a voltage V for a time T + ST, which in fact corresponds to a charge Q = V (T +ST). If a charge output digital-to-analogue is used so that a fixed charge Q is fed back, small variations in the clock timing have no effect on the average signal which is fed back.

This charge may be generated by charging up a capacitor C to a fixed voltage Vref, and then discharging this into the subtractor.

This technique is also applicable to conventional low-pass delta-sigma or other oversampled converters, where it similarly reduces the sensitivity to timing jitter and therefore increases the signal-to-noise ratio which may ultimately be obtained.

To realise the continuous-time bandpass filter, one possible method is to use all-pass filters with almost unity positive feedback as shown in Figure 5. An all-pass filter has constant gain at all frequencies but a phase shift which varies with frequency, and adding feedback around one or more all-pass filters gives a resonator the centre frequency of which is determined by the all-pass filters and the gain of which is determined by the feedback loop gain.

As an example, two first order all-pass filters in cascade have a phase response which is 1800 at only one frequency. The addition of positive feedback gives a response with a single peak at wo, without the extra peaks at DC, 2wo etc. produced using sample-and-hold resonators.

A major advantage of using all-pass filters with positive feedback is that they can be realised using unity-gain buffers, which can be designed with a much wider bandwidth than the high-gain amplifiers which are requireu for many other bandpass filter realisations.

Claims

1. A zero IF analogue to digital converter utilising over-sampled delta-sigma converters.

2. A zero IF analogue to digital converter for converting signals at frequencies in a band centred on a frequency wo, comprising two over sampled delta-sigma converters each operating at a samplerate of 2 x w, but with respective clock pulses for the two converters interleaved so that the converters operate effectively in quadrature.

3. A converter in accordance with Claim 2 wherein there is provided digital signal processing means for scaling and adding the outputs of the two converters to provide quadrature outputs in which amplitude and phase errors are minimised.

4. An over-sampled delta-sigma analogue to digital converter for converting signals at frequencies in a band centred on a frequency wO having within the feedback loop a bandpass filter centred on wO.

5. A converter in accordance with Claim 4 wherein the bandpass filter comprises two sample and hold circuits in cascade having overall almost unity gain.

6. A converter in accordance with Claim 4 or Claim 5 wherein signals are fed back from the quantiser by charging a capacitor to a fixed reference voltage and then discharging this capacitor into the subtractor.

7. A converter in accordance with Claim 4 wherein the bandpass filter comprises one or more all-pass filters with feedback.

8. An analogue to digital converter substantially as hereinbefore described with reference to Figures 1 and 2, 3, 4 or 5.