WO2004062842A1 - Soudage par ultrasons de dispositifs electriques - Google Patents

Soudage par ultrasons de dispositifs electriques Download PDF

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Publication number
WO2004062842A1
WO2004062842A1 PCT/US2003/041397 US0341397W WO2004062842A1 WO 2004062842 A1 WO2004062842 A1 WO 2004062842A1 US 0341397 W US0341397 W US 0341397W WO 2004062842 A1 WO2004062842 A1 WO 2004062842A1
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WIPO (PCT)
Prior art keywords
electronic device
substrate
adhesive
metallization
raised
Prior art date
Application number
PCT/US2003/041397
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English (en)
Inventor
Stefan Mieslinger
Michael Kober
Bin Zou
Herbert J. Neuhaus
Original Assignee
Nanopierce Technologies, Inc.
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Publication date
Application filed by Nanopierce Technologies, Inc. filed Critical Nanopierce Technologies, Inc.
Priority to AU2003299987A priority Critical patent/AU2003299987A1/en
Publication of WO2004062842A1 publication Critical patent/WO2004062842A1/fr

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Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/10—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating making use of vibrations, e.g. ultrasonic welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00—Articles made by soldering, welding or cutting
    • B23K2101/36—Electric or electronic devices
    • B23K2101/40—Semiconductor devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05644—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/165—Material
    • H01L2224/16501—Material at the bonding interface
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812—Applying energy for connecting
    • H01L2224/81201—Compression bonding
    • H01L2224/81205—Ultrasonic bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85053—Bonding environment
    • H01L2224/85095—Temperature settings
    • H01L2224/85099—Ambient temperature
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
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    • H01L2924/01078—Platinum [Pt]
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    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
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    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

Definitions

  • This invention relates to electrically and mechanically bonding an electronic device to conducting bond pads of a flexible or rigid substrate using ultrasonic energy to create a diffusion joint.
  • a semiconductor chip or other electronic device is mounted face up onto the substrate (e.g., circuit board) by either soldering or using an adhesive.
  • the bond pads of the semiconductor chip are then electrically connected to the wiring of the substrate using thin gold or aluminum wires, which are thermosonically or ultrasonically welded to the bond pads and the contact pads on the substrate.
  • An additional coating of the semiconductor chip, the wires, and the contact pads with a resin to protect the sensitive wires and chip surface is usually required.
  • the semiconductor chip or other electronic device is mounted face down onto the substrate.
  • Standard technologies for connecting the bond pads of the chip to the wiring on the substrate are soldering or applying anisotropic conductive adhesives.
  • a metallic bump is built up onto the bond pads of the semiconductor chip. When employing a soldering technology, this bump acts as a diffusion barrier and enables wetting of the solder to an opposing contact pad.
  • Flip-chip technologies using adhesives require the bump as a stand-off between the chip surface and the substrate surface as well as to enable the electrical connection with the contact pad. Curing of the adhesive is primarily performed at an elevated temperature for a certain period of time.
  • the bond pads of the electronic device the contact pads of the substrate, each generally gold coated (e.g., by electroplating or stud bumping), are placed in alignment with one another to form an interface.
  • a heating source is used to increase the substrate to an elevated temperatures between 150 °C and 200 °C in order for a bond to be formed.
  • a compressive force is then applied to the back side of the electronic device in a direction generally normal to the interface.
  • Ultrasonic energy is then activated while the compressive force is held and the substrate is heated. The ultrasonic energy is thereby transmitted across the semiconductor device to the substrate in the form of vibration and a diffusion bond is formed.
  • Such high grade substrates are not favored for use in, for example, mass quantity, and in some cases disposable, mobile electronics products, especially with paper or polypropylene substrates desired for smart inlays.
  • soft substrates such as paper or polypropylene
  • the conventional understanding is that such substrates must be stiffened in order to create a solid ultrasonic bond.
  • Such stiffening is usually achieved by applying a hard metal undercoat, for example, nickel or chrome, underneath the softer copper or aluminum traces forming the contact pads on the soft substrate.
  • One embodiment of the present invention provides a method for bonding an electronic device to a substrate without raising the ambient temperature of the environment by forming a raised metallization layer on a bond pad of the electronic device; placing the bond pad of the electronic device opposite a contact pad metallization of the substrate creating an interface between the electronic device and the substrate; applying a compressive force normal to the interface between the electronic device and the substrate; and applying ultrasonic energy to the electronic device whereby a diffusion joint is formed between the bond pad of the electronic device and the contact pad of the substrate.
  • a method for ultrasonically bonding an electronic device without raising the ambient temperature of the environment to a substrate by forming a raised metallization layer on a bond pad of the electronic device; placing the bond pad of the electronic device opposite a contact pad metallization of the substrate creating an interface between the electronic device and the substrate; applying an adhesive to the interface between the electronic device and the substrate; applying ultrasonic energy to the electronic device, whereby a diffusion joint is formed between the bond pad of the electronic device and the contact pad of the substrate; wherein the adhesive is at least partially cured by the ultrasonic energy.
  • embodiments of the present invention may include methods by which the raised metallization layer is harder than the contact pad metallization, or vice versa, and the metallization layer is at least partially embedded in the contact pad metallization, or vice versa.
  • Other embodiments of the present invention may also include devices configured to implement the metallization described herein as well as products manufactured using such processes.
  • Figures 1-4 depict a conventional flip-chip bonding process using prior art soldering technology.
  • Figure 5 depicts an ultrasonic flip-chip bond between an electronic device and a substrate.
  • Figure 6 depicts an ultrasonic horn assembly for creating an ultrasonic bond between an electronic device and a substrate according to the present invention.
  • Figure 7 depicts a ultrasonic flip-chip bond between an electronic device and a substrate.
  • the various embodiments of the present invention relate to a method of joining an electronic device (e.g., an integrated circuit (IC) chip, a light emitting diode (LED), a surface acoustic wave (SAW) filter, a multi-chip module (MCM), or other device) to a flexible or rigid substrate with conducting contact pads.
  • an electronic device e.g., an integrated circuit (IC) chip, a light emitting diode (LED), a surface acoustic wave (SAW) filter, a multi-chip module (MCM), or other device
  • IC integrated circuit
  • LED light emitting diode
  • SAW surface acoustic wave
  • MCM multi-chip module
  • This invention also relates to devices, for example, RFLD devices (e.g., smart cards and smart labels/inlays), LED dice assembled to different carriers (for example, headers, ceramic substrates, and lead frames), and other electronic devices, including devices that may require a high density of components on the substrate (for example, mobile phones, electronic organizers, and laptop computers), manufactured with this new ultrasonic bonding method using suitable production machinery.
  • RFLD devices e.g., smart cards and smart labels/inlays
  • LED dice assembled to different carriers for example, headers, ceramic substrates, and lead frames
  • other electronic devices including devices that may require a high density of components on the substrate (for example, mobile phones, electronic organizers, and laptop computers), manufactured with this new ultrasonic bonding method using suitable production machinery.
  • At least one embodiment of the present invention builds upon flip-chip mounting methodologies to mount a device to a substrate using ultrasonic energy to form a metallurgical joint between elevated or raised bond pads of the device and the substrate metallization.
  • the bond pads on the device may be raised, for example, by printing a nickel-based viscous paste or ink, by evaporative or sputter deposition of nickel, or by the electroless or galvanic deposition of nickel with or without a layer of gold (Au) (i.e., immersion gold) overcoat for oxidation prevention.
  • Au gold
  • Other metallic materials may also be used to form the elevated bond pads if such metals can be ultrasonically welded to the substrate metallization.
  • the nickel (Ni) layer with an immersion gold coating (Ni/Au) on the bond pads may be welded to various substrate metallizations, for example, aluminum (Al), copper (Cu), silver (Ag), or gold, or alloys combining these and other metals like silicon (Si) and lead (Pb), for example, aluminum-silicon (AlSi), aluminum-copper (AlCu), aluminum-silicon-copper (AlSiCu), and silver-lead (AgPd).
  • substrate metallizations for example, aluminum (Al), copper (Cu), silver (Ag), or gold, or alloys combining these and other metals like silicon (Si) and lead (Pb), for example, aluminum-silicon (AlSi), aluminum-copper (AlCu), aluminum-silicon-copper (AlSiCu), and silver-lead (AgPd).
  • substrate metallization is used to indicate both pure metals like Al, Cu, Ag, and Au and alloys composed of a combination of these pure metals and others (e.g., AlSi, AlCu, AlSiCu, and AgPd).
  • Another embodiment of the present invention provides a high-speed, ultrasonic manufacturing process for flip-chip die bonding that minimizes the thermal stress during the assembly. It has been determined that the costly technologies of solder bumping and/or expensive conductive adhesives are not necessary because, by using the methodologies of the present invention, it is possible to weld a raised bond pad metallization directly onto a contact pad substrate metallization. By choosing the right materials on the chip bond pads and substrate contact pads it is possible to join both metals using ultrasonic vibration in the horizontal axis without any additional heating source to increase the temperature.
  • the ultrasonic energy may be applied with a flat sonotrode, with or without a hole for vacuum fixture of the die.
  • the ultrasonic energy may also be applied, for example, using a tool shaped in the form of tweezers. It is to be appreciated that other tools may also be used to apply the ultrasonic energy. It is to be appreciated that destruction or damage to the chip may be prevented and/or minimized by applying a self-resonance frequency.
  • metal surfaces may be used for the raised chip bond pads and the substrate metallization for the contact pads in the present invention.
  • the metallization layer on one bonding surface may be more deformable than the metallization layer on the other bonding surface to enhance the metallurgical junction.
  • the metal surfaces are then joined together forming a metallurgical interface using ultrasonic energy and a compressive force at room temperature or slightly increased temperature.
  • raised Ni/Au bond pads formed by electroless deposition on the base bond pads of an electronic device are ultrasonically welded to softer substrate metallizations, for example, Al, Cu, Au, and Ag, or to alloys like AlSi, AlCu, AlSiCu, AgPd.
  • softer materials may be present in the bond pads versus the substrate.
  • an adhesive may be applied to the die attach area of the electronic device and optionally onto the contact areas of the substrate before the chip attachment.
  • This adhesive additionally fixes the electronic device on the substrate and protects the active surface of the electronic device against environmental influences like oxidation or corrosion.
  • This adhesive may be cured by light, ultraviolet (UV) radiation, increased temperature, or by the ultrasonic energy. It is also possible to merely initiate the curing of the adhesive by these methods and then allow the adhesive to cure autocatalytically at room temperature. When curing is initiated by ultrasonic energy during the bonding process, the curing can be further cured by additional exposure to, for example, light, ultraviolet (UV) radiation, or increased temperature.
  • FIG. 1 shows a schematic cross section view of an IC chip (1).
  • the IC chip (1) may be, for example, a mono-crystalline semiconductor, typically of Si, for example, an RFLD chip.
  • the bond pads (2) may be made out of many different materials depending on the manufacturing process of the semiconductor, for example: Al, AlSi, AlCu, AlSiCu, Cr:CrCu:Cu, Ti:Cu, Ti:Ni-V, Ti:W, Ti:W:Au, Ni:Au, and other materials, with a thickness usually less than 1 ⁇ m.
  • a passivation layer (3) isolates the IC chip surface and may be composed of silicon nitride or silicon oxide.
  • An additional organic protection layer e.g., a polyimide
  • FIG. 2 shows the IC chip (1) with metallic raised bond pads (4) formed, for example, by the electroless plating of Ni/Au.
  • a typical thickness of the nickel layer is in the rage of lO ⁇ m to 25 ⁇ m with optionally an immersion gold layer to protect the nickel against oxidation and corrosion.
  • the thickness of the gold layer is in the order of a fraction of a micron.
  • the optimal thickness of the nickel layer is influenced by the passivation layer (3) and type of substrate metallization.
  • Figure 3 shows a cross section of the IC chip (1) with the bond pad metallization (4) and solder bumps (5). Reflowing the solder bumps to join the bond pads of the IC chip to the substrate contact pads is one commonly used technology for the flip-chip assembly of electronic devices.
  • FIG. 4 shows the IC chip (1) assembled onto a substrate (6) using solder bump flip-chip technology.
  • the solder bump (5) is reflowed and forms a metallurgical phase at the interface between the under-bump metallization (UBM) (bond pads) (4) and the metallization of the substrate (7).
  • UBM under-bump metallization
  • Figure 5 shows an example of an assembled electronic component manufactured in accordance with one embodiment of the present invention.
  • an electronic device (1) with metallized bond pads (4) is connected to the substrate metallization (7) of the substrate (6) by a diffusion joint (9).
  • conventional ultrasonic systems with an appropriate selected ultrasonic frequency, bonding time, bond force, and contact materials, may be used to form a metallic diffusion joint between the bond pads (4) of the chip and the substrate metallization (7).
  • an aluminum contact pad structure (7) of 30 ⁇ m thickness is mechanically and electrically connected to an IC chip via two bond pads (2), which are covered with a Ni/Au layer (4) of a thickness between 5 ⁇ m to 25 ⁇ m above the passivation layer (3) of the IC chip.
  • a flat sonotrode operating at 60 kHz a diffusion joint between the nickel and the aluminum is created within less than 500 ms.
  • an adhesive (8) may be applied to the substrate (6) and contact pads (7) and cured by UV radiation after creation of the ultrasonic bond to provide additional mechanical bonding strength.
  • bonding an electronic device to a substrate consists of two steps.
  • the first step involves raising the bond pads of the electronic device above any passivation layer by treating the electronic device (either as a single object or as part of another larger object, e.g., an individual IC chip on an undiced wafer) with an electroless metal or other galvanic deposition method, by printing a layer of metal-based paste, or by sputter or evaporative deposition of a metal.
  • the bond pads on the electronic device may be coated with a layer of metal, preferably nickel.
  • the thickness of the nickel layer on the bond pad is application dependent and may vary from less than 1 micron to up to over 100 microns depending upon the level the bond pad needs to be raised.
  • a layer of gold overcoat may be further cast over nickel surface by immersion plating or other plating methods. This step is similar to an under-bump metallization process. However, the height of the raised nickel may be much greater than a standard UMB if it is needed in the particular case.
  • the second step involves bonding the electronic device ultrasonically to a substrate.
  • the electronic device for example, if it is an IC chip on a wafer, may have to be diced before performing the second step.
  • An apparatus for use in ultrasonic bonding according to the present invention may be easily modified from a conventional ultrasonic flip-chip die bonder.
  • a schematic drawing of such an apparatus is shown in Figure 6.
  • Such an apparatus consists of partial or full combination of: a vacuum system, which is employed to pick up and place dies; an ultrasonic horn; an ultrasonic oscillator, which controls the magnitude and frequency of the vibration of the ultrasonic horn; a substrate holder; and a fixed stage (an "anvil").
  • the raised nickel bond pad of the present invention may be directly bonded to a substrate metallization such as aluminum, copper, silver, or gold to form a reliable metallic joint at ambient room temperatures or slightly higher than ambient room temperatures, for example, up to 100° C. Further, heating the substrate is not required in the present inventive process.
  • a substrate metallization such as aluminum, copper, silver, or gold
  • the general ultrasonic bonding process of the present invention consists of the following five substeps.
  • First, the electronic device is either manually or automatically picked up by vacuum.
  • Third, a compressive force is applied through an ultrasonic horn to the back side of the electronic device in a direction generally normal to the interface such that at least a portion of the elevated nickel bond pad is in close contact with the substrate metallization before the ultrasound is activated.
  • the magnitude of compressive force is dependent on the area of the interface between the contact surfaces and the properties of the components.
  • the ultrasonic energy is activated while the compressive force is held so that the ultrasonic energy is transmitted across the semiconductor device to the substrate in the form of vibration.
  • the vibration normally is parallel to the interface of the components being joined. A diffusion bond is thereby created.
  • the compressive force may be held constant throughout the ultrasonic process. Theoretically, the vibration frequency of the chip and the horn is the same, but the vibration amplitude of the ultrasonic horn (sonotrode) may be larger than that of the chip.
  • the compressive force is released and the ultrasonic energy is deactivated.
  • the process of the present invention differs from the conventional thermosonic gold-to-gold flip chip bonding in many ways.
  • the process utilizes electrolessly plated nickel as a medium to form metallic joint, instead of gold.
  • the advantage is that not only is nickel a much less expensive metal than gold, but unlike gold, nickel may be bonded with various metals under room temperature conditions.
  • the raised nickel bond pads of the present invention may be coated with a layer of gold, this layer is generally extremely thin, on the order of a fraction of a micron in thickness.
  • this immersion gold layer is quickly displaced to allow for bonding with the nickel.
  • the inventive process occurs at ambient temperatures, many additional advantages are realized. For example, low temperature bonding may minimize the thermal stress on the electronic device that otherwise often presents in the high temperature thermosonic gold bonding.
  • the present invention is also better suited for flip-chip die bonding than conventional thermosonic bonding, especially for bonding IC chips on substrates to manufacture high volume, low cost commodity products, such as RFID devices.
  • conventional thermosonic flip-chip bonding due to relatively high temperatures required (generally greater than 150° C) by the process, many types of IC chips may not be able to bear the high temperatures.
  • the selection of the substrate materials is limited to extremely high grade, high cost materials to withstand the high temperatures.
  • Such high grade substrates are not favored for use in, for example, mass quantity, and in some cases disposable, mobile electronics products, especially with paper or polypropylene substrates desired for smart inlays.
  • the metallic nickel joint formed using ultrasonic energy at room temperature according to the present invention is especially suitable for mass quantity, low cost, commodity products requiring the attachment of an IC chip to a substrate.
  • Some of these low cost products for example, RFIDs, LEDs, and SAWs, are very common today and even more are likely to emerge in the near future.
  • an adhesive preferably a nonconductive adhesive
  • the adhesive may be dispensed at the interface between the bond pads on the electronic device and the substrate metallization before the step of ultrasonically bonding the components as described with respect to the first embodiment.
  • the adhesive may also be dispensed on either the surface of the electronic device or the substrate before being mated together.
  • Application of the adhesive is not limited to the bond pad areas and it may be applied to the entire interface between the electronic device and the substrate.
  • the adhesive once cured, protects the chip surface against moisture and other environmental influences, and also enhances the mechanical bond between the components beyond the ultrasonic metallic joint. Further the adhesive may be light, UV radiation, heat, or ultrasonic energy curable.
  • Ultrasonic curable adhesive may be particularly suitable for use in conjunction with ultrasonic bonding system of the present invention.
  • Select adhesives for example, UV Acryl PS (manufactured by MS Duroplast, Schierling, Germany) and Delo Katiobond 4578 (manufactured by Delo, Schollkrippen, Germany), when dispensed between an electronic device and a substrate, may form gel under the power of ultrasonic energy.
  • UV Acryl PS manufactured by MS Duroplast, Schierling, Germany
  • Delo Katiobond 4578 manufactured by Delo, Schollkrippen, Germany
  • the friction and resultant generated heat may cure, or at least partially cure, the selected adhesives to transform the adhesive to a gel state.
  • the adhesive is only partially cured by ultrasonic energy, it may be subsequently cured by any other means (e.g., light or UV radiation) or the adhesive may simply cure autocatalytically after the component device is moved off-line from the assembly process.
  • a significant advantage of the present inventive process is that it is much faster than any conventional adhesive die bonding methods using anisotropic adhesives.
  • a conventional anisotropic adhesive bonding process the adhesive has to be cured under external compressive forces.
  • the cure time depending on the selection of the type of adhesive, varies from seconds to hours, hi the present process, ultrasonic energy is typically activated for a fraction of a second.
  • a metallic joint is formed in an extremely short time and adhesive may be cured, partially or fully, during the period of application of the ultrasonic energy.
  • the actual length of the ultrasonic operating time may vary and is a function of operating temperature, the physical characteristics of the metals to be joined, and the magnitude of the compressive force.
  • the adhesive is cured, or at least partially cured, the external compressive force is no longer required.
  • the components can be moved away from the bonding machine.
  • the adhesive can thereafter be further fully cured because the metallic diffusion joint holds the surfaces of the electronic device and substrate close together. Further, if ultrasonic curable adhesive is used, the subsequent curing step for the adhesive may not be needed.
  • soft metals for example, aluminum, copper, silver, and gold
  • substrate metallization for contact pads.
  • soft materials are used as substrate base materials, for example, flame retardant 4 (FR4 - epoxied fiberglass printed circuit boards); polypropylene, polyethylene (PET), polyester, and other polymer materials; and paper.
  • FR4 - epoxied fiberglass printed circuit boards flame retardant 4 (FR4 - epoxied fiberglass printed circuit boards); polypropylene, polyethylene (PET), polyester, and other polymer materials; and paper.
  • the soft metallization, the soft substrate material, or the combination may cause unwanted movement of the substrate metallization of the contact pads or slippage between the bond pads of the electronic device and the contact pads on the substrate during ultrasonic vibration and damping of the ultrasonic energy.
  • the raised bond pad may be pushed into the soft or ductile metallization on substrate.
  • the raised bond pads may be formed by electroless deposition of nickel, a very strong and hard metal, to a significant height above the passivation around the bond pad.
  • a compressive force is applied through an ultrasonic horn to the back side of the electronic device in a direction generally normal to the interface of the electronic device and the substrate. In this mamier, at least a portion of the elevated nickel surface formed on the bond pad is in tight contact with the substrate metallization before activation of the ultrasonic energy.
  • the elevated nickel bond pads (4) can be pressed into the aluminium contact pad (7), as shown in Figure 7.
  • both the contact pad (7) and the soft substrate (6) deform about the raised nickel of the bond pad (4). Since the elevated nickel bond pads are actually at least partially embedded in the soft substrate metallization of the contact pads , slippage at the metallic interface or energy damping due to the softness of the substrate metallization may be reduced and a reliable ultrasonic joint may be formed. No stiffening of the contact pad with an underlayer of a hard metal is required.
  • Ni or Ni/Au bumps onto semiconductor chip contact pads made out of special materials may not be applicable.
  • a SAW filter may be built upon a material that is incompatible with nickel plating baths. Therefore it may be more beneficial to deposit the Ni or Ni/Au on the substrate (ceramic) side, instead of on the semiconductor chips. Therefore, in a fourth embodiment, Ni or Ni/Au bumps may be deposited on the substrate contact pads, onto which the semiconductor chip, for example a SAW filter, may be bonded.
  • the metallization may be a thick layer of aluminum, copper, silver or gold.
  • the ultrasonic bonding method of the present invention previously described can still be used to facilitate the metallic diffusion bond.
  • the adhesives including those that may be activated or cured by light, UN radiation, thermal, or ultrasonic energy may be applied in the same manner as described above.
  • the present process differs clearly from conventional ultrasonic bonding in several ways.
  • conventional flip-chip die attach technologies employing ultrasonic energy
  • gold-to-gold thermosonic bonding is the dominant methodology.
  • High temperatures between 150 to 200 °C
  • the high temperature mandates strict requirements for selections of substrates and electronic device materials and may cause thermal stress in the assembly of products.
  • the present invention utilizing raised nickel or nickel/gold bond pads requires no additional heat source as the ultrasonic bonding can be achieved under room temperature.
  • the present invention also differs clearly from convention ultrasonic flip chip bonding through its contemporaneous use of adhesives, in particular an ultrasonic energy curable adhesive.
  • the present invention is unique and distinct in its application on soft substrates by pushing raised bond pads into soft substrate before the application of ultrasonic energy.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

L'invention concerne un procédé de soudage d'un dispositif électronique (1) à un substrat (6) sans augmenter la température ambiante, qui consiste à : former une couche de métallisation surélevée (5) sur une plage de connexion (4) du dispositif électronique (1) ; placer la plage de connexion (4) du dispositif électronique (1) à l'opposé d'une couche de métallisation (7) de plage de contact du substrat (6), ce qui crée une interface entre le dispositif électronique (1) et le substrat (6) ; appliquer une force compressive perpendiculairement à l'interface entre le dispositif électronique (1) et le substrat (6) ; et appliquer une énergie ultrasonore sur le dispositif électronique. Un joint de diffusion est ainsi formé entre la plage de connexion (4) du dispositif électronique (1) et la couche de métallisation (7) de la plage de contact du substrat.
PCT/US2003/041397 2003-01-03 2003-12-23 Soudage par ultrasons de dispositifs electriques WO2004062842A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003299987A AU2003299987A1 (en) 2003-01-03 2003-12-23 Ultrasonic bonding of electrical devices

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US43786603P 2003-01-03 2003-01-03
US60/437,866 2003-01-03

Publications (1)

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WO2004062842A1 true WO2004062842A1 (fr) 2004-07-29

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WO (1) WO2004062842A1 (fr)

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US8858744B2 (en) 2011-11-18 2014-10-14 Nike, Inc. Multi-functional manufacturing tool
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CN109822206A (zh) * 2019-03-26 2019-05-31 上海工程技术大学 一种超薄铝-铜超声波焊接工艺
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WO2008135142A2 (fr) * 2007-04-27 2008-11-13 Häusermann GmbH Procédé de production d'une plaque de circuit imprimé pourvue d'une cavité pour l'intégration de composants, carte de circuit imprimé et utilisation
WO2008135142A3 (fr) * 2007-04-27 2008-12-31 Haeusermann Gmbh Procédé de production d'une plaque de circuit imprimé pourvue d'une cavité pour l'intégration de composants, carte de circuit imprimé et utilisation
DE102007020475A1 (de) 2007-04-27 2008-11-06 Häusermann GmbH Verfahren zur Herstellung einer Leiterplatte mit einer Kavität für die Integration von Bauteilen und Leiterplatte und Anwendung
GB2458942A (en) * 2008-04-03 2009-10-07 Amberjac Projects Ltd Joining copper to nickel or nickel-containing metals using ultrasonic welding
GB2458942B (en) * 2008-04-03 2013-04-03 Amberjac Projects Ltd Improvements in or relating to battery modules
US8833418B2 (en) 2009-08-24 2014-09-16 The Hong Kong Polytechnic University Method and system for bonding electrical devices using an electrically conductive adhesive
US8129220B2 (en) 2009-08-24 2012-03-06 Hong Kong Polytechnic University Method and system for bonding electrical devices using an electrically conductive adhesive
US11346654B2 (en) 2011-11-18 2022-05-31 Nike, Inc. Automated 3-D modeling of shoe parts
US10671048B2 (en) 2011-11-18 2020-06-02 Nike, Inc. Automated manufacturing of shoe parts
US8858744B2 (en) 2011-11-18 2014-10-14 Nike, Inc. Multi-functional manufacturing tool
US11911893B2 (en) 2011-11-18 2024-02-27 Nike, Inc. Manufacturing tool
US8958901B2 (en) 2011-11-18 2015-02-17 Nike, Inc. Automated manufacturing of shoe parts
US8960745B2 (en) 2011-11-18 2015-02-24 Nike, Inc Zoned activation manufacturing vacuum tool
US9238305B2 (en) 2011-11-18 2016-01-19 Nike, Inc. Switchable plate manufacturing vacuum tool
US9403280B2 (en) 2011-11-18 2016-08-02 Nike, Inc. Manufacturing vacuum tool
US9937585B2 (en) 2011-11-18 2018-04-10 Nike, Inc. Multi-functional manufacturing tool
US9937627B2 (en) 2011-11-18 2018-04-10 Nike, Inc. Manufacturing vacuum tool with selective activation of pickup zones
US10272518B2 (en) 2011-11-18 2019-04-30 Nike, Inc. Multi-functional manufacturing tool
US11879719B2 (en) 2011-11-18 2024-01-23 Nike, Inc. Automated 3-D modeling of shoe parts
US10532468B2 (en) 2011-11-18 2020-01-14 Nike, Inc. Manufacturing vacuum tool with selective activation of pickup zones
US10610958B2 (en) 2011-11-18 2020-04-07 Nike, Inc. Multi-functional manufacturing tool
US10667581B2 (en) 2011-11-18 2020-06-02 Nike, Inc. Automated identification and assembly of shoe parts
US8696043B2 (en) 2011-11-18 2014-04-15 Nike, Inc. Hybrid pickup tool
US11266207B2 (en) 2011-11-18 2022-03-08 Nike, Inc. Automated identification and assembly of shoe parts
US11273514B2 (en) 2011-11-18 2022-03-15 Nike, Inc. Multi-functional manufacturing tool
US11317681B2 (en) 2011-11-18 2022-05-03 Nike, Inc. Automated identification of shoe parts
US11341291B2 (en) 2011-11-18 2022-05-24 Nike, Inc. Generation of tool paths for shoe assembly
US11763045B2 (en) 2011-11-18 2023-09-19 Nike, Inc. Generation of tool paths for shoe assembly
US11389972B2 (en) 2011-11-18 2022-07-19 Nike, Inc. Manufacturing tool with selective activation of pickup zones
US11422526B2 (en) 2011-11-18 2022-08-23 Nike, Inc. Automated manufacturing of shoe parts
US11641911B2 (en) 2011-11-18 2023-05-09 Nike, Inc. Automated identification and assembly of shoe parts
WO2013138283A1 (fr) * 2012-03-15 2013-09-19 Nike International Ltd. Outil de soudage à pointe creuse
CN104136198A (zh) * 2012-03-15 2014-11-05 耐克创新有限合伙公司 空心尖头焊接工具
CN109822206A (zh) * 2019-03-26 2019-05-31 上海工程技术大学 一种超薄铝-铜超声波焊接工艺
CN115815776A (zh) * 2023-02-15 2023-03-21 中北大学 超声-电场辅助真空热压异质界面扩散成型装置及工艺
CN115815776B (zh) * 2023-02-15 2023-05-16 中北大学 超声-电场辅助真空热压异质界面扩散成型装置及工艺

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