WO2004059825A1 - Regulateur de courant - Google Patents

Regulateur de courant Download PDF

Info

Publication number
WO2004059825A1
WO2004059825A1 PCT/FI2003/000985 FI0300985W WO2004059825A1 WO 2004059825 A1 WO2004059825 A1 WO 2004059825A1 FI 0300985 W FI0300985 W FI 0300985W WO 2004059825 A1 WO2004059825 A1 WO 2004059825A1
Authority
WO
WIPO (PCT)
Prior art keywords
current
load
switching element
load current
half cycle
Prior art date
Application number
PCT/FI2003/000985
Other languages
English (en)
Inventor
Martti Sairanen
Mikko KAIJÄRVI
Mikael Porthin
Raimo Riuttala
Original Assignee
Schneider Electric Industries Sas
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Schneider Electric Industries Sas filed Critical Schneider Electric Industries Sas
Priority to EP03767849A priority Critical patent/EP1579562A1/fr
Priority to AU2003292284A priority patent/AU2003292284B2/en
Publication of WO2004059825A1 publication Critical patent/WO2004059825A1/fr

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M5/00Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases
    • H02M5/02Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc
    • H02M5/04Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters
    • H02M5/22Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M5/275Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M5/293Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection

Definitions

  • the invention relates to a method as defined in the preamble of claim 1 for controlling the alternating current power supplied to a load by controlling the phase angle of the alternating voltage.
  • the invention also relates to a power controller as defined in the preamble of claim 3 for controlling the alternating current power supplied to a load by controlling the phase angle of the alternating voltage.
  • alternating current power connected to a load is controlled by switching off the electric current across the load, so that the electric power supplied to the load is determined by the ratio between load current on and off periods and by the amplitude of the alternating voltage varying in the course of time.
  • the switching cycle of the load current occurs once during one half cycle of the alternating voltage.
  • phase angle controllers can be used for controlling lighting fixtures, motors and heating elements, for instance.
  • All real loads are reactive - they comprise a resistive, a capacitive and an inductive part, respectively. If the capacitive and the inductive parts are very small compared to the resistive part, the load is called a resistive load, such as an incandescent lamp, for instance.
  • a load is called capacitive if it comprises substantial capacitance in addition to the resistive part (e.g. an electronic power converter for low voltage halogen burners), and accordingly, loads comprising substantial inductance are called inductive (such as a motor or a power converter, for instance).
  • the current across capacitance C is generally represented by the equation:
  • u is the voltage across capacitance C and t is time.
  • a study of equation 1 shows that a capacitive load is advantageously controlled with a phase angle controller, which turns on the load current during zero position of line voltage.
  • the charging current i of capacitance C depending on the voltage conversion rate du/dt will remain low.
  • Such a controlling manner is called trailing-edge control below.
  • a device using trailing-edge control comprising FET, i.e. a channel transistor as the switch component, has been disclosed by WO patent application 9322826.
  • inductive load is advantageously controlled by switching off the load current at zero position of the current across the load.
  • leading-edge control a commonly known controller utilising a bi-directional thyristor, i.e. triak, for implementing this control has been disclosed i.a. by US patent specification 6175195.
  • the triak controller will thus require a fuse. Practical electric installation work has showed that replacement of an internal fuse in a device is a frequent reason for calling an electrician to the installation site. This means that a fuse in the short-circuit network causes the end user of the device extra costs that often exceed the purchase price of the device.
  • the known triak controller comprises an inductor, which limits the current increase rate to an acceptable level. This inductor causes power losses in the power circuit, resulting in higher temperature of the device. The inductor also incurs expenses, it has a large physical size requiring abundant space in a typical device, and it has been noted to disturb the end user because of its specific humming noise.
  • the controller based on a FET semi-conductor mentioned in WO patent specification 9322826 does not necessarily comprise a fuse or an inducer, yet it is a controller implementing trailing-edge control. Consequently, it is not suitable as a power controller of inductive load in terms of equation 2.
  • the controller described in the reference can be converted to leading-edge control, however, this requires exact measurements of the current across the controller, resulting in more complex circuit structure and hence in higher production costs of the device.
  • the purpose of the invention is to accomplish such a method and a device for controlling the alternating current power supplied to a load that resolve the problems mentioned above and that allow control of the alternating current power of resistive load and inductive load by using two power transistor switches connected in succession, especially a MOSFET switch.
  • the method of the invention for controlling the alternating current power supplied to a load by controlling the phase angle of alternating voltage is characterised by the features defined in claim 1.
  • the power controller of the invention for implementing the method is characterised by the features defined in claim 3.
  • the dependent claims describe preferred embodiments of the invention.
  • the device of the invention does not necessarily comprise an inducer. This allows a decrease of the physical size of the device, or accordingly, the provision of a device having higher power handling capacity in the same size range.
  • the device of the invention does not generate noise in the environment that would be audible to the human ear.
  • the invention allows for the use of a transistor switch in a leading-edge controlled power controller, so that the load current is switched off precisely as the current has reached the zero level, without requiring exact measurements of the load current.
  • Figure 1 is a principle view of a power controller, which is serially connected with the load and is controlled in line with the method of the invention
  • FIG. 2 is a block scheme of the power controller of the invention
  • Figure 3 shows a preferred embodiment example of the power controller of the invention, especially of its control unit
  • Figure 4 shows curve shapes of voltage and current as a function of time at different points of the power controller of figure 1 with resistive load
  • Figure 5 shows curve shapes of voltage and current as a function of time at different points of the power controller of figure 1 with inductive load.
  • FIG. 1 is a schematic view of a power controller 1, by means of which the method of the invention for controlling alternating current power supplied to a load can be accomplished.
  • the power controller 1 comprises a switching unit 2 and the control unit 3 of this.
  • the power controller 1 is serially connected with the load L.
  • the alternating current source AC such as an alternating current network, is connected across the serially connected power controller 1 and the load L.
  • the switching unit 2 consists of two switching elements connected in succession mutually and simultaneously relative to the load L, i.e. of a first and a second switching element kl, k2, and of reverse-current diodes arranged in parallel with these, i.e. a first and a second diode dl, d2.
  • the control unit 3 is used for controlling the switching elements kl, k2 of the switching unit 2 in turn into electrically conductive state, i.e. off state, and non-conductive state, i.e. on state, respectively, during one half cycle of the alternating voltage serving as supply voltage.
  • Figure 4 illustrates curve shapes of voltage and current in connection with the power controller 1 of figure 1, with load L being resistive.
  • the load L is then e.g. an incandescent lamp, whose luminosity is controlled by controlling the alternating current power supplied to it.
  • Figure 4a shows the curve shape of the alternating voltage V A c supplied from alternating current source AC during several successive half cycles PA, PB, PA,... as a function of time t.
  • Figures 4b and 4c show the states of switching elements kl and k2, respectively, with 0 denoting the on state of the switch. and 1 the off state of the switch.
  • the curve shape of the voltage V L across the load L is shown in figure 4d, and the curve shape of load current I L in figure 4e.
  • the first switching element kl is conducted into off state while the second switching element k2 is conducted into on state (moment B, figures 4b and 4c). Then the load current I is disposed to pass across the first switch element kl and the forward- current second diode d2 until the load current I L is reversed at the second zero position N2 of the current (moment C, figure 4a), and then the load current I L is reversed relative to the second diode d2, thus preventing current flow to the load L (moment C, figure 4e).
  • the second switching element k2 is conducted into off state while the first switching element kl is conducted into on state (moment D, figures 4b and 4c). Then the load current I L is disposed to pass across the second switch element k2 and the forward-current first diode dl until the load current is reversed again at the following zero position N3 of the current (moment E, figure 4a). With regard to the change of the load current I L , this zero position N3 corresponds to the first zero position Nl, where the load current I L is reversed relative to the first diode dl.
  • the first diode dl thus prevents current flow to the load until, in the course of the third half cycle, which corresponds to the first half cycle PA, the operation steps described above are repeated.
  • the load voltage V L of figure 4d is acting across the load L until the following zero position N2, N3 of the current.
  • the load current I L follows the load voltage N L in the same phase, as appears in figures 4d and 4e.
  • the load voltage V L follows the alternating voltage V AC of the alternating current source AC over the periods B-C and D-E.
  • diodes dl, d2 are switched to one of the anodes and between the switching elements kl, k2. They are directed forward and away from a common switching point. This switching point is also used as the virtual ground VM of control unit 3.
  • switching elements kl, l 2 are controlled alternatingly with the first switching element kl conductive during the positive half cycle PA of the alternating voltage V AC after a delay t a and accordingly, the second switching element k2 conductive during the negative half cycle PB after a delay t a .
  • the pairs of switching element diodes kl, dl, and k2, d2, respectively, of the switching unit 2 in the embodiment example of figure 1 can be disposed to switch into reversed positions, with the second switching element k2 and the second diode d2 on the alternating current source AC side and the first switching element kl and the first diode dl on the load L side.
  • the diodes dl, d2 are thus mutually connected with their cathodes connected to each other and f rther between switching elements kl, k2 in virtual ground VM. They are directed forward towards a common switching point, i.e. virtual ground VM.
  • switching elements k2, kl are conducted with the first switching element l 2 conductive during the negative half cycle PB of the alternative voltage V A c after a delay t a and accordingly, with the switching element kl conductive during the positive half cycle PA after a delay t a from the zero position.
  • FIG. 2 is a block diagram of the power controller 1 implementing the method of the invention.
  • the alternating current power supplied from the alternating current source AC to the load L is controlled by controlling the phase angle of the alternating voltage V AC -
  • the power controller 1 comprises a switching unit 2 and a control unit 3.
  • the switching unit 2 comprises two MOSFET power transistors 21, 22 connected in succession, which act as switching elements kl, k2. In this embodiment example, they are serially connected with their sources SI, S2 connected together and further to the virtual ground VM of the power controller 1. Then the drain Dl of the first MOSFET transistor 21 is the input terminal of switching unit 2 and it is connected to the alternating current source AC.
  • the drain D2 of the second MOSFET transistor 22 is the output terminal of switching unit 2 and it is connected to the load L.
  • Each MOSFET transistor includes, besides the actual transistor switch, which corresponds to the switching element kl, k2 of the power controller of figure 1, an additional parallel diode built in connection with the transistor, a "body diode" dl, d2, which is disposed in forward direction between the source SI, S2 and the drain Dl, D2.
  • MOSFET transistors 21, 22 are controlled by means of control voltages supplied to their gate terminals Gl, G2 from control unit 3 in turn into electrically conductive, i.e. off state and non-conductive, i.e. on state, respectively, during one half cycle of the supply voltage i.e. alternating voltage V AC -
  • Control unit 3 comprises a half cycle detector 4, a synchronisation unit 5, a switch control unit 6 and a setting unit 7.
  • the half-cycle detector 4 detects the positive PA and negative PB half cycle of the alternati-ag voltage V Ac to be supplied.
  • the synchronisation unit 5 detects inversion of the load current I L , i.e. the zero position Nl, N2, N3 of the current (cf. figures 4a and 5a).
  • the setting unit 7 determines the set value of the delay t a .
  • the synchronisation unit 5 is connected with the setting unit 7.
  • the synchronisation unit 5 informs the setting unit 7 about the zero positions Nl, N2, of the current I and this information is detennined as the starting moment of the delay t a .
  • the setting unit 7 is supplied with the set value of the delay t a from the outside of the control unit 3, this set value determining the electric power to be supplied to the load L.
  • the setting unit 7 is connected to the switch control unit 6, which is immediately informed by the setting unit 7 of the set delay t a having been achieved.
  • the half-cycle detector 4 is also connected to the switch control unit 6.
  • the half-cycle detector 4 informs the switch control unit 6 of the positive PA and negative PB half cycle of the alternating voltage V A c- Using the switch control unit 6 and based on data supplied by the half-cycle detector 4 and the setting unit 7, both the MOSFET transistors 21, 22 acting as switching elements kl, k2 are controlled so as to get into reverse states simultaneously; as the one MOSFET transistor is brought into conductive state, i.e. off state, the other one is brought into non- conductive i.e. on state, as has been explained in principle in conjunction with figure 1 above.
  • a preferred control unit 3 of the power controller 1 of the invention is illustrated in figure 3. It has the following embodiment.
  • the half-cycle detector 4 is e.g. a level detector, which has been formed of resistor 40 and zener diode 41.
  • the level detector is disposed to monitor the voltage between the input terminal of the power control unit 1 and thus of the switching unit 2 on the one hand, and the virtual ground VM on the other hand.
  • V A c ri ses above the zener voltage Vz of the zener diode 41 a voltage pulse lasting substantially over one half cycle is obtained in the output of the half-cycle detector, the pulse being marked e.g. as state "1".
  • This is then the positive half cycle PA of the voltage V AC of the alternating current source AC.
  • the voltage across the zener diode 41 is its forward threshold voltage V D , which is similarly marked e.g. as state "0".
  • Synchronisation unit 5 is a detector with a transistor 53 accomplishing the open- collector output and connected to the first input of its setting unit 7 in non- conductive state during the delay t a .
  • V AC of the alternating current source AC acts between the in and out gates of the power controller.
  • this voltage generates current either through diode 50 or 51 to the transistor 52 base, bringing transistor 52 into conductive state.
  • transistor 52 is in conductive state, current flow to the base of transistor 53 from pull-up resistor 54 is prevented, so that transistor 53 is in non- conductive state.
  • the setting unit 7 includes an RC time constant circuit consisting of a variable resistor 71 and capacitor 72 and a comparator 73.
  • the load current I L When the load current I L is switched on, the conductive open-collector output of the synchronisation unit 5 maintains the capacitor 72 nearly uncharged.
  • the open-collector output of synchronisation unit 5 passes into non- conductive state and the charge of capacitor 72 starts increasing in the manner determined by the values of resistor 71 and capacitor 72. As the charge increases, the voltage across capacitor 72 increases accordingly.
  • the set pulse occurs on the output side of comparator 73. The set pulse is led to the clock input CL of the D flip flop of switch control unit 6.
  • the switch control unit 6 is preferably a flip-flop, especially a D flip-flop. Its data input Dl is connected to the output of the half-cycle detector 4 and its clock input
  • the status information prevailing in the data input Dl passes as such to the output Q of the D flip-flop, and in reverse direction to the output Q .
  • the outputs Q and Q of the D flip-flop are connected across resistors 8 and 9 to the corresponding gates Gl, G2 of MOSFET transistors 21 and 22.
  • MOSFET transistors 21 and 22 are set by means of resistors 8 and 9.
  • the electronic units 4, 5, 6, 7 of control unit 3 require a power source of their own.
  • the operating voltage V+ is accomplished e.g. by means of a power source l ⁇ iown by those skilled in the art, which is not shown in the drawings.
  • the operating voltage V+ is preferably generated by rectifying and filtering alternating voltage V A c-
  • the power controller 1 shown in figure 2 acts with resistive load L in the same manner as the basic circuit in figure 1, which was explained above with reference to figure 4.
  • figures 4b, 4c show control voltages supplied to the gates Gl, G2 of the first and the second MOSFET transistor 21, 22 as a function of time t, in which e.g. state "1" denotes the appropriate positive control voltage and state "0" a voltage lower than this, such as virtual ground VM.
  • Figure 5 shows schematically the curve shapes of voltage and current in connection with the power controller of figure 1.
  • load L is then assumedly inductive.
  • Figure 5a shows the curve shape of the alternating voltage V A c supplied from alternating current source AC during several successive half cycles PA, PB, PA,... as a function of time t.
  • Figures 5b and 5c respectively, show the states of switching element kl and k2, respectively, with 0 denoting the on state of the switch and 1 the off state of the switch.
  • These figures show on principle also the control voltages supplied to the gates Gl, G2 of the MOSFET transistors 21, 22 of figure 2.
  • the curve shapes of voltage V and current I are shown in figures 5d and 5e.
  • the load current I is no longer in the same phase as the load voltage V L , but follows the voltage reversal with a delay.
  • the synchronisation unit 5 activates the setting unit 7 and the half-cycle detector 4 conducts the data input D of the D flip-flop acting as the switch control unit into state "1", this being the positive half cycle PA of the voltage VA C of the alternating current source AC.
  • the setting unit 7 gives a set pulse to the clock input CL of the D flip-flop and the Q output of the D flip-flop passes into state "1", and accordingly, the reverse-current output Q passes into state "0".
  • the setting unit 7 gives a set pulse to the clock input CL of the D flip-flop and the Q output of the D flip-flop passes into state "0" and the reverse Q output into state "1".
  • Now current I L starts flowing from load L across the conductive channel of the second MOFSET transistor 22 and the body diode dl of the first MOSFET transistor 21 to the alternating current source AC.
  • the switch unit 2 has been formed by two MOSFET transistors 21, 22 connected successively. It is obvious to those skilled in the art that the MOSFET transistors can be replaced with other power transistors connected in succession, such as IGBT transistors or a bipolar power transistor, with diodes dl, d2 disposed in parallel with these.
  • the invention is not restricted to the embodiment example above alone, many variations being conceivable without departing from the inventive idea defined in the claims.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

L'invention concerne un procédé de régulation du courant alternatif fourni à une charge par la régulation de l'angle de phase de la tension alternative et au régulateur de puissance associé. L'unité de commutation (2) du régulateur de courant (1) consiste en deux éléments de commutation (k1, k2) connectés successivement l'un à l'autre et par rapport à la charge (L), et en diodes à courant inverse (d1, d2) disposées parallèlement à ces derniers. Les éléments de commutation sont mis à leur tour à l'état électro-conducteur et non conducteur pendant une demi-cycle du cycle de tension alternative (VAC) à fournir. Selon l'invention, pendant le premier demi-cycle (PA) après un laps de temps déterminé au point zéro du premier courant de charge (IL), le premier élément de commutation (K1) est mis à l'état conducteur, alors que le deuxième élément conducteur (k2) est mis à l'état non conducteur, le courant de charge (IL) s'écoulant dans le premier élément de commutation (k1) et la deuxième diode de courant direct (d2) jusqu'à ce qu'il (IL) soit inversé au niveau du point zéro, le sens du courant de charge (LL) étant inversé par rapport à la seconde diode (d2), ce qui empêche l'écoulement de courant vers la charge. Après un laps de temps déterminé au second point zéro (N2) du courant de charge (IL) pendant le second demi-cycle de travail (PB), le second élément de commutation (k2) est mis à l'état conducteur alors que le premier élément de commutation (k1) est mis à l'état non conducteur, le courant de charge (IL) s'écoulant dans le second élément de commutation (k2) et la première diode de courant direct (d1) jusqu'à ce que son (IL) sens soit à nouveau inversé au niveau du point zéro suivant, le sens du courant de charge (IL) étant inversé par rapport à la première diode (d1), ce qui empêche l'écoulement de courant vers la charge jusqu'à ce que les étapes de fonctionnement décrites ci-dessus soient répétées pendant le deuxième demi-cycle, ce qui correspond au premier demi-cycle.
PCT/FI2003/000985 2002-12-31 2003-12-30 Regulateur de courant WO2004059825A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP03767849A EP1579562A1 (fr) 2002-12-31 2003-12-30 Regulateur de courant
AU2003292284A AU2003292284B2 (en) 2002-12-31 2003-12-30 Power controller

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI20022300A FI114588B (fi) 2002-12-31 2002-12-31 Tehonsäädin
FI20022300 2002-12-31

Publications (1)

Publication Number Publication Date
WO2004059825A1 true WO2004059825A1 (fr) 2004-07-15

Family

ID=8565170

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FI2003/000985 WO2004059825A1 (fr) 2002-12-31 2003-12-30 Regulateur de courant

Country Status (5)

Country Link
EP (1) EP1579562A1 (fr)
CN (1) CN1732616A (fr)
AU (1) AU2003292284B2 (fr)
FI (1) FI114588B (fr)
WO (1) WO2004059825A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11569661B2 (en) 2021-01-11 2023-01-31 Watlow Electric Manufacturing Company Masterless distributed dynamic load management

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101599630B (zh) * 2009-06-09 2011-11-23 深圳和而泰智能控制股份有限公司 阻性交流负载短路的保护方法、装置及开关
TWI693769B (zh) * 2018-11-28 2020-05-11 緯創資通股份有限公司 供電系統、電子裝置及其供電方法
CN116961474A (zh) * 2022-04-20 2023-10-27 施耐德电气工业公司 操作导通组件的方法、装置、启动装置和计算机可读介质

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4528494A (en) * 1983-09-06 1985-07-09 General Electric Company Reverse-phase-control power switching circuit and method
US4617508A (en) * 1984-11-02 1986-10-14 General Electric Company Reverse phase-control apparatus for multiplexing interconnections between power switching and control circuit modules
FR2699342A1 (fr) * 1992-12-14 1994-06-17 Jaeger Regulation Variateur de puissance moyenne pour courant alternatif et appareil électrique comportant au moins un tel variateur.
US5331270A (en) * 1992-04-02 1994-07-19 Temic Telefunken Microelectronic Gmbh Circuit array for limiting a load current by reverse phase angle control
JPH06276740A (ja) * 1993-03-18 1994-09-30 Yahata Denki Seisakusho:Kk 電力制御装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT410604B (de) * 1999-03-02 2003-06-25 Legrand Oesterreich Steuereinrichtung zur steuerung des stromflusswinkels

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4528494A (en) * 1983-09-06 1985-07-09 General Electric Company Reverse-phase-control power switching circuit and method
US4617508A (en) * 1984-11-02 1986-10-14 General Electric Company Reverse phase-control apparatus for multiplexing interconnections between power switching and control circuit modules
US5331270A (en) * 1992-04-02 1994-07-19 Temic Telefunken Microelectronic Gmbh Circuit array for limiting a load current by reverse phase angle control
FR2699342A1 (fr) * 1992-12-14 1994-06-17 Jaeger Regulation Variateur de puissance moyenne pour courant alternatif et appareil électrique comportant au moins un tel variateur.
JPH06276740A (ja) * 1993-03-18 1994-09-30 Yahata Denki Seisakusho:Kk 電力制御装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
DATABASE WPI Week 199506, Derwent World Patents Index; Class U24, AN 1995-040027, XP002973654 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11569661B2 (en) 2021-01-11 2023-01-31 Watlow Electric Manufacturing Company Masterless distributed dynamic load management

Also Published As

Publication number Publication date
AU2003292284B2 (en) 2008-03-13
FI114588B (fi) 2004-11-15
EP1579562A1 (fr) 2005-09-28
FI20022300A (fi) 2004-07-01
CN1732616A (zh) 2006-02-08
AU2003292284A1 (en) 2004-07-22
FI20022300A0 (fi) 2002-12-31

Similar Documents

Publication Publication Date Title
CN106888524B (zh) 具有可控硅调光器的led驱动电路、电路模块及控制方法
CN108141946B (zh) 用于高效负载的负载控制设备
KR100937306B1 (ko) 전자 제어 시스템 및 방법
US7489094B2 (en) Method and apparatus for quiet fan speed control
AU2015263835B2 (en) A zero-crossing detection circuit for a dimmer circuit
CN104041188B (zh) 双线式调光开关
EP3128814B1 (fr) Dispositif gradateur de lumière
CA2589464A1 (fr) Circuit de regulation de charge et procede permettant d'obtenir un bruit acoustique attenue
AU2002346046A1 (en) Electronic control systems and methods
CN110113037B (zh) 过零控制电路及电子设备
KR930011850B1 (ko) 위상제어회로용 다중화장치
US10708989B2 (en) Protection circuit for dimmer, and dimmer
JP2004505593A (ja) インタフェース回路及び方法
CN211580266U (zh) 切相调光电路
CN209964031U (zh) 过零控制电路及电子设备
AU2003292284B2 (en) Power controller
CN112602379B (zh) 具有可控滤波器电路的负载控制装置
CN111372360A (zh) 切相调光电路
EP0822646A2 (fr) Dispositif de contrÔle de charge
US5463307A (en) High efficiency, low voltage adapter apparatus and method
JP6912136B1 (ja) 調光装置
WO2021136172A1 (fr) Circuit gradateur à coupure de phase
CN108880522B (zh) 一种可控硅触发电路
JP3615052B2 (ja) 電源回路
RU2124805C1 (ru) Коммутирующее устройство для фазового регулирования мощности

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): BW GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 2003767849

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 20038A73349

Country of ref document: CN

WWE Wipo information: entry into national phase

Ref document number: 2003292284

Country of ref document: AU

WWP Wipo information: published in national office

Ref document number: 2003767849

Country of ref document: EP

NENP Non-entry into the national phase

Ref country code: JP

WWW Wipo information: withdrawn in national office

Country of ref document: JP