WO2003107317A1 - Compensation de remanence pour panneaux d'affichage plasma - Google Patents
Compensation de remanence pour panneaux d'affichage plasma Download PDFInfo
- Publication number
- WO2003107317A1 WO2003107317A1 PCT/EP2003/050215 EP0350215W WO03107317A1 WO 2003107317 A1 WO2003107317 A1 WO 2003107317A1 EP 0350215 W EP0350215 W EP 0350215W WO 03107317 A1 WO03107317 A1 WO 03107317A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- burn
- cells
- activity value
- basis
- gain
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/04—Maintaining the quality of display appearance
- G09G2320/043—Preventing or counteracting the effects of ageing
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/04—Maintaining the quality of display appearance
- G09G2320/043—Preventing or counteracting the effects of ageing
- G09G2320/046—Dealing with screen burn-in prevention or compensation of the effects thereof
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/04—Maintaining the quality of display appearance
- G09G2320/043—Preventing or counteracting the effects of ageing
- G09G2320/048—Preventing or counteracting the effects of ageing using evaluation of the usage time
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2360/00—Aspects of the architecture of display systems
- G09G2360/16—Calculation or use of calculated indices related to luminance levels in display data
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
Definitions
- the present invention relates to a device and method for compensating burn-in effects on display devices containing a plurality of luminous cells . Particularly the present invention relates to a burn-in compensation for Plasma Display Panels.
- a Plasma Display Panel utilizes a matrix array of discharge cells which can only be "ON” or “OFF” . Also unlike a CRT or LCD in which gray levels are expressed by analog con- trol of the light emission, a PDP controls the gray level by modulating the number of light pulses per frame (sustain pulses) . This time-modulation will be integrated by the eye over a period corresponding to the eye time response. For a better understanding, it will be reminded that to per- form a grey scale rendition, a PDP is commonly divided in sub-lighting periods called sub-fields, each one corresponding to a bit of the input video picture data. For clarification, a sub-field is a period of time in which successively the following is being done with a cell. 1 - there is a writing/addressing period in which the cells is either brought to an excited state with a high voltage or left on its neutral state with lower voltage,
- More sustain discharges or pulses correspond to more peak luminance. More sustain discharges correspond also to a faster ageing of the corresponding cell phosphor. This phosphor ageing produces a loss in displayed luminance for the corresponding cell. If the same picture is displayed for a long time, the panel cells will not age at the same rate and a ghost picture (of the permanently displayed image) will be clearly perceptible to the human viewer (image sticking) . In other words, the ghost image corresponds to the picture still visible as a shadow on every other scene, when this picture has been displayed a long time on a screen. For some panels that have displayed for an extremely long time the same picture, the ghost levels may become unacceptable, and the panel may have to be written off at a very early point in its lifetime. CRTs also suffer from same problem, but at a substantially lower degree.
- this object is solved by a method for compensating burn-in effects on display devices containing a plurality of luminous cells by recording an activity value of each or a group of said cells and controlling the gain of the signals for said cells on the basis of said recorded activity value.
- a device for compensating burn-in effects on display devices containing a plurality of luminous cells said device being connectable to the signal path of said display device, including recording means for recording an activity value of each or a group of said cells and controlling means connected to said recording means for controlling the gain of the signals for said cells on the basis of said activity value .
- Figure 1 a diagram of panel efficiency
- Figure 2 the diagram of Figure 1 for defining the range of gain for which the correction is performed
- Figure 3 a block diagram of the signal processing for the burn-in compensation of the present invention.
- Figure 5 the implementation of a burn-in gam control
- Figure 7 a hardware architecture for an active burn-m compensation .
- FIG. 1 a diagram of panel efficiency is shown.
- This curve to be denoted as panel burn-in characteristic, will be stored on a look-up table.
- This curve is a function of the panel technology. It shows a very strong drop of the panel efficacy, i.e. a very strong aging in a critical domain, at the beginning of the life time of the display panel . Subsequently, there is a slight aging in a medium domain and further on during the working time of the panel there is no serious aging in a stable domain.
- HO is the number of panel equivalent operation hours (this number takes in consideration whether panel has displayed mostly dark or bright pictures) .
- GO is also known, being GO the panel expected lumi- nous gain, for a panel having HO hours of operation.
- the user will specify the range [Gmin Graax] to which the correction is to take place, for example with the burn-in control signal BURNIN-CTL shown in Figure 3.
- This range might be for instance 10% around central value GO.
- This range will be set near to zero for very slightly damaged panels, and might be even higher than 10% for extremely burn-in damaged panels.
- variable gain multiplier burn-in gain
- the individual cell correction is possible because there is an accurate cell usage map, which can be translated in equivalent operation hours, and so an individual cell burn-in calculator can be evaluated.
- the required correction level can be adjusted by the user, resorting to an internal test pattern (middle gray level) . He has only to adjust the correction parameter so that this test pattern will no more suffer from ghost pictures.
- the cell usage map is obtained by accumulating all information relative to the lighting period of said cell. Each cell will light approximately 1000 times per frame. 60 frames per second 3600 seconds per hour 100000 maximum hours of operation
- W-VGA 58 959 360 (fits within a single 64 Mbit SDRAM)
- W-XGA 150 958 080 (fits within a single 256 Mbit SDRAM) Following flash memory would be required:
- the signal processing units for the compensation algorithm are integrated into a usual signal processing system for a plasma display panel 1.
- the video signals for red, green and blue colours, R, G, B are put into a video-degamma unit 2.
- the input signals have a bit length of 8 bits, i.e. bit 0 to bit 7.
- the output signals are further processed under the control of a control circuit 6 by sub- field coding means 3, sent to frame memory 4 and converted in a serial/parallel converter 5 for driving the plasma display panel 1.
- the control circuit 6 is a Peak White Enhancement Controller 6, which obtains an average power AP for each picture from an average power measuring device 7 connected to the video-degamma means 2.
- the burn-in compensa- tion means is connected between the video-degamma means 2 and the subfield coding means 3.
- the burn-in compensation means com- prises a burn-in multiplier 11 connected at the output of the video degamma means 2, a burn-in gain control circuit 10, a burn-in memory 9 and a sustain integration circuit 8.
- the compensation algorithm can be decomposed in two parts.
- the first part integrates the total number of sustain pulses that a cell has lighted during its life-time.
- the block sus- tain_mtegration 8 is a simple add accumulation block that essentially accumulates on external SDRAM memory 9 total life-time sustain pulses.
- the PWL[7:0] factor given by the Peak White Enhancement controller 6. This PWL[7:0] value will be high for dark pictures (low energy luminance content) and low for bright pictures (high energy luminance content) .
- the second part retrieves cell usage information from external SDRAM memory 9, and evaluates on block burn-m gam control 10 for every cell an estimation of equivalent hours that has been lit. It also evaluates an estimation for the panel average usage. Finally it generates three correction multiplying factors MR [9:0], MG[9:0] and MB [9:0], which is higher for cells with above average usage and lower for cells with below average usage.
- the multiplication burn-in correction is performed on block burn_m multiplier 11 by multiplying the signal levels R, G, B of the video-degamma means 2 with the multiplying factors MR, MG, MB.
- the R, G, B signals R(9:0), G(9:0), B(9:0) from the block 11 are sent to the sub-field coding circuit 3 for further processing taking n account the long burn-m problem.
- the sustain_integration block is further de- tailed.
- This block is essentially composed of 3 multipliers and 3 adders, being a standard multiply and accumulate stage .
- the input signals of the burn-in multiplier 11 R, G, B having a bit length of ten bits are multiplied with a PWL factor from the PWE controller 6 by respective multipliers MULT .
- the output signals SR, SG, SB are added to the sustain values SRi, SGi, SBi of the burn-in memory 9 by adders ADD in order to obtain the output sustain signals SRo, SGo, SBo for the burn-m memory 9.
- Block burn-m gam 10 might be implemented as depicted Figure 5.
- This block contains three hour estimators 12. It is actually a multiplier which multiplies the total number of displayed sustain pulses by a constant factor to obtain the equivalent hour usage. This factor is directly used for defining working hours when the experimental power burn-m characteristic was traced.
- the block hour average 13 is used to obtain an average over all panel cells of the hour estimation values.
- the four thus obtained hour values HR[15:0], HG[15:0], HB[15:0] and HO [15:0] are then transformed by the panel burn-m characteristic look-up table 14 n the corresponding estimated luminance efficacy (luminance gam): GR[9:0], GG [ 9 : 0 ] , GB [ 9 : 0 ] and GO [9:0] .
- the average panel gain GO [9:0] is then mapped to a gain range where correction will be effective m block gam_range 15.
- This ga n range 15, [Ginin Gmax] has to be directly controlled by the user function of panel damage, by means of parameter BURNIN_CTL [7 : 0] . It should be zero for instance if no burn-m markings are seen on the panel.
- the block gain_limiter 16 limits the cell luminance gain factors to the just evaluated correction gain range.
- gain_window block 17 maps the luminance gain factors to correction factors: G in -> 1.00 GR -> 1.00 - (GR - Gmin) GG -> 1.00 - (GG - Gmin) GB -> 1.00 - (GB - Gmin) Gmax-> 1.00 - (Gmax-G in)
- the burn-in multiplier 11 shown in Figure 6 is composed of the 3 multipliers that perform actual burn-in active correction.
- the output signals MR, MG, MB of the burn-in gain control 10 are multiplied by the input signals Ri, Gi, Bi form the video-degamma means 2 to obtain the output signals Ro, Go, Bo for the subfield coding means 3 and the sustain integration means 8.
- the operation principle is as follows: every time the panel 1 is powered-up, the controller 18 will quickly transfer all burn-m information stored on non-volatile FLASH memory 9a, to the external SDRAM 9b. During normal operation burn-in data will be read and written back from the SDRAM 9b, which allows for a very fast access and an almost unlimited number of writing operations . Finally when during power down data will be again transferred from the SDRAM 9b to the nonvolatile FLASH 9a. For correct operation, and for the first time that panel is powered, then contents of the FLASH memory 9a should be obviously zero.
- the present invention provides the following advan- tages :
- the long time burn-m artefact is digitally compensated an active way.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of Gas Discharge Display Tubes (AREA)
Abstract
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2003250241A AU2003250241A1 (en) | 2002-06-14 | 2003-06-05 | Burn-in compensation for plasma display panels |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP02291489.9 | 2002-06-14 | ||
EP02291489A EP1376520A1 (fr) | 2002-06-14 | 2002-06-14 | Compensation pour la rémanence d'image sur un panneau d'affichage à plasma |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2003107317A1 true WO2003107317A1 (fr) | 2003-12-24 |
WO2003107317A8 WO2003107317A8 (fr) | 2005-03-17 |
Family
ID=29716939
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2003/050215 WO2003107317A1 (fr) | 2002-06-14 | 2003-06-05 | Compensation de remanence pour panneaux d'affichage plasma |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP1376520A1 (fr) |
AU (1) | AU2003250241A1 (fr) |
WO (1) | WO2003107317A1 (fr) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004240101A (ja) * | 2003-02-05 | 2004-08-26 | Sony Corp | ディスプレイ装置、ディスプレイ装置の駆動方法 |
DE10354820A1 (de) | 2003-11-24 | 2005-06-02 | Ingenieurbüro Kienhöfer GmbH | Verfahren und Vorrichtung zum Betrieb eines verschleißbehafteten Displays |
DE102005024769A1 (de) * | 2005-05-20 | 2006-11-23 | Ingenieurbüro Kienhöfer GmbH | Verfahren zum Betreiben einer Anzeigevorrichtung mit einer Mehrzahl von verschleissbehafteten Bildelementen, Vorrichtung zur Korrektur eines Ansteuersignals für eine Anzeigevorrichtung und Anzeigevorrichtung |
US8237750B2 (en) | 2008-10-23 | 2012-08-07 | Motorola Mobility, Inc. | Method of correcting emissive display burn-in |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5493183A (en) * | 1994-11-14 | 1996-02-20 | Durel Corporation | Open loop brightness control for EL lamp |
EP0755042A1 (fr) * | 1995-07-20 | 1997-01-22 | STMicroelectronics S.r.l. | Méthode et dispositif pour uniformiser la luminosité et pour réduire la dégradation de la matière fluorescente dans un dispositif d'affichage plat à émission de champ |
EP1047040A1 (fr) * | 1999-03-30 | 2000-10-25 | Nec Corporation | Appareil de commande pour un panneau d'affichage à plasma |
-
2002
- 2002-06-14 EP EP02291489A patent/EP1376520A1/fr not_active Withdrawn
-
2003
- 2003-06-05 AU AU2003250241A patent/AU2003250241A1/en not_active Abandoned
- 2003-06-05 WO PCT/EP2003/050215 patent/WO2003107317A1/fr not_active Application Discontinuation
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5493183A (en) * | 1994-11-14 | 1996-02-20 | Durel Corporation | Open loop brightness control for EL lamp |
EP0755042A1 (fr) * | 1995-07-20 | 1997-01-22 | STMicroelectronics S.r.l. | Méthode et dispositif pour uniformiser la luminosité et pour réduire la dégradation de la matière fluorescente dans un dispositif d'affichage plat à émission de champ |
EP1047040A1 (fr) * | 1999-03-30 | 2000-10-25 | Nec Corporation | Appareil de commande pour un panneau d'affichage à plasma |
Also Published As
Publication number | Publication date |
---|---|
AU2003250241A1 (en) | 2003-12-31 |
WO2003107317A8 (fr) | 2005-03-17 |
EP1376520A1 (fr) | 2004-01-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7173580B2 (en) | Method for optimizing brightness in a display device and apparatus for implementing the method | |
KR100965202B1 (ko) | 비디오 화상 처리를 위한 방법 및 장치 | |
US6674429B1 (en) | Method for power level control of a display and apparatus for carrying out the method | |
EP0888004B1 (fr) | Appareil de contrôle de la luminosité | |
EP1366484B1 (fr) | Procede et appareil de commande de niveau d'intensite d'un dispositif d'affichage | |
JP3580027B2 (ja) | プラズマディスプレイ装置 | |
JP3427036B2 (ja) | 表示パネルの駆動方法及びパネル表示装置 | |
US20030234753A1 (en) | Plasma display panel and method of driving the same | |
KR20160125555A (ko) | 표시 장치 및 표시 장치의 구동 방법 | |
KR100924105B1 (ko) | 비디오 화상을 처리하기 위한 방법 및 장치 | |
US6989804B2 (en) | Method and apparatus for processing video pictures, especially for improving grey scale fidelity portrayal | |
JPWO2007136060A1 (ja) | 色温度補正装置及びディスプレイ装置 | |
EP1376520A1 (fr) | Compensation pour la rémanence d'image sur un panneau d'affichage à plasma | |
EP0991051B1 (fr) | Circuit de commande d'un panneau d'affichage | |
US20060066517A1 (en) | Method and apparatus for generating subfield codes | |
US20050140587A1 (en) | Method and apparatus for decreasing an afterimage of a plasma display panel | |
EP1353315A1 (fr) | Procédé et dispositif d'amélioration de la résolution en niveau de gris d'un dispositif d'affichage d'images | |
JP4318136B2 (ja) | 表示デバイスの駆動方法 | |
EP1387341A1 (fr) | Méthode et dispositif pour l'amelioration de la representation des niveaux de gris d'un appareil d'affichage | |
EP1821275A1 (fr) | Appareil et Méthode de pilotage d'un panneau d'affichage plasma avec estimation de l'atténuation et compensation correspondante. | |
US7796138B2 (en) | Method and device for processing video data by using specific border coding | |
JP2982575B2 (ja) | Pdp駆動回路 | |
EP1821277A2 (fr) | Procédé de commande d'un panneau d'affichage à plasma avec estimation et compensation de l'atténuation, et appareil correspondant | |
KR20070072123A (ko) | 플라즈마 디스플레이 장치 및 그의 화상처리 방법 | |
KR20050019790A (ko) | 컬러 순차 디스플레이를 위한 컬러 재매핑 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NI NO NZ OM PH PL PT RO RU SC SD SE SG SK SL TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
DFPE | Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101) | ||
CFP | Corrected version of a pamphlet front page | ||
CR1 | Correction of entry in section i |
Free format text: IN PCT GAZETTE 52/2003 ADD "DECLARATION UNDER RULE 4.17: - AS TO APPLICANT S ENTITLEMENT TO APPLY FOR AND BE GRANTED A PATENT (RULE 4.17(II))." |
|
122 | Ep: pct application non-entry in european phase | ||
NENP | Non-entry into the national phase |
Ref country code: JP |
|
WWW | Wipo information: withdrawn in national office |
Country of ref document: JP |