WO2003093886A2

WO2003093886A2 - Method of etching optic elements

Info

Publication number: WO2003093886A2
Application number: PCT/GB2003/001870
Authority: WO
Inventors: Sureshchandra M. Ojha
Original assignee: Bookham Technology Plc
Priority date: 2002-05-02
Filing date: 2003-04-30
Publication date: 2003-11-13
Also published as: GB0210117D0; AU2003233869A1; WO2003093886A3; AU2003233869A8

Abstract

A method of forming at least one optic element in an optical layer, including the steps of: providing a mask over the optical layer (21); patterning the mask by removal of selected portions thereof to define at least one hole in the mask that exposes a selected portion of the optical layer; and etching the optical layer through the at least one hole; wherein the mask includes a layer of doped silicon oxide, and including the step of prior to the etching step flowing the layer of doped silicon oxide so as to smooth the edges of the patterned mask that define the hole; and the use of this technique for the purpose of increasing the smoothness with which the vertical walls of one or more optical elements can be formed in an underlying optical layer during a subsequent step of etching through the patterned mask.

Description

METHOD OF ETCHING OPTIC ELEMENTS

The present invention relates to a method of etching optic elements into an optical layer.

A conventional method of etching optical features in an optical layer such as a layer of silica, silicon or InP involves the use of a patterned photoresist layer as a mask. A layer of photoresist is formed over the optical layer and is patterned by photolithography using a reticle fabricated by a laser/electron beam technique. The optical layer is subjected to dry etching through the patterned photoresist mask. In the case of etching a silicon optical layer, polymer is formed on the mask to enhance selectivity during the etch.

It has been observed that the walls of the optic features formed by this etching method are relatively rough, particularly with the above-described technique of etching silicon using polymer to enhance the selectivity. In the case of a waveguide, particularly a curved waveguide of relatively small radius, such side wall roughness can result in increased loss by scattering. In the case of an interferometric device such as an array waveguide grating, side wall roughness also results in random phase errors, which lead to increased crosstalk and losses. Furthermore, the fabrication of mirrors typically requires a relatively deep etch and verticality control.

It is an aim of the present invention to provide a method of etching optic elements in an optical layer, with which these problems can be at least partially overcome.

According to the present invention, there is provided a method of forming at least one optic element in .an optical layer, including the steps of: providing a. mask over the optical layer; patterning the mask by removal of selected portions thereof to define at least one hole in the mask that exposes a selected portion of the optical layer; and etching the optical layer through the at least one hole; wherein the mask includes a layer of flowable material, and including the step of prior to the etching step flowing the layer of flowable material so as to smooth the edges of the patterned mask that define the hole. According to another aspect of the present invention there is provided the use of this technique for increasing the smoothness with which the vertical walls of one or more optical elements can be formed in an underlying optical layer during a subsequent step of etching through the patterned mask.

An embodiment of the present invention shall now be described, by way of non- limiting example only, with reference to the accompanying drawings, in which:- Figure 1 schematically demonstrates a method of etching a rib waveguide according to an embodiment of the present invention.

A thin layer 4 of boron and phosphorus doped silicon oxide (BPSG), which has a relatively low melting point (as low as 800°C), is deposited on a silicon wafer including an optical layer of epitaxial silicon 2. Although not shown in the figures, the optical layer 2 is typically supported by a substrate. In the case of silicon, the epitaxial silicon layer 2 is supported on a silicon substrate via a lower optical confinement layer of silicon oxide.

A layer of photoresist 6 is then formed over the BPSG layer 4 and patterned by lithography using a reticle fabricated by a laser/electron beam technique. The pattern of the patterned photoresist 6 is transferred to the BPSG layer 4 by reactive ion etching (RLE).

The patterned photoresist 6 is then stripped from the patterned BPSG layer 4, and the patterned BPSG layer 4 is subject to controlled annealing using a furnace or by rapid thermal annealing (RTA) prior to dry etching of the silicon to form the rib waveguide

It has been observed that the edges of a reticle produced by a laser/electron beam technique exhibit a finite degree of roughness arising from the finite size of the laser/electron beam spot (quantization), and that this roughness is transferred to the photoresist and any secondary mask in the process of patterning the same using the reticle. It is this mask edge roughness which is thought to cause the side wall roughness in the etched silicon waveguides in the conventional technique of etching waveguides. In the method of this embodiment of the present invention, the purpose of the anneal is to soften and partially flow the patterned BPSG mask 4 to wipe out all memory of the original mask edges. These smooth mask edges in turn give rise to a waveguide having an improved side wall roughness. Smoothing the edges of the mask also gives an extra degree of freedom in setting the etch conditions for improving other aspects such as selectivity, throughput and loading effects.

The applicant draws attention to the fact that the present invention may include any feature or combination of features disclosed herein either implicitly or explicitly or any generalisation thereof, without limitation to the scope of any definitions set out above. In view of the foregoing description it will be evident to a person skilled in the art that various modifications may be made within the scope of the invention.

Claims

CLAIMS:

1. A method of forming at least one optic element in an optical layer, including the steps of: providing a mask over the optical layer; patterning the mask by removal of selected portions thereof to define at least one hole in the mask that exposes a selected portion of the optical layer; and etching the optical layer through the at least one hole; wherein the mask includes a layer of flowable material, and including the step of prior to the etching step flowing the layer of flowable material so as to smooth the edges of the patterned mask that define the hole.

2. A method according to claim 1, wherein the layer of flowable material is a layer of doped silicon oxide.

3. A method according to claim 2, wherein the layer of flowable material is a layer of boron and phosphorous doped silicon oxide.

4. A method according to any preceding claim, wherein the optical element is selected from the group consisting of an optical waveguide, an interferometric device, and a mirror.

5. A method according to claim 4, wherein the optical element is an array waveguide grating.

6. A method according to any preceding claim, wherein the optical layer is a layer of epitaxial silicon or InP.

7. A use .of .the technique of flowing, the material. of a patterned etching iiask for the purpose of increasing the smoothness with which the vertical walls of one or more optical elements can be formed in an underlying optical layer during a subsequent step of etching through the patterned mask.

8. A method of forming at least one optic element in an optical layer, including the steps of: providing a mask over the optical layer; patterning the mask by removal of selected portions thereof to define at least one hole in the mask that exposes a selected portion of the optical layer; and etching the optical layer through the at least one hole; wherein the mask includes a layer of doped silicon oxide, and including the step of prior to the etching step flowing the layer of doped silicon oxide so as to smooth the edges of the patterned mask that define the hole.