Classifications

• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
  • G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
  • G01R35/002—Testing or calibrating of apparatus covered by the other groups of this subclass of cathode ray oscilloscopes
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
  • H03H17/00—Networks using digital techniques
  • H03H17/02—Frequency selective networks
  • H03H17/0294—Variable filters; Programmable filters

Definitions

• the present invention is directed to a digital signal processing (DSP) system having a digital frequency response compensator and an arbitrary response generator. More generally, the present invention relates to systems having an analog input signal, analog electronics (e.g. attenuators, gain elements, and buffers), and an analog-to-digital converter (ADC) for converting the analog input signal into a sequence of numbers that is a digital representation of the input signal.
• DSP digital signal processing
• ADC analog-to-digital converter
• This invention pertains to instruments designed with the aforementioned components in order to acquire waveforms for the purpose of viewing, analysis, test and verification, and assorted other purposes.
• this invention pertains to digital sampling oscilloscopes (DSOs), especially ultra-high bandwidth and sample rate DSOs and single-shot DSOs (sometimes referred to as real-time DSOs).
• DSOs digital sampling oscilloscopes
• These DSOs are capable of digitizing a voltage waveform with a sufficient degree of over-sampling and fidelity to capture the waveform with a single trigger event.
• DSOs have been the primary viewing tool for engineers to examine signals.
• the simple viewing of waveforms has been de-emphasized and greater demand has been placed on DSOs that are also capable of analyzing the waveforms. This increased desire for DSO analysis capability requires a greater degree of signal fidelity (i.e.
• a component capable of compensating for degradation due to increased bandwidth is provided (i.e. frequency response flatness and/or compliance to a particular desired response characteristic).
• an adjustable component capable of making trade-offs with regard to noise, flatness and/or pulse response characteristics, rather than relying on static instrument characteristics is provided.
• the adjustable component thereby allows the instrument to be optimized for a given measurement.
• a capability using the adjustable component to feedback the response characteristics of the instrument to the user is provided.
• a component capable of being calibrated for changing channel response characteristics is provided.
• a preferred embodiment of the invention provides a signal processing system capable of compensating for a channel response characteristic of an input waveform.
• the system comprises input specifications, a filter builder, and a filter.
• the input specifications are used to specify the design of the filter and include channel response characteristics defining the response characteristics of a channel used to acquire the input waveform, and user specifications for specifying a desired frequency response and a degree of compliance to the desired frequency response.
• the filter builder generates coefficients for the filter and outputs final performance specifications.
• the filter has a compensation filter generator for generating coefficients corresponding to a compensation response on the basis of the inverse of the channel response characteristics, and a response filter generator for generating coefficients corresponding to a combination of an ideal response and a noise reduction response on the basis of the user specifications.
• the filter filters the input waveform and outputs an overall response waveform having a desired frequency response.
• the filter is comprised of a filter coefficient cache for storing the coefficients generated by the filter builder, a compensation filter portion for filtering the input waveform in accordance with the coefficients stored in the filter coefficient cache corresponding to the compensation response, and a response filter portion having a response filter stage and a noise reduction stage for filtering the compensated waveform output from said compensation filter portion that outputs the overall response waveform.
• the response filter portion filters using the coefficients stored in the filter coefficient cache corresponding to the combination of the ideal response and the noise reduction response.
• the filter may be implemented as an infinite impulse response (IIR) filter or a finite impulse response (FIR) filter.
• the channel response characteristics may be predetermined based on a reference signal and the reference signal as acquired by the channel.
• the user specifications may comprise a bandwidth, a response optimization, a compensation compliance, and a filter implementation type.
• the response optimization may be a pulse response optimization implemented using a Besselworth filter, a noise performance optimization implemented using a Butterworth filter, or a flatness optimization implemented using a Butterworth filter.
• the filter implementation type may be finite impulse response (FIR) or infinite impulse response (IIR).
• a signal processing element for filtering an input digital waveform.
• the element comprises a filter builder, an infinite impulse response (IIR) filter, a finite impulse response (FIR) filter, and an output selector switch.
• the filter builder is used for generating filter coefficients on the basis of a channel frequency response and a user response characteristics. The channel frequency response is determined on the basis of a response input and a correction input.
• the infinite impulse response (IIR) filter has an IIR input for the input digital waveform and an IIR coefficient input connected to the filter builder.
• the IIR filter produces an IIR filtered waveform from the input digital waveform on the basis of the filter coefficients generated by the filter builder.
• the finite impulse response (FIR) filter has an FIR input for the input digital waveform and a FIR coefficient input connected to the filter builder.
• the FIR filter produces a FIR filtered waveform from the input digital waveform on the basis of the filter coefficients generated by the filter builder.
• the output selector switch selects either the IIR filtered waveform or the FIR filtered waveform for output.
• the filter builder detects changes in the sampling rate of said input digital waveform that may require the filter coefficients to be changed and regenerated.
• the filter builder generates filter coefficients for the FIR filter or the IIR filter on the basis of the output selector switch.
• the filter builder has channel, compensation, shaper, and noise reduction outputs for evaluating the performance of the filtering.
• the response input is a known input response and the correction input is a measured input response as acquired by an input channel.
• the user response characteristics are used to generate filter coefficients corresponding to an arbitrary response portion of the filter.
• the user response characteristics comprise a bandwidth, a response optimization, a compensation compliance, and a filter implementation type.
• the response optimization may be a pulse response optimization implemented using a Besselworth filter, a noise performance optimization implemented using a Butterworth filter, or a flatness optimization implemented using a Butterworth filter.
• the filter implementation type may be FIR or IIR.
• a method of filtering an input digital waveform to compensate for the response characteristics of an acquisition channel is provided.
• the method first generates a compensation portion of a filter on the basis of an input channel response by pre-wa ⁇ ing the input channel response, designing an analog filter emulating the pre-wa ⁇ ed input channel response by making an initial filter guess and iterating the coefficients of the initial filter guess to minimize a mean-squared error, inverting the analog filter, and digitizing the inverted analog filter to produce the compensation portion of the filter using a bilinear transformation.
• the method then generates an arbitrary response portion of the filter on the basis of an input user specifications.
• the method filters the input digital waveform using the compensation portion of the filter and by the arbitrary response portion of the filter, thereby producing a filtered digital waveform having the desired response characteristics.
• the arbitrary response portion of the filter is comprised of a shaper and a noise reducer.
• the coefficients of the initial filter guess are iterated until the mean-squared error is less than a compensation compliance specified in the input user specifications.
• the filter may be implemented as an infinite impulse response (IIR) filter or a finite impulse response (FIR) filter.
• the channel response characteristics may be predetermined based on a reference signal and the reference signal as acquired by the channel.
• the user specifications may comprise a bandwidth, a response optimization, a compensation compliance, and a filter implementation type.
• the response optimization may be a pulse response optimization implemented using a Besselworth filter, a noise performance optimization implemented using a Butterworth filter, or a flatness optimization implemented using a Butterworth filter.
• the filter implementation type may be finite impulse response (FIR) or infinite impulse response (IIR).
• Figure 1 shows the frequency response compensator and arbitrary response generator system according to the present invention
• Figure 2 illustrates the frequency response of a channel and a compensation and response generation system
• Figure 3 shows the frequency response compensator and arbitrary response generator system according to the present invention within a processing web
• Figure 4 shows the internal structure of component 33 shown in Figure 3;
• Figure 5 shows an acquired time-domain reference signal and a channel frequency response calculated therefrom
• Figure 6 shows a pre- warped channel frequency response
• Figure 7 shows the filter response for an initial filter guess at approximating the response shown in Figure 6;
• Figure 8 shows the pole and zero locations for the initial filter guess in Figure 7
• Figure 9 shows the frequency response of digital filters with varying degrees of compliance that emulate the response shown in Figure 6;
• Figure 10 is an enlarged view of the frequency band in Figure 9 in which compliance is enforced;
• Figure 11 shows the frequency response of digital filters with varying degrees of compliance that compensate the response shown in Figure 6;
• Figure 12 is an enlarged view of the frequency band in Figure 11 in which compliance is enforced;
• Figure 13 shows the compensation filter error for the filters in Figure 12;
• Figure 14 shows the compensation filter error as a function of the number of filter stages;
• Figure 15 shows the configuration user interface for specifying a filter
• Figure 16 shows the advanced user interface for specifying a filter
• Figure 17 is a flowchart of a procedure for designing a Besselworth filter
• Figure 18 shows the frequency response of a Besselworth filter
• Figure 19 shows a calibration arrangement for a DSO in accordance with the present invention.
• Figure 20 shows an example output performance specification in accordance with the present invention.
• the present invention is a signal processing system having a digital frequency response compensator and an arbitrary response generator.
• the invention includes a filtering operation that is performed by a signal processing element located in the signal path of a DSO, between the ADC and any downstream processing of the digitized waveform.
• the filtering operation is executed during and/or after readout and prior to display or further processing of the waveform.
• DSOs generally have a high performance central-processing unit (CPU) for processing the acquired waveforms for analysis or display.
• CPU central-processing unit
• the digital filtering operation according to the present invention may be implemented in software on this CPU within the DSO.
• the pu ⁇ ose of this digital filtering operation is to alter the frequency response of the DSO.
• This filter is designed such that by the adjustment of its filtering characteristics, the entirety of the DSO's system (including the channel input, the digitizing elements, and the present invention) has a specific, prescribed frequency response.
• the digital filter does not merely filter the frequency response, but causes the entire system to have a prescribed frequency response.
• Most filters are simply designed to have a particular effect on the signal input to the filter, but not to provide a particular overall system response.
• Figure 2 illustrates the steps in processing the frequency response of a DSO channel using a compensation and response generation system according to the present invention.
• Input response plot 17 shows the frequency response for a typical input channel. Note the channel does not have a flat frequency response. A typical desired frequency response is shown by ideal response plot 20. However, a user may want to specify other frequency responses.
• the present invention transforms response plot 17 into overall response plot
• Digital filter 18 is comprised of three internal filter stages: compensation filter 19, ideal response filter 20 and cutoff filter 21.
• Figure 2 also shows the effect of each of these filter stages on the signal by showing the overall response of the system at each successive filter stage. The effect of each filter stage is shown by simply adding the frequency responses at each stage. Recall that the original system response is shown by the channel frequency response 17, 22.
• the channel response 22 is first processed by the compensation stage 23, resulting in the compensated channel response 27, which is essentially flat.
• the compensation filter stage 23 is the opposite/inverse of the channel response 22. Note that several plots (e.g.
• channel response 22 have a shaded portion (25) on the right side of the plot. The shading indicates where the response is so attenuated that the exact response is unknown.
• the compensated response 28 is then passed through the ideal response filter stage 30 resulting in the output response 29. However, note that the output response still has unknown content in the shaded region. This uncertainty is resolved by processing with cutoff stage 31. The cutoff produces a known overall response 32.
• Prior attempts at this type of invention have failed in part because of difficulties in implementing the compensation filter portion.
• the design of the compensation filter is difficult because it is based on the channel response, which is highly variable.
• the design of the filter is split into two steps. This is because the response filter and cutoff filter are designed together.
• This two step approach simplifies the design of the filter and reduces the filter calculation time during operation. This is because only the compensation filter portion needs to be rebuilt if the channel frequency response changes. Similarly, if the user changes the response specifications, only the response portion needs to be rebuilt. In other words, the compensation and response filter designs are decoupled. This decoupling is demonstrated by the fact that the compensation filter output is designed to generate a fixed output frequency response specification (i.e. a response that is flat). Thus, the channel frequency response determines the design of this filter portion. The response filter portion assumes that its input response is flat; therefore only the response output specifications affect the design.
• FIG. 1 shows the frequency response compensator and arbitrary response generator system 1 according to the present invention.
• the filter 4 consists of the three filter stages discussed previously. Waveforms are input to the system at input 2 and pass through the aforementioned filter stages: compensation 5, response 6, and noise-reduction 7 (or cutoff). The response 6 and noise reduction 7 are grouped together as the response filter portion 8.
• the filter detail is shown as infinite impulse response (IIR) biquad sections, which is the preferred but not required implementation.
• IIR infinite impulse response
• the filter 4 contains a filter coefficient cache 9 that contains the coefficients defining the filter.
• the filter coefficients are supplied by the filter coefficient builder (or filter builder) 10.
• Filter builder 10 is divided into two sections: the compensation filter generator 11 and the response filter generator 12.
• the compensation filter generator 11 generates filter coefficients for the compensation response 19 in Figure 2.
• the response filter generator 12 generates filter coefficients for a combination of ideal response 20 and noise reduction (or cutoff) response 21, as shown in Figure 2.
• the input specifications to the filter builder consist of two parts: the channel response characteristics 13 and the response and compensation specifications 14.
• Channel response specifications 13 are based on the response of the input channel while the response and compensation specifications 14 are specified by the user.
• the response and compensation specifications 14 specify the desired response and the desired degree of compliance to this response.
• the channel response 13 and user specifications 14 completely specify the desired system performance.
• the channel response may be determined through factory calibration or be dynamically calibrated using a reference standard. In the case of dynamic calibration, the reference standard may be either internally provided or
• Response and compensation specifications 14 are gradated to allow for tight control of the desired response, while allowing for easy control of the system.
• the degree of compliance allows the user to fine tune the system. Large, complex digital filters will result if the desired response specification is exotic, or if the desired degree of compliance is very high. Such filters require large amounts of processing time which reduces the instrument update rate. Thus, the degree of compliance should be balanced with the impact to the instrument update rate.
• Compensation filter generator 11 builds the compensation portion of the filter. As discussed previously, this portion is effectively the inverse of the channel response. The main difficulty with the design of this portion is that the channel response may be somewhat arbitrary and the specification may require stating the entire channel frequency response. This leads to a filter design that involves a least- squares error (L2) minimization between the input specification and the final output response of the filter. Unfortunately, when stated as an L2 minimization, a set of non-linear equations results which must be solved using non-linear equation solving methods. The fact that the equations are non-linear means that there is no guarantee that L2 will be minimized - only that a local minimum will be found.
• L2 minimization a least- squares error
• Response filter generator 12 translates the user specifications 14 and builds the response filter.
• the response filters are usually a combination of filters types that are generally compatible with IIR filter designs (e.g. Butterworth, Bessel, Inverse Chebyshev). Other filter types may also be used. The following description of the preferred embodiment explains how the invention deals with this filter building problem.
• the present invention has been implemented within a new software development platform for LeCroy DSOs.
• the main features of the software platform that are used by this invention are the "streaming architecture" and the "processing web"- both of which comprise a system that manages the interconnection of processing objects and data flow through these objects. See U.S. Application Serial No. 09/988,120 filed November 16, 2001 and U.S. Application Serial No. 09/988,420 filed November 16, 2001 inco ⁇ orated herein by reference.
• Each processing object in the software, including the present invention is implemented as an ATL COM object.
• Figure 3 shows the frequency response compensator and arbitrary response generator system according to the present invention integrated within a software processing web. Note that the operation of the processing web may not interact directly with the DSO user, but rather may simply provide the underlying object connectivity. In other words, Figure 3 represents processing object connectivity within a DSO, as established via internal DSO software.
• Filter component 33 according to the present invention is shown in an example system configuration.
• Filter component 33 has three inputs (Input 34, Resp 35, and Corr 36) and five outputs (Output 37, Chan 38, Comp 39,
• Input 34 is shown connected to the channel 1 output 43 of an acquisition system component 42.
• Output pin 43 is the channel output of the digitizing hardware of the oscilloscope.
• Component 42 continuously acquires waveforms for input 34.
• component output 37 provides a compensated waveform output that has been digitally filtered to meet the specifications provided.
• Output 37 is connected to a Renderer 44 that draws the waveform on the oscilloscope screen.
• the Response input 35 and Correction input 36 provide the filter specifications for determining the channel response.
• Response input 35 is connected to the waveform importer component 45. In this case, the waveform importer is reading a step response, previously acquired from the same channel, from a disk.
• Correction input 36 is connected to another waveform importer component 46, which is reading the actual frequency content of the previously acquired step response.
• the combination of the Resp 35 and Corr 36 inputs provides filter component 33 with sufficient information to determine the channel frequency response.
• the other parts of the filter specifications are provided through dialog boxes, shown in Figure 15 and Figure 16 (described later).
• the Chan 38, Comp 39, Shape 40, and Noise 41 filter component outputs provide frequency response waveforms that are indicative of the performance of the system.
• Channel response 38 outputs the frequency response of the channel determined by the Resp 35 and Corr 36 inputs.
• Compensation response 39 provides the compensation frequency response of the digital filter designed to counter the channel frequency response.
• Shaper 40 and Noise reducer 41 output the frequency response of two filter portions that together provide the response characteristic specified by the user in the dialog boxes shown in Figure 15 and Figure 16.
• the Shaper portion of the digital filter is specifically designed to match a specified frequency response characteristic.
• the noise reducer portion is designed to provide a sha ⁇ attenuation of the input waveform beyond the frequencies of interest.
• the Chan 38, Comp 39, Shape 40, and Noise 41 filter frequency response outputs are provided in decibels and can be added algebraically to examine system performance, as shown in Table 1 below.
• the four frequency response outputs (38-41) are shown connected to adder components 47, 48, and 49.
• Two desired frequency response views are displayed using renderers 50 and 52, which are zoomed by components 51 and 53.
• Renderer 50 displays the channel frequency response while renderer 52 displays the overall system frequency response, i.e. the sum of the Chan 38, Comp 39, Shape 40, and Noise 41 outputs.
• filter component 33 is actually a composite of several components. Each of these internal components is also implemented as a separate ATL COM object.
• the two top components IIR filter 54 and finite impulse response (FIR) filter 55
• FIR finite impulse response
• Both filter inputs 57 and 58 are connected directly to the input pin 59 where the DSO waveforms from the digitizing hardware are input.
• both filter outputs 60 and 61 are connected to output pin 62 (through a switch 79). The setting of switch 79 is determined either directly by the user or through an optimization performed during filter building.
• the coefficients are sent in groups of six with each group representing a biquad section.
• the sequence of numbers is sent as ao,o, a ⁇ , 0 , a 2j0 , b 0 ⁇ 0 , Ho, b 2 , 0 , ao, ⁇ , a ]; ⁇ , a 2 , h b 0 , ⁇ , b ⁇ , ⁇ , b 2;h ...
• Input pin 59 is also connected to the filter builder input 66 for the pu ⁇ ose of detecting changes in the sample rate of the input waveform which may require the digital filter to be rebuilt.
• the resp 67 and corr 68 inputs are tied to the filter builder resp 69 and corr 70 inputs.
• the four frequency response outputs of the filter builder 75-78 are connected directly to the composite system outputs 71-74.
• the filter builder 56 requires two sets of specifications (the channel frequency response and the user response specifications) to produce output coefficients.
• the channel frequency response is used to build the compensation portion of the filter.
• the user response specifications are used to build the arbitrary response portion of the filter.
• the channel frequency response is calculated from the response 69 and correction 70 input pins to the filter builder 56.
• Response is the measured response to a known input stimulus to the channel.
• Correction is the actual, known frequency response or frequency content of the input stimulus.
• a source must be traceable to a known standard.
• knowing the frequency content of a source waveform known by measurement utilizing another calibrated instrument
• knowing the instrument's response to this waveform specifically, the response of the channel of the DSO into whose data stream this processing element is placed
• the frequency response of the channel may be determined. If H c denotes the unknown frequency response of the channel, H s the known frequency content of the calibration waveform, and H m the frequency content of the scope channel as measured by the uncompensated DSO, then:
• one method of determining the scope channel response is to take a known stimulus with frequency content H s , apply it to the input of the DSO channel, acquire it with the digitizer and acquisition system, measure its frequency content H m and use Equation 5 to determine the channel frequency response H c .
• the resp 69 and corr 70 input pins are polymo ⁇ hic, meaning they show the same interface, but their behavior differs based on the input. Namely, each input pin is capable of accepting either a time-domain or frequency-domain waveform.
• the system can receive channel frequency response specifications in the following four formats:
• A: Frequency sweep is provided with known time domain response
• the CZT is used because it allows precise setting of the number of frequency points in the response, regardless of the sampling rate. Many advanced Fast Fourier Transform (FFT) algorithms also provide this capability, but the CZT is simple and only requires a radix 2 FFT regardless of the number of points in the input signal. While the number of frequency points is settable in the filter builder, 50 points (from 0 Hz to the maximum compensation frequency) works well.
• the maximum compensation frequency is the frequency at which we will no longer try to undo the effects of the channel frequency response. Usually, this is the frequency at which the magnitude response of the channel approaches the noise floor. This frequency is usually the maximum attainable bandwidth of the instrument using this invention.
• H s and H m have been determined.
• the frequency response is represented as a magnitude (in decibels) and a phase (in degrees). If necessary, the responses are resampled using C-spline inte ⁇ olation.
• H c is calculated by subtracting the magnitude and the phase. H c forms the basis for the design of the compensation filter portion.
• the source waveform used to determine H m is a step 80 provided by a step generator. This step has been acquired by a DSO channel. To reduce noise and increase resolution (both horizontally and vertically), the acquired step is averaged repeatedly by the DSO.
• the impulse response of a perfect step is:
• the frequency content of the step (H s ) can easily be determined by taking the derivative of the step acquired through a channel with a flat frequency response and applying the CZT.
• Figure 5 shows the result of the application of Equation 5.
• Descriptive box 82 shows that the step 80 is about 250 mV in amplitude, and that the duration of this waveform is 20 ns.
• the measured frequency response 81 of the channel is plotted at 0.5 GHz per horizontal division and 1 dB per vertical division, as indicated in box 83. As shown, this channel frequency response is not flat.
• the compensation filter portion is designed based on this channel response to counteract the deviation of the response from 0 dB - in effect, the filter provides the exact inverse of the channel response.
• An analog filter is first designed that emulates the channel response as closely as possible, the filter is inverted to provide the inverse response, and then converted to a digital filter using a bilinear transformation.
• the bilinear transformation is well known to those skilled in the art of digital signal processing, but some of the details are described below.
• the bilinear transformation is used to convert analog filters to digital filters through a direct substitution of the Laplace variable s. Take an analog filter transfer function: Equation 8
• Equation 10 By performing this substitution, a digital filter according to Equation 10 will not perform exactly as the analog filter of Equation 8. This is because the substitution shown in Equation 9 creates a non-linear relationship between the frequency response of the analog and digital filters. This non-linear relationship is called wa ⁇ ing. Specifically, this relationship is:
• Equation 11 where f d is the frequency where the digital frequency response is evaluated, f a is the frequency where the analog frequency response evaluated, and F s is the sampling rate of the digital system.
• the analog filter response evaluated at f a equals the digital filter response evaluated at f d .
• the channel frequency response is prewa ⁇ ed.
• Figure 6 shows a prewa ⁇ ed response 201. Prewa ⁇ ing involves changing the frequency scale of the channel frequency response 200. Each frequency is replaced with a new value to counteract the wa ⁇ ing:
• Equation 13 tends towards infinity as f approaches the Nyquist rate. Even excluding the Nyquist rate, frequencies close to Nyquist still generate large prewa ⁇ ed frequencies. For this reason, the size of the prewa ⁇ ed frequencies are restricted to a fixed multiplicative factor (e.g. 50). Any prewa ⁇ ed response points above fifty times the Nyquist rate are discarded.
• a fixed multiplicative factor e.g. 50
• An analog filter having the form of Equation 8, matching the prewa ⁇ ed response is built.
• the prewa ⁇ ed response 201 shown in Figure 6 the prewa ⁇ ing effects tend towards infinity at Nyquist. This means that even though the frequency response of the channel tends to have a steep drop as the bandwidth of the channel is exceeded, the prewa ⁇ ed magnitude response flattens asymptotically, approaching a fixed attenuation (i.e. the prewa ⁇ ed response approximates a horizontal line as the response tends towards infinity).
• N M in the analog filter structure shown in Equation 8.
• the filter is built by deciding on the value of N (the number of filter coefficients in the numerator and denominator polynomial) and making an initial guess at the numerator and denominator coefficients a n and b m . Then, these coefficients are iteratively adjusted until the mean-squared error between the magnitude response of the filter and the prewa ⁇ ed channel frequency response specified is minimized. It is important that the initial guess of the coefficient values be reasonable. If not, the L2 minimization may not converge, or may converge to a local minimum instead of the absolute minimum. If the local minimum is far away from the absolute minimum, the resulting filter design may be useless.
• a reasonable guess would be any guess that has no overlapping poles and zeros, or whose frequency response is close to the channel frequency response.
• a multiplicative factor as opposed to exact octave spacing — can be used. This factor may be calculated as follows: The end frequency (f end ) is defined as the last frequency point in the prewa ⁇ ed channel frequency response. The start frequency (f st art) is defined to be somewhat higher than 0 Hz (e.g. the 8 th frequency point in the prewa ⁇ ed channel response).
• the multiplicative factor (M space ) that would fit alternating poles and zeros ideally between these frequencies is:
• numerator and denominator polynomials having the form of Equation 8 are calculated by polynomial multiplication.
• Figure 7 shows the magnitude response of an initial filter guess with four poles and zeros.
• Figure 7 shows the individual response of each pole 210 and zero 211, along with the overall magnitude response 212 formed by summing the individual contributions. All guesses will contain ripple and be slightly offset from 0 dB.
• Figure 8 shows the pole and zero locations of the initial guess analog filter.
• a (local) minimum is reached when the filter coefficients aAN and b m are such that the partial derivatives of the mean-squared error with respect to all coefficients are zero when the filter magnitude response is evaluated at these coefficient values. This is done by finding the point at which the gradient is zero. This means that the partial derivative with respect to any coefficient is zero:
• Equation 17 and Equation 18 demonstrate that to evaluate the partial derivatives of the mean-squared error, we require analytical functions for the magnitude response and the partial derivatives with respect to the magnitude response only. In fact, most non-linear equation solvers require exactly that.
• the magnitude response can be evaluated as: ( ⁇ ) + ⁇ ( ⁇ ) 2
• Equation 19 Equation 25, and Equation 27, the filter can be adequately solved using any reasonable non-linear equation solver (e.g. the genfit function within MathCAD or the Levenberg-Marquardt algorithm).
• any reasonable non-linear equation solver e.g. the genfit function within MathCAD or the Levenberg-Marquardt algorithm.
• Equation 27 the partial derivative with respect to coefficient bo should not use Equation 27, but should instead be set to infinity (or a huge number). This is because the actual values a 0 and bo are arbitrary. The ratio of ao and bo is all that is important - this ratio sets the dc gain of the system. If one of these coefficients is not fixed, then both may grow very large or very small. By setting the partial derivative of bo to infinity, the equation solver will not significantly modify this parameter, and a 0 will remain unconstrained to set the ratio ofao to bo.
• Levenberg-Marquardt is a balance between two common least-squares minimization methods: the method of steepest decent, in which the small steps are made along the gradient vector of the mean-squared error at each iteration. The method of steepest decent is very slow, but guaranteed to converge to a local minimum.
• the other method is Newton-Gauss.
• Newton-Gauss convergence is very fast but can diverge.
• Levenberg-Marquardt measures its own performance on each iteration. Successful iterations cause it to favor Newton-Gauss on subsequent iterations. Failed iterations cause it to favor steepest-decent on subsequent iterations.
• the method it is favoring depends on a value ( ⁇ ).
• the mean-squared error mseo is initialized to a value between the initial guess filter response and the prewa ⁇ ed channel response and ⁇ is initialized to 1000. Iteration of this method is complete when one of the following conditions occurs:
• ⁇ reaches a maximum value (e.g. lei 0). Sometimes this indicates a divergence, but may also indicate a convergence; 3. ⁇ reaches a minimum value (e.g. le-10) indicating the system has converged.
• ⁇ may oscillate between two or three values
• a maximum number of iterations is exceeded. A maximum is set to prevent iterating indefinitely.
• Equation 29 where st is the filter section.
• the filter is now in the form of biquad sections.
• the number of sections is the smallest integer greater than or equal to half the original numerator or denominator polynomial.
• the filter can now be converted into a digital filter.
• a bilinear transformation is used to perform this conversion.
• N 2 and all coefficients are divided by Bo, so that Bo becomes 1.0 with no change in performance. At this point, the compensation portion of the filter element has been computed.
• the magnitude response of this filter is evaluated at the frequency points used to match the channel frequency response (the points prior to prewa ⁇ ing), and the waveform representing this response is output through the comp output 76 of the filter builder 56 and on to the comp output pin 72 shown in Figure 4. In this manner, the DSO user can examine the compensation filter performance.
• Figure 9 shows the fit between the response of compensation filters built with varying compliance and a channel frequency response.
• Figure 10 shows this fit in the 0 - 2 GHz region.
• 2 GHz is the maximum frequency to which compliance is enforced. This is a reasonable limitation since the channel response is attenuated by about 9 dB at 2 GHz.
• Figure 11 shows the magnitude response of the compensation filter designed to compensate the channel. The response is shown for varying degrees of compliance.
• Figure 12 again shows the response in the 0 - 2 GHz region. Note that the compensation filters in Figure 12 counteract the channel frequency response. Furthermore, the flatness of the resulting response improves with increasing compliance.
• the degree of compliance translates into a user specification of the degree of the filter (i.e. the number of biquad sections in the filter). Examining Figure 12, it is difficult to clearly see the amount of improvement in the compensation as the compliance increases. Therefore, Figure 13 is provided to show the absolute error from 0 dB of the overall, compensated system with varying degrees of compensation filter compliance specified.
• Figure 14 shows the compensation filter performance as a function of the number of stages in the filter.
• the maximum error is about 9 dB out to 2 GHz, without compensation.
• the average error is just over 1 dB.
• the channel can be flattened to a maximum error of less than 0.5 dB, and an average error of only 0.2 dB.
• maximum compliance i.e. 8 filter sections
• the maximum error is reduced to less than 0.1 dB, with the average error being less than .04 dB.
• the degree of compliance can be used to reduce the maximum error (in dB) by two orders of magnitude, and the average error by a factor of 25.
• Figure 15 shows a simple user interface that includes only a control over the final response 84. This user interface allows the user to finely specify the bandwidth 85.
• the advanced settings tab 91 leads to another dialog box as shown in Figure 16.
• Favor 92 An additional control has been added under response optimization called Favor 92.
• a choice is provided to favor noise performance 93 or the optimization specified 94. This choice will be explained when the details of the response filter design are discussed below.
• Control is also provided for compensation 95. This includes the degree of compliance 96 that determines the number of biquad sections in the compensation filter portion.
• the maximum compensation frequency 97 can be set to specify the frequency up to the desired compliance.
• Control over the final digital filter implementation 98 may also be provided. Two choices, IIR 99 and FIR 100, are shown. Another possible choice is a default setting (i.e. Auto, which automatically chooses the faster of the IIR or FIR filter for final implementation).
• the IIR filter invariably outperformed the FIR filter.
• the IIR filter length does not vary with the sample rate (as does the FIR). Therefore, for pu ⁇ oses of this application, the IIR filter is the preferred filter, but the user may choose the FIR filter if desired.
• the filter settling amount 101 Since the FIR is the truncated impulse response of an IIR, the filter settling amount 101 must be specified (e.g. 10e-6).
• the filter settling value defines the sample point in the impulse response beyond which the impulse response can be neglected.
• the filter settling samples 102 is a value calculated based on the specified filter settling value. For FIR implementations, it is the number of filter taps.
• the noise reducer is governed by an attenuation setting (A s ) and a frequency setting (f s ) where f s is calculated as a multiplicative factor (M mc f) of f mc .
• a s attenuation setting
• f s frequency setting
• M mc f multiplicative factor
• the resulting Butterworth filter has a calculated order O butte r- This order may be clipped, if necessary, to the specified largest order allowed O butte rmax- If the filter is clipped to Obuttermax the filter will not meet both the pass-band and stop-band specifications. In this case, the Butterworth filter is situated to provide the exact attenuation A s at f s . Hence, the attenuation at f p will be greater than A p , thus the flatness specification is violated. If the filter order is not clipped, then the filter will meet, or exceed the specifications. This is because the filter order is chosen as the smallest integer that satisfies the specifications.
• the user specifies a bias towards which specifications should be exceeded in the favor specification 92.
• the Butterworth filter represents the traditional design providing the exact attenuation A p at f p and generally providing better attenuation than A s at f s .
• the response optimization 94 is favored, the Butterworth is situated to provide the exact attenuation A s at f s . In this case, the attenuation at f p will be less than or equal to A p and the filter will generally outperform the flatness specification.
• f p is set to the specified bandwidth frequency (f bw ) even though it is not actually the bandwidth
• a p is taken from the specification of ⁇ (deviation)
• a s is a default value based on the hardware behavior of the particular scope channel.
• the value of ⁇ is generally chosen based on the typical compensation filter performance. In other words, if the compensation filter can provide at best 0.1 dB of compliance, then a ⁇ less than 0.1 is probably an unnecessary constraint.
• the value f s is calculated as M mcf times f mc unless overridden, where M mcf has a default value based on the particular scope channel (e.g. 1.667).
• the noise performance response optimization is similar to the flatness response optimization, except that A p is set to the specified attenuation (Ab W ) at the bandwidth frequency (fb w ). Note that A bW defaults to 3 dB, but downward modification is allowed to guarantee the bandwidth. A s and f s are ignored and the Butterworth filter is designed as the highest order Butterworth filter allowed (Obuttermax) having attenuation Ab W at fb w - This provides the absolute maximum amount of attenuation for a given bandwidth.
• the specifications for the noise performance response are derived from the user specifications: f p is taken from the bandwidth specification (f bw ), and f s is calculated as M mc f times f mc unless overridden.
• a Besselworth filter is designed to optimize the response characteristics.
• This filter has a combination of Bessel and Butterworth response characteristics.
• the Bessel filter has a linear phase response characteristic and a very slow roll-off. Most importantly, it is the low-pass filter with the best pulse response characteristics.
• the Butterworth filter has the sha ⁇ est roll-off, given a flat pass-band and stop-band response.
• the Besselworth filter is specified as follows:
• the Bessel order is specified as Obessei;
• a bw and f bW are the bandwidth specifications, ⁇ is the deviation as described earlier.
• the default value of As is unspecified, and overridden by a direct statement of f , which defaults to the maximum compensation frequency f mc .
• the default setting is for the response to closely comply with a Bessel response for the entire frequency range for which compensation is provided.
• a s and f s have been explained previously.
• FIG 17 shows a flowchart of the Besselworth design procedure.
• An analog Bessel filter is designed in step 103. See Lawrence R. Rabiner and Bernard Gold, Theory and Application of Digital Signal Processing, Bell Telephone Laboratories, 1975, pp 228-230, the entire contents thereof being inco ⁇ orated herein by reference.
• the Bessel filter is designed to a specification with frequencies that are not prewa ⁇ ed. Once the Bessel filter is designed, the frequency f ⁇ at which the attenuation reaches Ag is calculated from the magnitude response 105, unless f ⁇ is explicitly specified 104.
• the Butterworth order calculation 106 is self explanatory and can be calculated directly or through trial and error. Note that the Bessel attenuation has been subtracted from the attenuation requirement for the Butterworth.
• the Butterworth order must be determined using prewa ⁇ ed specifications. If the order is too large 107, it is set to its maximum value 108. At this point, the favor specification is utilized 109 in the same manner as described for the flatness optimization and one of the two Butterworth filter designs (110 and 111) is chosen. Once this filter is designed, the effect of the Butterworth at f bw 112 is calculated and the Bessel filter is rescaled (in frequency) to account for the attenuation of the Butterworth filter 113. Note that f ⁇ and f s tend to be far from f bW and the Butterworth filter's relatively sha ⁇ roll-off generally makes its effects at fb small. This means that the Bessel filter only needs to be adjusted slightly in step
• Both filters are converted to digital filters 115 using the bilinear transformation.
• the digital Butterworth filter exhibits wa ⁇ ing, but this wa ⁇ ing was accounted for in its design.
• the Bessel filter because of the fit, exactly matches the analog Bessel response out to the Nyquist rate. This method provides the exact response characteristics for the Bessel filter portion.
• Figure 18 shows an example of such a Besselworth filter 300.
• the response filters generated are converted to digital filters and are retained internally as two stages (the noise reducer and the shaper).
• the frequency response of each is output on the noise 74 and shape 73 pins of the component shown in Figure 4.
• the Butterworth filter represents the noise reducer portion.
• the Bessel portion of the Besselworth filter design represents the shape portion.
• these responses represent the shape portion.
• the system cascades the shaper and noise reducer digital filters to form the arbitrary response generation filter portion.
• the system then cascades the compensation filter portion and arbitrary response generation filter portion to form the entire compensation and response generation system.
• the filter coefficients are output from the filter builder 56 coef output pin 65 shown in Figure 4, where they can be used by the IIR 54 or FIR 55 filter.
• FIG. 19 shows an arrangement used for calibration of a DSO 116 having a probe 117 for probing a circuit under test 118.
• the probe 117 is connected to a channel input 119 of the DSO 1 16.
• the signal enters the channel 120 and is digitized by the ADC, after which signals are processed and displayed by the internal computer 121.
• a calibrated reference generator 122 is shown internal to the DSO 116.
• the calibrated reference generator 122 consists of a signal source 123 and calibration information 124.
• the reference source 122 generates a signal whose frequency content is known well.
• the known frequency content is stored internally as calibration data 124.
• the reference calibration data 124 along with the reference signal generator 123 form a calibrated reference 122.
• a calibration may be performed by switching out the test signal at internal input selector 125, switching in the reference generator connection 126, controlling the reference generator 123 and acquiring data from this generator by digitizing the reference generator waveforms that enter the channel 120.
• the internal computer 121 processes the data acquisitions, thereby generating measured frequency response data.
• the measured frequency response data, along with the known frequency response 124 from the calibrated reference generator 122 is passed on to the processing element that is the subject of this invention in order to determine the channel frequency response.
• This calibration method calibrates the signal path through the channel 120 down to the switch 125, but also includes the path 126 to the reference generator 123. This means that the path 126 from the switch 125 to the reference generator 123 and the path 127 from the switch 125 to the scope input 119 must be designed very carefully, or its frequency response characteristics must be known.
• the probe 117 is out of the calibration loop.
• the calibration procedure explained calibrates the DSO to the scope input 119 only. While it is possible to design the internal paths of the scope (126 and 127) to high precision, this is not always possible with regard to the probe.
• many scope probes carry calibration information stored in an internal memory (EEPROM) that may be read by the internal computer when the probe is inserted.
• Calibrated probes carry frequency response information that can be used in the channel frequency response calculation. For example, if the frequency response of the probe is known, the internal computer can simply add this frequency response to the measured frequency response prior to sending the information to the filter-building component. The resulting compensation would then account for the frequency response of the probe.
• the user may connect the probe 1 17 periodically to the reference signal output 128 and perform the calibration as described, except that the input selector switch 125 should remain in the normal operating position.
• the resulting calibration accounts for the frequency response from the probe tip 129 through the entire channel 120. While this type of calibration cannot be completely automated, it does provide the highest degree of compensation.
• the calibrated reference generator 122 need not reside in the scope. It can be supplied externally and sold as an option to the DSO.
• the calibration data 124 while tied to the reference generator 123 — need not be collocated. The data can reside on a disk for loading into the scope. However, there should be some method of identifying the reference generator 123 and corresponding calibration data 124. Depending on the type of generator used, no direct control of the generator by the internal computer may be necessary.
• the filter builder calculates four responses: the channel response, and the three components of the filter response.
• the three components of the filter response are the compensation, shaper, and noise reducer responses.
• an all-encompassing frequency response specification can be delivered to the user by simply plotting any or all of the algebraic combinations of these responses and providing this information to the user. In this manner, the user can examine any frequency response behavior desired.
• plots like Figure 13 are possible and may provide useful additional information.
• various metrics (like the data shown in Figure 14) may be calculated from these plots. The ability to provide this type of scope performance data is important. For example, many standard measurements require certain measurement instrument specifications (e.g.
• a particular measurement might state that a scope must be used that is flat to within 0.5 dB out to 2 GHz). Not only does the invention provide the capability to satisfy such a requirement, but it also provides the ability to examine the final specifications to ensure compliance. Finally, the invention allows for recording and printout of the scope specifications along with the users measurements (as shown in Figure 20), thus providing verification of proper measurement conditions. While a preferred embodiment of the present invention has been described using specific terms, such description is for illustrative pu ⁇ oses only, and it is to be understood that changes and variations may be made without departing from the spirit or scope of the following claims.

Landscapes

• Physics & Mathematics (AREA)
• Engineering & Computer Science (AREA)
• Computer Hardware Design (AREA)
• Mathematical Physics (AREA)
• General Physics & Mathematics (AREA)
• Filters That Use Time-Delay Elements (AREA)
• Analogue/Digital Conversion (AREA)
• Complex Calculations (AREA)
• Compression, Expansion, Code Conversion, And Decoders (AREA)
• Filters And Equalizers (AREA)
• Measurement And Recording Of Electrical Phenomena And Electrical Characteristics Of The Living Body (AREA)

Priority Applications (3)

Applications Claiming Priority (2)

Publications (1)

Family

ID=27753966

Family Applications (1)

Country Status (6)

Families Citing this family (49)

Citations (5)

Family Cites Families (37)

• 2002
  • 2002-02-27 US US10/090,051 patent/US6701335B2/en not_active Ceased
• 2003
  • 2003-02-25 JP JP2003571939A patent/JP2005519269A/ja active Pending
  • 2003-02-25 CN CNB038095211A patent/CN100397390C/zh not_active Expired - Fee Related
  • 2003-02-25 EP EP03711234A patent/EP1485817A4/en not_active Withdrawn
  • 2003-02-25 AU AU2003215407A patent/AU2003215407A1/en not_active Abandoned
  • 2003-02-25 WO PCT/US2003/005629 patent/WO2003073317A1/en not_active Ceased
• 2006
  • 2006-02-28 US US11/364,796 patent/USRE39693E1/en not_active Expired - Lifetime
• 2007
  • 2007-01-09 US US11/651,445 patent/USRE40802E1/en not_active Expired - Lifetime

Patent Citations (5)

Non-Patent Citations (1)

Also Published As

Similar Documents

Legal Events