WO2003065598A1 - Amplificateur de puissance pour terminal portable - Google Patents

Amplificateur de puissance pour terminal portable Download PDF

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Publication number
WO2003065598A1
WO2003065598A1 PCT/KR2002/000162 KR0200162W WO03065598A1 WO 2003065598 A1 WO2003065598 A1 WO 2003065598A1 KR 0200162 W KR0200162 W KR 0200162W WO 03065598 A1 WO03065598 A1 WO 03065598A1
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WO
WIPO (PCT)
Prior art keywords
power
output
stage
amplifier
power stage
Prior art date
Application number
PCT/KR2002/000162
Other languages
English (en)
Inventor
Youngwoo Kwon
Junghyun Kim
Original Assignee
Wavics Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wavics Co., Ltd. filed Critical Wavics Co., Ltd.
Publication of WO2003065598A1 publication Critical patent/WO2003065598A1/fr

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/72—Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G1/00—Details of arrangements for controlling amplification
    • H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0088—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using discontinuously variable devices, e.g. switch-operated
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B1/0458—Arrangements for matching and coupling between power amplifier and antenna or between amplifying stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/72—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • H03F2203/7233—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal the gated amplifier, switched on or off by putting into parallel or not, by choosing between amplifiers by one or more switch(es), being impedance adapted by switching an adapted passive network
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/72—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • H03F2203/7239—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal the gated amplifier being switched on or off by putting into parallel or not, by choosing between amplifiers and shunting lines by one or more switch(es)

Definitions

  • the present invention relates to a power amplifier in a mobile handset used for wireless communication services. More particularly, the present invention relates to a power amplifier in a mobile handset which may minimize the number of routing switches required for operations in various output power modes dependent on output power levels.
  • the Radio Frequency (RF) power amplifier consumes most of the power consumed by the overall system of the mobile handset.
  • low efficiency of the RF power amplifier degrades the efficiency of the overall system and accordingly reduces the talk time.
  • a switch-mode power amplifier is one of the devices introduced recently as a result of such researches conducted to increase efficiency of the RF power amplifier.
  • the switch-mode power amplifier is designed so that the power stage is operated flexibly in accordance with the relevant conditions.
  • a switch-mode power amplifier is operated differently in various different modes corresponding to its output power levels.
  • switches are used to adjust paths of power transmission so that the power amplifier provides its output power, bypassing the power stage if the required output power level is low.
  • the paths are adjusted through switches so that the power amplifier provides its output power via the power stage.
  • the switch-mode power amplifier is also known as a bypass switching power amplifier because it bypasses the power stage depending on the required output power level.
  • a switch for two modes namely, a Single Pole Double Through (SPDT) switch, is used at the place where the paths are divided for the different modes to designate the relevant paths.
  • SPDT Single Pole Double Through
  • the SPDT switch is used at the place where the respective paths corresponding to the modes join.
  • the SPDT switch is used in the bypass switching power amplifier at the point where mode branching occurs in order to enhance the isolation level between the respective modes and thus to optimize the operations in the respective modes.
  • bypass switching power amplifier in the related art uses a number of switches for operation in various modes depending on the output power levels, output power is decreased due to the losses occurring at the switches of matching units located in front of and behind the power stage. Further, gain and efficiency are decreased and the Adjacent Channel Power Ratio (ACPR) is increased at a given output power level.
  • ACPR Adjacent Channel Power Ratio
  • the ACPR specification is generally satisfied in a power amplifier through the back-off that operates a power amplifier at an output power level lower than P 1( IB (ldB Compression Output Power).
  • IB ldB Compression Output Power
  • bypass switching power amplifier has disadvantages in that a number of switches that must be used in the amplifier enlarge the size of the amplifier and, further, increase the price of the amplifier.
  • An object of the present invention is to solve at least the above problems and to provide at least advantages described hereinafter.
  • the present invention provides a power amplifier in a mobile handset wherein a single switch is connected in parallel to a power stage and the on/off operation of the single switch is controlled according to relevant output power mode to bypass the entire power stage. In this manner, a power amplifier in a mobile handset may be implemented with a reduced number of switches.
  • a power amplifier in a mobile handset may be implemented with a reduced number of switches.
  • the present invention provides a power amplifier in a mobile handset comprising: a linearizer for amplifying input signal; a power stage for receiving the signal amplified by the linearizer through an impedance matching unit, amplifying the received signal and then outputting the amplified signal; a switching circuit unit, connected in parallel to the power stage, for bypassing the entire power stage through on/off operation according to the relevant output power mode; an impedance transformer for receiving the signal amplified by the linearizer through the impedance matching unit according to the on/off state of the switching circuit unit and outputting the received signal; and a power stage output matching unit for transmitting output power received from the power stage or the impedance transformer to an output stage depending on the on/off state of the switching circuit unit.
  • the present invention also provides a power amplifier in a mobile handset comprising: a linearizer for amplifying input signal; an impedance matching unit for matching impedance of output power applied from the linearizer to internal impedance of the power amplifier; a power stage, comprising two power stages connected in parallel, for amplifying the signal applied by bypassing some of the power stage from the impedance matching unit according to the relevant output power mode and outputting the amplified signal; and a power stage output matching unit for matching output power applied from the power stage with different output matching conditions corresponding to the output power mode and transmitting the resulting output power to an output stage.
  • the present invention also provides a power amplifier in a mobile handset comprising: a linearizer for amplifying input signal; a power stage, comprising two power stages connected in parallel, for amplifying the signal applied by bypassing some of the power stage from the linearizer through an impedance matching unit according to the relevant output power mode and outputting the amplified signal; a switching circuit unit, connected in parallel to the power stage, for bypassing the entire power stage through on/off operation according to the relevant output power mode; an impedance transformer for receiving the signal amplified by the linearizer through the impedance matching unit according to the on/off state of the switching circuit unit and outputting the received signal; and a power stage output matching unit for matching output power applied from the power stage with different output matching conditions corresponding to the output power mode and transmitting the resulting output power to an output stage.
  • the linearizer is implemented with a variable gain amplifier, wherein a gain controller applying different gate biases depending on the relevant output power modes is connected to the upper transistor of a dual-gate element.
  • the linearizer comprises: a pre-distorter composed of a plurality of transistors connected in series; and a driver for amplifying output signal of the pre- distorter.
  • Figs, la and lb are graphs illustrating gain and phase characteristics of the related art power amplifier in a mobile handset, respectively.
  • Fig. 2 is a block diagram showing a first preferred embodiment of a power amplifier in a mobile handset in accordance with the present invention.
  • Figs. 3a and 3b are block diagrams of different embodiments of the power stage output matching unit illustrated in Fig. 2.
  • Fig. 4 is a circuit diagram showing a second preferred embodiment of a power amplifier in a mobile handset in accordance with the present invention.
  • Figs. 5a and 5b are circuit diagrams of different embodiments of the switch of the power stage output matching unit illustrated in Fig.4.
  • Figs. 6a and 6b are circuit diagrams of equivalent circuits of the power stage output matching unit illustrated in Fig. 4 in the relevant modes.
  • Fig. 7 is a circuit diagram showing a third preferred embodiment of a power amplifier in a mobile handset in accordance with the present invention.
  • Figs. 8a and 8b are circuit diagrams of different embodiments of a linearizer in a power amplifier in accordance with the present invention, which is implemented with a variable gain amplifier.
  • Fig. 9 is a graph illustrating gain characteristics of the variable gain amplifier in the relevant modes.
  • Fig. 10 is a graph illustrating gain characteristics of the power amplifier in the relevant modes when the linearizer is implemented with a variable gain amplifier.
  • Fig. 11 is a circuit diagram of another embodiment of a linearizer in the power amplifier in accordance with the present invention, which is implemented with a pre- distorter.
  • Fig. 12 is a graph illustrating a gain characteristic of the linearizer implemented with the pre-distorter.
  • Fig. 13 is a graph illustrating gain characteristics of the power amplifier in the relevant modes when the linearizer is implemented with a pre-distorter.
  • Fig. 14 is a graph illustrating phase characteristic of the power amplifier in accordance with the present invention when the linearizer is implemented with a pre- distorter.
  • variable gain amplifier 120 first impedance matching unit 130
  • 330 second impedance matching unit 140
  • 230, 340 power stage
  • switch 220 interstage impedance matching unit
  • Fig. 2 illustrates the structure of a power amplifier in a mobile handset in accordance with the first preferred embodiment of the present invention.
  • the power amplifier 100 comprises a variable gain amplifier 110, a first impedance matching unit 120, a second impedance matching unit 130, a power stage 140, a power stage output matching unit 150, an impedance transformer 160 and a switch 170.
  • the variable gain amplifier 110 amplifies the gain of input signal according to the relevant control voltage.
  • the first impedance matching unit 120 matches impedance of output power applied from the variable gain amplifier 110 according to the on/off state of the switch 170 and applies the resulting power to the power stage 140.
  • the second impedance matching unit 130 matches impedance of output power applied from the variable gain amplifier 110 according to the on/off state of the switch 170 and applies the resulting power to the impedance transformer 160.
  • the power stage 140 outputs high output power from the signal amplified by the variable gain amplifier 110 or a driver.
  • the power stage output matching unit 150 transmits the high output power outputted from the power stage 140 according to the on/off state of the switch 170 to an output stage 50.
  • the power stage output matching unit 150 also transmits the low output power outputted from the impedance transformer 160 directly, not via the power stage 140 according to the on/off state of the switch 170 to the output stage 50.
  • a large amount of power generally leaks out to the output terminal of the power stage 140 if impedance as viewed from the point 60, where the power stage path and the bypass path join, towards the output terminal of the power stage 140 is low. For this reason, normally, not all of the low output power from the impedance transformer 160 is transmitted to the output stage 50.
  • the present invention prevents the low output power outputted through the impedance transformer 160 from leaking out to the output terminal of the power stage 140.
  • Figs. 3a and 3b are block diagrams of different embodiments of the power stage output matching unit 150 illustrated in Fig. 2.
  • the power stage output matching unit 150 is internally divided into two parts, an input circuit unit 151 and an output circuit unit 153. Then, by making impedance Z O U TI of the input circuit unit 151, impedance as viewed from the point 60 towards the output terminal of the power stage 140, be much higher than impedance Zoim of the output circuit unit 153, impedance as viewed from the point 60 towards the output stage 50, it is made possible that most of the low output power outputted from the impedance transformer 160 can be transmitted to the output stage 50.
  • a switch 157 is connected in series to a power stage output matching unit 155 to prevent the output power from leaking out to the output terminal of the power stage 140.
  • the impedance transformer 160 is connected in parallel to the power stage 140 to bypass the power stage 140 according to the on/off state of the switch 170.
  • a ⁇ /4 transformer that provides the optimum impedance capable of generating the optimum output power in the low output power mode can be used as the impedance transformer 160.
  • the ⁇ /4 transformer can also act as an RF choke circuit to apply driving voltage to the power stage 140.
  • the power ampUfier according to the present invention may be implemented without any separate driving voltage applying circuit for applying driving voltage to the power stage 140.
  • the switch 170 is connected in parallel to the power stage 140 to bypass the power stage 140 through the on/off operation according to the mode determined by the output power level.
  • the switch 170 may be implemented with a PIN diode. Alternatively, the switch 170 may be implemented with a different transistor, such as a field effect transistor (FET), integrated in a microwave monolithic integrated circuit (MMIC) chip, so as to optimize the cost and size of the module.
  • FET field effect transistor
  • MMIC microwave monolithic integrated circuit
  • a general power amplifier has high efficiency at a high output power level and very low efficiency at a low output power level, respectively.
  • the reason why the power amplifier is operated differently in these separate modes is to prevent its efficiency from dropping abruptly when the low output power level is required.
  • the switch 170 is open.
  • the signal amplified by the variable gain amplifier 110 or a driver is transmitted to the output stage 50 directly via the impedance transformer 160, without passing through the power stage 140.
  • the power stage 140 In order for the signal amplified by the variable gain amplifier 110 or a driver to be transmitted to the output terminal 50 directly via the impedance transformer 160 as stated above, the power stage 140 must be off.
  • a ⁇ /4 transformer is used as the impedance transformer 160 to provide the optimum impedance capable of generating the optimum output power in the low output power mode.
  • the switch 170 is closed, thereby causing the signal amplified by the variable gain amplifier 110 or a driver to be amplified again by the power stage 140 and then to be transmitted to the output stage 50.
  • the power stage 140 must be on to amplify the signal. Because the switch 170 is closed as described above, no signal leaks out to the impedance transformer 160.
  • Fig. 4 is a circuit diagram showing the second preferred embodiment of a power amplifier in a mobile handset in accordance with the present invention.
  • the power amplifier comprises a variable gain amplifier 210, an interstage impedance matching unit 220, a power stage 230 and a power stage output matching unit 240.
  • the variable gain amplifier 210 amplifies gain of input signal according to the relevant control voltage.
  • the interstage impedance matching unit 220 matches impedance of output power from the variable gain amplifier 210 and applies the resulting power to the power stage 230.
  • the interstage impedance matching unit 220 uses a fixed interstage which does not require any separate switch.
  • the power stage 230 is provided with two power stages 233 and 235 connected in parallel. In the case where the low output power mode is selected based upon the output power level, driving voltage is applied to only one power stage 233 or 235 of the two power stages 233 and 235 while driving voltage to the other power stage 235 or 233 is blocked. In contrast, in the case where the high output power mode is selected, driving voltage is applied to both the two power stages 233 and 235.
  • the power stage output matching unit 240 transmits output power from the power stage 230 to the output stage 50.
  • a single switch 241 may be used to implement the power stage output matching circuit according to the relevant mode.
  • the above-mentioned switch 241 may be implemented with a general PIN diode
  • the switch 241 may be implemented with an RF
  • MEMS Micro Electro Mechanical Systems
  • switch 241b using the RF MEMS technology, as shown in Fig. 5b.
  • the present invention may optimize the cost and size of the power amplifier.
  • Figs. 6a and 6b are circuit diagrams of equivalent circuits of the power stage output matching unit 240 in the relevant modes.
  • Fig. 6a shows an equivalent circuit of the power stage output matching unit 240 in the case where only one power stage 233 or 235 of the two power stages 233 and 235 is operated.
  • Fig. 6a illustrates the power stage output matching unit 240 in the low output power mode.
  • the power stage output matching unit 240 comprises two inductors 243 and 247 connected in parallel, a capacitor 249 for optimization of the output power, and a capacitor C 0ff of the disabled power stage 235 or 233.
  • Fig. 6b shows an equivalent circuit of the power stage output matching unit 240 in the case where both the two power stages 233 and 235 are operated. In other words, Fig. 6b illustrates the power stage output matching unit in the high output power mode.
  • the power stage output matching unit 240 comprises the two inductors 243 and 247 connected in parallel, a capacitor 245 connected in series between the two inductors 243 and 247, and a capacitor 249 for optimization of the output power.
  • the two inductors 243 and 247 and the two capacitors 245 and 249 are interoperated to satisfy the output power matching condition of ZOPT- A description will hereinafter be given of the operation of the second preferred embodiment of the power amplifier in a mobile handset in accordance with the present invention with reference to Figs.4 to 6b.
  • the signal amplified by the variable gain amplifier 210 or a driver is amplified by one power stage 233 or 235 and then is outputted.
  • driving voltage is applied to both the two power stages 233 and 235 and the switch 241 of the power stage output matching unit 240 is open to form a power stage output matching circuit that is appropriate for the high output power mode.
  • the signal amplified by the variable gain amplifier 210 or a driver is amplified by the two power stages 233 and 235 and then is outputted.
  • Fig. 7 is a circuit diagram showing the third preferred embodiment of a power amplifier in a mobile handset in accordance with the present invention.
  • the power amplifier comprises a variable gain amplifier 310, a first impedance matching unit 320, a second impedance matching unit 330, a power stage 340, a power stage output matching unit 350, an impedance transformer 360 and a switch 370.
  • the variable gain amplifier 310 amplifies gain of input signal according to the relevant control voltage.
  • the first impedance matching unit 320 matches impedance of output power applied from the variable gain amplifier 310 according to the on/off state of the switch 370 and applies the resulting power to the power stage 340.
  • the second impedance matching unit 330 matches impedance of the output power applied from the variable gain amplifier 310 according to the on/off state of the switch 370 and applies the resulting power to the impedance transformer 360.
  • the power stage 340 is provided with two power stages 343 and 345 connected in parallel to amplify again the signal primarily amplified by the variable gain amplifier 310 or a driver and to output the amplified signal.
  • driving voltage to the two power stages 343 and 345 is blocked; driving voltage is applied to only one power stage 343 or 345 of the two power stages 343 and 345 while driving voltage to the other power stage 343 or 345 is blocked; or driving voltage is applied to both the two power stages 343 and 345.
  • the power stage output matching unit 350 matches impedance of output power outputted from the power stage 340 according to the on/off state of the switch 370 and transmits the resulting power to the output stage 50.
  • the impedance transformer 360 is connected in parallel to the power stage 340 to bypass the power stage 340 according to the on/off state of the switch 370.
  • the switch 370 is connected in parallel to the power stage 340 to bypass the power stage 340 through the on/off operation conducted depending on the relevant mode determined by the output power level.
  • the operation modes of the power amplifier are classified into three types: low output power mode where driving voltage to the power stage 340 is blocked completely; intermediate output power mode where driving voltage to some of the power stage 340 is blocked; and high output power mode where driving voltage is applied to the power stage 340.
  • the switch 370 In the low output power mode, the switch 370 is open and the signal amplified by the variable gain amplifier 310 or a driver is transmitted to the output stage 50 directly via the impedance transformer 360, not passing through the power stage module 340.
  • the power stage 340 In order for the signal amplified by the variable gain amplifier 310 or a driver to be transmitted to the output stage 50 directly via the impedance transformer 360 as described above, the power stage 340 must be off. Also, a ⁇ /4 transformer is used as the impedance transformer 360 to provide the optimum impedance capable of generating the optimum output power in the low output power mode.
  • the switch 370 In the intermediate output power mode, the switch 370 is closed and driving voltage is applied to only one power stage 343 or 345 of the two power stages 343 and 345 while driving voltage to the other stage 345 or 343 is blocked.
  • the switch 351 In the power stage output matching unit 350, the switch 351 is closed to form a power stage output matching circuit which is appropriate for the intermediate output power mode.
  • the signal amplified by the variable gain amplifier 310 or a driver is amplified again by only one power stage 343 or 345 of the two power stages 343 and 345 and then is transmitted to the output stage 50 through the power stage output matching unit 350.
  • the switch 370 is closed and driving voltage is applied to both the two power stages 343 and 345.
  • the switch 351 is open to form a power stage output matching circuit which is appropriate for the high output power mode.
  • the signal amplified by the variable gain ampUfier 310 or a driver is amplified again by the two power stages 343 and 345 and then is transmitted to the output stage 50 through the power stage output matching unit 350.
  • a linearizer which is used selectively in the present invention may be implemented with the variable gain amplifier 110, 210 or 310. If the variable gain amplifier 110, 210 or 310 is used to constitute the linearizer as suggested above, such variable gain amplifier 110, 210 or 310 can perform the driver function as well as the linearizer function. Thus, the circuit efficiency and size may be optimized.
  • Figs. 8a and 8b are circuit diagrams of different embodiments of a linearizer implemented with a variable gain ampUfier.
  • input of gain controller is applied to the lower transistor of the variable gain amplifier.
  • input of gain controller is applied to the upper transistor of the variable gain amplifier.
  • variable gain amplifier 110 used in the present invention may preferably be implemented with a dual-gate FET element DG1 capable of varying gain over a wide range. In each relevant modes, different gate biases are applied to a gain controller 113 of the variable gain amplifier 110 to optimize characteristics in the respective modes.
  • Gain characteristics of the variable gain amplifier 110 described above are illustrated in Fig. 9.
  • the overall gain characteristics of a power amplifier adopting such variable gain amplifier 110 as its linearizer may be maintained constant as shown in
  • Such power ampUfier can improve AM-PM modulation characteristics by inducing the optimum phase characteristics in the respective driving modes.
  • the linearizer may be implemented with a pre-distorter. If the linearizer is implemented with a pre-distorter, the power amplifier can obtain desired characteristics by inducing wide variations in gain and phase characteristics.
  • Fig. 11 is a circuit diagram of a linearizer implemented with a pre-distorter.
  • the linearizer 110 comprising a pre-distorter 115 having maximized pre-distortion characteristic through the connection of a number of transistors in series and a driver 117 for amplifying signal outputted from the pre-distorter 115 does not have high gain as shown in Fig. 12.
  • such linearizer may prevent distortions in the overall gain and phase of the power amplifier of the present invention as shown in Figs. 13 and 14.
  • the present invention provides a power amplifier in a mobile handset wherein a single switch is connected in parallel to a power stage and on/off operation of the switch is controlled according to the relevant output power mode.
  • the present invention provides a power amplifier in a mobile handset wherein two power stages are connected in parallel and driving voltage applied to the power stages is controlled according to the relevant output power mode.
  • the present invention provides a power amplifier in a mobUe handset wherein two power stages are connected in parallel, a single switch is connected in paraUel to the power stages and the on/off operation of the switch and driving voltage applied to the power stages are controlled according to the relevant output power mode.
  • the power amplifiers according to the preferred embodiments of the present invention bypass the entire or some of the power stage so that the number of switches may be reduced, thereby reducing the size of the power amplifier and lowering the cost of the power amplifier.
  • the power amplifier according to the present invention can have improved gain characteristic by reducing power loss resulting from switching loss.
  • the power amplifier according to the present invention can have improved linearity because the linearizer may be implemented with various different devices capable of compensating for nonlinear characteristics.

Abstract

L'invention porte sur un amplificateur de puissance pour dispositif mobile de télécommunications réduisant le nombre des moyens de commutation (370) pouvant court-circuiter tout ou partie des moyens (340) d'amplification de l'amplificateur de puissance en fonction de l'état des moyens de communication commandés par la tension de commande fournie par les moyens d'amplification.
PCT/KR2002/000162 2002-02-01 2002-02-04 Amplificateur de puissance pour terminal portable WO2003065598A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR2002/5919 2002-02-01
KR10-2002-0005919A KR100457786B1 (ko) 2002-02-01 2002-02-01 휴대용 단말기의 전력 증폭 장치

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Publication Number Publication Date
WO2003065598A1 true WO2003065598A1 (fr) 2003-08-07

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WO (1) WO2003065598A1 (fr)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1612932A1 (fr) * 2004-06-23 2006-01-04 Wavics, Inc. Amplificateur à plusieurs modes de puissance avec option de modulation de la polarisation et sans commutateurs de dérivation
EP1708361A3 (fr) * 2005-03-29 2007-12-12 Integrant Technologies Inc. Amplificateur à faible bruit et amplificateur différentiel à mode de gain variable
US7382186B2 (en) 2005-01-24 2008-06-03 Triquint Semiconductor, Inc. Amplifiers with high efficiency in multiple power modes
US7385445B2 (en) 2005-07-21 2008-06-10 Triquint Semiconductor, Inc. High efficiency amplifier circuits having bypass paths
WO2014029807A1 (fr) * 2012-08-21 2014-02-27 Nokia Siemens Networks Oy Architecture d'amplificateurs de puissance à haute efficacité pour heures creuses

Families Citing this family (1)

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KR100749932B1 (ko) * 2004-03-05 2007-08-16 아바고테크놀로지스코리아 주식회사 바이패스 스위치를 사용하지 않는 다중 전력 모드 전력증폭 장치

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Publication number Priority date Publication date Assignee Title
KR970031237A (ko) * 1995-11-24 1997-06-26 모리시타 요이치 전력 증폭기에 대한 바이패스 라인을 구비한 송신출력 가변장치
US6069526A (en) * 1998-08-04 2000-05-30 Qualcomm Incorporated Partial or complete amplifier bypass
US6271722B1 (en) * 1999-09-28 2001-08-07 Qualcomm Inc. Partial or complete amplifier bypass

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970031237A (ko) * 1995-11-24 1997-06-26 모리시타 요이치 전력 증폭기에 대한 바이패스 라인을 구비한 송신출력 가변장치
US6069526A (en) * 1998-08-04 2000-05-30 Qualcomm Incorporated Partial or complete amplifier bypass
US6271722B1 (en) * 1999-09-28 2001-08-07 Qualcomm Inc. Partial or complete amplifier bypass

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1612932A1 (fr) * 2004-06-23 2006-01-04 Wavics, Inc. Amplificateur à plusieurs modes de puissance avec option de modulation de la polarisation et sans commutateurs de dérivation
US7382186B2 (en) 2005-01-24 2008-06-03 Triquint Semiconductor, Inc. Amplifiers with high efficiency in multiple power modes
EP1708361A3 (fr) * 2005-03-29 2007-12-12 Integrant Technologies Inc. Amplificateur à faible bruit et amplificateur différentiel à mode de gain variable
US7385445B2 (en) 2005-07-21 2008-06-10 Triquint Semiconductor, Inc. High efficiency amplifier circuits having bypass paths
WO2014029807A1 (fr) * 2012-08-21 2014-02-27 Nokia Siemens Networks Oy Architecture d'amplificateurs de puissance à haute efficacité pour heures creuses
US8742842B2 (en) 2012-08-21 2014-06-03 Nokia Siemens Networks Oy High efficiency power amplifier architecture for off-peak traffic hours

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Publication number Publication date
KR100457786B1 (ko) 2004-11-18
KR20030065868A (ko) 2003-08-09

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