WO2003050955A3 - Circuit integre comprenant un generateur d'horloge, carte a puce comprenant un tel circuit integre et procede de generation d'horloge associe - Google Patents

Circuit integre comprenant un generateur d'horloge, carte a puce comprenant un tel circuit integre et procede de generation d'horloge associe Download PDF

Info

Publication number
WO2003050955A3
WO2003050955A3 PCT/FR2002/004280 FR0204280W WO03050955A3 WO 2003050955 A3 WO2003050955 A3 WO 2003050955A3 FR 0204280 W FR0204280 W FR 0204280W WO 03050955 A3 WO03050955 A3 WO 03050955A3
Authority
WO
WIPO (PCT)
Prior art keywords
integrated circuit
generation method
chip card
clock
clock generator
Prior art date
Application number
PCT/FR2002/004280
Other languages
English (en)
Other versions
WO2003050955A2 (fr
Inventor
Christophe Moreaux
Ahmed Kari
Olivier Tardieu
Original Assignee
St Microelectronics Sa
Christophe Moreaux
Ahmed Kari
Olivier Tardieu
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Sa, Christophe Moreaux, Ahmed Kari, Olivier Tardieu filed Critical St Microelectronics Sa
Priority to EP02796907A priority Critical patent/EP1456950A2/fr
Priority to US10/498,681 priority patent/US7400874B2/en
Publication of WO2003050955A2 publication Critical patent/WO2003050955A2/fr
Publication of WO2003050955A3 publication Critical patent/WO2003050955A3/fr

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
    • H03K5/2472Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
    • H03K5/2481Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors with at least one differential stage
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0723Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073Special arrangements for circuits, e.g. for protecting identification code in memory
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/125Discriminating pulses

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Manipulation Of Pulses (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

L'invention concerne un circuit intégré sans contact recevant un signal radiofréquence. Selon l'invention, le circuit comprend un générateur d'horloge pour produire un signal d'horloge (CLK) à partir d'une première alternance (ACO) et d'une deuxième alternance (AC1) représentatives du signal radiofréquence reçu. L'invention concerne également un procédé de génération d'un signal d'horloge, au cours duquel on compare la première et la deuxième alternance pour produire le signal d'horloge. Applications aux cartes sans contact, aux transpondeurs, etc.
PCT/FR2002/004280 2001-12-13 2002-12-11 Circuit integre comprenant un generateur d'horloge, carte a puce comprenant un tel circuit integre et procede de generation d'horloge associe WO2003050955A2 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP02796907A EP1456950A2 (fr) 2001-12-13 2002-12-11 Circuit integre comprenant un generateur d'horloge, carte a puce comprenant un tel circuit integre et procede de generation d'horloge associe
US10/498,681 US7400874B2 (en) 2001-12-13 2002-12-11 Integrated circuit comprising a clock-signal generator, smart card comprising an integrated circuit of this kind and associated method for the generation of clock signals

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0116066A FR2833781B1 (fr) 2001-12-13 2001-12-13 Circuit integre comprenant un generateur d'horloge, carte a puce comprenant un tel circuit integre et procede de generation d'horloge associe
FR01/16066 2001-12-13

Publications (2)

Publication Number Publication Date
WO2003050955A2 WO2003050955A2 (fr) 2003-06-19
WO2003050955A3 true WO2003050955A3 (fr) 2004-05-13

Family

ID=8870395

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FR2002/004280 WO2003050955A2 (fr) 2001-12-13 2002-12-11 Circuit integre comprenant un generateur d'horloge, carte a puce comprenant un tel circuit integre et procede de generation d'horloge associe

Country Status (4)

Country Link
US (1) US7400874B2 (fr)
EP (1) EP1456950A2 (fr)
FR (1) FR2833781B1 (fr)
WO (1) WO2003050955A2 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2879754A1 (fr) * 2004-12-20 2006-06-23 St Microelectronics Sa Transpondeur electromagnetique depourvu d'alimentation autonome
JP5594890B2 (ja) * 2010-11-17 2014-09-24 ルネサスエレクトロニクス株式会社 非接触通信装置、非接触icカード及び形態情報端末
CN112327035B (zh) * 2020-10-21 2023-09-05 武汉光迅科技股份有限公司 一种射频半波电压的测量方法、装置及系统

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5332936A (en) * 1992-04-14 1994-07-26 Sharp Kabushiki Kaisha Composite logic circuit
EP0687119A1 (fr) * 1994-06-06 1995-12-13 Datalogic S.P.A. Transpondeur passif, particulièrement pour système automatique d'identification avec radiofréquences
FR2752076A1 (fr) * 1996-08-05 1998-02-06 Inside Technologies Systeme d'alimentation electrique pour microcircuit a fonctionnement mixte, avec ou sans contact
US6097292A (en) * 1997-04-01 2000-08-01 Cubic Corporation Contactless proximity automated data collection system and method
US20010008296A1 (en) * 1999-07-15 2001-07-19 Tito Gelsomini Integrated circuit wireless tagging

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6009777A (en) * 1997-11-13 2000-01-04 Jarvis; Jack D. Socket wrench and ratchet attachment means
US6525410B1 (en) * 1998-07-24 2003-02-25 Texas Instruments Incorporated Integrated circuit wireless tagging
TW453041B (en) * 2000-10-12 2001-09-01 Ind Tech Res Inst Analog phase frequency detecting device and method
US6907234B2 (en) * 2001-10-26 2005-06-14 Microsoft Corporation System and method for automatically tuning an antenna

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5332936A (en) * 1992-04-14 1994-07-26 Sharp Kabushiki Kaisha Composite logic circuit
EP0687119A1 (fr) * 1994-06-06 1995-12-13 Datalogic S.P.A. Transpondeur passif, particulièrement pour système automatique d'identification avec radiofréquences
FR2752076A1 (fr) * 1996-08-05 1998-02-06 Inside Technologies Systeme d'alimentation electrique pour microcircuit a fonctionnement mixte, avec ou sans contact
US6097292A (en) * 1997-04-01 2000-08-01 Cubic Corporation Contactless proximity automated data collection system and method
US20010008296A1 (en) * 1999-07-15 2001-07-19 Tito Gelsomini Integrated circuit wireless tagging

Also Published As

Publication number Publication date
FR2833781B1 (fr) 2004-03-12
EP1456950A2 (fr) 2004-09-15
US7400874B2 (en) 2008-07-15
WO2003050955A2 (fr) 2003-06-19
US20050133603A1 (en) 2005-06-23
FR2833781A1 (fr) 2003-06-20

Similar Documents

Publication Publication Date Title
US8218703B2 (en) Methods of processing a wireless communication signal, wireless communication synchronization methods, and a radio frequency identification device communication method
FR2810139B1 (fr) Procede de securisation de la phase de pre-initialisation d'un systeme embarque a puce electronique, notamment d'une carte a puce, et systeme embarque mettant en oeuvre le procede
TW200502867A (en) Memory card
WO1999056233A1 (fr) Interrogateurs, systemes et procedes de communication et procedes de traitement d'un signal de communication
WO1997000493A3 (fr) Dispositif a semi-conducteur, carte a circuit integre dote de celui-ci et systeme de communication
AU2003289996A1 (en) Transponder for contactlessly transmitting data
WO2004059902A3 (fr) Procede et dispositif pour extraire une frequence d'horloge a la base d'un flux de donnees
EP0898284A3 (fr) Mémoire à semi-conducteur à circuit de test
KR101103242B1 (ko) 반도체 장치
WO2003050955A3 (fr) Circuit integre comprenant un generateur d'horloge, carte a puce comprenant un tel circuit integre et procede de generation d'horloge associe
AU1278300A (en) Contactless electronic module, chip card comprising same, and methods for makingsame
AU2002360740A1 (en) Spread spectrum clocking tolerant receivers
WO2002069495A3 (fr) Circuit et procede de production d'un signal d'horloge a frequence variable
EP1313254A3 (fr) Méthode, unité et dispositif de transmissin de données
FR2845802B1 (fr) Circuit integre rfid-uhf
EP1081764A4 (fr) Module hautes frequences et procede de fabrication correspondant
EP2345170B1 (fr) Dispositif à semi-conducteur
WO2002027917A3 (fr) Circuit d'horloge a frequence aleatoire
EP1521207A3 (fr) Circuit intégré pour identification
ATE284094T1 (de) Transponder für berührungslose induktive kommunikation
HK1066110A1 (en) Wireless data communication device and communication system including such a device
JP2007151132A (ja) 無線識別タグの単側波帯域応答方法
US20080079548A1 (en) Non-Contact Power-Source-Less Ic Card System
KR200176178Y1 (ko) 무선 통신용 태그를 내장한 스마트 카드
JPH05135226A (ja) 非接触型情報媒体

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): JP US

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR IE IT LU MC NL PT SE SI SK TR

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 2002796907

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 10498681

Country of ref document: US

WWP Wipo information: published in national office

Ref document number: 2002796907

Country of ref document: EP

NENP Non-entry into the national phase

Ref country code: JP

WWW Wipo information: withdrawn in national office

Country of ref document: JP