WO2003046669A1

WO2003046669A1 - Electronic clock

Info

Publication number: WO2003046669A1
Application number: PCT/JP2002/012358
Authority: WO
Inventors: Akiyoshi Murakami; Motoki Funahashi
Original assignee: Citizen Watch Co., Ltd.
Priority date: 2001-11-27
Filing date: 2002-11-27
Publication date: 2003-06-05
Also published as: AU2002349726A1; JP2005134112A

Abstract

It is possible to eliminate the problem that time cannot be set correctly if electromagnetic correction is released when a capacitor means voltage is detected to be below a predetermined value by voltage detection during electromagnetic correction and to provide an electronic clock having an electromagnetic correction function capable of reliably correcting operation. The electronic clock includes a voltage detection circuit (13) for detecting that the voltage of a power source (12) is below a predetermined value and outputting a detection signal and correction inhibit means (17) for inhibiting operation of display correction means (16) excluding during operation of the display correction means (16) based on the detection signal of the voltage detection circuit (13). Thus, during operation of the display correction means (16), the display correction means (16) continues its operation even when the detection signal of the voltage detection means indicates lowering of the voltage. That is, the operation from the middle of the correction until the completion is reliably performed, thereby enabling reliable correction.

Description

Specification

Electronic watch technical field

The present invention relates to an electronic timepiece having a so-called electromagnetic correction function for electrically correcting the time by operating an external operation switch.

Background art

Conventionally, the power generated by the power generation means is stored in the power storage means, which is used as a power source to drive the circuit, and the voltage of the power storage means is detected, and the timing of the hand movement is changed to store the power. Electronic clocks that notify a user of a decrease in the voltage of a means are widely known.

In such a timepiece with a power generation function, when the voltage of the power storage means drops, additional functions are prohibited in order to prevent the voltage of the power storage means from decreasing as much as possible.

When an electronic timepiece with a so-called electromagnetic correction function, which operates a motor or the like to electrically correct the time by operating an external operation switch, detects a voltage drop in the storage means It is desirable to prohibit the operation of additional functions.

However, if the voltage detection during continuous electromagnetic correction detects that the voltage of the storage means is below the specified value and the zero-magnet correction is released, the time will be corrected. They will not be able to fit together.

An object of the present invention is to provide an electronic timepiece having an electromagnetic correction function that eliminates the above-mentioned problems and enables a reliable correction operation. Disclosure of the invention

The present invention relates to an electronic timepiece including a power supply, an external operation switch, and a display correction unit that corrects and drives a time display unit by operating the external operation switch.

Voltage detection means for detecting that the voltage of the power supply is equal to or lower than a predetermined value and outputting a detection signal;

Correction prohibiting means for prohibiting the operation of the display correcting means based on the detection signal of the voltage detecting means except during the operation of the display correcting means. As a result, during the operation of the display correcting means, the display correcting means continues the operation even when the detection signal of the voltage detecting means indicates a voltage drop, and reliably performs the operation from the middle of the correction to the completion. Thus, a reliable correction operation can be performed.

Further, if a counter is provided to start counting time from the end of the operation of the external operation switch and control the operation of the correction prohibiting means, it is possible to perform fine correction after the operation of the external operation switch is completed. Adjustments can be made.

Further, a switch signal generating means for outputting different control signals to the display correcting means based on the short-time operation and the long-time operation of the external operation switch is provided, and the display correcting means is provided with a switch signal generating means based on the long-time operation. If the counter or the correction prohibiting means is controlled by a control signal, different control signals may be output to the display correction means based on short-time operation and long-time operation of the external operation switch. Various corrections such as fast-forward correction can be made possible, and the countdown or correction prohibition means is controlled by a control signal based on long-time operation. Corrective operations can be continued when performing A reasonable time correction operation can be achieved.

Further, if the counting is reset at the timing when the output of the control signal based on the long-time operation is stopped and the counting is started, the correction is performed when the continuous electromagnetic correction is performed. The operation can be continued, adjustment by fine adjustment can be performed after the operation is completed, and a reasonable time adjustment operation can be achieved.

Further, when the power supply means is a power storage means for storing the power output from the power generation means, the display is performed based on the detection signal of the voltage detection means except when the display correction means is operating, as described above. By applying the correction prohibition means that prohibits the operation of the correction means, it is possible to perform a reliable correction operation while effectively saving power.

Further, when the time display means is a pointer and the display correction means is a pointer driving means for driving the hands, as described above, except during operation of the display correction means based on the detection signal of the voltage detection means. By applying the correction prohibition means that prohibits the operation of the display correction means, it is possible to perform the correct correction operation while effectively saving power. BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a system block diagram of an electronic timepiece showing a first embodiment of the present invention.

FIG. 2 is a time chart of the electronic timepiece according to the first embodiment in which electromagnetic correction is not performed.

FIG. 3 is a time chart when the electronic timepiece according to the first embodiment performs an electromagnetic correction.

FIG. 4 is a system block diagram of an electronic timepiece showing a second embodiment of the present invention. FIG. 5 is a circuit diagram showing a switch prohibition signal generation circuit in the electronic timepiece according to the second embodiment.

FIG. 6 is a time chart when the electronic timepiece according to the second embodiment performs electromagnetic correction.

FIG. 7 is a system block diagram of an electronic timepiece showing a third embodiment of the present invention.

FIG. 8 is a circuit diagram showing a switch prohibition signal generation circuit in the electronic timepiece according to the third embodiment.

FIG. 9 is a timing chart when the electronic timepiece according to the third embodiment performs electromagnetic correction.

FIG. 10 is a circuit diagram of a switch signal generation circuit that can be used in the electronic timepieces of the second and third embodiments.

FIG. 11 is a circuit diagram of a modified pulse timing creation circuit that can be used in the electronic timepieces of the second and third embodiments.

FIG. 12 is a timing chart of the modified pulse timing generation circuit of FIG. BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments of the present invention will be described in more detail with reference to the drawings.

(1) First embodiment

First, a first embodiment will be described with reference to FIGS. 1 to 3.

In FIG. 1, the electronic timepiece according to the first embodiment includes an oscillating circuit 1, a frequency dividing circuit 2 for receiving the oscillation signal of the oscillating circuit 1, and a signal divided by the frequency dividing circuit 2. 0 second period signal S 2 0 S 1-minute counter 4 and 20-second periodic signal S 2 OS signal is further divided to produce 1-minute periodic signal S 1 M 1-minute counter 4 and 1-minute periodic signal to charge the user Charge warning hand movement timing signal TP to generate a charge warning hand movement timing signal TP and a 20-second cycle Signal S 2 OS and charge warning hand movement timing signal TP are input and the hand movement cycle And a hand movement cycle selection circuit 6 for selecting a and outputting a hand movement timing signal DP.

The electronic timepiece receives the external operation switch 14a and the frequency-divided signal of the frequency dividing circuit 2, and if the operation of the external operation switch 14a is short, a single-shot electromagnetic correction signal Switch signal generation circuit 14 that outputs CS and outputs continuous electromagnetic correction signal HS when switch 14a is pressed for longer than the specified time, and continuous electromagnetic correction with single electromagnetic correction signal CS Signal HS input and frequency divider 2 and 20-second counter 3 and 1-minute counter 4 Reset signal RS Reset signal generator 15 and single-shot electromagnetic correction The correction pulse timing generation circuit 16 that inputs the signal CS and the continuous electromagnetic correction signal HS and outputs a correction pulse corresponding to the signal CS, the output of the correction pulse timing generation circuit 16 and the output of the hand movement cycle selection circuit 6 Input via OR gate 7a to create motor drive waveform A motor driving circuit 8 for inputting the motor driving waveform created by the waveform shaping circuit 7 and driving the motor 9; a motor driving coil 8a; A pointer 10 is provided, which is driven through a wheel train (not shown) by driving the evening 9. Here, the switch signal generation circuit 14 constitutes a switch signal generation unit.

The electronic timepiece also includes a power generating means 11 for generating power for driving the entire system, and power generated by the power generating means 11. A storage means 12 for storing, a voltage detection circuit 13 as a voltage detection means for detecting the level of the voltage of the storage means 12 and generating a voltage detection signal BD, and D—FF 17 a of the input D and It consists of a gate 17b and an inverter 17c, and receives a voltage detection signal BD, a continuous correction signal HS, and a hand movement evening signal DP to input a correction pulse timing generation circuit 16 and a switch signal generation circuit. A correction pulse creation inhibiting circuit 17 is provided as a modification inhibiting means for inhibiting the operation of 14.

Next, a case will be described with reference to FIG. 2 where voltage detection is performed in a state where the electromagnetic correction is not performed and a voltage drop of the power storage means 12 is detected. In the first embodiment, the external operation switch 14a is used as a push button, and when the switch is pressed (switch ON), the "H" level is released, and the switch is released (switch). Switch is turned off) and the "L" level are input to the switch signal generation circuit 14 respectively.

In the present embodiment, when the voltage of the power storage means 12 exceeds 1.25 V, the hands 10 move the hands 10 for 20 seconds to drive the hands 10 every 20 seconds. When the voltage is 5 V or less, the system uses a charge warning hand movement that moves the hand three times at one minute intervals of 250 ms. In addition, sampling (BD sampling) for the voltage detection circuit 13 to detect the voltage of the power storage means 12 is performed once a minute in normal times, approximately one minute before the fall of the 1-minute period signal S 1 M. This is performed at 500 ms, and at that time, if it is detected that the voltage of the power storage means 12 is 1.25 V or less, the voltage detection signal BD goes to the “H” level.

Here, a description will be given of a case where the voltage detection circuit 13 normally operates when the voltage of the power storage means 12 exceeds 1.25 V. The voltage detection signal BD outputs the “L” level, and the hand operation cycle selection is performed. Circuit 6 outputs the 20-second periodic signal S20S as the hand movement timing signal DP. In addition, the waveform shaping circuit 7 receives the hand movement timing signal DP having a period of 20 seconds, generates a motor drive signal every 20 seconds, and outputs the signal to the coil 8a from the motor drive circuit 8. The hand operation pulse P is output at the same timing as the fall of the 20-second cycle signal S 2 OS.

The waveform shaping circuit 7 receives the "L" level of the voltage detection signal BD and creates a motor drive signal that facilitates the motor drive according to the voltage of the motor.

Here, the case where the voltage of the power storage means 12 is 1.25 V or less will be described. The voltage detection signal BD becomes the “H” level, and this signal is input to the hand movement period selection circuit 6. . In the hand movement cycle selection circuit 6, the 20-second cycle signal S20S indicating the hand movement cycle up to that, and the fall of the 1-minute cycle signal S1M generated by the charge warning hand movement timing creation circuit 5 From this, it is switched to the charge warning hand movement timing signal TP three times in a row at 250 ms intervals. That is, the hand movement timing signal DP becomes the charge warning hand movement timing signal TP from the 20-second cycle signal S2OS.

As a result, the driving pulse output from the motor drive circuit 8 to the coil 8a is output at the same timing as the fall of the charge warning signal TP.

In addition, the waveform shaping circuit 7 receives the “H” level of the voltage detection signal BD, and changes the shape of the hand-operating pulse P for 20 seconds so that it can be easily driven in response to a drop in the power supply voltage. Switch from the pulse shape during hand operation to the pulse shape during charge warning hand operation.

Further, the voltage detection signal BD is input to the AND gate 17b. When continuous electromagnetic correction is not performed, that is, when the continuous electromagnetic correction signal HS is at the “L” level, the continuous electromagnetic correction signal HS becomes the “H” level via the inverter 17 c and the AND gate 17 b Since the voltage detection signal BD, which is the other input of the AND gate 17b, is at "H" level, the output of the AND gate 17b is at "H" level.

The "H" level output of the AND gate 17b is input to the D-FF17a overnight input section D, where 0-? 17 is the hand movement timing signal DP output after about 5001! 13 (at this time, since the voltage detection signal BD is at the "H" level, the hand movement timing signal DP is the charge warning timing signal TP ) As a clock, read the data input section D at the falling edge of the hand movement timing signal DP, and output Q is latched as an "H" level signal.

Upon receiving the "H" level output of D-FF17a, the operation of the switch signal generation circuit 14 and the modified pulse timing generation circuit 16 is prohibited.

Thereafter, until the voltage detection circuit 13 detects the voltage of the storage means 12 at 1.25 V or more, the correction pulse timing generation circuit 16 and the switch signal generation circuit 14 are inactive, and the electromagnetic correction is performed. Ban.

Next, a case where a voltage drop of the power storage means 12 is detected by voltage detection during electromagnetic correction will be described with reference to FIG.

When the external operation switch 14a is set to 0 N, first, a single-shot electromagnetic correction signal CS is output.

The single-shot electromagnetic correction signal CS is input to the correction pulse timing generation circuit 16, and the correction pulse timing generation circuit 16 outputs the correction pulse (hand movement pulse) P only once in synchronization with the rise of the single-shot electromagnetic correction signal CS. It outputs and hands 10 move the needle only once.

The reset signal generation circuit 15 to which the single-shot electromagnetic correction signal CS is input rises the single-shot electromagnetic correction signal CS (external switch 14a The reset signal HS that resets the frequency divider 2 and the 20-second counter 3 and the 1-minute counter 4 is output once in synchronization with this signal.

As a result, the subsequent timing is performed starting from the rise of the single-shot electromagnetic correction signal CS.

If the external operation switch 14a is kept ON for a specified time or more (in this embodiment, 1 second or more), the switch signal generation circuit 14 outputs the continuous electromagnetic correction signal HS.

This continuous electromagnetic correction signal HS continues to be output until the external operation switch 14a is turned off.

In the correction pulse timing generation circuit 16 to which the continuous electromagnetic correction signal HS is input, a predetermined period (from 16 Hz in the present embodiment) from the rising to the falling of the continuous electromagnetic correction signal HS. A correction pulse is output continuously to the pointer, and the pointer 10 moves continuously at a period of 16 Hz.

In addition, the reset signal generation circuit 15 that receives the continuous electromagnetic correction signal HS is synchronized with the falling of the continuous electromagnetic correction signal HS (when the external operation switch 14a is turned off). The reset signal RS for resetting the frequency divider 2 and the 20-second counter 3 and the 1-minute counter 4 is output once.

Thus, the subsequent timing operation is performed starting from the falling of the continuous electromagnetic correction signal.

The voltage detection circuit 13 detects the voltage of the power storage means 12 even during the continuous electromagnetic correction.

In the present embodiment, during the continuous electromagnetic correction, the sampling timing of the voltage detection is changed from the normal state, and during the continuous electromagnetic correction, the voltage is changed every 12 seconds after the continuous electromagnetic correction signal HS rises. Perform detection. If the voltage detection at this time detects a voltage drop in the storage means 12, the voltage detection signal BD goes to the “H” level, and the hand movement period selection circuit 6 operates in a 20-second cycle as in the normal case. Output is switched from signal S20S to charge warning hand movement timing signal TP.

That is, the hand movement timing signal DP becomes the charge warning hand movement timing signal TP from the 20-second cycle signal S 20 S.

However, the hand movement at the charging warning hand movement timing is output one minute after the continuous electromagnetic correction is released (OFF of the external operation switch 14a).

Further, the waveform shaping circuit 7 switches the shape of the hand operation pulse from the pulse shape during the 20-second hand operation to the pulse shape during the charge warning hand operation.

Note that the shape of the hand operation pulse P is switched immediately after voltage detection even during continuous electromagnetic correction.

Further, the voltage detection signal BD is input to the AND 17 b, and the continuous electromagnetic correction signal HS, which is the other input of the AND 17 b, is at the “H” level. Becomes "L" level via inverter 17c and is input to AND 17b, so the output of AND 17b becomes "L" level during continuous electromagnetic correction.

Therefore, since the data input of D-FF 17a is also at the "L" level, the output Q of D-FF 17a is at the "L" level, and the voltage drop of the power storage means 12 during continuous electromagnetic correction is reduced. Even if detected, the operations of the switch signal generation circuit 14 and the correction pulse timing generation circuit 16 are not prohibited, and continuous electromagnetic correction can be maintained.

When the continuous electromagnetic correction is released in a state where the voltage drop of the storage means 12 is detected, first, as described above, the reset signal generation circuit 15 resets in synchronization with the falling of the continuous electromagnetic correction signal HS. Output the reset signal RS, reset the frequency divider 2 and the 20-second counter 3 and the 1-minute counter 4, Time measurement is performed starting from the reset timing.

In addition, the continuous electromagnetic correction signal HS becomes “L” level, and becomes “H” level via the inverter 11c, and is input to the AND gate 17b. Voltage detection signal which is the other input of AND gate 17b; Since BD is at "H" level, the output of AND gate 17b is at "H" level and D-FF 1 7 Input to the data input section D of a.

However, when the output of the AND gate 17b goes to the "H" level, the clock timing signal DP, which is the clock of D_FF 17a, is still fixed at the "H" level. Therefore, the data input section D does not read the output of the AND gate 17b.

At this time, the hand timing signal DP, which is a clock of D-FF 17a, is charged from the 20-second periodic signal S20S because the voltage detection signal BD is at the "H" level. It has switched to the warning hand operation timing signal TP.

As described above, when the continuous electromagnetic correction is released, the frequency dividing circuit 2, the 20-second counter 3 and the 1-minute counter 4 are reset, so that the hand movement timing signal DP becomes " The “L” level is changed from the “H” level to “L” level one minute after the continuous correction is canceled.

That is, reading of the data input of D-F F 17a is performed one minute after the continuous electromagnetic correction is canceled.

Therefore, it is possible to perform the electromagnetic correction again for one minute after the cancellation of the continuous electromagnetic correction.

Also, if the electromagnetic correction is performed, the frequency divider 2 and the 20-second counter 3 and the 1-minute counter 4 must be reset for both single-shot and continuous electromagnetic corrections. 1 minute to fix Will be updated each time.

One minute after the electromagnetic correction is released, when the hand operation timing signal DP changes from “H” level to “L” level, the D-FF 17a switches the input section D (“H” level) Read and output Q is latched as "H" level signal.

Upon receiving the "H" level output of D-FF17a, the operation of the switch signal generation circuit 14 and the modified pulse timing generation circuit 16 is prohibited. After that, until the voltage detection circuit 13 detects the voltage of the power storage means 12 equal to or more than 1.25 V, the correction pulse timing generation circuit 16 and the switch signal generation circuit 14 become inactive and perform the electromagnetic correction. Ban.

As described above, since the correction prohibiting means for prohibiting the operation of the display correcting means based on the output of the voltage detecting means is provided, it is possible to prohibit the electromagnetic correction when the voltage of the power storing means drops, so that the voltage of the power storing means is reduced. The reduction can be minimized, and the correction prohibition means does not prohibit the operation of the display correction means even if the voltage detection means outputs a detection signal during the operation of the display correction means. Until the user stops the continuous electromagnetic correction, the correction can be performed continuously, and the time can be reliably corrected.

In addition, a counter is provided to start counting after the switch operation is completed, and the correction prohibition means is activated based on the control of the countdown.Therefore, correction is performed for a certain period after the continuous electromagnetic correction operation is completed. It is possible to provide a system that does not cause confusion to the user by enabling additional fine adjustment by the user.

In addition, a switch signal generating means for outputting different control signals to the pulse generation circuit based on short-time operation and long-time operation of the external operation switch is provided, and correction is made by a control signal based on long-time operation Prohibited means Is controlled, so that the correction operation can be continued when performing continuous electromagnetic correction.

(2) Second embodiment

Next, a second embodiment will be described with reference to FIGS.

4 to 6, the elements corresponding to those of the electronic timepiece according to the first embodiment will be described with the same reference numerals.

In FIG. 4, the electronic timepiece according to the second embodiment includes an oscillating circuit 1, a frequency dividing circuit 2 for receiving the oscillating signal of the oscillating circuit 1, and a signal divided by the frequency dividing circuit 2. Set the 0-second periodic signal S2 0 S to the 20-second power signal 3 and the 20-second periodic signal S 2 OS to further divide the 1-minute periodic signal S 1 M 1-minute count Evening 4 and 20-second periodic signal S 20 S and 1-minute periodic signal S 1 M are input, and the output (voltage drop signal) of voltage detection circuit 13 to be described later is switched by BDD. Hand movement cycle selection circuit 6 that outputs signal DP is provided

The electronic timepiece also includes an external operation switch 14a, a switch signal generation circuit 14 that receives the input of the external operation switch 14a and outputs a switch signal SWS, and a switch. When the operation of the external operation switch 14a is short after receiving the switch signal SWS, the single-shot electromagnetic correction signal and the frequency-divided signal of the frequency divider 2 are received and the single-shot electromagnetic correction signal is corrected. Correction pulse output that outputs as a PTS and outputs a continuous electromagnetic correction signal (fast-forward correction signal) as a correction pulse timing signal PTS when switch 14a has been pressed for longer than the specified time. Motor drive in response to the modified pulse timing signal PTS output from the timing generation circuit 16 and the correction pulse timing generation circuit 16 Waveform shaping circuit 7 that creates a waveform for the motor, a motor drive circuit 8 that inputs the motor drive waveform created by the waveform shaping circuit 7 to drive the motor 9, and a coil 8 that drives the motor. a, and a pointer 10 driven by a motor 9 via a wheel train (not shown) when the motor 9 is driven. Here, the switch signal generation means is constituted by the switch signal generation circuit 14 and the correction pulse timing generation circuit 16.

The electronic timepiece also includes a power generation means 11 for generating power for driving the entire system, a power storage means 12 for storing the power generated by the power generation means 11, and a voltage for the power storage means 12. A voltage detection circuit 13 as voltage detection means for generating a voltage detection signal BDD of L when the voltage of the power storage means 12 is higher than a specific value and detecting the voltage of the power storage means 12 when the voltage is lower than the specific value. Receiving the voltage detection signal BDD and the switch signal SWI from the switch signal generation circuit 14, outputs a switch inhibition signal SWD to inhibit the operation of the switch signal generation circuit 14. A switch inhibit signal generation circuit 15 is provided.

As shown in FIG. 5, the switch inhibit signal generation circuit 15 includes a NAND gate 152 and NAND gates 153 and 154 each having an output as one input. The NAND gate 1552 receives the voltage detection signal BDD and the switch signal SWI, and the voltage detection signal BDD is also used as the other input of the NAND gate 1553. The output of the NAND gate 154 is used as the other input of the NAND gate 154. The output of NAND gate 154 is used as switch inhibit signal SWD. The switch inhibit signal generation circuit 15 switches off the switch 14a after the switch 14a is turned off after the voltage detection signal BDD becomes H when the voltage is below the specific value. Latch is inadvertently triggered by the switch inhibit signal SWD. Next, the operation of the second embodiment will be described using the timing chart of each signal in FIG. The arrow with a wavy tail in Fig. 6 is used to explain that the signal at the end of the arrow rises or falls with respect to the rising or falling of the tail signal. It is a thing.

First, a case will be described in which the voltage detection is performed in a state where the electromagnetic correction is not performed, and the voltage drop of the power storage means 12 is detected. In the second embodiment, the external operation switch 14a is used as a push button, and when the switch is pressed (switch No. N), the "L" level is released, and the switch is released. Switch “OFF”) and the “H” level is output from switch 14a as switch signal SWI. At the same time, from the switch signal generation circuit 14, when the switch is pressed (switch 0N), the "L" level is released, and when the switch is released (switch OFF), "H" is output. , And levels are output as the switch signal SWS.

In the second embodiment as well, the pointer 10 drives the pointer 10 every 20 seconds when the voltage of the power storage means 12 exceeds 1.25 V. 20-second period signal S Performs 20-second hand movement in the same manner as OS, and when the voltage is 1.25 V or less, the 1-minute period signal S 1 M is picked up by the hand-movement period selection circuit 6 at 1-minute period 250 ms intervals Outputs a hand pulse P that moves three times in succession to perform the charge warning hand movement. Sampling for the voltage detection circuit 13 to detect the voltage of the power storage means 12 is normally performed once a minute, and at that time, the voltage of the power storage means 12 is 1.25 V or less. Is detected, the voltage detection signal BDD becomes "H" level.

Here, a description will be given of a normal case where the voltage detection circuit 13 has the voltage of the power storage means 12 exceeding 1.25 V. D outputs “L” level, and the hand movement cycle selection circuit 6 outputs the 20-second cycle signal S 20 S as the hand movement timing signal DP.

In addition, the waveform shaping circuit 7 receives a hand movement timing signal DP having a period of 20 seconds, generates a motor drive signal every 20 seconds, and outputs the signal to the coil 8a from the motor drive circuit 8. The hand operation pulse P is output at the same timing as the rise of the 20-second cycle signal S 2 OS.

Here, the case where the voltage of the power storage means 12 is 1.25 V or less will be described. The voltage detection signal BDD becomes the “H” level, and this signal is input to the driving cycle selection circuit 6. You. In the hand movement cycle selection circuit 6, the hand movement cycle is changed from the previous 20-second cycle signal S 2 OS to the charge warning hand movement timing signal three consecutive times at 250 ms intervals from the rise of the 1-minute cycle signal S 1 M. The operation is switched, and the hand movement pulse P changes three times in a row every minute. As a result, the hand movement pulse P output from the motor drive circuit 8 to the coil 8a drives the motor 9, and the charging warning hand movement is performed. Further, the voltage detection signal BDD is input to the switch prohibition signal generation circuit 15 in FIG. 5, and at this time, if the switch 14a is not pressed, the switch signal SWI becomes "L" level. Therefore, the switch inhibit signal SWD becomes "H" level, and the switch signal generation circuit 14 is insensitively latched.

Thereafter, the switch signal generation circuit 14 becomes inactive and inhibits electromagnetic correction until the voltage detection circuit 13 detects that the voltage of the power storage means 12 is 1.25 V or more.

Next, a case where a voltage drop of the power storage means 12 is detected by voltage detection during electromagnetic correction will be described with reference to FIG. When the external operation switch 14a is turned on, first, the modified pulse timing creation circuit 16 receiving the switch signal SWS starts the modified pulse timing generation circuit 16. Outputs one-shot electromagnetic correction signal CS as mining signal PTS.

The waveform shaping circuit 7 outputs the correction pulse (handing pulse) P only once in synchronization with the rise of the single-shot electromagnetic correction signal CS, and the pointer 10 moves the hand only once.

If the external operation switch 14a is kept for more than the specified time (for example, more than 1 second) 0 N, the corrected pulse timing generation circuit 16 outputs the continuous electromagnetic correction signal HS as the corrected pulse timing signal PTS Yes This continuous electromagnetic correction signal HS continues to be output until the external operation switch 14a is turned off.

The waveform shaping circuit 7 to which the continuous electromagnetic correction signal HS is input is used for correcting continuously at a specified period (every 16 Hz in this embodiment) in synchronization with the rising of the continuous electromagnetic correction signal HS. The hand 10 is driven continuously with a period of 16 Hz.

If the voltage detection at this time detects a drop in the voltage of the power storage means 12, the voltage detection signal BDD goes to the “H” level, and the hand movement cycle selection circuit 6 operates for 20 seconds as in the normal case. Switches from the periodic signal S20S to the charging warning hand timing signal.

That is, the hand movement timing signal DP becomes the charge warning hand movement timing signal from the 20 second cycle signal S 20 S.

However, the hand movement at the charging warning hand movement timing is output one minute after the continuous electromagnetic correction release (OFF of the external operation switch 14a).

In addition, the waveform shaping circuit 7 switches the shape of the hand operation pulse P from the pulse shape during the 20-second hand operation to the pulse shape during the charge warning hand operation.

In addition, the "H" level of the voltage detection signal BDD indicates that the switch However, the switch signal SWI is "L" because the switch is ON, so the output SWD of the NAND gate 154 does not change and remains at "L". is there.

Therefore, even if the voltage drop of the power storage means 12 is detected during the continuous electromagnetic correction, the operation of the switch signal generation circuit 14 is not prohibited, the switch signal SWS is maintained, and the correction pulse timing generation circuit 1 is maintained. The output PTS of 6 outputs the continuous electromagnetic correction signal HS and can continue the continuous electromagnetic correction. Every time the continuous electromagnetic correction signal HS rises, a hand movement pulse P is output, and fast-forward correction is performed.

When the switch 14a is turned off in a state where the voltage drop of the power storage means 12 is detected, the switch signals SWS and SWI become "H" and the corrected pulse timing generation circuit 16 The output PTS stops the continuous electromagnetic correction signal HS, and the continuous electromagnetic correction is released. When the switch signal SWI rises to "H", the switch inhibit signal SWD, which is the output of the NAND gate 154, becomes "H" and stops the operation of the switch signal generation circuit 14 to be insensitive. And

The corrected pulse timing signal PTS resets the 20-second counter 3 and the 1-minute counter 4 each time it falls, and both counters 3 and 4 start re-counting.

Here, the timings in the timing chart of FIG. 6 are denoted by reference numerals T11 to T18, and the timing will be described.

Τ11, Τ12 indicate the evening when the hand-pulse Ρ is generated at 20-second intervals, that is, the 20-second hand-moving timing. T13a indicates the timing of a single correction pulse generated by the operation of the switch 14a, and T14 will generate a continuous correction pulse due to the long press of the switch 14a. Indicates when to start. T 1 3 b is a continuous correction Indicates the timing at which the last pulse was output, here the 20-second count and the 1-minute counter is also the last reset. T13c indicates the timing when the operation of the switch 14a is stopped and the continuous correction ends. T15 indicates the timing when the voltage detection circuit 13 detects the voltage drop. T16 indicates the first minute hand movement one minute after the last switch operation, and T18 indicates the second minute hand movement timing. T17 indicates the timing at which the switch 14a was operated after the voltage detection signal BDD became "H" and the switch inhibit signal SWD also became "H", and in this case, the correction was performed. In a state of insensitivity.

As described above, since the correction prohibiting means for prohibiting the operation of the display correcting means based on the output of the voltage detecting means is provided, it is possible to prohibit the electromagnetic correction when the voltage of the power storing means drops, so that the voltage of the power storing means is reduced. The reduction can be suppressed as much as possible, and the correction prohibition means does not prohibit the operation of the display correction means even if the voltage detection means outputs a detection signal during the operation of the display correction means. Until the user stops the continuous electromagnetic correction, the correction can be performed continuously, and the time can be reliably corrected.

In addition, a switch signal generating means for outputting different control signals to the pulse generation circuit based on short-time operation and long-time operation of the external operation switch is provided, and correction is made by a control signal based on long-time operation The prohibition means is controlled, so that the correction operation can be continued only when performing continuous electromagnetic correction, and the fast-forward correction can be performed.

Here, the configuration of the switch signal generation circuit 14 will be described with reference to FIG. This is the switch signal of the third embodiment described below. This configuration is also used for the signal generation circuit 14. The switch signal generation circuit 14 is composed of NOR gates 14432. When the switch 14a is turned on, the switch signal SWI which has been "H" through the resistor PUR141 becomes "L", and at this time, the switch inhibit signal SWD is turned off. If it is "L", the switch signal SWS via the NOR gate 14432 becomes "H", so that the modified pulse timing generation circuit 16 is set to the operating state. Here, when the switch inhibit signal SWD becomes "H", the switch signal SWS becomes "L" and the operation of the modified pulse timing generation circuit 16 is stopped.

Further, the configuration of the correction pulse timing generation circuit 16 which generates the timing of single-shot correction and continuous (fast-forward) correction in response to the switch signal SWS will be described with reference to FIGS. 11 and 12. FIG. This configuration is also used for the modified pulse timing generation circuit 16 of the third embodiment described below. In FIG. 11, the modified pulse timing generation circuit 16 is composed of an AND gate 161, and a series of flip-flops TF1651, TF1652, TF1 connected thereto. A COT consisting of 653 and TF1654, a IVN166 connecting them, and a NOR gate 162 that receives a large number of outputs from the power COT as inputs. An OR gate 163 receives an input that determines the conditions for continuous correction, and an AND gate 164 receives this output and a clock signal CLK.

The operation will be described based on the timing chart of the signal related to the modified pulse timing generation circuit 16 in FIGS. 11 and 12. The switch signal SWS is “H” and resets all flip-flops TF1661 to TF1654 until the switch 14a is not turned on. ing. Switch 14a is turned on and switch signal SW When S becomes "L", the reset of all flip-flops TF1661 to TF1654 is released. As a result, while the output Q of the flip-flop TF1664 is "L", one of the inputs of the AND gate 161 is "H" via the INV166. The clock signal CLK, which is the other input of the AND gate 161, is input to の of the flip-flop TF1651. Counting starts at flip-flops TF1651 to TF1654, but immediately after the reset is released, flip-flops TF1661 to TF1 Since the Q outputs of 654 are all "L" and the SWS is "L", the output of NOR gate 162 becomes "H", thereby the OR gate The output of 163 also becomes "H", and the output pulse correction signal PTS of the AND gate 1664 becomes the clock signal CLK. When the clock signal CLK becomes "H" and then becomes "L", the corrected pulse timing signal PTS also becomes the same signal, based on which the single-shot correction is performed. At the same time, the falling edge of the clock signal CLK is input to the ø input of the flip-flop TF 1651 via the AND gate 161, and the 0 output of 1651 is Is “11”, and the output of NOR gate 16 2 is “L”. Thereafter, when the clock signal CLK is input, the output Q of any of the flip-flops TF1661 to TF1654 becomes "H", and the N0R gate 1 6 2 outputs "L" and no one-time correction is performed.

When the clock signal CLK is counted down and the flip-flop Q output of the flip-flop TF1664 becomes “H”, the output of the 0R gate 1663 becomes “H”. The corrected pulse timing signal PTS, which is the output signal of the AND gate 164, becomes the clock signal CLK. Here, one input of AND gate 1 6 1 is connected to flip-flop TF 1 6 5 4 Since the "H" signal of the Q output becomes "L" level which is inverted by INV166, the output of AND166 becomes "L" and the clock signal CLK is not counted thereafter. . Therefore, OR 163 keeps outputting “H”, and the modified pulse timing signal PTS becomes equivalent to the clock signal CLK via the AND gate 164. This is the continuous correction state. When the switch 14a is turned off, the switch signal SWS becomes "H ,," and the Q output of the flip-flop TF1654 is reset to "L". And the corrected pulse timing signal PTS becomes "L".

In Fig. 12, T31 to T32 indicate the timing in one-shot correction switch operation, and Τ33 to Τ34 indicate the timing in single-shot correction switch operation at another timing. Further, Τ38 to Τ39 show the timing in the single-shot correction switch operation at another timing. Τ 35 to Τ 37 indicate the timing of the continuous correction switch operation, Τ 35 to Τ 36 indicate the timing of the single-shot correction, and Τ 36 The flip-flop TF1 654 shows the timing when it counts up and shifts to the continuous correction, and Τ36 to Τ37 show the timing of the continuous correction. is there.

(3) Third embodiment

Next, a third embodiment will be described with reference to FIGS.

Also in the third embodiment, the switch signal generation circuit 14 and the modified pulse-timing generation circuit 16 are the switches of FIG. 10 described in the second embodiment, respectively. Since a switch signal generation circuit 14 and a configuration similar to the modified pulse timing generation circuit 16 described in FIGS. 11 and 12 are used, further description is omitted. In FIGS. 7 to 9, those corresponding to elements in the electronic timepieces of the first and second embodiments will be described with the same reference numerals. In particular, in the third embodiment, the switch inhibition signal generation circuit 15 of the second embodiment is a circuit 150 of a different configuration, and the output of the 1-minute counter 4 is input. It allows additional correction for one minute after the correction during the correction operation is completed.

In FIG. 7, the electronic timepiece according to the third embodiment includes an oscillating circuit 1, a frequency dividing circuit 2 for receiving the oscillating signal of the oscillating circuit 1, and a signal divided by the frequency dividing circuit 2. Set 0-second periodic signal S 20 S to 20-second force signal 3 and 20-second periodic signal S 20 S signal to further divide to create 1-minute periodic signal S 1 M 1-minute signal Input 4 and the 20-second period signal S 20 S and the 1-minute period signal S 1 M, and switch the period of the hand movement according to the output BDD (voltage drop signal) of the voltage detection circuit 13 described later. A hand movement cycle selection circuit 6 for outputting the ringing signal DP is provided.

The electronic timepiece also includes an external operation switch 14a, a switch signal generation circuit 14 that receives an input of the external operation switch 14a and outputs a switch signal SWS, and a switch. When the operation of the external operation switch 14a is short in response to the switch signal SWS, the single electromagnetic correction signal and the divided signal of the frequency divider 2 are received and the single electromagnetic correction signal is corrected. Correction pulse output that outputs a continuous electromagnetic correction signal (fast-forward correction signal) as the correction pulse timing signal PTS when switch 14a has been pressed for longer than the specified time. The waveform shaping circuit 16 and the waveform shaping circuit 7 that receives the corrected pulse timing signal PTS output from the corrected pulse timing generating circuit 16 and creates a waveform for driving the motor, and the waveform shaping circuit 7 Sa The motor drive circuit 8 and the motor drive coil 8a for inputting the motor drive waveforms and driving the motor 9 and a motor train 9 drive the motor 9 to drive a wheel train (not shown). And a pointer 10 driven via the pointer. Here, the switch signal generation means is constituted by the switch signal generation circuit 14 and the correction pulse timing generation circuit 16. The electronic timepiece also includes a power generation means 11 for generating power for driving the entire system, a power storage means 12 for storing the power generated by the power generation means 11, and a voltage for the power storage means 12. A voltage detection circuit 13 as voltage detection means for generating a voltage detection signal BDD of L when the voltage of the power storage means 12 is higher than a specific value and detecting the voltage of the power storage means 12 when the voltage is lower than the specific value. Receiving the voltage detection signal BDD and the signal from the 1-minute counter 4, outputs the switch inhibit signal SWD, and inhibits the operation of the switch signal creating circuit 14. The switch inhibit signal creating circuit 1 as a correction inhibiting means for inhibiting the operation of the switch 4 50 are provided.

The switch disable signal generation circuit 150 is composed of a flip-flop DF155 with INV (inverter) 156 and INV157 as shown in FIG. The voltage detection signal BDD is applied to the data input D of the DF155 and to the reset input R via the INV157. In addition, a one-minute signal is applied to clock input ø of DF155 via INV156. The output Q of DF155 is input to the switch signal generation circuit 14 as the switch inhibition signal SWD. The switch inhibition signal generation circuit 150 outputs the voltage detection signal BDD of a specific value or less. 1 minute after the switch 14a is turned off after the H level at that time, the switch 14a is insensitively latched by the switch inhibit signal SWD. This is shown in Figure 9 below. In particular, at timing T7, the switch inhibit signal SWD becomes "H". This indicates that switch 14a is insensitive.

Next, the operation of the third embodiment will be described using the timing chart of each signal in FIG. The arrow with a wavy tail in Fig. 9 is used to explain that the signal at the tip of the arrow rises or falls with respect to the rising or falling of the tail signal. It is a thing.

First, a case will be described in which the voltage detection is performed in a state where the electromagnetic correction is not performed, and the voltage drop of the power storage means 12 is detected. In the third embodiment, the external operation switch 14a is used as a push button, and when the switch is pressed (switch ON), the "L" level is released, and the switch is released (switch). Switch OFF) and the “H” level is output as switch signal SWI from switch 14a. At the same time, from the switch signal generation circuit 14, when the switch is pressed (switch ON), the "H" level is released, and when the switch is released (switch OFF), the "L," level becomes "L,". Output as switch signal SWS.

In the third embodiment as well, the pointer 10 drives the pointer 10 every 20 seconds when the voltage of the power storage means 12 exceeds 1.25 V. 20-second periodic signal S Performs 20-second hand movement in the same manner as S20S.If the voltage is 1.25 V or less, the 1-minute periodic signal S 1 M is picked up by the hand-moving period selection circuit 6, and the 1-minute period is 250 ms. Outputs a hand pulse P that moves the hand three times in succession and performs the charge warning hand movement. Sampling for the voltage detection circuit 13 to detect the voltage of the power storage means 12 is normally performed once a minute, and at that time, the voltage of the power storage means 12 is 1.25 V or less. Is detected, the voltage detection signal BDD becomes "H" level.

Here, the voltage detection circuit 13 detects that the voltage of the storage means 12 is 1.25 V Explaining the normal case where the voltage exceeds the voltage, the voltage detection signal BDD outputs an “L” level, and the hand movement cycle selection circuit 6 sets the 20-second cycle signal S 2 OS as the hand movement timing signal: DP. Output.

In addition, the waveform shaping circuit 7 inputs a hand movement timing signal DP having a period of 20 seconds, generates a motor drive signal every 20 seconds, and outputs a hand movement pulse output from the motor drive circuit 8 to the coil 8a. P is output at the same timing as the rise of the 20-second periodic signal S 2 OS.

Here, the case where the voltage of the power storage means 12 is 1.25 V or less will be described. The voltage detection signal BDD becomes the “H” level, and this signal is input to the driving cycle selection circuit 6. You. In the hand movement cycle selection circuit 6, the hand movement cycle is set by the 20-second cycle signal S 2 OS up to that point, and the charge warning hand movement time is repeated three times at intervals of 250 ms from the rise of the 1-minute cycle signal S 1 M. The signal is switched to a switching signal, and the hand operation pulse P changes three times in a row every minute. As a result, the hand movement pulse P output from the motor drive circuit 8 to the coil 8a drives the motor 9 and the charging warning hand movement is performed. Further, the voltage detection signal BDD is input to the switch inhibition signal generation circuit 150 of FIG. At this time, if the switch 14a is not pressed, the switch signal SWI is at the "L" level and the switch signal SWS is at the "H" level. When the 1-minute signal S1M of 1-minute countdown 4 is flip-flop input to the flip-flop DF155, the switch disable signal SWD becomes "H" level and the switch signal is output. After the generation circuit 14 is insensitively latched, the switch signal generation circuit 14 continues to operate until the voltage detection circuit 13 detects that the voltage of the power storage means 12 is 1.25 V or more. Disables operation and prohibits electromagnetic correction.

Next, a case where a voltage drop of the power storage means 12 is detected by voltage detection during electromagnetic correction will be described with reference to FIG. When the external operation switch 14a is turned on, first, the switch signal SWS becomes the "H" level, and the modified pulse timing generation circuit 16 receiving the signal becomes the modified pulse timing signal PTS. Outputs one-shot electromagnetic correction signal CS.

The waveform shaping circuit 7 outputs a correction pulse (handing pulse) P only once in synchronization with the rise of the single-shot electromagnetic correction signal CS, and the pointer 10 moves the hand only once.

If the external operation switch 14a is kept for more than the specified time (for example, more than 1 second) 0 N, the corrected pulse timing generation circuit 16 outputs the continuous electromagnetic correction signal HS as the corrected pulse timing signal PTS Yes The continuous electromagnetic correction signal HS continues to be output until the external operation switch 14a is turned off.

The waveform shaping circuit 7 to which the continuous electromagnetic correction signal HS has been input is used for correcting continuously at specified intervals (in this embodiment, every 16 Hz) in synchronization with the rise of the continuous electromagnetic correction signal HS. The hand 10 is driven continuously with a period of 16 Hz.

If the voltage detection at this time detects a voltage drop in the power storage means 12, the voltage detection signal BDD goes to “H” level, and the hand movement period selection circuit 6 operates for 20 seconds as in the normal case. Switches from the periodic signal S20S to the charge warning hand timing signal.

However, the hand movement at the charging warning hand movement timing is output one minute after the continuous electromagnetic correction is released (the external operation switch 14a is turned off). In addition, the waveform shaping circuit 7 switches the shape of the hand operation pulse P from the pulse shape during the 20-second hand operation to the pulse shape during the charge warning hand operation.

Further, the "H" level of the voltage detection signal BDD is input to the switch inhibition signal generation circuit 150, but the switch is not activated until the one-minute signal S1M from the one-minute counter 4 is input. Switch SWD does not change at "L" level.

Therefore, even if the voltage drop of the power storage means 12 is detected during the continuous electromagnetic correction, the operation of the switch signal generation circuit 14 is not prohibited, and the switch signal SWS is maintained and the correction pulse timing is generated. The output PTS of the circuit 16 outputs the continuous electromagnetic correction signal HS, so that the continuous electromagnetic correction can be continued. Every time the continuous electromagnetic correction signal HS rises, a hand movement pulse P is output, and fast-forward correction is performed.

When the switch 14a is turned off in a state where the voltage drop of the power storage means 12 is detected, the switch signal SWI becomes "H" and the switch signal SWS becomes "L", and the corrected pulse timing generation circuit 16 The output PTS stops the continuous electromagnetic correction signal HS, and the continuous electromagnetic correction is released.

The corrected pulse timing signal PTS resets the 20-second count 3 and the 1-minute count 4 each time it falls, and the counters 3 and 4 start re-counting.

As described above, when the continuous electromagnetic correction is canceled, the divider circuit 2, the 20-second counter 3 and the 1-minute counter 4 are reset, so that the hand movement timing signal DP has a one-minute period. The signal becomes 1 minute after the continuous correction is canceled.

That is, the reading of the data input of the flip-flop DF155 is performed one minute after the continuous electromagnetic correction is canceled.

Therefore, for one minute after the cancellation of the continuous electromagnetic correction, It is possible to do so.

Also, if the electromagnetic correction is performed, the frequency divider 2, the 20-second counter 3 and the 1-minute counter 4 must be reset, regardless of whether it is a single-shot electromagnetic correction or a continuous electromagnetic correction. It will be updated each time you can do it for 1 minute.

One minute has passed after the electromagnetic correction is released, and when the one-minute signal S 1 M from the one-minute counter 4 is input to the switch inhibit signal generation circuit, the flip-flop DF155 Overnight input D ("H" level) is read, and output Q is latched as "H" level signal.

As a result, the switch inhibit signal SWD ("H" level) inhibits the operation of the switch signal generating circuit 14. Thereafter, until the voltage detection circuit 13 detects the voltage of the storage means 12 at 1.25 V or more, the modified pulse timing generation circuit 16 and the switch signal generation circuit 14 are inactive, and the electromagnetic wave is not generated. Modifications are prohibited.

Here, the timings in the time chart of FIG. 9 are denoted by reference numerals T1 to T8, and the timing will be described.

Τ1 and Τ2 indicate the timing at which the hand movement pulse 発生 occurs at an interval of 20 seconds, that is, the 20-second hand movement timing. T3a is the timing of a single correction pulse generated by switch 14a operation, and T4 is the continuous correction pulse generated by long press of switch 14a. Indicate when to start. T3b indicates the timing at which the last pulse of the continuous correction was output, in which the 20-second count and the 1-minute count are also reset at the end. T3c indicates the timing when the operation of the switch 14a is stopped and the continuous correction ends. T5 indicates the timing when the voltage detection circuit 13 detects the voltage drop. T7 is the first one minute after the last switch operation. The 1 minute hand movement timing is shown. T6a is the timing when the switch operation is performed within one minute after the previous switch 14a operation is completed and the single-shot correction is performed. This shows the timing at which day 3 and 1 minute countdown 4 are reset. T6c indicates the timing at which the switch operation starting at T6a ends with only a single correction. T8 indicates the timing at which the switch 14a was operated after the voltage detection signal BDD became "H" and the switch inhibit signal SWD also became "H". In this case, the correction was performed. I'm in a dead state.

As described above, in the third embodiment, since the correction inhibiting means for inhibiting the operation of the display correcting means based on the output of the voltage detecting means is provided, it is possible to inhibit the electromagnetic correction when the voltage of the power storage means drops. Therefore, the voltage drop of the storage means can be suppressed as much as possible, and the correction prohibiting means does not prohibit the operation of the display correcting means even if the voltage detecting means outputs a detection signal during the operation of the display correcting means. Therefore, it can be performed continuously until the user stops the continuous electromagnetic correction, and the time can be surely corrected.

In addition, using the main counter, here the one-minute counter, to start counting after the switch operation is completed, the correction prohibition means operates based on the control of the counter. As a result, it is possible to make corrections for a certain period of time after the continuous electromagnetic correction operation is completed, here for one minute, so that the user can make additional fine adjustments without causing confusion to the user. System can be provided.

In addition, switch signal generation means that outputs different control signals to the pulse generation circuit based on short-time operation and long-time operation of the external operation switch are provided, and correction is prohibited by a control signal based on long-time operation means Is controlled, so that the correction operation can be continued only when performing continuous electromagnetic correction, and the fast-forward correction can be performed.o

In each of the above embodiments, only one switch is shown and described.However, after selecting the correction mode with another switch, the switch described above is pressed. It is clear that the configuration may be modified for the first time. Industrial applicability

As described above, the electronic timepiece according to the present invention includes the correction prohibition unit that prohibits the operation of the display correction unit based on the output of the voltage detection unit, and prohibits the electromagnetic correction when the voltage of the power storage unit drops, and minimizes the voltage drop. At the same time, the correction prohibition means prevents the operation of the display correction means from being prohibited even if the voltage detection means outputs a detection signal during the operation of the display correction means, and continues until the user completes the electromagnetic correction. To make sure that the time is correct. It can be widely used as a useful watch itself and as a watch for portable devices.

Claims

The scope of the claims

1. An electronic timepiece including a power supply, an external operation switch, and a display correction unit that corrects and drives the time display unit by operating the external operation switch.

Voltage detecting means for detecting that the voltage of the power supply is equal to or lower than a predetermined value and outputting a detection signal;

An electronic timepiece comprising: a correction prohibition unit that prohibits the operation of the display correction unit based on the detection signal of the pressure detection unit except during the operation of the display correction unit.

2. The electronic timepiece according to claim 1, further comprising a counter for starting time counting after the operation of the external operation switch is completed and controlling the operation of the correction prohibiting means. '

3. A switch signal generating means for outputting different control signals to the display correcting means based on the short-time operation and the long-time operation of the external operation switch is provided, and a control signal based on the long-time operation is provided. 2. The electronic timepiece according to claim 1, wherein the correction prohibiting means is controlled.

4. A switch signal generating means for outputting different control signals to the display correcting means based on the short-time operation and the long-time operation of the external operation switch is provided, and a control signal based on the long-time operation is provided. 3. The electronic timepiece according to claim 2, wherein the counting is controlled.

5. The electronic timepiece according to claim 4, wherein the counter is reset at a timing when the output of the control signal based on the long-time operation is stopped, and the counting is started. .

6. The electronic timepiece according to any one of claims 1 to 5, further comprising power generation means, wherein the power supply is power storage means for storing power output from the power generation means.

7. The electronic timepiece according to any one of claims 1 to 6, wherein the time display means is a hand, and the display correction means is a hand driving means for driving the pointer.