WO2003041236A1

WO2003041236A1 - Surge protecting semiconductor device

Info

Publication number: WO2003041236A1
Application number: PCT/JP2002/011579
Authority: WO
Inventors: Ritsuo Oka
Original assignee: Shindengen Electric Manufacturing Co., Ltd.
Priority date: 2001-11-07
Filing date: 2002-11-06
Publication date: 2003-05-15
Also published as: JPWO2003041236A1; JP4369231B2

Abstract

Two buried structure type pnpn thyristors (Thy1, Thy2) and four pn diodes (D1, D2, D3, D4) are formed in a first conductivity type semiconductor substrate by the thermal diffusion process. Each constituent section is separated into five regions (Thy1 region, Thy2 region, D1.D2 region, D3 region, D4 region). A balance type surge protecting circuit is made monolithic on the substrate by surface metal wirings to constitute a surge protecting semiconductor device.

Description

Specification

Surge protection semiconductor device

Technical field

The present invention relates to a semiconductor surge protection device structure for protecting a communication device circuit system from overvoltage and overcurrent such as lightning surge and switching surge.

Background art

Such a surge protector manufactured by a conventional method is disclosed in US Pat. No. 5,781,392. However, although this prior art device is intended for balanced operation between two wires, it is actually a pnpn series that operates every two wires in response to lightning surges that enter in-phase. Even though the star element is formed on the same substrate, it basically passes through another element, so that there remains a problem that unbalance occurs especially during short pulse surge operation and when a surge is applied in a low temperature state.

Therefore, in the event of in-phase surge intrusion such as a lightning surge that intrudes into the two wires, the pn P11 type surge protection element that operates is the same element, so a balanced circuit that guarantees complete balance operation is realized on the same semiconductor substrate. That is, it has been desired to realize a monolithic structure.

In addition, in high-frequency transmission circuits, it is required that the capacitance applied to the line be small in order to reduce transmission loss. The purpose of the present invention is to use the same circuit as that in which balanced operation is guaranteed. An object of the present invention is to provide a monolithic surge protection semiconductor device formed in a semiconductor substrate. Another object of the present invention is to provide a surge protection semiconductor device having a small capacitance.

Another object of the present invention is to provide a compact and long-life surge protection semiconductor device.

Disclosure of the invention

The monolithic surge protection semiconductor device includes a semiconductor substrate of a first conductivity type having a first surface and a second surface, and a semiconductor substrate extending from the first surface to the second surface. First and second thyristor element regions adjacent to each other, which are made of a semiconductor substrate; first and second diode element regions adjacent to the first thyristor element region; A second conductive type isolation region defining a third diode element region adjacent to the lister element region and a fourth diode element region adjacent to the third diode element region; Forming a first thyristor element region from the second surface in each of the first and second thyristor element regions; and forming a first thyristor element region between the first and second thyristor element regions. The isolation region and the second thyristor element A first and a second anode region of the second conductivity type provided so as to be continuous with the isolation region between the region and the third diode element region, respectively; From the surface of the first and second thyristor element regions to the first and second base regions of the second conductivity type, respectively, and the first and second base regions, respectively. A first and a second thyristor element including the first conductive type emitter region formed and formed; and a first and a second diode element region from the first surface. The second conductive formed First and second diode elements having first and second anode regions of a first type and a common force source region of the first conductivity type; and a third diode element from the first surface. A third diode element having an anode region of the second conductivity type formed in the diode element region and a cathode region of the first conductivity type; and a third diode element formed from the first surface. A fourth diode element having an anode region of the second conductivity type formed in the fourth diode element region and a force source region of the first conductivity type. .

BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a sectional view showing a surge protection semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a diagram for explaining a used circuit including an equivalent circuit (within a dashed line) of the surge protection semiconductor device according to the present invention.

FIG. 3 is a sectional view showing a surge protection semiconductor device according to a second embodiment of the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

FIG. 1 is a sectional view showing a surge protection semiconductor device 10 according to the first embodiment, and FIG. 2 is a circuit used including an equivalent circuit thereof (within a dashed line).

That is, the p-type impurity is selectively diffused from both sides of the n-type semiconductor substrate 11 having the first and second surfaces, and the p-type isolation region 40 and the two isolated thyristor elements are separated. The p-type regions 41 and 42 serving as node regions are formed. The n − type semiconductor substrate 11 is separated into a plurality of element regions by the separation region 40. That is, a plurality of n-types extending from the first surface to the second surface The element region 43-45 made of the semiconductor substrate and the n-type regions 46 and 47 of the adjacent thyristor elements Thy1 and Thy2 are separated.

In this case, the p-type anode regions 41 and 42 of the thyristor elements Thy 1 and 2 have! ) The thyristor elements Thy 1 and 2 are connected to the mold separation region 40, respectively, and are arranged so as to be symmetrical with respect to the separation region 40 interposed therebetween.

In these n-type element regions 46 and 47, n-type buried layers 32 having an impurity concentration higher than that of the semiconductor substrate are formed from the first surface, respectively. After forming the mold base region, a plurality of n ⁺ -type emitter layers are formed to form two adjacent thyristor elements T hy1 and T 2 separated from each other.

P-type and n-type impurities are diffused from the first surface in each of the element regions 43 to 45 to form an anode region and a force source region. Electrodes are provided in these anode and cathode regions to form horizontal diode elements D 1 to D 4. Further, thyristor elements Thy1 and Thy2 are formed by providing electrodes in each of the _n + -type emitter layers and the anode region.

In FIG. 1, 10 is a semiconductor chip, 12, 13, 14, 14, 15, 16, 17, 18, 18, 19, 20, 21 and 22 are metal electrodes, 23, and 24 and 25 are metal electrode terminals, and 30 and 31 are insulating films of silicon dioxide or the like. The buried diffusion layer 32 has the same conductivity type as the semiconductor substrate and has an impurity concentration slightly higher than the substrate concentration. You.

The first thyristor element Thy1 is shown between the metal electrodes 14 and 15, and the second thyristor element Thy2 is shown between the metal electrodes 17 and 18.

First to fourth diode elements D 1 D 2, D 3, D 4 between metal electrodes 1 2 to 13, 16 to 13, 19 to 20 and 21 to 22, respectively Is shown.

The connection relationship of the metal wiring on the surface of the semiconductor substrate is such that the first metal electrode terminal 23 has the anode-side metal electrode 12 of the first diode element D 1 and the third diode. The cathode-side metal electrode 20 of the element D 3 is connected, and the anode-side metal electrode 16 of the second diode element D 2 and the fourth diode are connected to the second metal electrode terminal 24. The force-side metal electrode 22 of the diode element D 4 is connected to the third electrode terminal 25, and the force-side metal electrode 15 of the first thyristor element T hy1 and the second metal terminal 22 are connected to the third electrode terminal 25. The anode side metal electrode 17 of the thyristor element T hy2 is connected, and the force side metal electrode 13 of the first and second diode elements D 1 and D 2 is connected to the first side electrode. The third and fourth diode elements D 3 and D 4 are connected to the anode side metal electrode 14 of the lister element T hy 1, and the anode sides 19 and 21 of the third and fourth diode elements D 4 are connected to the second side. Re It connected binding line data element T h y 2 forces saw de-metal electrode 1 8. As a result, a monolithic surge protection semiconductor device in which the balanced surge protection circuit shown in the dashed line in FIG. 2 is formed on one substrate is obtained.

As surge protection semiconductor devices, first and second thyristor elements T hy1, 2 and first to fourth diode elements D 1 — By forming D 4 as described above and connecting the electrodes, it is possible to achieve excellent balance and to reduce the capacitance.

In this embodiment, since the metal electrodes of the thyristor element T hy1 and the diode elements D1 and D4 are arranged on the first surface of the semiconductor substrate, they are mounted. In this case, the wiring process becomes easy.

The forward breakdown voltages of the first thyristor element T hy1 and the second thyristor element T hy2 are changed from the first to fourth diode elements Dl, D2, D3. , The breakdown voltage of D 4 may be set lower than the method of using the buried structure type thyristor structure having the buried diffusion layer 32 as described above; For example, a method may be used in which the diffusion depth of the thyristor element is made shallower than the diffusion depth of the die anode.

Also, as a primary protection application example in a communication line, the withstand voltage of the thyristor T hy1 is determined by the buried layer 32, but is determined to be 230 V, 290 V, 310 V, 350 V or the like is required, and the diode breakdown voltage is required to be higher, for example, 800 V or the like.

FIG. 2 is a circuit diagram including an equivalent circuit (within a dashed line) of the surge protection semiconductor device according to the present invention.

Lines L 1 and L 2 indicate signal lines, and S indicates a protected circuit unit such as a communication device. The metal electrode terminal 23 is connected to L1, the metal electrode terminal 24 is connected to L2, and the metal electrode terminal 25 is connected to the ground line. In the normal state of the signal line, the signal line and ground are insulated. The surge that has invaded is also voltage-clamped via the first diode element D1 or the second diode element D2, and then via the first thyristor element Thy1. Is grounded, and the protected circuit section S is protected from overvoltage surge and overcurrent surge. When an overvoltage or overcurrent such as a lightning surge with a negative electrode occurs, the surge that has entered either L1 or L2 passes through the third diode element D3 or the fourth diode element D4. Then, the voltage is clamped via the second thyristor element T hy2, the overcurrent is grounded, and the protected circuit portion S is protected from overvoltage surge and overcurrent surge.

That is, in a normal state, the protection element portion shown in the one-dot chain line is off because the applied voltage value is equal to or less than the breakdown voltage value of the thyristors T hy1 and Thy ² , and the communication signal current is protected. Flow to circuit S.

When a positive surge enters from the signal lines L 1 and L 2, T y 1 becomes conductive due to the surge voltage, and the surge current becomes

(1) During the L1 intrusion route, grounded through the route of 23 → Dl → Thyl → 25 → GND,

(2) During the L2 intrusion route, it is grounded through the route of 24 → D2 → Thyl → 25 → GND.

In the case of reverse polarity surge,

(3) For the L1 entry route, 23 → D3 → Thy2 → 2 5 → Grounded via the path of GND,

(4) With respect to the L2 intrusion route, it is grounded through the route of 24 → D4 → Thy2 → 25 → GND. .

FIG. 3 is a sectional view showing a surge protection semiconductor device according to a second embodiment of the present invention. In FIG. 3, the same parts are given the same reference numbers as in FIG.

The first and second thyristor elements T hy1 and T hy 1 and 2 have a vertical element structure in consideration of surge withstand capability and the like, and the first and second thyristor elements T hy 1 And 2 are formed symmetrically to the left and right with respect to the separation region 40 interposed therebetween, and the third metal electrode terminal 25 is provided on the second surface. Others are the same as Fig.1. In this case, the other diode elements D1 to D4 can also have a vertical element structure.

Further, in this embodiment, since the thyristor elements T hy1 and T hy2 have a vertical element structure, it is possible to obtain a surge protection semiconductor device with increased surge withstand capability. You.

Industrial applicability

And when to configure a balanced surge protection circuit, p _n of pn service I Li is te buried structure type cormorants by sharing the separation layer and Ano de diffusion layer of the element P n 11 reuse static elements and p 11 Since the diode elements are monolithically configured on the same semiconductor chip, the chip area is reduced, and a compact, highly reliable surge protection semiconductor device with excellent balance and small capacitance is obtained. Be

Claims

The scope of the claims

1. A semiconductor substrate of a first conductivity type having a first surface and a second surface;

First and second thyristor element regions extending from the first surface to the second surface and adjacent to each other and formed of the semiconductor substrate; and First and second diode element regions; a third diode element region adjacent to the second thyristor element region; and a fourth diode element region adjacent to the third diode element region. A second conductivity type isolation region that respectively defines a diode element region of

The first and second thyristor element regions are formed from the second surface in the first and second thyristor element regions, respectively, and are formed between the first and second thyristor element regions and the first and second diode element regions. The first and second conductive type first and second regions are provided so as to be continuous with the isolation region and the isolation region between the second thyristor element region and the third diode element region, respectively. A second anode region; first and second base regions of a second conductivity type formed in the first and second thyristor element regions from the first surface, respectively; A first and a second thyristor element including the first conductivity type emitter region formed in a first and a second base region, respectively;

The first and second diode element regions are formed from the first surface in the first and second diode element regions, and are common to the first and second anode regions of the second conductivity type and the first conductivity type. First and second diode elements having A third diode element formed in the third diode element region from the first surface and having an anode region of the second conductivity type and a force source region of the first conductivity type;

A fourth diode element formed in the fourth diode element region from the first surface, the fourth diode element having an anode region of the second conductivity type and a force source region of the first conductivity type. When,

A surge protection semiconductor device comprising:

2. The surge protection semiconductor device according to claim 1, wherein the second surface is covered with an insulating film.

3. The surge protection semiconductor device according to claim 1, wherein the anode electrodes of the first and second thyristor elements are respectively provided in adjacent isolation regions.

4. The first and second thyristor elements, and the first to fourth diode elements are each a horizontal type having the anode and the cathode electrode formed on the first surface, respectively. 2. The surge protection semiconductor device according to claim 1, having a structure.

5. The surge protection semiconductor device according to claim 1, wherein the first and second thyristor elements are formed symmetrically with respect to the isolation region interposed therebetween.

6. It has first, second, and third metal terminals, and the first metal electrode terminal has an anode electrode of the first diode element and the third diode. A cathode electrode of the element; a second metal electrode terminal connected to an anode electrode of the second diode element and a force electrode of the fourth diode element; 3 The electrode terminal is connected to the cathode of the first thyristor element. A first electrode and a node electrode of the second thyristor element are connected to each other, and a common cathode electrode of the first and second diode elements is connected to the first thyristor element. 2. The anode electrode of the third and fourth diode elements is connected to an anode electrode of the element, and the anode electrode of the third and fourth diode elements is connected to a force source electrode of the second thyristor element. Surge protection semiconductor device.

7. The surge protection semiconductor device according to claim 1, wherein a forward breakdown voltage of the first and second thyristor elements is set lower than a breakdown voltage of the first to fourth diode elements. .

8. A semiconductor substrate of a first conductivity type having a first surface and a second surface;

First and second thyristor element regions extending from the first surface to the second surface and adjacent to each other and formed of the semiconductor substrate; and First and second diode element regions, a third diode element region adjacent to the second thyristor element region, and a fourth diode element region adjacent to the third diode element region A second conductivity type isolation region that respectively defines a diode element region of

An isolation region formed in the first thyristor element region from the first surface and between the first thyristor element region and the first and second diode element regions; A first anode region of the second conductivity type provided so as to be continuous with the first conduction region, and a first anode region of the second conductivity type formed in the first thyristor element region from the second surface. A first region including a first base region and an emitter region of the first conductivity type formed in the first base region. A lister element,

The second thyristor element region is formed from the second surface to be continuous with the isolation region between the second thyristor element region and the third diode element region. A second anode region of the second conductivity type provided; a second base region of the second conductivity type formed from the first surface to the second thyristor element region; A second thyristor element including the first conductivity type emitter region formed in the second base region;

A common force of the first and second anode regions of the second conductivity type formed in the first and second diode element regions from the first surface and a common force of the first conductivity type First and second diode elements having a source region; and

A third diode element having an anode region of the second conductivity type formed in the third diode element region from the first surface and a force source region of the first conductivity type;

A fourth diode having an anode region of the second conductivity type formed in the fourth diode element region from the first surface and a force source region of the first conductivity type. Element and

A surge protection semiconductor device comprising:

9. The first thyristor element has a vertical structure in which an anode electrode is formed on the first surface and a force source electrode is formed on the second surface. The second thyristor element has a vertical structure in which the force source electrode is formed on the first surface, and the anode electrode is formed on the second surface. The surge protection semiconductor device according to claim 8.

10. It has first, second and third metal terminals, and the first metal electrode terminal has an anode electrode of the first diode element and a force of the third diode element. The second metal electrode terminal is connected to the anode electrode of the second diode element and the force electrode of the fourth diode element. A third electrode terminal is connected to a force source electrode of the first thyristor element and an anode electrode of the second thyristor element, and is commonly used for the first and second diode elements. The force source electrode is connected to the anode electrode of the first thyristor element, and the anode electrodes of the third and fourth diode elements are connected to the anode of the second thyristor element. 9. The surge protection semiconductor device according to claim 8, which is connected to a source electrode.

11. The surge protection semiconductor device according to claim 8, wherein the first and second thyristor elements are formed so as to be diagonally symmetric with respect to the separation region interposed therebetween.

12. The surge protection semiconductor device according to claim 8, wherein a forward breakdown voltage of the first and second thyristor elements is set lower than a breakdown voltage of the first to fourth diode elements.