WO2003021656A3 - Materiau ameliore destine a etre utilise avec des materiaux ferroelectriques - Google Patents

Materiau ameliore destine a etre utilise avec des materiaux ferroelectriques Download PDF

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Publication number
WO2003021656A3
WO2003021656A3 PCT/EP2002/009259 EP0209259W WO03021656A3 WO 2003021656 A3 WO2003021656 A3 WO 2003021656A3 EP 0209259 W EP0209259 W EP 0209259W WO 03021656 A3 WO03021656 A3 WO 03021656A3
Authority
WO
WIPO (PCT)
Prior art keywords
tio2
sro
ferroelectrics
improved material
pzt
Prior art date
Application number
PCT/EP2002/009259
Other languages
English (en)
Other versions
WO2003021656A2 (fr
Inventor
Rainer Bruchhaus
Original Assignee
Infineon Technologies Ag
Rainer Bruchhaus
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Rainer Bruchhaus filed Critical Infineon Technologies Ag
Publication of WO2003021656A2 publication Critical patent/WO2003021656A2/fr
Publication of WO2003021656A3 publication Critical patent/WO2003021656A3/fr

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02356Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment to change the morphology of the insulating layer, e.g. transformation of an amorphous layer into a crystalline layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/55Capacitors with a dielectric comprising a perovskite structure material
    • H01L28/56Capacitors with a dielectric comprising a perovskite structure material the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • H01L28/75Electrodes comprising two or more layers, e.g. comprising a barrier layer and a metal layer

Abstract

La présente invention concerne une couche de revêtement comprenant de l'oxyde de ruthénium et de strontium enrichi d'oxyde de titanium. Le revêtement d'oxyde de ruthénium et de strontium enrichi d'oxyde de titanium améliore la fiabilité de matériaux ferroélectriques tels que le titanate zirconate de plomb sans affecter ou dégrader les propriétés ferroélectriques du titanate zirconate de plomb. Dans un mode de réalisation, l'oxyde de ruthénium et de strontium enrichi d'oxyde de titanium est pulvérisé à l'aide d'une cible d'oxyde de ruthénium et de strontium dopée avec de 1 à 10 % d'oxyde de titanium.
PCT/EP2002/009259 2001-08-31 2002-08-19 Materiau ameliore destine a etre utilise avec des materiaux ferroelectriques WO2003021656A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US94491801A 2001-08-31 2001-08-31
US09/944,918 2001-08-31

Publications (2)

Publication Number Publication Date
WO2003021656A2 WO2003021656A2 (fr) 2003-03-13
WO2003021656A3 true WO2003021656A3 (fr) 2003-11-20

Family

ID=25482286

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2002/009259 WO2003021656A2 (fr) 2001-08-31 2002-08-19 Materiau ameliore destine a etre utilise avec des materiaux ferroelectriques

Country Status (2)

Country Link
TW (1) TW558726B (fr)
WO (1) WO2003021656A2 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7129196B2 (en) * 2003-07-21 2006-10-31 Los Alamos National Security, Llc Buffer layer for thin film structures
JP2005108876A (ja) * 2003-09-26 2005-04-21 Toshiba Corp 半導体装置及びその製造方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6096434A (en) * 1997-06-30 2000-08-01 Tdk Corporation Film structure, electronic device, recording medium, and method for forming conductive oxide thin films
US6128178A (en) * 1998-07-20 2000-10-03 International Business Machines Corporation Very thin film capacitor for dynamic random access memory (DRAM)
US6194228B1 (en) * 1997-10-22 2001-02-27 Fujitsu Limited Electronic device having perovskite-type oxide film, production thereof, and ferroelectric capacitor
US6218233B1 (en) * 1997-11-04 2001-04-17 Nec Corporation Thin film capacitor having an improved bottom electrode and method of forming the same
US20010007364A1 (en) * 2000-01-12 2001-07-12 Fujitsu Limited Semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6096434A (en) * 1997-06-30 2000-08-01 Tdk Corporation Film structure, electronic device, recording medium, and method for forming conductive oxide thin films
US6194228B1 (en) * 1997-10-22 2001-02-27 Fujitsu Limited Electronic device having perovskite-type oxide film, production thereof, and ferroelectric capacitor
US6218233B1 (en) * 1997-11-04 2001-04-17 Nec Corporation Thin film capacitor having an improved bottom electrode and method of forming the same
US6128178A (en) * 1998-07-20 2000-10-03 International Business Machines Corporation Very thin film capacitor for dynamic random access memory (DRAM)
US20010007364A1 (en) * 2000-01-12 2001-07-12 Fujitsu Limited Semiconductor device

Also Published As

Publication number Publication date
WO2003021656A2 (fr) 2003-03-13
TW558726B (en) 2003-10-21

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