WO2003019793A2 - Maximum likelihood detector - Google Patents

Maximum likelihood detector Download PDF

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WO2003019793A2
WO2003019793A2 PCT/EP2002/009443 EP0209443W WO03019793A2 WO 2003019793 A2 WO2003019793 A2 WO 2003019793A2 EP 0209443 W EP0209443 W EP 0209443W WO 03019793 A2 WO03019793 A2 WO 03019793A2
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merge
delk
maximum likelihood
delκ
likelihood detector
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PCT/EP2002/009443
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French (fr)
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WO2003019793A3 (en
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Alexander Kravtchenko
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Thomson Licensing S.A.
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63Joint error correction and other techniques
    • H03M13/6343Error control coding in combination with techniques for partial response channels, e.g. recording
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors

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  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Error Detection And Correction (AREA)

Abstract

The present invention relates to a method and an apparatus to transform a signal received from a channel into a binary code sequence, and more particularly to a signal processing apparatus, which can perform the maximum likelihood detec-tion of the reproduced data from an optical disk.A new algorithm is used, which has shown to be both, more precise than the known solution and independent of signal amplitudes.This procedure has the advantage that no selective amplifi-cation is necessary for Maximum Likelihood Detection.The general idea of the invention is described as follows:- known algorithms only work properly if (value >1), but not if the (value <1)- according to the invention: in case that (value <1), in-vert conditions are required- this will lead to correct results for value ><1 and sometimes to a wrong 'first' result, which has no criti-cal influence.

Description

Maximum likelihood detector
Field of the invention
The present invention relates to the field of signal processing, and in particular, to a maximum likelihood detector for Viterbi detection.
Background and prior art
Communication of voice and data signals is often accomplished by converting analog signals to digital signals. These digital signals are then transmitted from a transmitting device to a receiving device, converted back to analog, if necessary, and communicated to a user. This digital transmission is often performed through analog channels. Digital information is transmitted in the form of a "symbol" representing a digital value. In some cases, adjacent sym- i bols can overlap, resulting in a phenomenon known as inter- symbol interference. This interference can corrupt a digital transmission, leading to errors in the receipt of the digital information.
The same problem occurs when digital data is read from a re- cording medium, such as an optical disc.
In a recording channel, a method for decoding the binary symbol sequence that is outputted from the channel in its corrupted form is required. Maximum-likelihood sequence es- timation (MLSE) decoding has been employed in the past as an effective tool in pulse detectors for receiving and decoding digital transmissions that suffer from intersymbol interference.
Using partial response signaling allows a better handling of intersymbol interference and allows a more efficient utili-
C0NFIRMAT10N COPY zation of the bandwidth of a given channel . In partial response systems, a controlled amount of intersymbol interference can be allowed. The partial response system is described by the polynomials 1+D, 1-D and (1-D2) , also called duobinary, dicode, and class-IV, respectively.
Class IV partial response waveforms are formed by the subtraction of binary waveforms two bit intervals apart. This process boosts midband frequencies making the system more immune to noise and distortion at both high and low frequencies. This is especially useful in a magnetic recording channel where, using a conventional inductive head, there is little signal at low frequencies and spacing losses can cause large attenuation at high frequencies.
Because class IV partial response signaling for digital detection is especially suited for the magnetic recording channel, sampled amplitude detection can be applied for magnetic recording. To minimize the propagation of data errors, the signal is turned into a sequence of binary numbers. Procedures for determining the maximum likelihood sequence in the presence of noise can then be applied. With sequence detection, sequences of bits are detected and processed to minimize error.
Maximum likelihood sequence estimation, in particular, the Viterbi algorithm, is used in improving the detection of symbol (pulse) sequences in the presence of noise and intersymbol interference. MLSE is described by G.D. Forney in "The Viterbi Algorithm," Proceedings of the IEEE, Vol. 61,
No. 3, March, 1973, pp. 268-278, and by R. W. Wood, etc., in "Viterbi Detection of Class IV Partial Response on a Magnetic Recording Channel," IEEE transactions on communications, Vol. COM-34, No. 5, May, 1986, pp. 454-461.
One of the earliest references (Kobayashi , "Application of Probabilistic Decoding to Digital Magnetic Recording Systems, " IBM journal of Research and Development, Vol. 15, No. 1, January 1971, pp. 64-74) to the use of the Viterbi algorithm on the intersymbol interference problem was related to Class IV Partial Response on the Magnetic Recording Channel. In essence, the algorithm provides an iterative method of determining the "best" route along the branches of a trellis .
If, for each branch, a "metric" is calculated which corresponds to the logarithm of the probability of that branch, then the Viterbi algorithm can be used to determine the path which accumulates the highest log probability, i.e., the maximum likelihood sequence. In essence, given a received sequence (aa) where n is an integer time index, choose from among all possible transmitted sequences (bn) the one which is most likely to cause (an) to be received, i.e., choose (bn) to maximize P ( (an) | (bn) ) .
With the Viterbi algorithm, data is not decoded as soon as it is received. Instead, a sequence of data, having a predetermined coding depth following the digit to be decoded, is first collected. Then, by computing the path metrics, a limited number of possible messages are selected, each extend- ing throughout the decoding depth far beyond the digit presently to be decoded, with one such survivor sequence ending in each of the data states.
The correlation between each survivor sequence and the data actually received is computed for the entire decoding depth under consideration. The highest correlated of the survivor sequences is selected to be the sole survivor sequence. The earliest of the received digital digits within the decoding depth is then permanently decoded under the temporary as- sumption that the sole survivor sequence is the correct sequence . The MLSE problem is similar to the problem of finding the shortest route through a certain graph. The Viterbi algorithm arises as a natural recursive solution. This algorithm is often associated with a state diagram which can be illustrated by a trellis. In a two-state trellis, each node represents a distinct state at a given time, and each branch represents a transition to some new state at the next instant of time.
Partial response class IV waveforms can be considered as two independent interleaved dicode (1-D) sequences and each sequence can be decoded independently. In his paper entitled "Optimal Reception for Binary Partial Response Channels", in The Bell System Technical Journal, volume 51, number 2, pp. 493-505, published in February 1972, M. J. Ferguson proposes a simplified method for Viterbi detection for binary partial response channels (e.g. 1-D).
Straightforward Viterbi detection needs to keep track of both probabilities going into the two states, and the ranges of the probabilities are not bounded. Ferguson's method only needs to keep track of the difference between the two probabilities and the value of the difference is well-bounded.
Two prior art examples of applying the Viterbi algorithm for decoding magnetic recording channel outputs are U.S. Pat. No. 4,644,564 by Dolivo et al . and U.S. Pat. No. 4,087,787 by Acampora. Dolivo et al . disclose a method that uses two survivor sequences and the difference metric between the two metrics is processed. In Dolivo et al . , as each sample is received, the prior art patent recursively determines the new pair of survivor sequences and the new difference metric. Dolivo et al . is implemented in a digital format that suffers in terms of speed and requires more electronics to implement. Furthermore, resetting of the voltage signals does not occur automatically as is desired.
US patent no. 5,917,859 shows a Viterbi detector for use in a partial-response maximum-likelihood (PRML) channel. A sam- pled data Viterbi detector compares a sampled analog input signal with two threshold signals. The binary outputs of the comparing means are then provided to a survival sequence register, as well as being used to formulate new threshold signals for the subsequent input sample. The hardware imple- ments Ferguson's method for calculating sequence metrics by representing the accumulated metric difference as two threshold signals.
Another method and hardware architecture for implementing this technique have been described in "A PRML DETECTOR FOR A DVDR SYSTEM", IEEE Transactions On Consumer Electronics, Vol. 45, No. 2, MAY 1999. This method requires the recalculation of the threshold level "1" depending on the signal amplitude, the automatic gain control (AGC) and adaptive equalizer.
A known solution of the Viterbi detector (VD) applied to target (1+D) partial response has been described in "Digital Baseband Transmission and Recording" (Solutions Manual to Accompany, pp. 61) by J. W. M. Bergmans, 1998.
This solution is: 1. Difference metrics
The VD has two states s. and s+ with their associated path metrics λκ+ and λκ_. The corresponding trellis diagram is shown in Fig.. 1.
There are 4 branches with metrics βκ4.+, βκ-+, βκ—, βκ+- The surviving path toSκ+ι_is determined by comparing the metrics of the completing paths via sκ_ and sκ+, i.e. λκ+ι - = min (λκ- + PK- - , λκ+ + βκ→-) ( 1 )
A similar comparison occurs for state ΞK+I +
λκ+ = min (λκ_ + PKH., λκ+ + βκ++) . (2 )
What is of interest in these comparisons, is the largest metric. Thus, only the difference between metrics is of con- cern. In order to exploit this fact, the difference path metric was defined
delκ = ( λκ_) - (λκ+), (3)
along with metric increments
Qκ+1 _ =(λκ+ι _) - (λκ+) ( 4 ) and
Figure imgf000007_0001
It is easy to express (1) and (2) in terms of these quantities upon subtracting λκ+ from the left and right hand sides, The result is
Qκ+ι_ =min (delκ + βκ--, βκ+-) (6) QK+i+ =min (delκ + βκ-+, βκ++) (V)
As expected, the absolute values of λκ+ and λκ_ will not be taken into consideration. Furthermore, subtraction of both minima yields the new difference path metric:
Q +ι- - Qκ+ι+ = (λκ+ι- - λκ+) - (λκ+ι+ - λκ+) = delκ+1 ( 8 )
In summary, based on the old difference path metric delκ and branch metrics βκ++, ..., βκ--5 survivors for time κ+1 can be determined, according to (6) and (7) .
These comparisons further yield minima Qκ+ι- and Qκ+ι+ -, whose difference determines the new difference path metric delκ+1.
Thus, the entire detection process is cast in terms of a single difference metric, as opposed to two metrics λκ+ and λκ- in the standard VD.
Consequently, difference path metrics can be used for any two-state VD.
A simplification is possible for the (1+D) partial response channel by exploiting the simple structure of partial response branch metrics .
This will lead to Ferguson's algorithm. VD has input
Zκ=Xκ+γκ, where
Figure imgf000008_0001
and γκ is noise.
In the trellis diagram of Fig. -2 the transitions between the states are noted with their corresponding values of noiseless channel output x.
For a (1+D) channel there are the following branch metrics βκ__ =[zκ+2]2, βκ-+= βκ+- — Zκ and βκ++=[zκ-2]2. There are three possible path extensions:
1. Negative merge (m-) : This occurs when delκ + βκ-+ <del + + and delκ + βκ < βκ+-, i . e . when del < -4zκ+4 and delκ < -4zκ-4.
The latter condition is the strongest.
The new difference metric (8) amounts to delκ+1 = (λκ+ι _) - (λκ+ι +) = (λκ_ + βκ_) - (λκ_ + βκ→.)
= 4zκ+4 (9)
2. Cross-over (rax) : This occurs when del + βκ-+ < βκ++ and delκ+βκ__ > βκ+_, i.e. when delκ < -4zκ+4 and delκ > -4zκ-4.
The new difference metric is delκ+1 = (λκ+ι _) - (λκ+1 +)
= (λκ+ + βκ+-)-(λκ_ + βκ-
= λκ+ — λκ-
= -delκ (10) 3. Positive merge (m+) : This occurs when delκ + βκ_+κ++ and delκ+βκ— >βκ+-, i . e . when delκ > -4zκ+4 and delκ > -4zκ-4.
The former condition is strongest.
The new difference metric (8) amounts to delκ+1 = (λκ+ι _) - (λκ+ι +)
— (λκ+ + βκ+-) — (λκ+ + βκ++)
= 4zκ-4. (11)
It is obviously convenient to record and update delκ' = delκ/4.
The required actions are summarized in the algorithm:
If(delκ' < -zκ-l) then delκ+1' = zκ+l (m-) else if((delκ'< -zκ+l) and (delκ' > -zκ-l) ) then del +l'= -delκ' (mx) else if (delκ' > -zκ+l) then delκ+1' = zκ-l (m+)
We will consider a few examples by using this algorithm.
Example 1
The following input sequence (zκ) is to be detected: -1, 7, 10, 10, 7, 1, -6, -6, -1, 7. The original conditions : a) "1" is equal to 5 (threshold) , b) del0=0;
Figure imgf000011_0001
Table 1 Example 2
The following input sequence (zκ) is to be detected: -1, 5, 8, 8, 5, 1, -4, -4, -1, 5.
The original conditions: a) "1" is equal to 5 (threshold) , b) del0=0; stepl : -zκ_1=l-5=-4 0>-4
-zκ+1=l+5=6 0<6 dell' =-del0'=0 (mx) step2 : -zκ_1=-5-5=-10 0<-lD no m-, m+, mx
-zκ+1=-5+5=0 0>0 conditions, detection error. step3 : -zκ_1=-8-5=-12 0<-12
-zκ+1=-8+5=-3 0>-3 del3' =zκ_1=8- (m+) 5=3 step4 : -zκ_1=-8-5=-12 3<-12
-zκ+ι=-8+5=-3 3>-3 del4' =zk-l=8- (m+) 5=3 step5 : -zκ_1=-5-5=-10 3<-10
-zκ+1=-5+5=0 3>0 del5' =zk-l=5- (m+) 5=0 stepβ : -zκ_1=-l-5=-6 0>-6
-zκ+1=-l+5=4 0<4 del6' =-del5'=0 (mx) step7 : -zκ_ι=4-5=-l 0>-l del7' =-dl6'=0 (mx) wrong calcu¬
-zκ+1=4+5=9 0<9 lation of merge, must to be m-, detection error. step8 : -zκ_1=4-5=-l 0>-ll del8' =-del7=0 (mx) wrong cal¬
-zκ+1=4+5=9 0<9 culation of merge, must to be m-, detection error. step9 : -zκ_1=l-5=-4 0>-4
-zκ+1=l+5=6 0<6 del9' =-del8'=0 (mx)
Figure imgf000013_0001
Table 2 The analysis of the example 1 and the example 2 shows the following:
1. The algorithm calculates a merges right, if input values |zκ|>"l" (see Fig. 3).
2. The algorithm calculates a merges wrong or does the detection error (failure of detection) , if input values
I zκ|<="l" (see Fig. 4) .
10
For correct calculations of a merges "1" level must be decreased (recalculation of the threshold level "1") . If the "1" level is put to 3 ("1"=3) (in example 2) the algorithm will compute correct merges.
15 Generally, we can say that the algorithm is depending on the signal amplitude. For example, the 3T pattern in the input signal (DVD or CD) has the little amplitudes and the "1" level must be always adjusted to 3T pattern amplitudes. Disadvantage of this algorithm is the dependence on the thresh¬
20 old level *1" .
In order to avoid the reduction of the detection performance the wl" level must be adjusted to a little amplitude in the signal .
25 It is therefore an object of the present invention to provide an improved method and apparatus for maximum likelihood detection. Summary of the invention
The present invention provides for an improved method an apparatus for maximum likelihood detection as set forth in the respective independent claims. Preferred embodiments of the invention are given in the dependent claims.
In essence, the invention enables to calculate the merges independently from the threshold level "1" in signal. This is especially useful for viterby detection applied to target partial response (1+D) .
The present invention is particularly advantageous in that it enables to avoid the requirement of using the automatic game control (AGC) , an adaptive equalizer or the recalculation of the threshold level "1" depending on a signal amplitude.
Preferred applications of the invention include audio, video and in particular CD and DVD applications to improve the detection of data.
The general idea of the invention is to develop a method and an apparatus of the VD applied to target partial response (1+D) , especially for the merge calculation unit, that calculates the merges independent of the threshold level "1" of the signal .
According to the invention a new algorithm is used, which has shown to be both, more precise than the known solution and independent of signal amplitudes.
This procedure has the advantage that no selective amplifi- cation is necessary for Maximum Likelihood Detection.
The general idea of the invention is described as follows:
- known algorithms only work properly if (value >1) , but not if the (value <1)
- according to the invention: in case that (value <1) , invert conditions are required
- afterwards : invert result this will lead to: - correct results for value ^1 sometimes a wrong "first" result, which has no critical influence.
Brief description of the drawings
In the following preferred embodiments of the invention will be described in greater detail by making reference to the drawings in which:
FIG 1 is a trellis diagram of different matrix,
FIG 2 is a trellis diagram of the transitions between the states with their corresponding values of noiseless channel output,
FIG 3 is illustrative of the correct calculation of a merges, if input values |zκ|>"l" ,
FIG 4 is illustrative of the calculation of a merges, if input values |zκl<="l", FIG 5 is a block diagram of a ML detector apparatus,
FIG 6 is a block diagram of a merge determining unit (MDU) ,
FIG 7 is a block diagram of a merge detecting unit.
Detailed specification
In the following a preferred embodiment of a method for calculation of merges independently from the threshold level "1" in signal is described in more detail :
The above equation (3) is modified as follows:
-delκ = (λκ+)-(λκ_) (12).
As a result from equations (4-7) and (8) , the following equations are derived:
Qκ+Ϊ_ =(λκ+ι-)-(λκ-) (13)
Qκ+1+ =(λκ+ι+)-(λκ_), (14)
QQκκ4+-ιι_- ==mmiinn ((ββκκ____,, --ddeellκκ ++ββκκ++__)) (15) Qκ+ι+ =min (βκ_+, -delκ + βκ++) (16)
+1+ Q+1- = (λκ+ι + — λκ_) - (λκ+ι_ - λκ_)
= -delκ+1 (17) The following relationships and equations are deducted from equations 12-17.
1. Negative merge (m-) : This occurs when
-delκ > 4zκ+4 and -delκ > 4zκ-4.
The former condition is the strongest.
The new difference metric (17) amounts to
-delκ+l=-4zκ-4 (18)
2. Cross-over (mx) : This occurs, when
-delκ < 4zκ-4 and -delκ > 4zκ+4.
The new difference metric is
-del +l=delκ (19)
3. Positive merge (m+) : This occurs when
-delκ > -4zκ-4 and -delκ > 4zκ-4.
The latter condition is the strongest.
The new difference metric (17) amounts to
-delκ+l=-4zκ+4 (20)
According to the invention it is proposed to record and to update delκ' = del /4;
The required actions are summarized in the algorithm:
if((delκ' < -zκ+l) and (delκ' > -zκ-l) ) then delκ+1' =-delκ' (mx) (21) else if (delκ' > -zκ-l) then delκ+1' = zκ+l (m-) else if(delκ' < -zκ+l) then delκ+1' = zκ-l (m+)
The input sequences zκ from examples 1 and 2 are used to test the new algorithm.
The following input sequence (zκ) is to detect: -1, 7, 10, 10, 7, 1, -6, -6, -1, 7.
The original conditions : a) wl" is equal to 5 (threshold) , b) del0=0;
Figure imgf000019_0001
Table 3
Example 2
The following input sequence (zκ) is to be detected: -1, 5, 8, 8, 5, 1, -4, -4, -1, 5.
The original conditions : a) "1" is equal to 5 (threshold) , b) del0=0;
Figure imgf000020_0001
Table 4
The Detector is divided into four blocks:
1. Slicer
2. Subtractor;
3. Merge Determining Unit ;
4. Merge Detecting Unit.
1. Slicer
The slicer calculates the average value Am of a sampled HF signal Yk. 2. Subtractor
The subtractor calculates the value I_Vk, I_Vk=Yk -Am.
3. Merge Determining Unit
The merge determining unit (MDU) judges the merges of the sampled data. The values Am, -Am, I_V are used to compute the merges of the sampling data.
The following algorithm is used to calculate the merges (under the conditions (21) ) .
BmA=-I_Vk-Am; BpA=-I_Vk+Am; If ( (del_k<BpA) and (dl_k>BmA) ) { cn0=l; // mx merge del_k+l= -del_k,-
} else if (del_k>BmA) { cn0=2; // m- merge del_k+l=I_V+Am;
} else if (del_k<BpA) { cn0=0; // m+ merge del_k+l=I_V-Am;
} del k=del k+1;
This algorithm is implemented in the apparatus .
This block consists of two circuits for the performance of the negation operation Nl, N2 , ADDl, ADD2 , ADD3 , ADD4 adders, two multiplexers MUXl, MUX2 , two registers, three comparers COM1, COM2, COM3, control block and encoder.
The ADDl-adder is used to calculate the sum of -Am and I Vk values ,
The ADD2-adder is used to calculate the sum of Am and I_Vk values .
The ADD3-adder is used to calculate the sum BmA =(-Am and -I Vk) .
The ADD4-adder is used to calculate the sum BpA= (Am and -I_Vk ) .
The comparator C0M1 checks the condition dl_k>BmA. If dl_l>BmA, then generate the signal (m-) .
The comparator COM2 checks the condition dl_k<BpA.
If dl__l<BpA then generate the signal (m+) .
The comparator COM3 checks the condition dl_k>BmA and dl_k>BpA.
If this condition is fulfilled then the signal (mx) is being generated.
The Control Block controls the MUXl multiplexer and MUX2 multiplexer. The Control Block realizes the combination logic, described in Table 5:
Figure imgf000022_0001
Table 5
The encoder encodes the ML Decoder status according to next rules:
If ((mx=l) AND (m- =0) AND (m+ =0)) then cn0=l. If((mx=0) AND (m- =1) AND (m+ =0)) then cn0=2. If((mx=0) AND (m- =0) AND (m+ =1)) then cn0=0. The process in the MDU can be explained by the following .algorithm.
/* Start */
ADD1_0UT=-Am+I_V; ADD2_OUT=Am+I_V; ADD3_OUT=-Am+ (-I_V) ; ADD4_OUT=Am+ (-I_V) ; If ( (REG2<ADD4_OUT) and (REG2>ADD3_OUT) ) { REG1=-REG2; REG2=REG1; cn0=l; // mx merge
} else if (REG2>ADD3_OUT)
{ REG1=ADD2_0UT;
REG2=REG1; cn0=2; // m- merge } else if (REG2<ADD4_OUT)
{
REG1=ADD1_0UT;
REG2=REG1 ; cn0=0; // m+ merge
}
4. Merge Detecting Unit
Fig. 7 shows the merge detecting unit (MDTU) . The MDTU con- sist of the control block and the cross-coupled shift registers (the path metrics memory) . The control block controls cross-coupled shift registers.
Depending on 'the cnO value from MDU, the control block gen- erates the following signals : 1. LD_SP - load parallel the register SH_SP from the register SH_SM;
2.SHT_SP - shift the contents of the register SH_SP on the right; 3. LD_SM - load parallel the register SH_SM from the register SH_SP;
4. SHT_SM - shift the contents of the register SH_SM on the right ;
5. SHT_PM - shift the contents of the register SH_SM and SH_SP on the right at the same time;
Depending on the cnO value from MDU, the control block generates different signal combinations.
The process in the MDU can be explained by the following algorithm.
if (cn0==l) { for(j=0; j<14; ++j ) { sh_sp [14-j ] =sh_sp [13-j] ; // shift sh_sp and sh_sm sh_sm[14-j] =sh_sm[13-j] ; // at the same time
} sh_sp[0]=l; sh_sm[0]=0;
} if(cn0==2) { for(j=0; j<14; ++ j ) { sh_sp [j+1] =sh_sm[j] ; // load sh_sp from sh_sm
} for(j=0; j<14; ++j ) { sh_sm[14-j]= sh_sm[13-j] ; //shift sh_sm
} sh_sp[0]=0; sh_sm[0]=0;
} if(cnO==0) { for(j=0; j<14; + + j ) { sh_sm[j+l] =sh_sp [j] ; // load sh_sm from sh_sp } for(j=0; j<14; ++ j ) { sh_sp[14-j] sh_sp [13-j] ; // shift sh_sp
} sh_sm[0]=l; sh_sp[0]=l;
}
The estimated bit sequence is output from sh_sp[14] register.
The new algorithm calculates a correct merge, if the following conditions for input values
and
are fulfilled.
This means that the algorithm calculates a merge independ- ently of a threshold level ul" and of a signal amplitude.
This solution allows avoiding the use of the automatic gain control (AGC) or the adaptive equalizer or the recalculation of the threshold level "1" depending on a signal amplitude. The general idea of the invention can be applied also to au- dio, video CD, DVD application in an acquisition part to improve the detection of data.

Claims

Claims
1. A method for Viterbi detection of a partial response, the method comprising the steps of :
- if ( (delk'<-zk+l) and (delk' >-zk-l) ) then delk+1' =-delk' (mx) to perform a cross-over,
- else if (delk' > -zk -1) then delk+1' = zk + 1 (m-) to perform a negative merge,
- else if (delk' < -zk +1) then delk+1' = zk - 1 (m+) to perform a positive merge,
where
delk' = delk/4, delκ=(λκ-) - (λκ+), and whereby zκ=xκ+γκis input into a Verterbi decoder, where xκ=aκ + aκ-l, andγK is noise.
2. A computer programm product comprising program means for performing a method of claim 1.
3. A maximum likelihood detector for Viterbi detection of a partial response, the maximum likelihood detector comprising means for performing a method in accordance with claim 1.
4. The maximum likelihood detector of claim 3 comprising
a slicer for calculating an average value (Am) of a sampled high frequency signal (Yk) , a subtractor subtracting the high frequency signal from an output signal of the slicer,
- a merge determining unit for determining a merge based on the high frequency signal, a slicer output signal and an output signal of the subtractor, and
- a merge detecting unit for generating a bit sequence from an output signal of the merge determining unit wherein, in case that an input value is below a threshold value, the merge detection and / or determination conditions and the final result are inverted.
5. The maximum likelihood detector of claim 4, the merge detecting unit comprising cross-coupled shift registers to realize a path matrix memory and a control block to control the cross-coupled shift registers.
6. A reader for an optical disc, such as a CD or DVD player, comprising a maximum likelihood detector in accordance with anyone of the preceding claims 3, 4 or 5.
PCT/EP2002/009443 2001-08-25 2002-08-23 Maximum likelihood detector WO2003019793A2 (en)

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1111607A1 (en) * 1999-12-22 2001-06-27 Deutsche Thomson-Brandt Gmbh Method and apparatus to detect a signal received from a channel signal

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1111607A1 (en) * 1999-12-22 2001-06-27 Deutsche Thomson-Brandt Gmbh Method and apparatus to detect a signal received from a channel signal

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WOOD R W ET AL: "VITERBI DETECTION OF CLASS IV PARTIAL RESPONSE ON A MAGNETIC RECORDING CHANNEL" IEEE TRANSACTIONS ON COMMUNICATIONS, IEEE INC. NEW YORK, US, vol. 34, no. 5, 1 May 1986 (1986-05-01), pages 454-461, XP000577357 ISSN: 0090-6778 *

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