WO2003010807A1 - Method of manufacturing semiconductor integrated circuit device - Google Patents

Method of manufacturing semiconductor integrated circuit device Download PDF

Info

Publication number
WO2003010807A1
WO2003010807A1 PCT/JP2002/007445 JP0207445W WO03010807A1 WO 2003010807 A1 WO2003010807 A1 WO 2003010807A1 JP 0207445 W JP0207445 W JP 0207445W WO 03010807 A1 WO03010807 A1 WO 03010807A1
Authority
WO
WIPO (PCT)
Prior art keywords
integrated circuit
semiconductor integrated
circuit device
manufacturing semiconductor
wafer
Prior art date
Application number
PCT/JP2002/007445
Other languages
French (fr)
Japanese (ja)
Inventor
Takeshi Kimura
Masafumi Kanetomo
Tsuneo Kobayashi
Yoshio Homma
Hiroki Nezu
Original Assignee
Hitachi, Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi, Ltd. filed Critical Hitachi, Ltd.
Publication of WO2003010807A1 publication Critical patent/WO2003010807A1/en

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00Lapping machines or devices; Accessories
    • B24B37/04Lapping machines or devices; Accessories designed for working plane surfaces
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B49/00Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/31051Planarisation of the insulating layers
    • H01L21/31053Planarisation of the insulating layers involving a dielectric removal step

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Semiconductor Memories (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Element Separation (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Constituent Portions Of Griding Lathes, Driving, Sensing And Control (AREA)

Abstract

A method of manufacturing a semiconductor integrated circuit device, comprising the step of detecting that a scratch occurs on the polished surface of a wafer (7) by a polishing processing by detecting vibration generated from the wafer (7) during polishing by a vibration monitor (9) installed in a polishing head (3).
PCT/JP2002/007445 2001-07-24 2002-07-23 Method of manufacturing semiconductor integrated circuit device WO2003010807A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001222695A JP2003037090A (en) 2001-07-24 2001-07-24 Method for manufacturing semiconductor integrated circuit device
JP2001-222695 2001-07-24

Publications (1)

Publication Number Publication Date
WO2003010807A1 true WO2003010807A1 (en) 2003-02-06

Family

ID=19056135

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2002/007445 WO2003010807A1 (en) 2001-07-24 2002-07-23 Method of manufacturing semiconductor integrated circuit device

Country Status (2)

Country Link
JP (1) JP2003037090A (en)
WO (1) WO2003010807A1 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6030041B2 (en) * 2013-11-01 2016-11-24 株式会社荏原製作所 Polishing apparatus and polishing method
US9878421B2 (en) * 2014-06-16 2018-01-30 Applied Materials, Inc. Chemical mechanical polishing retaining ring with integrated sensor
JP6739899B2 (en) * 2015-01-16 2020-08-12 キオクシア株式会社 Semiconductor device manufacturing method and semiconductor manufacturing device
JP6400620B2 (en) 2016-03-11 2018-10-03 東芝メモリ株式会社 Control device and control method for semiconductor manufacturing apparatus
JP6860727B2 (en) * 2020-04-24 2021-04-21 キオクシア株式会社 Semiconductor manufacturing method and semiconductor manufacturing equipment

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0739687A2 (en) * 1995-04-26 1996-10-30 Fujitsu Limited Polishing apparatus and polishing method
JPH11254304A (en) * 1998-03-10 1999-09-21 Super Silicon Kenkyusho:Kk Surface plate with built-in sensor
JP2001096455A (en) * 1999-09-28 2001-04-10 Ebara Corp Polishing device
JP2002160154A (en) * 2000-09-18 2002-06-04 Stmicroelectronics Inc Usage of acoustic spectral analysis to cmp processing monitor/control

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0739687A2 (en) * 1995-04-26 1996-10-30 Fujitsu Limited Polishing apparatus and polishing method
JPH11254304A (en) * 1998-03-10 1999-09-21 Super Silicon Kenkyusho:Kk Surface plate with built-in sensor
JP2001096455A (en) * 1999-09-28 2001-04-10 Ebara Corp Polishing device
JP2002160154A (en) * 2000-09-18 2002-06-04 Stmicroelectronics Inc Usage of acoustic spectral analysis to cmp processing monitor/control

Also Published As

Publication number Publication date
JP2003037090A (en) 2003-02-07

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