WO2003007519A1

WO2003007519A1 - A match filter for code division multiple access communication system

Info

Publication number: WO2003007519A1
Application number: PCT/CN2001/001169
Authority: WO
Inventors: Yuan Zhang; Daoben Li
Original assignee: Linkair Communications, Inc.
Priority date: 2001-07-11
Filing date: 2001-07-11
Publication date: 2003-01-23
Also published as: CN1452823A; CN1211968C

Abstract

The present invention relates to a match filter suitable for spectrum spread code having characteristic of complementarity. The match filter comprises a first memory, a second memory, a first shift register, a first accumulator, a second accumulator, a second shift register and a processor. Perfect correlation of the spectrum spread code is shown using the complementarity of the code. The match filter according the present invention improves the performance of the code and adapts it to the requirement of the synchronous capture of CDMA communication system.

Description

MATCH FILTER FOR CDMA COMMUNICATION SYSTEM

The present invention relates to a receiving device of a code division multiple access (CDMA) communication system, and particularly to a matched filter used in a CDMA communication system.

Background of the invention

As we all know, CDMA technology has been recognized as the basic technology of the third generation of mobile communication. Due to its large capacity, soft capacity, soft handover, high voice quality and low transmit power, as well as anti-interference and confidentiality, Advantages allow it to develop rapidly.

In a CDMA communication system, since the information transmitted by the transmitting end is a signal that has been spread by a specific spreading code, to demodulate the information at the receiving end, it is necessary to multiply the received information by one transmitted by the transmitting end. The same spreading code is required, which requires that the spreading codeword at the transmitting end and the spreading codeword at the receiving end be bit-synchronized. The synchronous capture device is used to solve this problem.

CDMA is a modulation and multiple access technology based on spread-spectrum communications. In the CDMA communication system, the signals used by different users to transmit information are not distinguished by different frequencies or time slots, but by different coding sequences. The receiver correlator can select a signal using a predetermined pattern among a plurality of CDMA signals. Other signals using different code patterns cannot be demodulated because they are different from the code patterns generated locally by the receiver.

Generally, in a CDMA system, whether a base station transmitter or a mobile station transmitter uses a spreading code to spread the digital information to spread the spectrum, and the receiver uses the local spreading code to despread the spread spectrum signal to extract useful information. . Synchronization means that the local spreading code and the received spreading code are completely consistent in structure, frequency and phase. CDMA systems have carrier synchronization, bit synchronization, and frame synchronization in addition to general digital communication systems. Spreading code synchronization is unique to it. Therefore, the synchronization problem of the spread spectrum system is more important than the general digital communication system.

Generally speaking, a clock source with high accuracy and stability is used in the transmitter and receiver. Many frequency and phase instabilities can be removed. However, because there are many uncertain factors that cannot be estimated in advance, especially in mobile communications, these uncertain factors are random and cannot be compensated in advance. They can only be eliminated by a synchronization system. Therefore, the synchronization system is indispensable and very important in the CDMA system.

Fig. 1 shows the structure of a synchronization capture device of a prior art CDMA system. As shown in FIG. 1, a conventional synchronization capture device of a CDMA system includes an antenna 11, a quasi-synchronous detector 12, an A / D converter 13, a local spreading codeword generator 141, a correlator 142, a memory 15, and a level detection.器 16。 16. The device correctly estimates the phase information of the spreading codeword of the received information as a time reference for despreading at the receiving end. Among them, the antenna 11 is used to receive the signal sent by the transmitting end; the quasi-synchronous detector 12 converts the received signal into a baseband signal; the A / D converter 1 3 4 bar baseband signal is converted into a digital signal; a local spreading code The word generator 141 generates a spreading code word for the correlation operation by the correlator 142; the correlator 142 is used to calculate the correlation value between the digital signal after A / D conversion and the locally generated spreading code word; the memory 15 is used to store the correlator The output correlation value has a storage length of one period of the spreading codeword; the level detector 16 is used to detect the maximum correlation value in this period, thereby determining the timing of the spreading codeword.

The correlator 142 in FIG. 1 may be a sliding correlator or a matched filter. For the sliding correlator, it stores the received symbols, performs bitwise multiplication with the locally generated spreading codeword, and adds the multiplication result of a spreading codeword period. At each chip ( ch ip), the locally generated spreading codeword is bit-shifted, multiplication and addition operations are still performed, and the addition result is output.

Another implementation of the correlator 142 is a matched filter. It stores a cycle of locally generated spreading codewords and performs correlation operations with the input signal.

FIG. 2 is a structural diagram of a conventional matched filter. Referring to FIG. 2, the matched filter includes an N-bit shift register 21, an N-bit local spread codeword memory 22 and an accumulator 23. The shift register 21 stores the input signal and shifts it to the right after each chip; the N-bit local spreading codeword memory 22 stores the Nth bit of the local spreading code in order from left to right. Bits N-1 ... Bit 1 performs bitwise multiplication with the signal stored in the shift register 21; the accumulator 23 will The results of each multiplication are added together, and the results are output as correlation values.

In the PCT patent application, the application number is PCT / CN00 / 000 ² 8. The inventor is Li Daoben and the invention name is "A Spread Spectrum Multiple Access Coding Method with Zero Correlation Window". A spread spectrum with zero correlation window is disclosed. A multi-address code is called an LS code. Since the LS code is composed of a C code and an S code, it is also called a CS code. The method of generating the LS code is described in detail in PCT / CN00 / 00028, which is omitted here, and this document is incorporated herein by reference.

When the spreading codeword used by the communication system is composed of two codes with orthogonal complementarity and zero padding between the two codes, such as the "zero correlation window" disclosed in PCT / CN00 / 00028 Spread-spectrum multi-address code (due to the special complementary characteristics of this codeword, the structure of the sliding correlator and the traditional matched filter is no longer suitable for its correlation operation requirements, so a new type of correlator is needed to achieve all Related operations required.

The new encoding method of the spread spectrum multi-address code given in the PCT / CN00 / 00028 patent application has the correlation characteristic of "zero correlation window", that is, the zero correlation The cross-correlation function between the address codes in the window has no secondary peaks, thereby eliminating multiple access interference (MAI) and intersymbol interference (USI), making its corresponding two-way synchronous code division multiple access (CDMA) system free of traditional code division multiple access The fatal "far and near effect" of the (CDMA) system lays the foundation for establishing a large-capacity wireless digital communication system. The above-mentioned spread-spectrum multi-address code with a "zero correlation window" has the following two characteristics: First, the auto-correlation function of each spread-spectrum address code is zero except for the origin, that is, it has the most ideal characteristics. From the perspective of orthogonality, each spreading address code is completely orthogonal to any non-zero relative delay except for the relative delay of zero.

Second, the cross-correlation function between spread-spectrum address codes has a zero correlation window near the origin. From the perspective of orthogonality, the spreading address codes are completely orthogonal when the relative delay is smaller than the width of the zero correlation window.

In the PCT / CN00 / 00028 patent application, the spread-spectrum multiple-access coding method uses two orthogonal synchronously fading transmission channels to transmit two sets of spread-spectrum address codes, respectively. Time, they are opposite to each other, so that their correlation characteristics have zero correlation window characteristics, that is, within the zero correlation window Correlation functions and cross-correlation functions between address codes have no side peaks. It is precisely because of this unique spreading code characteristic that the sliding correlator or matched filter in the prior art is no longer suitable for synchronous acquisition of spreading address codes with orthogonal complementary characteristics.

Summary of the Invention

In order to solve the above problems and defects in the prior art, an object of the present invention is to provide a matched filter applied to a code division multiple access (CDMA) communication system, and a matched filter system designed according to the present invention.

The matched filter provided by the present invention is modified on the basis of the existing matched filter structure. A matched filter for a code division multiple access communication system is characterized in that it includes:

A first memory and a second memory respectively storing two codewords having complementary characteristics constituting a local spreading code;

A first shift register, configured to shift an input signal;

A first accumulator, configured to multiply an input signal in the first shift register by a bit-multiplied result of the codeword stored in the first memory, and add the result;

A second accumulator, configured to multiply the input signal in the first shift register by the bit-multiplied result of the codeword stored in the second memory, and add;

A second shift register for shifting the output of the first accumulator;

A processor, configured to process the output of the second shift register and the output of the second accumulator. By adopting the matched filter designed by the present invention, on the one hand, the problem that the matched filter or sliding coherent device in the prior art cannot be applied to a code division multiple access communication system using a "zero correlation window" characteristic spreading code is solved. On the other hand, the characteristics of such a "zero correlation window" orthogonal complementary code group are fully realized. Other objects and features of the present invention will become apparent from the following description of the embodiments and the accompanying drawings. More clearly, the same reference numerals in the drawings represent the same or similar components.

The accompanying drawings, which are incorporated in and constitute a part of this invention, serve to explain embodiments of the invention and to explain the principles of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

Fig. 1 shows the structure of a synchronization capture device of a prior art CDMA system.

Figure 2 shows the structure of a conventional matched filter.

Fig. 3 is a block diagram showing a structure of a matched filter according to a first embodiment of the present invention.

FIG. 4 is a block diagram showing a structure of a matched filter according to a second embodiment of the present invention.

Fig. 5A shows the autocorrelation output of the matched filter according to the first embodiment of the present invention; Fig. 5B shows the autocorrelation output of the matched filter according to the second embodiment of the present invention; Cross-correlation output of the matched filter according to the first embodiment of the invention; FIG. 6B shows the cross-correlation output of the matched filter according to the second embodiment of the invention.

detailed description

First embodiment

FIG. 3 is a block diagram showing a structure of a matched filter according to a first embodiment of the present invention. The implementation of the matched filter in this embodiment is described by taking an LS code as an example. For the LS code, refer to the detailed description in PCT / CN00 / 00028.

It is assumed that the spreading code used by the system is composed of the first N-bit C code, the last N-bit S code, and the middle complement N-bit 0. The matched filter according to the present invention includes: a first shift register 31 of length N for shifting an input signal, a first memory 32 of length N for storing a local spreading code C code, and a length of N A second memory 33, a first accumulator 3 ⁴ , a second accumulator 35, a second shift register 36 with a length of 2N, and an adder 37 for storing the local spreading code S code. The first shift register 31 is used to store an input signal and shift in a received signal after each chip. The first memory 32 is used to store a local spreading codeword C code, and the storage method is from left to right. : The Nth bit, the N-1th bit, the 1st bit; the second memory 33 is used to store the local spreading codeword S code, and the storage mode is from left to right In order: Nth bit, Nlth bit, and 1st bit; the first memory 32 performs a bit multiplication operation with the first shift register 31, and the first accumulator 34 adds the multiplication results of the bits; the second The memory 33 performs a bitwise multiplication operation with the first shift register 31, and the second accumulator 35 adds the multiplication results of the bits; the calculation result input by the first accumulator 34 is shifted to the second shift register 36 to delay Output after 2N. The function of the second shift register 36 is to process the correlation between the C code and the input C, code and the corresponding S code and S, code correlation value simultaneously; the adder 37 combines the output of the second shift register 36 with the second The results of the accumulator 35 are added to find the correlation value of the entire codeword. The result calculated by this filter is the magnitude of the correlation between the input signal and the locally generated codeword.

FIG. 5A shows the autocorrelation output of the matched filter according to the first embodiment of the present invention, which is an LS code with a bit length of 96 (the first 32 bits are C codes, the last 32 bits are S codes, and the middle complement is 32 bit 0) as an example, when a set of spreading code words is used, the output of the autocorrelation operation is performed through the matched filter shown in FIG. 3.

FIG. 6A shows the cross-correlation output of a matched filter according to the first embodiment of the present invention. It still takes an LS code with a bit length of 96 as an example. The output of the cross-correlation operation performed by the matched filter is shown.

Second embodiment

FIG. 4 is a block diagram showing a structure of a matched filter according to a second embodiment of the present invention. Referring to FIG. 4, the matched filter according to this embodiment also includes a first shift register 31 of length N for shifting an input signal, and a first memory 32 of length N for storing a local spreading code C code. The second memory 33 of length N for storing the local spreading code S code, the first accumulator 34, the second accumulator 35, and the second shift register 36 of length 2N are matched with those shown in FIG. The filter structure is different in that the matched filter according to the second embodiment further includes a multiplier 47. The calculation result is equivalent to the energy value of the correlation value. The matched filter using this structure further improves the autocorrelation characteristics of the codeword, because when performing the autocorrelation operation:

The output of the 2N before the matched filter is: O x R _sc = 0, and the output of the matched filter shown in FIG. 3 according to the first embodiment of the present invention is 0 + R _sc = R _sc , not 0;

The output of the middle 2N is: R _cc (τ) χ R _ss (τ) When τ is 0: R _cc (0) = R _ss (0) = N, so the output main peak is N ² , and the autocorrelation main peak of the matched filter shown in FIG. 3 according to the first embodiment of the present invention It is 2N.

When τ is not 0: The output of the matched filter is less than or equal to 0. The output of the matched filter shown in FIG. 3 according to the first embodiment of the present invention is 0;

The output of the 2N after the matched filter is: R _cs 0 = 0, and the output of the matched filter shown in FIG. 3 according to the first embodiment of the present invention is R _cs +0 = R _cs , not 0.

FIG. 5B shows the autocorrelation output of the matched filter according to the second embodiment of the present invention, which is an LS code with a bit length of 96 (the first 32 bits are C codes, the last 32 bits are S codes, and the middle complements 32 bits 0) As an example, when a set of spreading code words is used, the output of the autocorrelation operation is performed through the matched filter shown in FIG. 4.

FIG. 6B shows the cross-correlation output of the matched filter according to the second embodiment of the present invention. It still takes an LS code with a bit length of 96 as an example. The output of the cross-correlation operation performed by the matched filter is shown. As can be seen from FIG. 5B and FIG. 6B, it can be seen that the matched filter according to the second embodiment of the present invention improves the autocorrelation characteristic of the codeword, and the peak size of the cross-correlation of the codeword has not changed, but only changed. " Zero window "position.

Many other changes and modifications can be made without departing from the scope and spirit of the invention. It should be understood that the invention is not limited to specific embodiments, and the scope of the invention is defined by the appended claims.

Claims

Claim

1. A matched filter for a code division multiple access communication system, comprising: a first memory and a second memory, respectively storing two codewords having complementary characteristics constituting a local spreading code;

A first shift register, configured to shift an input signal;

A second shift register for shifting the output of the first accumulator;

A processor, configured to process the output of the second shift register and the output of the second accumulator.

2. The matched filter according to claim 1, wherein the codeword having complementary characteristics is an LS code, wherein the first N bits are C codes, the last N bits are S codes, and the middle N bits are 0. .

3. The matched filter according to claim 1 or 2, wherein the arithmetic unit is an adder for adding the output of the second shift register to the output of the second accumulator.

4. The matched filter according to claim 1 or 2, wherein the arithmetic unit is a multiplier for multiplying the output of the second shift register by the output of the second accumulator.

The matched filter according to claim 1 or 2, wherein the result of the second shift register to the first accumulator is delayed by 2 N bits and output.