WO2002097631A3 - Verfahren zum ansteuern von speicherbausteinen - Google Patents

Verfahren zum ansteuern von speicherbausteinen Download PDF

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Publication number
WO2002097631A3
WO2002097631A3 PCT/DE2002/001411 DE0201411W WO02097631A3 WO 2002097631 A3 WO2002097631 A3 WO 2002097631A3 DE 0201411 W DE0201411 W DE 0201411W WO 02097631 A3 WO02097631 A3 WO 02097631A3
Authority
WO
WIPO (PCT)
Prior art keywords
memory chip
control unit
memory chips
address value
address
Prior art date
Application number
PCT/DE2002/001411
Other languages
English (en)
French (fr)
Other versions
WO2002097631A2 (de
Inventor
Norbert Emmerich
Original Assignee
Siemens Ag
Norbert Emmerich
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag, Norbert Emmerich filed Critical Siemens Ag
Publication of WO2002097631A2 publication Critical patent/WO2002097631A2/de
Publication of WO2002097631A3 publication Critical patent/WO2002097631A3/de

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0684—Configuration or reconfiguration with feedback, e.g. presence or absence of unit detected by addressing, overflow detection

Abstract

Zur Detektierung von Speicherbausteinen, die über einen Datenbus mit einer Steuereinheit verbunden sind, durch die Steuereinheit ein Ausgangszustand der Speicherbausteine initiiert, anschließen ein Adresswert einer Detektierungsadresse zugewiesen und an den Datenbus gelegt. Daraufhin wird das Er-folgen einer Bestätigung des Adresswerts durch einen der Speicherbausteine seitens der Steuereinheit überprüft und bei positivem Ergebnis der Überprüfung eine Zuordnung von Adresswerten zu Speicherbausteintypen der Typ des Speicherbausteins detektiert und Schreib- und Lesezugriffe auf den Speicherbaustein können erfolgen. Bei stets negative Ergebnissen der Überprüfung wird der Vorgang mit einem neuen Adresswert wiederholt bis eine Abbruchbedingung erreicht ist.
PCT/DE2002/001411 2001-05-31 2002-04-16 Verfahren zum ansteuern von speicherbausteinen WO2002097631A2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE2001126613 DE10126613A1 (de) 2001-05-31 2001-05-31 Verfahren zum Ansteuern von Speicherbausteinen
DE10126613.8 2001-05-31

Publications (2)

Publication Number Publication Date
WO2002097631A2 WO2002097631A2 (de) 2002-12-05
WO2002097631A3 true WO2002097631A3 (de) 2003-02-20

Family

ID=7686814

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2002/001411 WO2002097631A2 (de) 2001-05-31 2002-04-16 Verfahren zum ansteuern von speicherbausteinen

Country Status (2)

Country Link
DE (1) DE10126613A1 (de)
WO (1) WO2002097631A2 (de)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5860028A (en) * 1996-02-01 1999-01-12 Paragon Electric Company, Inc. I/O bus expansion system wherein processor checks plurality of possible address until a response from the peripheral selected by address decoder using user input
WO2000041073A1 (en) * 1999-01-07 2000-07-13 Telefonaktiebolaget Lm Ericsson (Publ) Plug and play i2c slave

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5860028A (en) * 1996-02-01 1999-01-12 Paragon Electric Company, Inc. I/O bus expansion system wherein processor checks plurality of possible address until a response from the peripheral selected by address decoder using user input
WO2000041073A1 (en) * 1999-01-07 2000-07-13 Telefonaktiebolaget Lm Ericsson (Publ) Plug and play i2c slave

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
RUITERS J: "I2C EEPROM", ELEKTOR ELECTRONICS, ELEKTOR PUBLISHERS LTD. CANTERBURY, GB, vol. 19, no. 217, 1 December 1993 (1993-12-01), pages 34 - 35, XP000417209, ISSN: 0268-4519 *

Also Published As

Publication number Publication date
WO2002097631A2 (de) 2002-12-05
DE10126613A1 (de) 2002-12-12

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