WO2002063665A3 - RELAXED InXGa1-xAs LAYERS INTEGRATED WITH Si - Google Patents
RELAXED InXGa1-xAs LAYERS INTEGRATED WITH Si Download PDFInfo
- Publication number
- WO2002063665A3 WO2002063665A3 PCT/US2002/002334 US0202334W WO02063665A3 WO 2002063665 A3 WO2002063665 A3 WO 2002063665A3 US 0202334 W US0202334 W US 0202334W WO 02063665 A3 WO02063665 A3 WO 02063665A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- inxga1
- relaxed
- xas
- layers integrated
- xas layers
- Prior art date
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/18—Epitaxial-layer growth characterised by the substrate
- C30B25/20—Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02441—Group 14 semiconducting materials
- H01L21/0245—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/0251—Graded layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/02546—Arsenides
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Materials Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Inorganic Chemistry (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2002241984A AU2002241984A1 (en) | 2001-02-08 | 2002-01-28 | Relaxed inxga1-xas layers integrated with si |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/779,917 US6594293B1 (en) | 2001-02-08 | 2001-02-08 | Relaxed InxGa1-xAs layers integrated with Si |
US09/779,917 | 2001-02-08 | ||
US09/779,915 | 2001-02-08 | ||
US09/779,915 US6589335B2 (en) | 2001-02-08 | 2001-02-08 | Relaxed InxGa1-xAs layers integrated with Si |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2002063665A2 WO2002063665A2 (en) | 2002-08-15 |
WO2002063665A3 true WO2002063665A3 (en) | 2003-01-23 |
Family
ID=27119639
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2002/002334 WO2002063665A2 (en) | 2001-02-08 | 2002-01-28 | RELAXED InXGa1-xAs LAYERS INTEGRATED WITH Si |
Country Status (2)
Country | Link |
---|---|
AU (1) | AU2002241984A1 (en) |
WO (1) | WO2002063665A2 (en) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0375564A1 (en) * | 1988-12-22 | 1990-06-27 | Fujitsu Limited | Semiconductor device having a buffer structure for eliminating defects from a semiconductor layer grown thereon |
EP0514018A2 (en) * | 1991-04-24 | 1992-11-19 | AT&T Corp. | Method for making low defect density semiconductor heterostructure and devices made thereby |
US5621227A (en) * | 1995-07-18 | 1997-04-15 | Discovery Semiconductors, Inc. | Method and apparatus for monolithic optoelectronic integrated circuit using selective epitaxy |
JPH10284510A (en) * | 1997-04-08 | 1998-10-23 | Nippon Steel Corp | Semiconductor substrate |
WO1999028958A1 (en) * | 1997-12-01 | 1999-06-10 | Massachusetts Institute Of Technology | RELAXED InxGA(1-x)As GRADED BUFFERS |
JP2001102312A (en) * | 1999-09-28 | 2001-04-13 | Kyocera Corp | Compound semiconductor substrate |
-
2002
- 2002-01-28 AU AU2002241984A patent/AU2002241984A1/en not_active Abandoned
- 2002-01-28 WO PCT/US2002/002334 patent/WO2002063665A2/en not_active Application Discontinuation
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0375564A1 (en) * | 1988-12-22 | 1990-06-27 | Fujitsu Limited | Semiconductor device having a buffer structure for eliminating defects from a semiconductor layer grown thereon |
EP0514018A2 (en) * | 1991-04-24 | 1992-11-19 | AT&T Corp. | Method for making low defect density semiconductor heterostructure and devices made thereby |
US5621227A (en) * | 1995-07-18 | 1997-04-15 | Discovery Semiconductors, Inc. | Method and apparatus for monolithic optoelectronic integrated circuit using selective epitaxy |
JPH10284510A (en) * | 1997-04-08 | 1998-10-23 | Nippon Steel Corp | Semiconductor substrate |
WO1999028958A1 (en) * | 1997-12-01 | 1999-06-10 | Massachusetts Institute Of Technology | RELAXED InxGA(1-x)As GRADED BUFFERS |
JP2001102312A (en) * | 1999-09-28 | 2001-04-13 | Kyocera Corp | Compound semiconductor substrate |
Non-Patent Citations (4)
Title |
---|
BULSARA M T ET AL: "RELAXED INXGA1-XAS GRADED BUFFERS GROWN WITH ORGANOMETALLIC VAPOR PHASE EPITAXY ON GAAS", APPLIED PHYSICS LETTERS, AMERICAN INSTITUTE OF PHYSICS. NEW YORK, US, vol. 72, no. 13, 30 March 1998 (1998-03-30), pages 1608 - 1610, XP000742903, ISSN: 0003-6951 * |
PATENT ABSTRACTS OF JAPAN vol. 1999, no. 01 29 January 1999 (1999-01-29) * |
PATENT ABSTRACTS OF JAPAN vol. 2000, no. 21 3 August 2001 (2001-08-03) * |
UCHIDA T ET AL: "CW OPERATION OF A 1.3-MUM STRAINED QUANTUM WELL LASER ON A GRADED INGAAS BUFFER WITH A GAAS SUBSTRATE", PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON INDIUM PHOSPHIDE AND RELATED MATERIALS. HOKKAIDO, MAY 9 - 13, 1995, NEW YORK, IEEE, US, vol. CONF. 7, 9 May 1995 (1995-05-09), pages 22 - 25, XP000630612, ISBN: 0-7803-2148-0 * |
Also Published As
Publication number | Publication date |
---|---|
AU2002241984A1 (en) | 2002-08-19 |
WO2002063665A2 (en) | 2002-08-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2001070005A3 (en) | Method of forming a low temperature metal bond for use in the transfer of bulk and thin film materials | |
WO1996030945A3 (en) | Integrated heterostructures of group iii-v nitride semiconductor materials and methods for fabricating the same | |
WO2004006327A3 (en) | Transfer of a thin layer from a wafer comprising a buffer layer | |
CA2392041A1 (en) | Pendeoepitaxial growth of gallium nitride layers on sapphire substrates | |
WO2004021420A3 (en) | Fabrication method for a monocrystalline semiconductor layer on a substrate | |
WO2000016378A3 (en) | Method of fabricating group-iii nitride-based semiconductor device | |
EP2182548A3 (en) | Group lll-V semiconductor device on SiC substrate | |
WO2006063233A3 (en) | Photoconductive device | |
TW200729343A (en) | Method for fabricating controlled stress silicon nitride films | |
EP1423259A4 (en) | Free-standing (al, ga, in)n and parting method for forming same | |
WO2005027201A8 (en) | Method of fabrication and device comprising elongated nanosize elements | |
TW200608455A (en) | Semiconductor film manufacturing method and substrate manufacturing method | |
WO2001059814A3 (en) | Semiconductor structure | |
WO2003034560A1 (en) | Method for fabricating semiconductor light emitting element, semiconductor light emitting element, method for fabricating semiconductor element, semiconductor element, method for fabricating element and element | |
WO2006041630A3 (en) | Low temperature selective epitaxial growth of silicon germanium layers | |
WO2002050345A3 (en) | Semiconductor compliant substrate having a graded monocrystalline layer | |
EP0720240A3 (en) | Epitaxial wafer and method of preparing the same | |
EP1396877A3 (en) | Substrate for electronic devices, manufacturing method therefor, and electronic device | |
WO2007040587A3 (en) | Method for forming a multiple layer passivation film and a deice | |
US20090035921A1 (en) | Formation of lattice-tuning semiconductor substrates | |
AU2003247130A1 (en) | Method of transferring of a layer of strained semiconductor material | |
WO2004060792A3 (en) | Method of forming semiconductor devices through epitaxy | |
CA2475966A1 (en) | Crystal production method | |
WO2003036699A3 (en) | Lateral semiconductor-on-insulator structure and corresponding manufacturing methods | |
EP1320125A3 (en) | Seed layer processes for mocvd of ferroelectric thin films on high-K gate oxides |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A2 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ OM PH PL PT RO RU SD SE SG SI SK SL TJ TM TN TR TT TZ UA UG UZ VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A2 Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
AK | Designated states |
Kind code of ref document: A3 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ OM PH PL PT RO RU SD SE SG SI SK SL TJ TM TN TR TT TZ UA UG UZ VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A3 Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
REG | Reference to national code |
Ref country code: DE Ref legal event code: 8642 |
|
122 | Ep: pct application non-entry in european phase | ||
NENP | Non-entry into the national phase |
Ref country code: JP |
|
WWW | Wipo information: withdrawn in national office |
Country of ref document: JP |