WO2002059983A1 - Boitier de diode electroluminescente a extraction lumineuse amelioree, et procedes d'elaboration correspondants - Google Patents

Boitier de diode electroluminescente a extraction lumineuse amelioree, et procedes d'elaboration correspondants Download PDF

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Publication number
WO2002059983A1
WO2002059983A1 PCT/US2001/043515 US0143515W WO02059983A1 WO 2002059983 A1 WO2002059983 A1 WO 2002059983A1 US 0143515 W US0143515 W US 0143515W WO 02059983 A1 WO02059983 A1 WO 02059983A1
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WIPO (PCT)
Prior art keywords
electrode
substrate
mesa
pad
region
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PCT/US2001/043515
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English (en)
Inventor
Ivan Eliashevich
Stephen Schwed
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Emcore Corporation
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Publication of WO2002059983A1 publication Critical patent/WO2002059983A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate

Definitions

  • the present invention relates to making optoelectronic devices, packages for such devices, and methods for making the foregoing, and particularly relates to methods of making light-emitting diodes and light-emitting diode packages having optimized light extraction characteristics, and methods of making the foregoing.
  • Light-emitting diodes or "LEDs” include thin layers of semiconductor material of two opposite conductivity types, referred to as p-type and n-type.
  • the layers are disposed in a stack, one above the other, with one or more layers of n-type material in one part of the stack and one or more layers of p-type material at the other end of the stack.
  • the various layers may be deposited in sequence on a substrate to form a wafer.
  • the junction between the p-type and n-type material may include directly abutting p-type and n-type layers, or may include one or more intermediate layers which may be of any conductivity type or which may have no distinct conductivity type.
  • Electrodes are connected to the respective n-type and p- type layers near the top and bottom of the stack.
  • the materials in the electrodes are selected to provide low- resistance interfaces with the semiconductor materials.
  • the electrodes are provided with pads suitable for connection to wires or other conductors which carry current from external sources.
  • the pad associated with each electrode may be a part of the electrode, having the same composition and thickness of the electrode, or may be a distinct structure which differs in thickness, composition, or both from the electrode itself.
  • the term "electrode-pad unit" is used in this disclosure to refer to the electrode and pad, regardless of whether the pad is a separate structure or merely a region of the electrode .
  • the wafer is cut apart to form individual dies which constitute separate L ⁇ Ds .
  • light radiation includes infrared and ultraviolet wavelength range, as well as the visible range. The wavelength of the light depends on factors including the composition of the semiconductor materials and the structure of the junction.
  • LEDs formed from certain semiconductor materials normally use nonconductive substrates to promote proper formation of the semiconductor layers .
  • the nonconductive substrate typically is left in place.
  • gallium nitride- based materials such as GaW, AlGaN, InGaN and AlInGaN are used to form LEDs emitting light in various wavelength ranges including blue and ultraviolet. These materials typically are grown on insulating substrates such as sapphire or alumina.
  • LEDs incorporating an insulating substrate must include a bottom electrode at a location on the stack above the substrate but below the junction.
  • the upper layer or layers of the stack are removed in a region of the stack, so as to provide an upwardly-facing lower electrode surface on a layer at or near the middle of the stack in each die. This leaves a region referred to as a "mesa" projecting upwardly from the lower electrode surface and covering the remaining area of the die.
  • the area of the die occupied by the lower electrode surface does not emit light. It is desirable to keep the horizontal extent of this inactive area as small as possible .
  • the top electrode typically is formed on the top surface of the stack, i.e., the top surface of the top semiconductor layer.
  • the layers in the stack above the junction are transparent, so that light emitted at the junction can pass out of the stack through the top surface.
  • the top electrode is arranged so that it does not block all of the emitted light.
  • an opaque top electrode may cover only a small portion of the top surface of each die.
  • current crowding or “current bunching”
  • the amount of useful light reaching the outside of the die per unit of electrical current passing through the die commonly stated as the external quantum efficiency of the die, is reduced by this phenomenon.
  • Current crowding can also occur in the lower region, so that light emission is concentrated in the area of the junction near the lower electrode. Current crowding is a significant consideration with LEDs formed from materials having relatively high electrical resistivity, such as the gallium nitride-based materials.
  • LEDs have been provided with transparent top electrodes, formed from thin layers of metals and metal compounds.
  • a pad which is typically opaque, is connected to the transparent electrode and occupies a small portion of the top surface.
  • the transparent top electrode spreads the current in horizontal directions from the pad, so that current flow down through the stack is spread more evenly over the horizontal extent of the mesa.
  • a light-emitting diode comprises a semiconductor structure having layers 20 of p-type semiconductor material overlying layers 22 of n-type semiconductor material in a stack of semiconductor material.
  • the semiconductor material is formed on an insulating substrate 26.
  • the stack of semiconductor material comprises a wafer for forming a plurality of LED devices .
  • a junction shown schematically as junction 24, is provided between the p-type layers 20 and n-type layers 22.
  • junction 24 is greatly exaggerated for clarity of illustration.
  • An upper and a lower electrode-pad unit is formed for each LED of the wafer.
  • a lower electrode 28 is formed on n- type layer 22 and an upper electrode 30 is formed on p-type layer 20 as shown in FIG. 1.
  • the wafer is then cut apart to form individual dies which constitute separate LEDs.
  • FIG. 2 shows a typical LED package 10 including p-type layers 20, n-type layers 22, and a substantially transparent first substrate 26.
  • the LED package 10 is mounted atop a second substrate 32, such as a printed circuit board.
  • the second substrate 32 comprises a dielectric element having conductive pads, leads, traces, and/or microelectronic devices, etc.
  • the lower electrode 28 is electrically interconnected with a first conductive pad 34 of the second substrate 32 by a first wire 36.
  • the upper electrode 30 is electrically interconnected with a second conductive pad 38 of second substrate 32 by a second wire 39.
  • First pad 34 and second pad 38 are connected to an electrical power source.
  • the wires 36 and 39 may be formed by wire bonding.
  • wire bonding utilizes heat, ultrasonic energy, vibration, or some combination of the foregoing, to bond small wires to the electrodes and the pads .
  • a substantially transparent encapsulant material 40 is provided over the LED, first substrate 26, and conductive wires 36 and 39.
  • Each layer of the LED package 10 typically has a unique index of refraction.
  • the term "refraction” means the optical phenomenon whereby light passing from a first transparent medium into a second transparent medium has its direction of travel altered.
  • the semiconductor structure has an index of refraction designated nl
  • the transparent substrate 26 has an index of refraction designated n2
  • encapsulant layer 40 has an index of refraction designated n3 , where nl>n3.
  • the light is emitted from the LED. Because the index of refraction of the semiconductor structure (nl) is greater than the index of refraction of the transparent encapsulant 40 (n3), many of the light rays generated by the LED will not be emitted from the LED package 10, but will be subject to total internal reflection. This optical phenomenon, known as total internal reflection, causes light incident upon a medium having a lesser index of refraction (e.g. encapsulant layer 40) to bend away from the normal so that the exit angle is greater than the incident angle. The exit angle will then approach 90° for some critical incident angle ⁇ c that is calculated using Snell's Law.
  • a medium having a lesser index of refraction e.g. encapsulant layer 40
  • the incident angle ⁇ i of a light ray is greater than critical angle ⁇ c , there will be total internal reflection of the light ray.
  • the incident angle ⁇ i of light ray 42 is greater than the critical angle ⁇ c at an interface 41 between p-type layer 20 and encapsulant 40. As a result, light ray 42 is not extracted from the LED, but is totally internally reflected.
  • an optoelectronic device comprises a stacked semiconductor structure including a first region of a first conductivity type and a second region of a second conductivity type. A light-emitting p-n junction is formed between the first region and the second region.
  • the stacked structure defines an upwardly projecting mesa having a top surface.
  • a first electrode-pad unit is connected to the first region and a second electrode-pad unit is connected to the second region.
  • the first electrode-pad unit is disposed on the top surface.
  • the mesa comprises surfaces at an upper end of the structure and the surfaces of the mesa include at least one concave radial surface .
  • Total internal reflection can occur at an interface between the stacked structure and the surrounding medium when the index of refraction of the surrounding medium is less than the index of refraction for the stacked structure.
  • the concave radial surface on the mesa allows more of the light, rays generated at the p-n junction to strike the concave radial surface at an incident angle that is more normal to the surface, as compared to a flat surface. Accordingly, light extraction from the device is improved.
  • the stacked structure is supported by a substantially transparent first substrate.
  • the device preferably has at least one radial side surface on the substrate.
  • the radial side surface on the substrate preferably comprises a concave radial side surface.
  • the first region comprises at least one n-type layer that overlies the first substrate.
  • the second region comprises at least one p-type layer overlying the n-type layer.
  • the p-type layers and the n-type layers form a p-n junction therebetween.
  • the at least one p-type layer preferably comprises at least one side surface having at least one concave radial surface.
  • the at least one n-type layer also preferably comprises side surfaces having at least one concave radial surface.
  • the at least one concave radial surface on the mesa may be formed using an etching process or a deposition process.
  • the first region of the first conductivity type preferably comprises a p-type semiconductor material and defines the top surface.
  • the stacked structure preferably defines a lower surface and the mesa preferably projects upwardly from this lower surface.
  • the first region is preferably disposed in the mesa and defines the top surface, whereas the second region preferably defines the lower surface.
  • the lower surface preferably substantially surrounds the mesa.
  • the first electrode-pad unit on the top surface preferably comprises a transparent electrode covering a substantial portion of the top surface.
  • the transparent electrode allows light rays to pass through the electrode although the electrode covers a substantial portion of the top surface.
  • An electrode covering a substantial portion of the top surface is preferred to address the problem of current bunching .
  • the mesa preferably includes a first pair of opposed side surfaces and a second pair of opposed side surfaces. Each of the side surfaces extend from the top surface of the mesa towards the lower surface.
  • the first pair of opposed side surfaces preferably includes the at least one concave radial surface.
  • the second pair may comprise straight vertical surfaces or concave radial surfaces .
  • the mesa comprises a convex lens having a radius and a height that is selected to substantially counteract total internal reflection based upon the index of refraction for the semiconductor structure in the mesa.
  • the at least one concave radial surface comprises a plurality of concave radial surfaces.
  • Each concave radial surface may define a microlens .
  • the concave radial surfaces preferably comprise a plurality of concave radial surfaces arranged in a two-dimensional array on the top surface of the mesa.
  • the at least one concave radial surface may also define a Fresnel lens.
  • the stacked structure comprises material selected from the group consisting of III-V semiconductors.
  • the first substrate may comprise sapphire, A1N, GaN, ZnO, SiC or LiGaO.
  • the structure preferably comprises gallium nitride based semiconductors, in certain preferred embodiments .
  • an optoelectronic device package comprises a stacked semiconductor structure including a first region of a first conductivity type and a second region of a second conductivity type and a light-emitting p-n junction between the regions.
  • the stacked structure defines an upwardly projecting mesa having a top surface.
  • a first electrode-pad unit is connected to the first region and a second electrode-pad unit is connected to the second region.
  • the first electrode-pad unit is disposed on the top surface.
  • the mesa comprises surfaces at an upper end of the structure, including at least one concave radial surface.
  • the package further includes a second substrate having a first conductive pad a second conductive pad for supporting the optoelectronic device.
  • Conductive features connect the first electrode-pad unit to the first conductive pad and the second electrode-pad unit to the second conductive pad.
  • the conductive features may comprise a first wire and a second wire for interconnecting the device and the second substrate.
  • the device may be mounted to the second substrate so that the first substrate is adjacent the second substrate.
  • the first substrate preferably comprises a substantially transparent substrate and the package may also comprise a reflector disposed between the first substrate and the second substrate.
  • the package also preferably comprises a substantially transparent encapsulant surrounding at least a portion of the structure.
  • the encapsulant preferably comprises an epoxy, elastomer or polymer.
  • the second substrate may be adhered to the first substrate.
  • an optoelectronic device package comprises the optoelectronic device discussed above, a second substrate having a first conductive pad and a second conductive pad supporting the optoelectronic device. Conductive features connect the first electrode-pad unit to the first conductive pad and the second electrode-pad unit to the second conductive pad.
  • the optoelectronic device includes a substantially transparent first substrate supporting the stacked structure.
  • the second region of the stacked structure comprises at least one n-type layer overlying the first substrate and the first region comprises at least one p-type layer overlying the n-type layer.
  • the p-type layers and the n-type layers form a p-n junction therebetween.
  • the at least one p-type layer comprises at least one side surface having the at least one concave radial surface .
  • an optoelectronic device package comprises the optoelectronic device discussed above, in which the at least one concave radial surface comprises a plurality of concave radial surfaces, each defining a microlens on the mesa.
  • the package also has a second substrate with a first conductive pad and a second conductive pad supporting the optoelectronic device. Conductive features connect the first electrode-pad unit to the first conductive pad and the second electrode-pad unit to the second conductive pad.
  • the optoelectronic device package includes an optoelectronic device arranged with the second substrate so that the top surface faces the second substrate.
  • Conductive features connect the first electrode-pad unit to the first conductive pad and the second electrode-pad unit to the second conductive pad.
  • the conductive features preferably comprise electrically conductive bonding material.
  • the first electrode-pad unit may comprise a reflective electrode.
  • a method of making an optoelectronic device comprises providing a first substrate and forming a semiconductor structure on the first substrate.
  • the semiconductor structure has a first region of a first conductivity type, a second region of a second conductivity type overlying the first region and a light-emitting p-n junction therebetween.
  • a lower surface is formed in the first region and a mesa is formed in the structure.
  • the mesa projects upwardly from the lower surface and has a top surface.
  • One or more radial surfaces are formed on the mesa.
  • a first electrode-pad unit is attached to the structure at the first region and a second electrode-pad unit is attached to the structure at the second region.
  • the second electrode-pad unit is disposed on the top surface.
  • the first substrate has a first surface and a second surface facing oppositely from the first surface.
  • the step of forming the semiconductor structure may include depositing a first semiconductor material having a first conductivity type on the first surface of the substrate and depositing a second semiconductor material having a second conductivity type so that the second semiconductor material overlies the first semiconductor material.
  • a portion of the first semiconductor material is covered with a mask and semiconductor material is deposited on the portion of the first semiconductor material that is not covered by the mask to form the mesa.
  • the second semiconductor material defines an upper surface of the structure and the mesa is formed by covering a portion of the upper surface with a mask and removing semiconductor material from a portion of the semiconductor material that is not covered by the mask, forming the lower surface.
  • the lower surface is formed in the first region so that the lower surface at least partially surrounds the mesa.
  • a first electrode-pad unit and a second electrode-pad unit are formed by depositing metal on the top surface of the mesa and depositing metal on the lower surface of the mesa.
  • the second electrode-pad unit preferably covers a substantial portion of the top surface.
  • the metal deposited on the top surface may be selected to form a transparent electrode on the top surface .
  • the mesa includes at least one wall extending from the top surface toward the lower surface, the at least one wall including the at least one radial surface.
  • the at least one radial surface preferably comprises a concave surface.
  • the at least one radial surface may be formed by applying a mask to the top surface of the mesa and removing semiconductor material from the mesa.
  • the at least one radial surface is preferably formed utilizing RIE etching.
  • the mask may be formed to have a tapered or concave shape in cross-section.
  • the RIE etching may be designed to produce various relative etch rate for the mask and the semiconductor material such that the final etch shape of the semiconductor material can be controlled.
  • the RIE etching is selected so that more of the semiconductor material at an outside portion of the mesa is removed than an inside portion of the mesa, thereby forming a concave radial surface.
  • Other forms of plasma etching may also be used, such as CP.
  • a method of forming an optoelectronic device package comprises providing a first substrate and forming a semiconductor structure on the first substrate.
  • the semiconductor structure has a first region of a first conductivity type and second region of a second conductivity type overlying the first region.
  • a light-emitting p-n junction is disposed therebetween.
  • a lower surface is formed in the first region and a mesa is formed in the structure.
  • the mesa projects upwardly from the lower surface and has a top surface. At least one radial surface is formed on the mesa.
  • a first electrode-pad unit is attached to the structure of the first region and a second electrode-pad unit is formed attached to the structure at the second region. The second electrode-pad unit is disposed on the top surface.
  • the first substrate is mounted to a second substrate.
  • the device is preferably encapsulated with a substantially transparent encapsulant.
  • the substantially transparent encapsulant preferably comprises an epoxy, elastomer or a polymer.
  • the first electrode-pad unit is connected to a first conductive pad of the substrate and the second electrode-pad unit is connected to a second conductive pad of the second substrate.
  • the device is mounted to the second substrate so that the first electrode-pad unit and the second electrode-pad unit face the second substrate.
  • An electrically conductive bonding material is preferably disposed between the first electrode-pad unit and the first pad and between the second electrode-pad unit and the second pad.
  • FIG. 1 shows a cross-sectional view of a conventional light-emitting diode ("LED");
  • FIG. 2 shows a cross-sectional view of a conventional LED package including the LED of FIG. 1;
  • FIG. 3A shows a cross-sectional view of a substrate in a method of making an LED package in accordance with an embodiment of the present invention
  • FIG. 3B shows the cross-sectional view of FIG. 3A, at a later stage in the method
  • FIG. 3C shows the cross-sectional view of FIG. 3B, at a later stage in the method
  • FIG. 3D is a partial view of the cross-sectional view of FIG. 3C at a later stage in the method
  • FIG. 3E is a cross-sectional view of a semiconductor structure in a method of making an LED package in accordance with the embodiment of FIGS. 3A-3D;
  • FIG. 3F is the cross-sectional view of FIG. 3E, at a later stage in the method
  • FIG. 3G is a top plan view of the structure of FIG. 3F;
  • FIG. 3H is a cross-sectional view of the structure in the method of making an LED package in accordance with the embodiment of FIGS. 3A-3G;
  • FIG. 31 is the cross-sectional view of FIG. 3H at a later stage in the method
  • FIG. 3J is a partial view of the cross-sectional view of FIG. 31;
  • FIG. 4 shows a cross-sectional view of an LED package, in accordance with a further embodiment of the present invention.
  • FIG. 5 shows a cross-sectional view of an LED package, in accordance with a still further embodiment of the present invention.
  • FIGS. 6A-6C show cross-sectional views of an LED package in a method of making a LED package in accordance with another embodiment of the present invention
  • FIG. 7 shows a cross-sectional view of an LED package in accordance with a further embodiment
  • FIG. 8 shows a cross-sectional view of an LED package in accordance with yet another embodiment
  • FIG. 9A shows a top plan view of a wafer in a method in accordance with another embodiment
  • FIG. 9B shows the cross-sectional view taken at line 9B- 9B in FIG. 9A.
  • FIG. 9C shows the cross-sectional view of FIG. 9B, at a later stage in the method.
  • FIGS. 3 -3J show a method of making an optoelectronic device package in accordance with one embodiment of the invention.
  • a substrate 150 as shown in FIG. 3A, is provided on a support 149.
  • the substrate 150 has a first, upwardly facing surface 152 and a second surface 154 facing in a direction opposite from the first surface 152.
  • the substrate 150 is a substantially transparent substrate.
  • the substrate may comprise a sapphire substrate.
  • the substrate may also comprise GaN, A1N, ZnO, SiC, or LiGaO.
  • a semiconductor structure 110 comprising a stacked structure of semiconductor layers is formed on the substrate 150.
  • a semiconductor material having a first conductivity type is deposited on the first surface 152 of the substrate 150.
  • one or more n-type layers 158 are deposited on the first surface 152 of substrate 150.
  • a semiconductor material having a second conductivity type is deposited over the semiconductor material of the first conductivity type.
  • One or more p-type layers 160 having a top surface 166 are deposited over the n-type layers 158.
  • a junction is also formed between the n-type layers 158 and p-type layers 160.
  • the stacked structure 110 of the embodiment shown in FIGs. 3A-3J comprises a structure for an LED, including a junction 162 between the n-type layers 158 and p-type layers 160.
  • the junction is shown schematically in FIG. 3B as a discrete layer interposed between the layers 158 and 160.
  • the junction may comprise the border between directly abutting p-type and n-type layers, or one or more intermediate layers .
  • the intermediate layers may have any conductivity type or no conductivity type.
  • the junction may include additional structures inbetween the p- type layers 160 and n-type layers 158 or in an intermediate region.
  • the junction may be a simple homojunction; a single heterojunction, a double heterojunction, a single quantum well, a multiple quantum well or any other type of junction structure.
  • the semiconductor structure may incorporate various layers of semiconductor materials, as well as other structures used in the optoelectronic arts .
  • each of the p-type layers 160 and n-type layers 158 can include any number of layers.
  • the structure can incorporate a "buffer layer" at the interface with substrate 150, whereas a highly doped contact layer at the top of the stack may be included to aid in establishing ohmic contact with an upper electrode discussed below.
  • the p-type layers 160 are typically transparent to light at the wavelength which will be emitted by the LED in service. That is, the upper region is formed entirely or principally from materials having a band gap greater than the energy of the photons which will be emitted at the junction.
  • the structure and composition of the various layers incorporated in the stack and the sequence of layers in the stack may be selected according to known principles and techniques to provide the desired emission characteristics.
  • the semiconductor structure 110 comprises gallium-nitride based semiconductor materials such as GaN, AlGaN, InGaN, and Alln GaN, which are used to form LEDs emitting light in various wavelength ranges including blue and ultraviolet.
  • the fabrication processes used to form the stacked structure are well known.
  • the materials are typically grown on the insulating substrate 150 by chemical vapor deposition ("CVD"), metal organic chemical vapor deposition (“MOCVD”), molecular beam epitaxy, and the like.
  • CVD chemical vapor deposition
  • MOCVD metal organic chemical vapor deposition
  • the insulating substrate can comprise any substrate that is not opaque to the emitted light, such as sapphire, alumina, silicon carbide, gallium nitride, silicon carbide or aluminum gallium nitride, for example.
  • the semiconductors deposited may be III-V semiconductors, i.e., materials according to the stoichiometric formula Al a In b Ga c N x As y P z where (a + b + c) is about 1 and (x + y + z) is also about 1.
  • the semiconductor materials are nitride semiconductors, i.e., III-V semiconductors in which x is 0.5 or more, most typically about 0.8 or more.
  • the semiconductor materials are pure nitride semiconductors, i.e., nitride semiconductors in which x is about 1.0.
  • gallium nitride based semiconductor refers to a nitride based semiconductor including gallium.
  • the p-type and n-type conductivity may be imparted by conventional dopants and may also result from the inherent conductivity type of the particular semiconductor material.
  • gallium nitride based semiconductors typically are inherently n-type even when undoped.
  • N-type nitride semiconductors may include conventional electron donor dopants such as Si, Ge, S, and O, whereas p-type nitride semiconductors may include conventional electron acceptor dopants such as Mg and Zn.
  • the semiconductor structure 110 has an upper end 161 and a lower end 163.
  • an upwardly projecting mesa 164 is formed in the semiconductor structure 110.
  • the semiconductor structure 110 shown in FIG. 3B is preferably etched to form an upwardly projecting mesa 164 and a lower surface 159.
  • the layers of semiconductor material which form the p-type layers 160 and the junction 162 are removed by selectively etching the structure 110.
  • a portion of the n-type layers 158 is also removed.
  • the regions in those areas which are to form the mesa 164 are protected by a mask during etching so as to form the upwardly projecting mesa 164.
  • Such an etching process may use, for example, conventional photolithographic masking techniques .
  • Etching to remove part of the structure 110 forms a lower surface 159.
  • the lower surface 159 and mesa 164 may be formed by selective deposition.
  • the n-type layers 158 are deposited on the substrate 150.
  • the areas of the n-type layers 158 which are to form the lower surface 159 are covered with a masking material or otherwise protected from the deposition process.
  • Semiconductor material for the junction 162 and p-type layers 160 are deposited on the n-type layers 158, so that the uppermost layers in the stack are not formed in these areas.
  • the n-type layers 158 define a lower surface 159 as shown in FIG. 3C.
  • Surface 159 faces upwardly, away from substrate 150.
  • the n-type layers 158 and substrate 150 have vertically extending edges 148, extending downwardly from surface 159.
  • the mesa 164 projects upwardly from the lower surface 159.
  • the p-type layer 160 and junction 162 preferably define the mesa 164, which has a top surface 166 and vertically extending walls 168 extending from the top surface 166 toward lower surface 159.
  • the junction 162 and the p-type layers 160 are disposed within the upwardly projecting mesa 164.
  • the mesa 164 is typically rectangular or substantially square in shape.
  • FIGs. 3A-3J show a structure 110 having a single mesa 164 for a single LED device, typically a structure 110 is formed as a wafer for a plurality of devices. Thus, a plurality of mesas 164 would be formed in a grid on the wafer and the following steps are performed for each device to be formed.
  • mesa 164 is subjected to an etching process which removes some of the semiconductor material from the p-type layers 160.
  • One preferred etching process includes a reactive ion etching (RIE) process. In other preferred methods, other forms of plasma etching are used, such as ICP.
  • RIE reactive ion etching
  • ICP ICP.
  • a photoresist material 167 is deposited on the top surface 166 of mesa 164 and is exposed and developed to form a mask 165 having openings 169. During etching, the walls 168 and a portion of the top surface 166 are attacked and semiconductor material is removed from the mesa 164 until a curved surface is obtained.
  • a portion of the top surface remains after etching, to be used for an upper electrode-pad unit, as discussed below.
  • the mask may be given a tapered shape, as shown in FIG. 3D, utilizing controlled processing or baking of the photoresist and the relative etch rates for the photoresist and semiconductor materials may be tailored so as to form the curved surfaces on the mesa 164, at the upper end of the structure 110.
  • the RIE etching removes the mask at an outside portion of the mesa first and then begins to remove semiconductor material from the p-type layers 160, as represented by the dashed lines in FIG. 3D.
  • These techniques are known in the art. In other embodiments, conventional lithographic techniques may also be used.
  • the radial surfaces on the mesa may also be formed utilizing an additive process, as discussed above. In embodiments in which the radial surfaces are formed in an additive process, transparent dielectric or polymeric material is deposited on the p-type layers 160.
  • the etching process forms one or more radial surfaces 170 extending between top surface 166 and n-type layers 158 as shown in FIG. 3F.
  • radial means having a radius. It should be understood that the radial surface may not be consistent across the full length of the surface 170.
  • the radial surface of mesa 164 is curved, preferably having a concave shape, as shown in Fig. 3F.
  • the radial surface 170 optimizes the amount of light that may be .extracted from the package, as will be described in more detail below.
  • the concave radial surface 170 of the mesa 164 has an essentially oblong shape when viewed in plan, as shown in FIG. 3G.
  • the concave radial surface 170 has a radius "r" and a height "h” that is preferably selected to substantially counteract total internal reflection based upon the index of refraction for the structure.
  • the curvature of concave radial surface 170 is selected so that most of the light rays generated will strike the interface 192 at a ⁇ i ; less than ⁇ c, based upon the index of refraction for the structure, ni.
  • a lower electrode-pad unit 172 is formed on the lower surface 159 of n-type layer 158 and an upper electrode-pad unit 173 is formed on top surface 166 of mesa 164.
  • the lower electrode-pad unit 172 and upper electrode-pad unit 173 comprise a conductive material such as a conductive metal. Preferred conductive metals include gold, aluminum or silver.
  • the upper electrode-pad unit 173 comprises a transparent upper electrode 175 covering a substantial portion of the entire top surface 166 of the mesa 164.
  • the upper electrode 175 is formed from a material which will provide a low resistance, desirably ohmic contact, with the semiconductor material of the p-type layers 160 defining the top surface 166 of the mesa.
  • the composition and thickness of the transparent electrode 175 are selected to provide substantial transparency to light at the wavelength which will be emitted by the LED in service. Suitable materials, thicknesses and processing techniques for forming transparent electrodes to be used with particular semiconductor materials are well known.
  • one suitable upper electrode 175 for use where the top surface 166 is defined by p-type gallium nitride can be formed by applying a layer of nickel, typically about 10 to about 500 A thick and a layer of gold, typically about 10 to about 500 A thick, onto the top surface 166 and annealing the contact in an oxidizing atmosphere at an elevated temperature as, for example, about 300 - 900 °C so as to oxidize the nickel.
  • the layers of metal are applied using electron beam deposition, sputter deposition, plating, or other known methods.
  • the metals for upper electrode 175 are deposited so as to avoid depositing metal overlapping with the electrode to be formed on the lower electrode surface, which can short out the device .
  • the upper electrode-pad unit 173 also preferably includes a first pad 174 formed on the top surface of upper electrode 175 at or near the horizontal center of the top surface 166.
  • First pad 174 is formed from appropriate materials to provide a terminal which can be connected to an external lead or contact in service as, for example, by wire bonding the lead to the pad.
  • the materials of the pad should also be compatible with the materials in the upper electrode 175.
  • first pad may include a layer of titanium overlying the transparent electrode; a layer of platinum overlying the titanium layer and a layer of gold overlying the platinum layer.
  • the exposed layer of gold provides a suitable surface for wire bonding.
  • the first pad typically has a diameter of about 100-120 microns.
  • this pad is as small as possible consistent with the requirements of the bonding operation used to connect the pad to external circuitry.
  • the upper electrode-pad unit 173 comprises a small pad directly on the top surface without a transparent electrode at the top surface.
  • the upper electrode 175 comprises an electrode that is essentially opaque to the light emitted by the device and the radial surface and other surfaces of the device are relied upon to transmit light.
  • a lower electrode-pad unit 172 is provided on the lower surface 159.
  • This electrode-pad unit 172 preferably comprises a second pad 140 on the lower surface.
  • Second pad 140 may be, for example, about 100 microns wide.
  • the second pad 140 is formed from electrically conductive materials which make a good, desirably ohmic electrical contact with the lower surface 159.
  • the second pad 140 may be formed from layers of aluminum and titanium which are annealed at an elevated temperature.
  • the second pad 140 also preferably includes layers adapted for bonding to external leads or other structures.
  • the second pad 140 may include a layer of platinum over the titanium and aluminum layers and a layer of gold over the platinum layer.
  • the entire lower electrode-pad unit 172 is formed from layers of aluminum, titanium, platinum and gold, deposited in that order and then annealed.
  • the semiconductor materials for a plurality of devices are deposited to form a wafer.
  • Mesas and electrode-pad units are formed for each device and then the wafer is severed into individual devices.
  • the wafer is cut utilizing a laser.
  • mechanical scribing is used. In mechanical scribing, small scratches are made on the semiconductor materials with a diamond-tipped tool. Then, the semiconductor material is broken along the lines formed by the scratches. The wafer is severed so as to form a quadrilateral shape in plan.
  • the LED device is then formed into a package 100.
  • the first pad 174 and second pad 140 are connected by conductive features 141, which may comprise wire bonds 184 and 186, to an external electrical power source.
  • Current flows between pads 174 and 140 through the electrodes and through the stacked structure, so that light is emitted at junction 162. The light is emitted out of the structure, through the transparent first electrode 175 and other surfaces of the structure.
  • the LED subassembly is then mounted on a second substrate 176, such as a printed circuit board or other dielectric element having conductive pads, leads, traces, and/or microelectronic devices, etc.
  • the second substrate 176 has a top surface 178 with a first contact 180A and a second contact 180B.
  • the second substrate 176 has a bottom surface 182 remote from the top surface 178.
  • the second surface 154 of substrate 150 is abutted against the top surface 178 of the second substrate 176.
  • the substantially transparent substrate 150 may be adhered to second substrate 176 using an adhesive, such as a thermally conductive adhesive.
  • a reflector 190 comprising a layer of reflective material, is disposed between the substrate 150 and substrate 176.
  • the reflector 190 comprises a diffraction grating disposed between the substrate 150 and second substrate 176.
  • the diffraction grating may comprise a diffraction grating disclosed in certain embodiments of U.S. Provisional Application entitled "GaN
  • the LED package is then electrically interconnected with the second substrate 176.
  • second pad 140 is electrically interconnected with first contact 180A using first conductive wire 184 and first pad 174 is electrically interconnected with second contact 180B by second conductive wire 186.
  • the electrically interconnected LED package may be encapsulated with a substantially transparent encapsulant 188.
  • Preferred encapsulants include elastomers, polymers and epoxies.
  • the design of the package 100 allows light generated by the LED to pass through the encapsulant layer 188.
  • a light ray 190 generated at junction layer 162 is able to pass through the interface 192 between p-type layer 160 and encapsulant layer 188.
  • An enlarged view of light ray 190 passing through interface 192 is shown in FIG. 3J. Dashed lines in FIG. 3J show the top surface 166' and wall 168' before the radial surface 170 was formed.
  • the p-type layer 160 and junction 162 have radial surface 170, which is a concave surface, so that the incident angle for the light ray 190 is substantially normal to interface 192, as compared to the incident angle for light ray 190 at surface 166'.
  • Light ray 190 is more normal to, or perpendicular to, the interface 192 and it is believed that this feature allows ray 190 to be emitted from, rather than internally reflected in, the LED.
  • light ray 190 passes through interface 192 and is extracted from the LED package. It is believed that many more light rays generated by the device will be emitted, thereby providing a dramatic improvement over the prior art package shown in FIG. 2 wherein a light ray following a similar path is totally internally reflected back into the LED.
  • providing an LED package having a mesa with one or more concave radial surfaces dramatically improves the amount of light that may be extracted from such an LED package.
  • FIG. 4 shows an LED package 200, in accordance with further preferred embodiments of the present invention.
  • the package 200 has a semiconductor structure 210 with a mesa 264 that has been shaped to provide one or more concave surfaces 270 extending between a top surface 266 of mesa 264 and the lower surface 257 of n-type layers 258.
  • the curved surface 170 may be formed as discussed above.
  • the edges 248 of n-types layer 258 and the substrate 250 also have one or more concave surfaces 272.
  • the concave surfaces 272 extend only on the n-type layers 258 or only on the substrate 250. In other preferred embodiments, the concave surfaces 272 extend on both the n-type layer 258 and substrate 250.
  • the LED subassembly is preferably mounted atop a second substrate 276, such as printed circuit board, having a top surface 278 and a bottom surface 282 remote therefrom.
  • the second substrate 276 may be a printed circuit board or other dielectric element having conductive pads, leads, conductive traces, microelectronic devices, etc.
  • the LED package may be electrically interconnected with the second substrate 276 via a first conductive wire 284 and a second conductive wire 286.
  • An encapsulant layer 288 is desirably deposited atop LED package for encapsulating the package.
  • a first light ray 290 emitted from junction layer 262 passes through concave surface 270 of mesa 264.
  • Light ray 290 passes through interface 292 and is extracted from LED package. This is a dramatic improvement over prior art LED packages wherein light rays following a path similar to the path of light rays 290 will is totally internally reflected back into the LED package (e.g., see FIG. 2).
  • a second light ray 290' passes through the radial or concave surface 272 at the edge of n-type layer 258 and is also extracted from the package.
  • the incident angle for the first light ray 290 and second light ray 290' is more normal to the interfaces at the curved surfaces 270 and 272 and it is believed that this enables the light rays 290 and 290' to be emitted from the device, rather than internally reflected.
  • FIG. 5 shows an LED package, in accordance with another preferred embodiment of the present invention.
  • LED package 300 includes substantially transparent substrate 350 having an LED 356 mounted thereon.
  • LED 356 includes n-type layers 358, p-type layers 360 and junction 362.
  • P-type layers 360 are subjected to a masking and etching process that forms an array of radial surfaces 370A, 370B and 370C at the upper surface 366 of p-type layers 360.
  • the present invention is not limited by any particular theory of operation, it is believed that providing a p-type layers 360 having an array of radial surfaces 370 will optimize the number of light rays that may escape from LED package 300. As shown in FIG.
  • a first light ray 390 is substantially normal to an interface 392 between p-type layer 360 and encapsulant layer 388. It is believed that, as a result, the first light ray 390 is able to pass through the interface 392 and into encapsulant layer 388. In contrast, a second light ray 390' engages a portion of p-type layer 360 that is substantially flat. As a result, the second light ray 390' is totally internally reflected back into the LED package 300. Thus, it can be seen that providing an array of radial or convex surfaces atop the p-type layer of the LED generally enhances the amount of light that is extracted from the LED package 300.
  • the electrode-pad unit 373 on the mesa comprises a transparent, current spreading electrode 375 and a pad 374.
  • Such electrode 375 may be formed by evaporating metal or metals and allowing the evaporated metal or metals to collect on the top surface 366 of the mesa so as to cover radial surfaces 370A, 370B and 370C.
  • the metal or metals are selected to form a transparent electrode upon annealing.
  • an LED having a mesa with a top surface defining a plurality of concave radial surfaces defines a Fresnel lens.
  • the Fresnel lens has a plurality of discrete surfaces each having a curvature corresponding to a portion of the surface of a lens having a continuous curved surface.
  • FIGS. 6A-6C show a method of making an LED package 400 having one or more radial surfaces for improving light extraction, in accordance with other preferred embodiments.
  • the one or more radial surfaces are formed using an additive process, as opposed to the removal/etching processes shown and described above. Selective re-growth of the semiconductor material is used to form the curved shape of the radial surfaces .
  • the etching process discussed above may be used to form the package 300 shown in FIG. 5.
  • an additive process may be used to form the packages shown in FIGS. 31, 4, 5 or other packages having radial surfaces according to embodiments of the invention.
  • a semiconductor structure 410 includes a substantially transparent substrate 450 an n-type layer 458, junction layer 462 and a p-type layer 460, is provided.
  • the p-type layer 460 and junction layer 462 are formed by depositing semiconductor materials utilizing one of the methods discussed above on a top surface 459 of the n-type layers 458.
  • these layers may be deposited using a CVD process.
  • these layers are deposited while a peripheral portion 461 of the top surface 459 is covered by a mask, forming a mesa 464 having top surface 466.
  • Mesa 464 preferably projects upwardly from a lower surface provided at the top surface 459 of n-type layer 458.
  • a substantially transparent material 494 is preferably deposited atop the top surface 466 of p-type layers 460.
  • the material 494 preferably comprises a semiconductor material and will carry a pad 474. Portions of the LED package are preferably covered with a mask during this process.
  • the substantially transparent material 494 is a material that is substantially similar to the material comprising p-types layer 460.
  • the substantially transparent material 494 is deposited in a manner so as to form an array of microlenses having radial surfaces 470. In other embodiments, the array of microlenses may be replaced with a single concave-shaped lens deposited on p-layers 460.
  • Lower contact 472 is formed on n-type layers 458 and upper contact 474 is deposited on p-type layers 460.
  • the LED subassembly is then mounted on a second substrate 476, having contacts 480A, 480B on a top surface 478 thereof.
  • the upper pad 474 is then electrically interconnected with the contact 480B and lower 480A is electrically interconnected with contact 480A on the printed circuit board 476.
  • the LED package may then be encapsulated using an encapsulant layer 488 that is preferably substantially transparent so that light generated by LED package 400 may be extracted from the package through encapsulant layer 488.
  • a light ray 490 emitted from the junction layer 462 of the LED engages the interface 492 between the microlens designated 470H and encapsulant layer 488, as shown in FIG. 6C .
  • light ray 490 is substantially normal to the interface 492 between microlens 47OH and encapsulant layer 488. It is believed that, as a result, light ray 490 passes through interface 492, into encapsulant layer 488, and is extracted from LED package 400.
  • the etching of the mesa to form the radial surfaces is performed so as to remove the flat top surface.
  • a structure shown in FIG. 7 is achieved.
  • the mesa 164 so obtained has curved sides that meet at the top of the mesa 164, without having a flat top surface between the curved side surfaces.
  • the structure 610 has a substantially transparent back face 654 through which light will be directed.
  • the transparent back face may comprise a sapphire substrate 650.
  • the structure 610 is a semiconductor structure comprising a stacked structure of p- type, n-type and other semiconductor materials for generating light, as discussed above.
  • the structure 610 has a mesa 664 protruding from the structure and a lower surface 659. In the embodiment shown in Fig. 8, the mesa 664 has side surfaces with radial surfaces 670.
  • the back face 654 incorporates a plurality of microlenses as shown in Fig. 5, and/or radial surfaces extending between the side surfaces of the substrate 650 and the back face 654.
  • An upper electrode-pad unit 675 is mounted on the mesa 664 and has a first pad 634.
  • a lower electrode-pad unit 672 is mounted on the lower surface 659 and has a second pad 641.
  • the first pad 634 and second pad 641 are connected to a first contact 638 and second contact 633 on a second substrate 676.
  • the structure 610 may be formed as discussed above, using either a subtractive or an additive process. Structure 610 is bonded to the contacts of second substrate 676 by, for example, disposing masses 686 and 684 of bonding material between each of the pads and contacts.
  • the contacts are also connected to an electrical power source. Thus, light generated by this device is directed out the back face 654 and a transparent electrode for upper electrode pad unit is not necessary.
  • At least some light rays generated at the junction 662 will be directed towards the mesa 664.
  • Mesa 664 has at least one curved surface 670 for extracting light from the LED.
  • a reflector mounted within the package 600 may be used to direct light emitted at surface 670 towards the back surface 654, if desired.
  • the first pad 634 comprises a reflective electrode.
  • the reflective electrode may be formed as follows. After the structure 610 having the mesa 664 has been formed with the curved surface 670, the area for the first pad 634 is defined using a photolithographic mask on the top surface 666 of the mesa 664. Nickel is deposited on the top surface of the mesa 664. Gold is then deposited on the layer of nickel. The metals may be deposited utilizing electron beam deposition, sputter deposition, plating, or other known methods. The foregoing layers of metal are then oxidized so that they become transparent. A layer of reflective metal, such as gold, is then deposited on the oxidized metal.
  • the layer of reflective metal should be thick enough to reflect the light generated by the LED through the back surface 654.
  • the layer of reflective metal may comprise titanium.
  • the layer of reflective metal may be deposited on the first pad 634.
  • the first pad 634 may be comprised of one or more layers of reflective metal.
  • the reflective pad 634 reflects light for improved light extraction through the substrate 650.
  • the substrate 650 and n-type layers 658 include radial surfaces for improved light extraction.
  • the layer of reflective metal deposited is thick enough so that it can be used to bond the pad 634 to the contact 638.
  • the transparent top electrode can be omitted from the devices discussed above, so that the top electrode-pad unit consists only of a pad and an electrode in the area occupied by the pad.
  • This approach can be used, for example, where the first or upper region has relatively low resistance to current flow in the horizontal direction as, for example, where the first or upper region includes a thick layer of semiconductor material. More typically, however, at least in the case of L ⁇ D's formed from nitride semiconductors such as GaN, the cost and difficulties encountered in growing such a layer to the requisite thickness with good crystal quality outweigh the cost and light transmission efficiency losses associated with the transparent top electrode.
  • a method of making an optoelectronic device utilizes a single mask for forming the mesa and for shaping the mesa.
  • a photoresist material 767 is deposited on an upper surface 773 of the p-type layers 760 and is exposed and developed to form a mask 765 having openings 769.
  • the mask 765 is also subjected to a controlled processing or baking to produce a tapered or concave cross-sectional shape for the mask 765.
  • the portion of the upper surface 773 that is not covered by the mask 765 is attacked and semiconductor material is removed from the p-type layers 760 until a lower surface 759 is obtained.
  • the etching occurs until the lower surface 759 is formed in the n-type layers 758 and a mesa 764 is formed.
  • the same etching shapes the mesa 764 as it is formed.
  • the tapered or concave shaped mask 765 is gradually removed in the etching process, as discussed above in connection with Figs. 3E and 3F, so that less of the semiconductor material beneath the tapered portions of the mask 765 is removed.
  • the etching is designed such that the final etch shape of the mesa 764 is controlled and a curved surface 770 is obtained. Preferably, a portion of the top surface remains after etching.
  • the invention can be applied with devices formed from semiconductor materials other than gallium nitride based semiconductors as well.
  • the conductivity types can be reversed, so that in some cases the upper region can be formed from n-type semiconductor material whereas the lower region may be formed from p-type semiconductor material.
  • the devices may comprise mesas having curved surfaces at only two of four sides of the mesa.
  • the mesa shown in FIG. 3G may comprise a rectangular mesa with two opposed side surfaces that are flat, essentially vertical surfaces and two opposed side surfaces that are concave curved surfaces.
  • the mesa shown in FIG. 3G may have a circular shape in plan.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

L'invention concerne un dispositif opto-électronique (100) qui comprend une structure superposée, à première zone (158) d'un premier type de conductivité et seconde zone (160) d'un second type de conductivité, et jonction p-n (162) lumineuse entre ces deux zones. La structure superposée définit une structure mésa à surface supérieure (175), et une première unité électrode-plot (174) est placée sur la surface supérieure. A une extrémité supérieure, la structure mésa comporte des surfaces latérales. Les surfaces latérales comportent au moins une surface radiale concave (170) pour optimiser l'extraction lumineuse hors du boîtier. On peut également former une ou plusieurs surfaces radiales dans la seconde zone de la diode électroluminescente et/ou dans le substrat (150) sensiblement transparent. L'invention concerne également des boîtiers équipés du dispositif décrit et des procédés d'élaboration correspondants.
PCT/US2001/043515 2000-11-17 2001-11-16 Boitier de diode electroluminescente a extraction lumineuse amelioree, et procedes d'elaboration correspondants WO2002059983A1 (fr)

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WO2004097947A2 (fr) * 2003-05-02 2004-11-11 University College Cork-National University Of Ireland, Cork Diodes electroluminescentes et leur procede de fabrication
EP1961371A2 (fr) * 2007-01-30 2008-08-27 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Dispositif d'éclairage pour un dispositif de détection d'image au niveau de l'extrémité distale d'un endoscope
DE10253161B4 (de) * 2002-09-12 2010-05-06 Osram Opto Semiconductors Gmbh Verfahren zur Herstellung von optoelektronischen Halbleiterchips mit verbesserten Oberflächeneigenschaften

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EP1961371A3 (fr) * 2007-01-30 2014-02-19 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Dispositif d'éclairage pour un dispositif de détection d'image au niveau de l'extrémité distale d'un endoscope
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